DEVICES WITH TEMPERATURE-SENSITIVE PRE-VOLTAGE CIRCUITS AND METHOD FOR MANUFACTURING THEM

Abstract

Device comprising: an active device (15) with a first connection (30); a first bias resistor (35) connected to the first terminal and a second bias resistor (37) connected in series with the first bias resistor; and a first resistor (40) with a first phase transition material connected in parallel with the first bias resistor, wherein the first phase transition material has a first phase with low conductivity for temperatures below a first phase transition temperature and a first phase with high conductivity for temperatures above the first phase transition temperature; a second resistor (42) comprising a second phase transition material connected in parallel with the second bias resistor, wherein the second phase transition material has a second phase with low conductivity for temperatures below a second phase transition temperature and a second phase with high conductivity for temperatures above the second phase transition temperature.

Description

BACKGROUND 1. AREA OF INVENTION

[0001] The present invention relates to semiconductor devices and in particular a transistor with a temperature-sensitive bias circuit. 2. DESCRIPTION OF THE STATE OF THE ART

[0002] In modern integrated circuits, a very high number of individual circuit elements, such as field-effect transistors in the form of CMOS, NMOS, PMOS elements, and the like, are implemented on a single chip area. In addition to the large number of transistor elements, several passive circuit elements, such as capacitors, resistors, and the like, are typically implemented in integrated circuits, serving various purposes, such as decoupling.

[0003] Polysilicon lines can be used as gate electrodes in the manufacture of transistors. A resistor can also be manufactured using a polysilicon line. The resistance of a polysilicon resistor is essentially determined by its length and cross-sectional area. The resistance of polysilicon changes with temperature.

[0004] Power amplifier and low-noise amplifier circuits typically use bipolar transistor devices operated with a constant collector current. A polysilicon bias resistor is connected to the base terminal of the bipolar transistor. As the device temperature increases, the transistor current gain β typically decreases in advanced silicon-germanium bipolar transistors, necessitating an increased base current to maintain the constant collector current. This increased base current causes an increased voltage drop across the bias resistor, requiring an increased voltage applied to the base to maintain the collector current. The increased base voltage degrades the amplifier's efficiency and linearity.The increased temperature also increases the resistance of the polysilicon bias resistor, further exacerbating the problem.

[0005] US Patent 3,614,480 A discloses a device for maintaining a stabilized, elevated operating temperature of an electronic device, comprising: a material body containing the device whose temperature is to be stabilized; electrically excitable heat-generating means mounted in close thermal energy transfer relationship with the body to heat the device; and control means comprising temperature-sensitive means connected to the heat-generating means to control the rate of heat generation in the heat-generating means. The temperature-sensitive means include a resistor containing a material selected from the group consisting of 3D transition materials that exhibit a relatively abrupt change in conductivity at a transition temperature substantially equal to the desired elevated operating temperature.

[0006] US Patent 3,843,949 A describes an electrical relay capable of providing substantially complete high-voltage isolation between its control element and its temperature-sensitive switching element. The electrical relay comprises a plate-shaped, thermally conductive substrate made of electrically insulating material with high dielectric strength and good thermal conductivity, the substrate being approximately 0.006 inches thick; first spaced electrical contacts on one side of the substrate; a layer of selected temperature-sensitive material bridging the first spaced electrical contacts; an electrical heating device on the opposite side of the substrate for heating the temperature-sensitive material, which acts as the control element; and second spaced electrical contacts mounted on the electrical heating device.The temperature-sensitive material meets the following criteria: it contains elements whose atoms, in chemical compound with other elements, have an incompletely filled d-shell or an incompletely filled f-shell; it contains a substance that removes s- and p-electrons from the conduction bands of the atoms; and it exhibits a strong conductivity change between an insulating and a conducting state at a certain critical temperature.

[0007] From US patent 3,149,298 A, a signal translation system is known that includes a signal translation device comprising, as the active element, a body made of a single compound selected from a group of 3d transition metal compounds that exhibits a substantial and abrupt change in conductivity at a characteristic temperature, coupled with a device for reducing the ambient temperature below -110 degrees Celsius, an electrical input device for raising the temperature of the active element from the ambient temperature to the characteristic temperature, and a signaling device for varying the temperature of the crystal around the characteristic temperature. According to US patent 2017 / 0301818A1, a known active photonic device with a Darlington configuration comprises a substrate and a collector layer above the substrate.It further comprises an inner collector area and an outer collector area which substantially surrounds and is spaced apart from the inner collector area, a base layer above the collector layer consisting of an inner base region, a first outer base region, and a second outer base region, wherein the first outer base region and the second outer base region substantially surround the inner base region and are spaced apart from the inner base region and from each other.Above the base layer is an emitter layer comprising: an inner emitter region, which is annular and located above an outer circumference of the inner base region, and essentially extending around it; a first outer emitter region; and a second outer emitter region, wherein the first outer emitter region and the second outer emitter region are spaced from the inner emitter region and from each other, while essentially surrounding the inner emitter region. Furthermore, a first interconnection structure is provided, electrically connecting the inner collector region to the first outer base region, and a second interconnection structure is provided, electrically connecting the first outer emitter region to the second outer base region.

[0008] The objective of the present invention, which is directed towards various methods and the resulting devices, is to avoid or at least reduce the effects of one or more of the problems identified above.

[0009] The problem is solved by the devices according to claims 1 and 8, and by the method according to claim 13. Further embodiments are set out in the dependent claims. SUMMARY

[0010] The following is a simplified summary of the invention to provide a basic understanding of some aspects of it. This summary does not constitute a complete overview of the invention. It is not intended to identify key or critical elements of the invention or to define its scope. Its sole purpose is to present some concepts in simplified form prior to the more detailed description below.

[0011] In general, the present invention is directed to the manufacture of semiconductor devices and in particular to a temperature-sensitive bias circuit.

[0012] In one aspect, a device according to claim 1 is provided, wherein advantageous embodiments thereof are defined in dependent claims 2 to 7.

[0013] In another aspect, a device according to independent claim 8 is provided, wherein advantageous embodiments thereof are defined in dependent claims 9 to 12.

[0014] In another aspect, a method according to independent claim 13 is provided, wherein advantageous embodiments thereof are defined in dependent claims 14 and 15. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The invention can be understood with reference to the following description in conjunction with the accompanying drawings, in which the same reference numerals denote the same elements and in which: Fig. 1 a circuit diagram of a temperature-sensitive bias circuit according to some embodiments; Fig. 2 is a diagram that shows a temperature-resistance characteristic for the phase transition material resistance in Fig. 1 according to some embodiments; Fig. 3 a cross-section of a semiconductor product with phase transition material resistances according to some embodiments; and Fig. 4 and Fig. 5 Circuit diagrams of alternative embodiments of temperature-sensitive bias circuits according to some embodiments are shown.

[0016] While the subject matter disclosed herein may be subject to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and described in detail herein. It is understood, however, that the description of specific embodiments herein is not intended to limit the invention to the specific forms disclosed. DETAILED DESCRIPTION

[0017] Several exemplary embodiments of the invention are described below. For the sake of clarity, not all features of a specific implementation are described here. It should be noted that the development of such a specific embodiment requires numerous implementation-specific decisions to achieve the developers' particular goals, such as compliance with system-related and business-related constraints, which vary from implementation to implementation.

[0018] The present subject matter will now be described with reference to the accompanying figures. Various structures, systems, and devices are shown schematically in the drawings for illustrative purposes only, so as not to obscure the present invention with details. The accompanying drawings provide illustrative examples of the present invention. The words and phrases used herein should be understood and interpreted in such a way as to acquire a meaning consistent with the understanding of these words and phrases. A special definition of a term or phrase, i.e., a definition that differs from the ordinary and usual meaning, is not intended or should be implied by the consistent use of the term or phrase herein. Insofar as a term or phrase is intended to have a special meaning, i.e.,If a meaning differs from the common understanding, such a specific definition is expressly and definitively established in the specification, directly and unambiguously providing the specific definition for the term or phrase. The present invention relates to various methods for forming a connection structure. With reference to the accompanying drawings, various exemplary embodiments of the methods and devices disclosed herein are now described in more detail.

[0019] Fig. Figure 1 shows a circuit diagram of a temperature-sensitive bias circuit 10 according to some embodiments. The circuit 10 comprises a bipolar transistor 15 with a collector terminal 20, an emitter terminal 25, and a base terminal 30. A bias transistor 35 is connected to the base terminal 30. A phase transition material resistor 40 is connected in parallel with the bias resistor 35. In some embodiments, the bias resistor 35 is relatively temperature-insensitive. In one example, the bias resistor 35 is a polysilicon resistor. The phase transition material resistor 40 comprises a phase-changing material, such as organic materials, inorganic materials, or solid-state phase-change materials. In some embodiments, the phase transition material resistor 40 comprises vanadium and oxygen, for example, in the form of vanadium dioxide.In some embodiments, other materials are used, such as various combinations of tellurium (Te), germanium (Ge), and / or antimony (Sb), with dopant elements such as indium (In), oxygen (O), selenium (Se), tin (Sn), etc. In some embodiments, the phase transition material resistor 40 is doped with another material, such as tungsten (W), to adjust its phase transition temperature.

[0020] Fig. Figure 2 shows a diagram that approximates a temperature-resistance characteristic for the phase transition material resistance 40 in Fig. Figure 1 represents the process. Generally, as the device temperature increases, the phase transition material resistance 40 undergoes a phase transition from the low conductivity of an insulating or semiconductor material to the high conductivity of a metallic material at a specific heating transition temperature 50 (e.g., insulator-to-metal junction IMT or semiconductor-to-metal junction SMT). In some embodiments, the resistance in a low-conductivity phase 55 decreases by approximately four orders of magnitude (e.g., by a factor of about 10,000) after a transition to a high-conductivity phase 60. In the opposite direction (i.e., cooling), hysteresis may occur, such that a cooling transition temperature 65, associated with a phase change from the high-conductivity phase 60 to the low-conductivity phase 55, is lower than the heating transition temperature 50.

[0021] With renewed reference to Fig. Section 1 describes the operation of the temperature-sensitive bias circuit 10 in various temperature ranges. The base voltage VB is controlled (e.g., via a current mirror or other suitable control circuit) to generate a base current IB sufficient to provide a constant collector current IC. At device temperatures below the heating junction temperature 50, where the phase junction material resistance 40 is in the low-conductivity phase 55, the resistance of the bias transistor 35 (e.g., 1–1000 ohms) is the main factor determining the base resistance, since the resistance of the phase junction material resistance 40 is several orders of magnitude higher than the resistance of the bias transistor 35. As the device temperature increases, the β-value of the bipolar transistor 15 also increases, and to some extent, so does the resistance of the bias transistor 35.The base voltage is increased to compensate for changes in the β value and the bias resistance 35.

[0022] As the device temperature continues to rise and exceeds the heating junction temperature 50, the resistance of the phase junction material 40 decreases by several orders of magnitude (e.g., to about 1 kΩ or less). The total base resistance provided by the bias resistor 35 and the phase junction material 40 decreases. As a result of the reduced total resistance, the base voltage and associated base current required to drive the bipolar transistor 15 decrease, thus keeping the collector current constant and compensating for the temperature-induced increase in the β-value of the bipolar transistor 15 and the resistance of the bias transistor 35.

[0023] Fig. Figure 3 is a cross-section of a semiconductor device 100 with phase transition material resistances 40 according to some embodiments. Fig. Figure 3 represents the product 100, in which a device layer 105 is formed in and over a substrate 110, in which semiconductor-based circuit elements can be provided and covered by a dielectric layer 115. For the sake of clarity, such circuit elements are shown in Fig. 3 not shown. In some embodiments, the substrate 110 may be a semiconductor material, glass, sapphire, or another substrate material. The device layer 105 comprises contacts 120 (e.g., tungsten, cobalt, copper, or another suitable material) formed in the dielectric layer 115 for contacting the underlying devices, such as transistors (not shown). The substrate 110 may also include any suitable microstructural features, such as micromechanical components, optoelectronic components, and the like. The device layer 105 may include active or passive devices, including but not limited to MOSFETs, bipolar transistors (e.g., the bipolar transistor 15), silicon-germanium heterojunction bipolar transistors (SiGe HBTs), capacitors, diodes, vectors, resistors, etc., which are electrically contacted by contacts 120.

[0024] A metallization system 125 is formed above the device layer 105 to connect the various components within it. In highly complex integrated circuits, a very large number of electrical connections may be required, so that typically a large number of metallization layers can be formed in the metallization system 125.

[0025] A first metallization layer 130 of the metallization system 125 comprises a dielectric layer 135 and one or more phase-transition material resistances 40, 42 formed over the device layer 105. In some embodiments, the phase-transition material resistances 40, 42 are formed by planar deposition of a material layer comprising vanadium and oxygen or other materials, as described above, and by structuring the material layer using a photolithography and etching process. The phase-transition material resistances 40, 42 can be formed in the metallization layer 130 over different regions of the device layer 105. Due to the different vertical positioning of the phase-transition material resistances 40, 42 relative to the device layer 105, the phase-transition material resistances 40, 42 can respond to different temperature stimuli.For example, the phase transition material resistances 40 located closer to the device layer 105 primarily respond to the internal heat generation resulting from the operation of the devices, while the phase transition material resistances 42 located in an upper layer primarily respond to the ambient temperature.

[0026] Sections of the first metallization layer 130 are formed using a conventional metallization process, such as a Damascene process, a dual-Damascene process, or a subtractive etching process, to define conductive traces 145 (e.g., copper for Damascene or dual-Damascene, or aluminum for subtractive etching), thus providing intra-layer signal paths and vias 150 (e.g., copper or tungsten) for inter-layer signal paths. The dielectric layer 135, the traces 145, and the vias 150 can be formed after structuring the phase transition material resistor(s) 40. Vias 150A and 150B contact the phase transition material resistor 40.

[0027] A second metallization layer 160 comprises metal conductors 165 and vias 170 embedded in a dielectric layer 175. The conductors 170A, 170B contact the vias 150A, 150B, thus establishing a connection for the phase transition material resistance 40. The conductive conductors 170A, 170B can extend inside and / or outside the side of Fig. 3 extend.

[0028] A third metallization layer 180 also includes the phase transition material resistor 42, the metal conductors 190, and vias 195, which are embedded in a dielectric layer 200. Vias 195A and 195B contact the phase transition material resistor 42. In some embodiments, the phase transition material resistor 42 has the same transition temperature as the phase transition material resistor 40. In other embodiments, the phase transition material resistors 40 and 42 have different phase transition temperatures. For example, the phase transition material resistors 40 and 42 can be doped with different tungsten concentrations to achieve different phase transition temperatures. In other embodiments, the materials of the phase transition material resistors 40 and 42 are different.

[0029] A fourth metallization layer 205 comprises metal conductors 210 and vias 215 embedded in a dielectric layer 220. Conductor traces 210A, 210B contact the vias 195A, 195B and provide a connection for the phase transition material resistance 42. The conductive conductors 195A, 195B can extend inside and / or outside the side of Fig. 3 extend.

[0030] The materials for the dielectric layers 125, 175, 200, 220 (e.g. silicon dioxide, a dielectric material with a low dielectric constant, a dielectric material with a very low dielectric constant, etc.), conductive conductors 145, 165, 190, 210 (e.g. metals or metal compounds of tungsten, copper, cobalt, tantalum, ruthenium, aluminum, etc.) and vias 120, 150, 170, 195, 215 (e.g. metals or compounds of the same materials as the conductive conductors 145, 165, 190, 210) can vary between the different metallization layers 130, 160, 180, 205. In some embodiments, cover layers (not shown - e.g. SiN, SiCN, etc.) can be formed between the dielectric layers 125, 175, 200, 220 and / or clad metal cover layers, such as CoWP, over the conductive lines 145, 165, 190, 210.Barrier layers can be formed in conjunction with the conductive lines 145, 165, 190, 210 and the vias 120, 150, 170, 195, 215.

[0031] Fig. Figure 4 shows a circuit diagram of an alternative embodiment of a temperature-sensitive bias circuit 10' according to some embodiments. In the temperature-sensitive bias circuit 10', an additional bias transistor 37 is connected in series with the bias transistor 35. At device temperatures below the heating junction temperature 50, when the phase junction material resistance 40 is in the low conduction phase 55, the base resistance is primarily attributed to the bias resistors 35 and 37. As the device temperature increases, the β-value of the bipolar transistor 15 also increases, and to some extent, so does the resistance of the bias resistors 35 and 37. The base voltage is increased to compensate for the changes in the β-value and the bias resistors 35 and 37.

[0032] As the device temperature continues to rise and exceeds the heating junction temperature 50, the resistance of the phase junction material 40 decreases by several orders of magnitude (e.g., to approximately 1 kΩ). The total base resistance provided by the bias resistors 35, 37, and the phase junction material 40 decreases. As a result of the reduced total resistance, the base voltage and the associated base current required to drive the bipolar transistor 15 in such a way as to maintain a constant collector current also decrease, thereby compensating for the temperature-induced increase in the β-value of the bipolar transistor 15 and the resistance of the bias resistors 35, 37.

[0033] Fig.Figure 5 shows a circuit diagram of an alternative embodiment of a temperature-sensitive bias circuit 10" according to some embodiments. In the temperature-sensitive bias circuit 10", the phase transition material resistor 42 is connected in parallel to the bias transistor 37. Although two bias resistors 35, 37 and two phase transition material resistors 40, 42 are shown, in some embodiments N bias resistors and M phase transition material resistors are provided. In some embodiments, the phase transition material resistors 40, 42 are arranged in different layers of the product 100. In some embodiments, the phase transition material resistors 40, 42 have different phase transition temperatures.

[0034] The use of phase-interface material resistors 40, 42 in a bias circuit 10, 10', 10" enables the compensation of temperature-induced changes in the characteristics of the bipolar transistor 15. The base voltage and associated base current required to provide a constant collector current for the bipolar transistor 15 at elevated temperatures are reduced compared to a device without temperature compensation. By varying the arrangement of the bias resistors 35, 37 and the phase-interface material resistors 40, 42, the total resistance can be controlled during different temperature phases, and this also affects the physical properties of the bias resistors 35, 37 and the phase-interface material resistors 40, 42 required to provide the desired resistance characteristics.The use of several phase transition material resistances 40, 42 at different locations or with different phase transition temperatures enables a graduated transition in the bias resistance as the temperature increases.

Claims

[1] Device comprising: an active device (15) with a first connection (30); a first bias resistor (35) connected to the first terminal and a second bias resistor (37) connected in series with the first bias resistor; and a first resistor (40) with a first phase transition material connected in parallel with the first bias resistor, wherein the first phase transition material has a first phase with low conductivity for temperatures below a first phase transition temperature and a first phase with high conductivity for temperatures above the first phase transition temperature; a second resistor (42) comprising a second phase transition material connected in parallel with the second bias resistor, wherein the second phase transition material has a second phase with low conductivity for temperatures below a second phase transition temperature and a second phase with high conductivity for temperatures above the second phase transition temperature. [2] Device according to claim 1, wherein the first and the second bias resistor comprise polysilicon. [3] Device according to claim 1, wherein the first resistor is arranged in a first layer (130) over a substrate (110) and the second resistor is arranged in a second layer (180) over the first layer. [4] Device according to claim 1, wherein the first phase transition temperature is different from the second phase transition temperature. [5] Device according to claim 1, wherein the first phase transition material comprises vanadium and oxygen doped with a first concentration of tungsten, and the second phase transition material comprises vanadium and oxygen doped with a second concentration of tungsten which differs from the first concentration. [6] Device according to claim 1, wherein the first phase transition material comprises vanadium and oxygen. [7] Device according to claim 1, wherein the active device comprises a bipolar transistor and the first terminal comprises a base terminal. [8] Device comprising: an active device (15) with a first connection (30); a first bias resistor (35) connected to the first terminal; a first resistor (40) with a first phase transition material connected in parallel with the first bias resistor, wherein the first phase transition material has a first phase with low conductivity for temperatures below a first phase transition temperature and a first phase with high conductivity for temperatures above the first phase transition temperature; a second bias resistor (37) connected in series with the first bias resistor; and a second resistor (42) comprising a second phase transition material connected in parallel with the second bias resistor, wherein the second phase transition material has a second phase with low conductivity for temperatures below a second phase transition temperature and a second phase with high conductivity for temperatures above the second phase transition temperature, wherein the first phase transition temperature is different from the second phase transition temperature. [9] Device according to claim 8, wherein the first and second bias resistors comprise polysilicon. [10] Device according to claim 9, wherein the first resistor is arranged in a first layer (130) over a substrate and the second resistor is arranged in a second layer (180) over the first layer. [11] Device according to claim 9, wherein the first phase transition material comprises vanadium and oxygen doped with a first concentration of tungsten, and the second phase transition material comprises vanadium and oxygen doped with a second concentration of tungsten which differs from the first concentration. [12] Device according to claim 9, wherein the active device comprises a bipolar transistor and the first terminal comprises a base terminal. [13] Procedures, including: a connection of a bias circuit (10', 10'') to a base terminal (30) of a bipolar transistor (15); and a reduction in the resistance of the bias circuit in response to a temperature of the bias circuit exceeding a first predetermined temperature, wherein the bias circuit comprises a first bias resistor (35) connected to the base terminal, a first resistor (40) and a second resistor (42), wherein the first resistor comprises a first phase transition material connected in parallel to the first bias resistor, wherein the first phase transition material has a first phase with low conductivity for temperatures below the first predetermined temperature and a first phase with high conductivity for temperatures above the first predetermined temperature, wherein the biasing circuit includes a second bias resistor (37) which is connected to the first bias resistor, wherein the second resistor comprises a second phase transition material connected in parallel with the second bias resistor, and wherein the second phase transition material has a second phase with low conductivity for temperatures below a second phase transition temperature and a second phase with high conductivity for temperatures above the second phase transition temperature. [14] Method according to claim 13, wherein the first and second bias resistors comprise polysilicon. [15] Method according to claim 13, wherein the first phase transition temperature is different from the second phase transition temperature.

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