Semiconductor devices

Abstract

Semiconductor device (100, 200, 300, 400, 500, 600), comprising: - a semiconductor substrate (10); - a lower electrode (12) formed on the semiconductor substrate (10); - an insulating film (14), - which is formed on the semiconductor substrate (10) and - surrounding the lower electrode (12); and - a metal film formed from Ni-P (16), - which is formed on the lower electrode (12) and - which has a convex sub-region (17) on its upper surface, wherein: - the convex sub-region (17) comprises a first sub-region (17a) extending in a first direction parallel to an upper surface of the semiconductor substrate (10), and a second sub-region (17b) extending in a second direction parallel to the upper surface of the semiconductor substrate (10) and intersecting the first direction, - the metal film (16) is thinner than the insulating film (14), - the metal film (16) is formed entirely within the insulating film (14) in a top view from the side and - an end part region of the metal film (16) is formed directly on the lower electrode (12).

Description

Background of the inventionArea

[0001] The present disclosure relates to semiconductor devices. background

[0002] JP 2017-050358 A discloses a semiconductor device comprising a semiconductor substrate on which a semiconductor device is formed, and a first electrode layer provided on the semiconductor substrate and electrically connected to the semiconductor device. The semiconductor device further includes a protective insulating film stacked on a portion of the upper surface of the first electrode layer, and a second electrode layer stacked over both the first electrode layer and the protective insulating film. The material forming the second electrode layer has higher mechanical strength than the material forming the first electrode layer. A recess portion is provided on the upper surface of the first electrode layer. Furthermore, a protrusion portion, which protrudes into the recess portion, is provided on the lower surface of the second electrode layer.

[0003] It is conceivable to form the second electrode layer by plating in the structure shown in JP 2017-050358 A. In this case, a plating solution may reach the semiconductor substrate at the recessed portion, causing damage to the semiconductor substrate.

[0004] US 2011 / 0 266 670 A1 relates to a package with annular reinforcement structures that can be used in wafer-level chip-scale packages (WLCSP). The WLCSP comprises a substrate with an IC and a bond pad connected to the IC, a passivation layer protecting an outer portion of the bond pad, an annular ring structure formed on an inner portion of the bond pad, an under-bump metal (UBM) layer covering the annular ring structure, and a solder ball attached to the UBM layer. The annular ring structure includes a substantially planar top surface with vertical or non-vertical sidewalls that slope toward the inner portion of the bond pad. The annular ring structure can slow the propagation of solder cracks in the solder ball, thus increasing the reliability of the solder connection in the WLCSP.In addition, the annular ring structure can increase the surface area for solder adhesion to the UBM layer, thereby improving the overall shear strength of the ball.

[0005] US 2005 / 0 140 027 A1 shows an integrated circuit chip with a substrate. The substrate has a plurality of chip structures. A plurality of bonding pads are arranged on the substrate. Each of the bonding pads is formed from an aluminum-containing material or a similar material. A surface region is formed on each of the bonding pads. A metal layer under a soldering region lies above the surface region. A wetting layer is formed above the metal layer under the soldering region. The wetting layer comprises a plurality of projections that protrude from the wetting layer and are spatially arranged on the wetting layer.

[0006] A solder layer is formed over the wetting layer and is mechanically coupled to the plurality of protrusions.

[0007] US 6,613,662 B2 describes a method for producing protruding contact structures for engaging semiconductor components with solder areas. A contact structure for semiconductor components with solder areas is disclosed, comprising at least one non-planar contact pad with a plurality of projections extending therefrom to contact at least one solder ball of an integrated circuit component with solder areas. The projections are arranged to establish electrical contact with the solder balls of an IC component without significantly deforming the solder balls. Accordingly, reflowing of the solder balls to reshape the solder balls with the contact pad is not required. Such a contact pad can be provided on various test devices such as probes and the like and can be used for both temporary and permanent connections.

[0008] US 6,687,989 B1 discloses a test carrier and an interconnect device for testing semiconductor components, such as bare dice and chip-scale packages. The carrier comprises a base on which the interconnect device is mounted and a force-applying mechanism for biasing the component against the interconnect device. The interconnect device comprises connection contacts configured to establish temporary electrical connections with component contacts (e.g., bond pads, solder balls). The interconnect device also comprises support elements configured to physically contact the component to prevent bending of the component due to the pressure exerted by the force-applying mechanism. The support elements can be integrally formed with the interconnect device using an etching process.The support elements may comprise an elastomer layer to provide cushioning and accommodate dimensional variations in the Z direction.

[0009] US 2004 / 0 134 974 A1 discloses a solder bump structure with a contact point, an optional overlying intermediate layer, and a solder bump on the intermediate layer, as well as a related manufacturing method. At least one metal protrusion is formed, extending above the contact point and / or upwardly from a surface of the intermediate layer and embedded in solder material.

[0010] JP 2017-050358 A shows a semiconductor device comprising a semiconductor substrate on which a semiconductor element is formed, a first electrode layer stacked on the semiconductor substrate and connected to the semiconductor element, a first insulating film stacked on an upper surface of the first electrode layer, and a second electrode layer stacked over the first electrode layer and the first insulating film, wherein the second electrode layer comprises a material having a mechanical strength higher than the mechanical strength of a material contained in the first electrode layer, wherein a groove portion is provided from the upper surface toward a lower surface of the first electrode layer, a protrusion portion protruding into the groove portion,is provided on a lower side of the second electrode layer and a lower end of the protrusion portion is positioned below the center position in a thickness direction of the first electrode layer.,

[0011] US 2019 / 0 067 225 A1 discloses a semiconductor device having a pad electrode formed over a semiconductor substrate and including a first conductive film and a second conductive film formed over the first conductive film, as well as a plating film formed over the second conductive film and used for connecting to an external terminal. The first conductive film and the second conductive film mainly contain aluminum. The crystal surface on the surface of the first conductive film differs from the crystal surface on the surface of the second conductive film. Summary

[0012] The present invention has been made to solve the above-described problem and has an object to obtain semiconductor devices capable of realizing high reliability while suppressing damage to a semiconductor substrate due to plating.

[0013] The object underlying the invention is achieved in a semiconductor device according to the invention with the features of claim 1, alternatively according to the invention with the features of claim 3 and further alternatively according to the invention with the features of claim 4. Advantageous further developments are the subject of the respective dependent claims.

[0014] The features and advantages of the present invention can be summarized as follows.

[0015] According to one aspect of the present invention, a semiconductor device comprises a semiconductor substrate, a lower electrode provided on the semiconductor substrate, an insulating film provided on the semiconductor substrate and surrounding the lower electrode, and a metal film formed of Ni-P provided on the lower electrode and including a convex portion on its upper surface, wherein the convex portion includes a first portion extending in a first direction parallel to an upper surface of the semiconductor substrate and a second portion extending in a second direction parallel to the upper surface of the semiconductor substrate and intersecting the first direction, and the metal film is thinner than the insulating film. The metal film is formed laterally entirely within the insulating film in a plan view.An end portion of the metal film is formed directly on the lower electrode.

[0016] According to another aspect of the present disclosure, a semiconductor device includes a semiconductor substrate, a lower electrode provided on the semiconductor substrate, an insulating film provided on the semiconductor substrate, surrounding the lower electrode and forming an outer periphery of a chip, and a metal film provided on the lower electrode and including a convex portion on its upper surface, wherein the convex portion includes a first portion extending in a first direction parallel to an upper surface of the semiconductor substrate at an outer peripheral portion of the chip, and a second portion extending in a second direction parallel to the upper surface of the semiconductor substrate and intersecting the first direction at an outer peripheral portion of the chip.In a plan view, the metal film is formed laterally entirely within the insulating film. An end portion of the metal film is formed directly on the lower electrode.

[0017] According to another aspect of the present disclosure, a semiconductor device includes a semiconductor substrate, a lower electrode provided on the semiconductor substrate, an insulating film provided on the semiconductor substrate and surrounding the lower electrode, and a metal film formed of Ni-P provided on the lower electrode and including a cross-shaped convex portion on its upper surface. The metal film is formed laterally entirely within the insulating film in a plan view. An end portion of the metal film is formed directly on the lower electrode.

[0018] Other and further objects, features and advantages of the disclosure will appear more fully from the following description. Short description of the drawings Fig. 1 is a cross-sectional view of a semiconductor device according to a first embodiment. Fig. 2 is a plan view of the semiconductor device according to the first embodiment. Fig. 3 is a cross-sectional view showing a state in which a solder is provided to the semiconductor device according to the first embodiment. Fig. 4 is a cross-sectional view of a semiconductor device according to a first modification of the first embodiment. Fig. 5 is a plan view of a semiconductor device according to a second modification of the first embodiment. Fig. 6 is a plan view of a semiconductor device according to a third modification of the first embodiment. Fig. 7 is a cross-sectional view of a semiconductor device according to a second embodiment. Fig. 8 is a cross-sectional view of a semiconductor device according to a third embodiment. Description of embodiments

[0019] A semiconductor device according to an embodiment of the present disclosure will be described with reference to the drawings. Identical or corresponding components are denoted by the same reference numerals, and repeated descriptions thereof will be omitted in some cases. First embodiment

[0020] Fig. 1 is a cross-sectional view of a semiconductor device 100 according to a first embodiment. The semiconductor device 100 includes a semiconductor substrate 10, a bottom electrode 12, an insulating film 14, a cladding electrode 16, and a back electrode 18. The semiconductor device 100 is, for example, a power semiconductor device. The power semiconductor device is, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET). The power semiconductor device may be an insulated-gate bipolar transistor (IGBT) or a diode.

[0021] The lower electrode 12 is provided on the semiconductor substrate 10. The lower electrode 12 is provided as a structure on the upper surface of the semiconductor substrate 10. The lower electrode 12 is an electrode for allowing a main current to flow through the semiconductor device 100. The lower electrode 12 is, for example, a source electrode of a MOSFET, an emitter electrode of an IGBT, or an anode electrode of a diode. The lower electrode 12 is, for example, an Al alloy containing Al, Si, Cu, or the like. The thickness of the lower electrode 12 is, for example, 0.1 µm to 6 µm.

[0022] A protruding portion 13 is provided on the upper surface of the lower electrode 12. The protruding portion 13 is part of the lower electrode 12. The protruding portion 13 is formed from the same material as the lower electrode 12. The protruding portion 13 is provided by forming a portion of the lower electrode 12 such that the portion is thicker than the remaining portion of the lower electrode 12. The height T1 of the protruding portion 13 ranges, for example, from 0.5 µm to 10 µm, and the width W1 ranges, for example, from 0.5 µm to 100 µm.

[0023] The insulating film 14 is provided on the semiconductor substrate 10. The insulating film 14 covers an outer periphery of the semiconductor substrate 10. The insulating film 14 surrounds the lower electrode 12. A portion of the insulating film 14 extends on the lower electrode 12. The insulating film 14 covers an end portion of the lower electrode 12. The insulating film 14 is a protective insulating film that protects the lower electrode 12 and the semiconductor substrate 10. The insulating film is formed of, for example, polyimide.

[0024] The insulating film 14 has an opening portion at a central portion. A plating electrode 16 is provided in the opening portion using a plating technique. The plating electrode 16 is provided on the lower electrode 12. The entire plating electrode 16 is provided within the insulating film 14. The plating electrode 16 is a metal film for solder connection, and is, for example, a Ni-P film grown by electroless plating. The Ni-P film is a metal film containing several percent P. The plating electrode 16 can be formed from a material with higher mechanical strength than the lower electrode 12.

[0025] Generally, alloying of the metal film and the solder proceeds in a state where the metal film and the solder are bonded to each other. This process can reduce the thickness of the metal film. Therefore, the plating electrode 16 is designed so that it does not disappear due to alloying under the usage conditions of the semiconductor device 100. As a result, the reliability of a solder joint portion can be ensured. In particular, when the semiconductor device 100 is used in a high-heat environment, the plating electrode 16 is preferably designed to be thick enough so that the plating electrode 16 does not disappear. In this case, it is preferable to form the plating electrode 16 using a plating technique rather than a sputtering technique. The thickness T3 of the plating electrode 16 ranges, for example, from 0.1 μm to 10 μm.In addition, the plating electrode 16 is not formed on the insulating film 14 and is thinner than the insulating film 14.

[0026] The plating electrode 16 has a convex portion 17 on its upper surface. The plating electrode 16 covers the protruding portion 13 of the lower electrode 12. As a result, the shape of the protruding portion 13 is reflected on the surface of the plating electrode 16, and the convex portion 17 is formed on the plating electrode 16. Therefore, the convex portion 17 is provided at a position where, in plan view, the convex portion 17 overlaps with the protruding portion 13. The convex portion 17 is formed along the protruding portion 13 to be U-shaped in a sectional view. The height T2 of the convex portion 17 ranges, for example, from 0.5 μm to 10 μm. The width W2 of the convex portion 17 is, for example, 1 µm to 20 µm larger than the width W1 of the protruding portion 13.

[0027] The thickness (T2+T3) of the plating electrode 16 at the convex portion 17 is greater than the thickness T3 of a flat portion of the plating electrode 16 other than the convex portion 17. For this reason, the convex portion 17 has higher mechanical rigidity in the vertical direction than the flat portion. The plating electrode 16 is thinner than the insulating film 14. Specifically, the flat portion in the plating electrode 16 other than the convex portion 17 is thinner than a portion of the insulating film 14 provided on the lower electrode 12. In other words, T3<T4 is satisfied. If T3>T4 is satisfied, there would be a risk that the plating electrode 16 would be thinned even on the insulating film 14. In this case, a portion of the plating electrode 16 located on the insulating film 14 has a thickness equal to the difference between T3 and T4.At this time, a portion having low rigidity is partially formed in the plating electrode 16. By setting T3 < T4, in the present embodiment, it is possible to suppress the formation of a portion having low rigidity in the plating electrode 16.

[0028] The back electrode 18 is provided on a back surface opposite the top surface of the semiconductor substrate 10. The back electrode 18 is an electrode for allowing a main current to flow through the semiconductor device 100. The back electrode 18 is, for example, a drain electrode of a MOSFET, a collector electrode of an IGBT, or a cathode electrode of a diode. The back electrode 18 is, for example, a stacked film containing Al, Ti, Ni, Au, Cu, or the like. The thickness of the back electrode 18 ranges, for example, from 0.1 μm to 10 μm.

[0029] Fig. Fig. 2 is a plan view of the semiconductor device 100 according to the first embodiment. Note that Fig. 1 is obtained by moving the semiconductor device 100 along a Fig. 2. In plan view, the semiconductor device 100 is quadrangular. The insulating film 14 forms an outer edge of the chip. The plating electrode 16 fills the opening portion of the insulating film 14. The plating electrode 16 is quadrangular in plan view. The convex portion 17 is provided at an outer peripheral portion of the plating electrode 16. The convex portion 17 extends along four sides of the plating electrode 16.

[0030] The convex portion 17 includes a first portion 17a extending in a first direction at the outer peripheral portion of the chip, and a second portion 17b extending in a second direction at the outer peripheral portion of the chip. The first direction is a direction parallel to the upper surface of the semiconductor substrate 10. The first direction is an X-direction in Fig. 2. The second direction is a direction parallel to the upper surface of the semiconductor substrate 10 and intersecting the first direction. The second direction is a Y direction in Fig. 2.

[0031] Fig. 3 is a cross-sectional view showing a state in which a solder 20 is provided on the semiconductor device 100 according to the first embodiment. The solder 20 is provided on the plating electrode 16. The solder 20 covers the plating electrode 16 and the convex portion 17. The solder 20 may cover the entire plating electrode 16. The solder 20 is provided on the inside of the insulating film 14 and is not formed on the insulating film 14. An end portion of the solder 20 and an end portion of the plating electrode 16 are aligned with each other.

[0032] In the present embodiment, an external electrode and the electrode of the semiconductor device 100 are directly connected to each other through the solder 20. As a result, it is possible to establish a large current flow while reducing the electrical resistance.

[0033] Next, an effect of the present embodiment will be described. Generally, a recessed portion can be formed in the lower electrode in the structure in which the plating electrode is provided on the lower electrode. At this time, a portion having no lower electrode or a thin lower electrode is formed. When the plating electrode is formed in such a structure by the plating technique, there is a risk that the plating solution may reach the semiconductor substrate in the recessed portion. As a result, the semiconductor substrate may be damaged, and the reliability of the semiconductor device may be deteriorated.In contrast, since the lower electrode 12 of the present embodiment does not have a recess portion, the present embodiment has an effect of suppressing damage to the semiconductor substrate 10 due to the plating process.

[0034] By providing the convex portion 17 on the plating electrode 16, the mechanical strength in the vertical direction of the plating electrode 16 can be increased. Specifically, the convex portion 17 extends in the first direction and the second direction, thereby acting as a beam, which allows the rigidity of the plating electrode 16 to be increased. As a result, even when the plating electrode 16 is thinned, the strength of the plating electrode 16 against the stress in the vertical direction can be ensured. Furthermore, since the mechanical strength of the semiconductor device 100 is increased by the convex portion 17, the reliability of the semiconductor device 100 can be increased.

[0035] Fig. Fig. 4 is a cross-sectional view of a semiconductor device 200 according to a first modification of the first embodiment. The lower electrode 12 and the plating electrode 16 may be divided into a plurality of subregions. Fig. 4, each of the lower electrode 12 and the plating electrode 16 is divided by an insulating film 14.

[0036] Fig. 5 is a plan view of a semiconductor device 300 according to a second modification of the first embodiment. In the semiconductor device 300, the shape of the convex portion 17 is different from that of the semiconductor device 100. In the semiconductor device 300, a first portion 17a and a second portion 17b of the convex portion 17 are separated from each other. In this case, the same effect as that of the first semiconductor device 100 can also be obtained.

[0037] Fig. 6 is a plan view of a semiconductor device 400 according to a third modification of the first embodiment. In the semiconductor device 100, the convex portion 17 is provided at an outer peripheral portion of the plating electrode 16 along the insulating film 14. The arrangement of the convex portion 17 is not limited to this. As shown in Fig. As shown in Figure 6, the convex portion 17 may be configured to have a cross shape. In the semiconductor device 400, the first portion 17a and the second portion 17b intersect at a central portion of the chip.

[0038] In semiconductor device 400, the central portion of the chip can be reinforced. Note that the mechanical strength of plating electrode 16 against stress in the vertical direction tends to be higher if convex portion 17 is positioned near an end portion of plating electrode 16, as in the case of semiconductor devices 100 and 300.

[0039] As described above, the convex portion 17 may include at least the first portion 17a extending in the first direction and the second portion 17b extending in the second direction intersecting the first direction. The first direction and the second direction may be inclined with respect to the sides of the chip. For example, the first portion 17a and the second portion 17b may extend along the diagonal lines of the chip.

[0040] The shapes of the chip, the insulating film 14 and the plating electrode 16 are not limited to those shown in Fig. 2, but can be, for example, a square, a rectangle, a polygon or the like.

[0041] To increase the mechanical strength, it is preferable that the height T2 of the convex portion 17 be greater than a certain value. For example, the height T2 of the convex portion 17 is preferably 1 µm or more.

[0042] In the present embodiment, the convex portion 17 can be formed on the plating electrode 16 by utilizing an unevenness of the protruding portion 13. Without limitation, the protruding portion 17 is not necessarily provided as long as the convex portion 17 can be formed on the plating electrode 16. In this case, the same effect as that of the present embodiment can also be obtained. In this case, a flat lower electrode 12 is formed on the upper surface of the semiconductor substrate 10. Next, a flat metal film to serve as the plating electrode 16 is provided on the upper surface of the lower electrode 12 by plating or the like. Thereafter, the convex portion 17 can be formed by an additional processing step.

[0043] In the present embodiment, the plating electrode 16 is a metal film to be directly connected to an external electrode via the solder 20. However, the present embodiment is not limited to this, and the plating electrode 16 can be used as an electrode for wire bonding or Ag bonding. In this case, the same effect as that of the present embodiment can also be obtained.

[0044] As a further modification of the present embodiment, the semiconductor substrate 10 may be formed with a wide band-gap semiconductor. The wide band-gap semiconductor is, for example, silicon carbide, a gallium nitride-based material, or diamond. The semiconductor substrate 10 may be formed with silicon.

[0045] These modifications can be suitably applied to semiconductor devices according to the following embodiments. However, for the semiconductor devices according to the following embodiments, differences from the first embodiment will be primarily explained since they have many similarities with the first embodiment. Second embodiment

[0046] Fig. 7 is a cross-sectional view of a semiconductor device 500 according to a second embodiment. In the present embodiment, a protruding portion 513 is formed of a material different from that of the lower electrode 12. The convex portion 17 is formed on the plating electrode 16 by means of a step formed by the protruding portion 513. The protruding portion 513 may be formed of an insulating film or a non-insulating film. The insulating film is, for example, an oxide film, a silicon nitride film, or polyimide. The non-insulating film is formed of, for example, TiNi or Cu. Even in such a case, the same effect as that of the first embodiment can be obtained.

[0047] The width W1 of the protruding portion 513 is equal to or less than twice the difference between the thickness T3 of the plating electrode 16 and the thickness T5 of the protruding portion 513. Generally, plating grows on a specific material. The plating electrode 16, which is a plating, grows on the lower electrode 12. Moreover, plating does not grow on the protruding portion 513 formed of a material different from that of the lower electrode 12.

[0048] Generally, plating grows isotropically here. Therefore, plating can be formed on the surface of the protruding portion 513 only within a certain range from the boundary between the lower electrode 12 and the protruding portion 513. Specifically, plating can also be formed on the surface of the protruding portion 513 according to the thickness T3 of the plating electrode 16 from the boundary between the lower electrode 12 and the protruding portion 513.

[0049] Therefore, by setting the width W1 of the protruding portion 513 to not more than twice the difference between the thickness T3 of the plating electrode 16 and the thickness T5 of the protruding portion 513, plating can be formed on the entire upper surface of the protruding portion 513. Therefore, even if the protruding portion 513 is formed of a material different from that of the lower electrode 12, the protruding portion 513 can also be covered with the plating electrode 16. Third embodiment

[0050] Fig.8 is a cross-sectional view of a semiconductor device 600 according to a third embodiment. A protruding portion 613 includes a first protruding portion 613a and a second protruding portion 613b. The first protruding portion 613a is a part of the lower electrode 12 and is formed of the same material as that of the lower electrode 12. The second protruding portion 613b is formed on the first protruding portion 613a and is made of a different material from that of the lower electrode 12.

[0051] Next, a method for manufacturing the protruding portion 613 will be described. First, a metal film to serve as the lower electrode 12 is formed on the upper surface of the semiconductor substrate 10. Next, a mask layer to serve as the second protruding portion 613b is formed on the upper surface of the metal film. Next, the mask layer is patterned to form the second protruding portion 613b. After that, the metal film is etched along the second protruding portion 613b to form the lower electrode 12 and the first protruding portion 613a.

[0052] In general, since the convex portion 17 is higher, the mechanical strength in the vertical direction of the plating electrode 16 is increased more. In the present embodiment, the plating electrode 16 is formed while leaving the mask for forming the first protruding portion 613a. By combining the first protruding portion 613a and the second protruding portion 613b, the protruding portion 613 can be formed high. As a result, the convex portion 17 can be formed high. Therefore, the mechanical strength of the plating electrode 16 against the stress in the vertical direction can be increased while maintaining the effect of the first embodiment.

[0053] Furthermore, the mask for forming the first protruding portion 613a can be effectively used as the second protruding portion 613b. Note that in the first embodiment, the protruding portion 613a can be formed by removing the second protruding portion 613b after etching the metal film serving as the lower electrode 12.

[0054] As in the second embodiment, the width W1 of the second protruding portion 613b may be equal to or less than twice the difference between the thickness T3 of the plating electrode 16 and the height T5 of the second protruding portion 613b. Accordingly, even if the second protruding portion 613b is formed of a material different from that of the lower electrode 12, the second protruding portion 613b can be covered with the plating electrode 16.

[0055] However, technical features explained in each embodiment can be combined for use in a suitable manner.

[0056] In the semiconductor device according to the present disclosure, no recessed portion is provided in a lower electrode, making it possible to prevent damage to a semiconductor substrate due to plating. Furthermore, the mechanical strength of the semiconductor device is improved by a convex portion, making it possible to realize high reliability of the semiconductor device.

Claims

[1] A semiconductor device (100, 200, 300, 400, 500, 600), comprising: - a semiconductor substrate (10); - a lower electrode (12) formed on the semiconductor substrate (10); - an insulating film (14), - which is formed on the semiconductor substrate (10) and - surrounding the lower electrode (12); and - a metal film formed from Ni-P (16), - which is formed on the lower electrode (12) and - having a convex portion (17) on its upper surface, wherein: - the convex portion (17) comprises a first portion (17a) extending in a first direction parallel to an upper surface of the semiconductor substrate (10) and a second portion (17b) extending in a second direction parallel to the upper surface of the semiconductor substrate (10) and intersecting the first direction, - the metal film (16) is thinner than the insulating film (14), - the metal film (16) is formed laterally entirely within the insulating film (14) in a plan view and - an end portion of the metal film (16) is formed directly on the lower electrode (12). [2] The semiconductor device (100, 200, 300, 400, 500, 600) according to claim 1, wherein the convex portion (17) is formed at an outer peripheral portion of the metal film (16) along the insulating film (14). [3] A semiconductor device (100, 200, 300, 400, 500, 600), comprising: - a semiconductor substrate (10); - a lower electrode (12) formed on the semiconductor substrate (10); - an insulating film (14), - which is formed on the semiconductor substrate (10), - which surrounds the lower electrode (12) and - which forms an outer edge of a chip; and - a metal film formed from Ni-P (16), - which is formed on the lower electrode (12) and - having a convex portion (17) on its upper surface, wherein: - the convex part (17) - a first portion (17a) extending in a first direction parallel to an upper surface of the semiconductor substrate (10) at an outer peripheral portion of the chip, and - a second portion (17b) extending in a second direction parallel to the upper surface of the semiconductor substrate (10) and intersecting the first direction at an outer peripheral portion of the chip, - the metal film (16) is formed laterally entirely within the insulating p-film (14) in a plan view and - an end portion of the metal film (16) is formed directly on the lower electrode (12). [4] A semiconductor device (100, 200, 300, 400, 500, 600), comprising: - a semiconductor substrate (10); - a lower electrode (12) formed on the semiconductor substrate (10); - an insulating film (14), - which is formed on the semiconductor substrate (10) and - surrounds the lower electrode (12); and - a metal film formed from Ni-P (16), - which is formed on the lower electrode (12) and - having a cross-shaped convex portion (17) on its upper surface, wherein: - the metal film (16) is formed laterally entirely within the insulating film (14) in a plan view and - an end portion of the metal film (16) is formed directly on the lower electrode (12). [5] The semiconductor device (100, 200, 300, 400, 500, 600) according to claim 3 or 4, wherein the metal film (16) is thinner than the insulating film (14). [6] A semiconductor device (100, 200, 300, 400, 500, 600) according to any one of claims 1 to 3, wherein: - the metal film (16) is square in plan view, and - the convex portion (17) extends along four sides of the metal film (16). [7] The semiconductor device (100, 200, 300, 400, 500, 600) according to claim 1, wherein the convex portion (17) is cross-shaped. [8] A semiconductor device (100, 200, 300, 400, 500, 600) according to any one of claims 1 to 7, wherein: - the insulating film (14) has a portion formed on the lower electrode (12), and - the metal film (16) is thinner than the portion of the insulating film (14) formed on the lower electrode (12). [9] The semiconductor device (100, 200, 300, 400, 500, 600) according to any one of the preceding claims, wherein a protruding portion (13, 613) is formed on an upper surface of the lower electrode (12) at a position where the protruding portion (13, 613) overlaps the convex portion (17) in plan view. [10] The semiconductor device (100, 200, 300, 400, 500, 600) according to claim 9, wherein the protruding portion (13, 613) is a part of the lower electrode (12). [11] The semiconductor device (100, 200, 300, 400, 500, 600) according to claim 9, wherein the protruding portion (13, 613) is formed of a material different from that of the lower electrode (12). [12] The semiconductor device (100, 200, 300, 400, 500, 600) according to claim 11, wherein a width of the protruding portion (13, 613) is equal to or less than twice a difference between a thickness of the metal film (16) and a height of the protruding portion (13, 613). [13] A semiconductor device (100, 200, 300, 400, 500, 600) according to claim 9, wherein the protruding portion (13, 613) comprises: - a first projecting portion (613a) which is a part of the lower electrode (12), and - a second protruding portion (613b) formed on the first protruding portion (613a) and made of a material different from that of the lower electrode (12). [14] The semiconductor device (100, 200, 300, 400, 500, 600) according to claim 13, wherein a width of the second protruding portion (613b) is equal to or less than twice a difference between a thickness of the metal film (16) and a height of the second protruding portion (613b). [15] A semiconductor device (100, 200, 300, 400, 500, 600) according to any one of the preceding claims, wherein the semiconductor substrate (10) is made of a wide band gap semiconductor. [16] The semiconductor device (100, 200, 300, 400, 500, 600) according to claim 15, wherein the wide band gap semiconductor is silicon carbide, a gallium nitride-based material, or diamond.

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