CURVED EXTENSION DESIGN TO REDUCE STRESS IN A MEMS ACTUATOR

Abstract

Integrated chip structure, comprising: a MEMS actuator (microelectromechanical systems actuator) (101), comprising: an anchor (108) having a first plurality of branches (108b) extending outwards from a central region (108c) of the anchor (108), each of the first plurality of branches (108b) having a first plurality of fingers (111); a test mass (102) surrounding the anchor (108) and having a second plurality of branches (102b) extending inwards from an inner side wall of the test mass (102), wherein the second plurality of branches (102b) each have a second plurality of fingers (103) which, viewed from above, are nested with the first plurality of fingers (111); one or more curved arms (106) coupled between the test mass (102) and a frame (104), the frame (104) wrapping around the test mass (102); wherein, as viewed from above, the one or more curved outriggers (106) have curved outer surfaces with one or more inflection points (410); and further showing: a package box (206) that surrounds an integrated image sensor chip (202) and the MEMS actuator (101), wherein the frame (104) of the MEMS actuator (101) is laterally coupled to a side wall of the package box (206); and an optical system (214) comprising one or more lenses arranged and configured within the package box (206) to focus incident radiation (216) to the integrated image sensor chip (202).

Description

BACKGROUND

[0001] Microelectromechanical systems, or MEMS, are a technology that integrates miniaturized mechanical and electromechanical elements onto a single chip. MEMS devices are often manufactured using microfabrication techniques. In recent years, MEMS devices have found a wide range of applications. For example, MEMS devices are found in handheld devices (e.g., accelerometers, gyroscopes, digital compasses), pressure sensors (e.g., crash sensors), microfluidic elements (e.g., valves, pumps), optical switches (e.g., mirrors), and more.

[0002] Microelectromechanical systems (MEMS) are known, for example, from US 2016 / 0227 117 A1, US 2017 / 0 341 928 A1, WO 2015 / 171 227 A1 and DE 10 2021 104 081 A1. BRIEF DESCRIPTION OF THE DRAWINGS

[0003] Aspects of this disclosure are best understood with reference to the detailed description below in conjunction with the accompanying drawings. It should be noted that, in accordance with common industry practice, various features are not drawn to scale. Rather, for the sake of clarity of discussion, the dimensions of the various features may be enlarged or reduced as desired. The Fig. 1A to Fig. Figure 1B shows some embodiments of an integrated chip structure comprising a MEMS actuator with a test mass coupled to a frame by one or more curved arms. The Fig. 2A to Fig. Figure 2B shows some additional embodiments of an integrated chip structure comprising a MEMS actuator with a test mass coupled to a frame by one or more curved arms. The Fig. 3A to Fig. Figure 3B shows some embodiments that demonstrate the operation of an actuator with one or more curved arms within the disclosed integrated chip structure. The Fig. 4A to Fig. Figure 4B shows some embodiments of an integrated chip structure comprising a MEMS actuator with a test mass coupled to a frame by one or more curved arms. The Fig. 5A to Fig. Figure 5C shows some embodiments of an integrated chip structure comprising a MEMS actuator with a test mass coupled to a frame by one or more curved arms. Fig. Figure 6 shows a top view illustrating some embodiments of a disclosed curved boom for a MEMS actuator. Fig. Figure 7 shows some additional embodiments of an integrated chip structure comprising a MEMS actuator with a test mass coupled to a frame by one or more curved arms. The Fig. 8 to Fig. Figure 17 shows cross-sectional views illustrating some embodiments of a method for forming an integrated chip structure comprising a MEMS actuator with a test mass coupled to a frame by one or more curved cantilevers. Fig. Figure 18 shows a flowchart of some embodiments of a method for forming an integrated chip structure comprising a MEMS actuator with a test mass coupled to a frame by one or more curved arms. DETAILED DESCRIPTION

[0004] The following disclosure provides many different embodiments or examples for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. For example, the fabrication of a first feature over or on top of a second feature in the description below may include embodiments in which the first and second features are formed in direct contact, and it may also include embodiments in which additional features can be formed between the first and second features such that the first and second features are not in direct contact. Furthermore, reference numerals and / or letters may be repeated in the various examples in the present disclosure.This repetition serves the purpose of simplicity and clarity and does not in itself prescribe any relationship between the various designs and / or configurations discussed.

[0005] Furthermore, spatially relative terms, such as "located below," "under," "lower," "located above," "upper," and the like, can be used here to simply describe the relationship of an element or structure to one or more other elements or structures depicted in the figures. In addition to the orientation shown in the figures, the spatially relative terms are intended to encompass various orientations of the device used or operated. The device can be oriented differently (rotated by 90 degrees or in a different orientation), and the spatially relative descriptors can be interpreted accordingly.

[0006] Many modern cameras incorporate image stabilization technology. Image stabilization technology reduces blur caused by movement (such as hand shake) of an imaging device during exposure. Typically, blur occurs when an image sensor moves during exposure. This movement causes light initially falling on one pixel to wander to neighboring pixels, resulting in blur. As camera resolutions increase, the size of pixel areas within the camera decreases, making blur caused by movement (such as hand shake) more noticeable in captured images.

[0007] Optical image stabilization (OIS) is a form of image stabilization technology used to mitigate blur caused by involuntary camera movement (e.g., camera shake). OIS detects camera movement and then compensates for it by controlling an optical path between a subject and an image sensor. This optical path can be controlled by moving mechanical parts of the camera to ensure that light reaches the same pixel on the image sensor, even when movement occurs.

[0008] Some cameras may incorporate OIS systems that have an integrated image sensor chip mounted on a MEMS actuator. The MEMS actuator is configured to move the integrated image sensor chip in a way that compensates for camera movement. The MEMS actuator may include a frame coupled to a package box. A test mass is coupled to the frame via one or more straight arms. The test mass is further coupled to the integrated image sensor chip and is configured to move during operation to compensate for camera movement. It has been recognized that during extreme camera movements, a significant load can be placed on the one or more straight arms. For example, if dropped from a height of approximately 1.5 meters, the one or more straight arms may be subjected to a load on the order of 10 6The load is in MPa (Mega Pascals). Such a high load can break one or more straight arms of the MEMS actuator, thereby rendering the camera's OIS system inoperable.

[0009] The present disclosure relates to an integrated chip structure comprising a MEMS (microelectromechanical systems) actuator with a test mass coupled to a frame by one or more curved arms. In some embodiments, the MEMS actuator has an armature coupled to a base substrate. The armature has a first plurality of branches, each having a first plurality of fingers. A test mass surrounds the armature and has a second plurality of branches, each having a second plurality of fingers, which, viewed from a top view, are nested with the first plurality of fingers. One or more curved arms are coupled between the test mass and a frame that wraps around the test mass. The one or more curved arms comprise curved outer surfaces with one or more inflection points, as viewed from a top view.The curved outer surfaces of the one or more curved arms reduce stress on the arms during extreme movements of the MEMS actuator. By reducing stress on the arms during extreme movements, the disclosed MEMS actuator is able to provide improved reliability under real-world conditions (e.g., when dropped).

[0010] Fig. Figure 1A shows a top view 100 of some embodiments of a MEMS actuator 101 with a test mass coupled to a frame by one or more curved arms.

[0011] The MEMS actuator 101 has a test mass 102 separated from a frame 104 by one or more first openings 105. One or more curved arms 106 traverse the one or more first openings 105 to couple the test mass 102 to the frame 104. In some embodiments, the frame 104 wraps around the test mass 102 in a first continuous loop (e.g., a first unbroken loop). The test mass 102 is further separated from an armature 108 by one or more second openings 107. In some embodiments, the test mass 102 wraps around the armature 108 in a second continuous loop (e.g., a second unbroken loop). In some embodiments, the MEMS actuator 101 has an electrostatic actuator. In some embodiments, the MEMS actuator 101 includes a comb actuator (e.g., an electrostatic comb actuator), such as a comb suspended with polysilicon.In such embodiments, the anchor 108 has a first plurality of fingers which are nested with a second plurality of fingers of the test mass 102.

[0012] The one or more curved arms 106 comprise curved outer surfaces (e.g., curved outer side walls). In some embodiments, the curved outer surfaces may comprise a winding shape, as seen in the top view 100 of the MEMS actuator 101. In some embodiments, the one or more curved arms 106 may comprise a plurality of inflection points separated by a plurality of inflection points. For example, the one or more curved arms 106 may each comprise a first maximum inflection point (e.g., a local peak) on a side of a curved arm facing the test mass 102, a first minimum inflection point (e.g., a local trough) on the side of the curved arm facing the test mass 102, and an inflection point between the first maximum inflection point and the first minimum inflection point.In some embodiments, the one or more curved booms may each include multiple maximum turning points, multiple minimum turning points, and multiple turning points on opposite sides of a curved boom.

[0013] It was found that the curved outer surfaces (e.g., side walls) reduce the localized load on the one or more curved arms 106 during movement of the MEMS actuator 101. For example, if dropped from a height of approximately 1.5 meters, the one or more curved arms 106 can be subjected to a load that is at least two orders of magnitude smaller than that of straight arms (e.g., on the order of 10). 4 MPa). By reducing a localized load on one or more curved arms 106, the reliability of the MEMS actuator 101 can be improved.

[0014] Fig. Figure 1B shows a cross-sectional view of some embodiments of an integrated chip structure 110, which has a MEMS actuator 101 with a test mass 102 coupled to a frame 104 by one or more curved arms. In some embodiments, the top view of the Fig. 1A MEMS actuator 101 shown along the cross-sectional line AA' of Fig. 1B has been taken.

[0015] The integrated chip structure 110 comprises a semiconductor structure 112 arranged on the MEMS actuator 101. In various embodiments, the semiconductor structure 112 can include an optical sensor (e.g., an image sensor-integrated chip), an optical component (e.g., a mirror, a lens, or the like), a sensor (e.g., for an atomic force microscope), an RF switch (high-frequency switch), or the like.

[0016] In some embodiments, the semiconductor structure 112 is coupled to the test mass 102 of the MEMS actuator 101. In some embodiments, the frame 104 of the MEMS actuator is coupled to a housing 114 that surrounds the MEMS actuator 101 and the semiconductor structure 112. During operation, the test mass 102 is configured to move in response to an applied signal, thereby spatially moving the semiconductor structure 112. In various embodiments, the test mass of the MEMS actuator 101 can move in a manner that changes the height and / or pitch (e.g., slope) of the semiconductor structure 112. The movements can be detected by a capacitive readout scheme.

[0017] Fig. Figure 2A shows a cross-sectional view of some additional embodiments of an integrated chip structure 200, which includes a MEMS actuator with a test mass coupled to a frame by one or more curved cantilevers.

[0018] The integrated chip structure 200 comprises a MEMS actuator 101 with a test mass 102 surrounded by a frame 104 and an armature 108 surrounded by the test mass 102. An integrated image sensor chip 202 is arranged on the test mass 102. In some embodiments, the integrated image sensor chip 202 can be coupled to the test mass 102 via one or more first coupling elements 204. In some embodiments, the one or more first coupling elements 204 can comprise conductive structures (e.g., solder bumps, vertical wire bonds, a wire stud, or the like) and / or a polymer. In some embodiments, the one or more first coupling elements 204 may comprise a conductive structure (e.g. a vertical wire bond) surrounded by an encapsulating agent (e.g. an epoxy resin, an epoxy resin with filler, epoxy acrylate, a polymer or the like).

[0019] The integrated image sensor chip 202 has one or more pixel areas, each containing an image acquisition element configured to convert electromagnetic radiation (e.g., visible light, ultraviolet radiation, or the like) into an electrical signal. In some embodiments, the integrated image sensor chip 202 may comprise a CMOS (complementary metal-on-oxide) image sensor (CIS). In some embodiments, the image acquisition element may comprise a photodiode, a photodetector, or the like.

[0020] In some embodiments, the MEMS actuator 101 and the integrated image sensor chip 202 are arranged within a package box 206 (e.g., of a camera module). In such embodiments, the package box 206 has a housing 208 that surrounds the MEMS actuator 101 and the integrated image sensor chip 202. In some embodiments, the housing 208 is attached to a base substrate 210. In some embodiments, the base substrate 210 may comprise a printed circuit board (PCB). The frame 104 of the MEMS actuator 101 is coupled to the housing 208 of the package box 206. In some embodiments, the frame 104 is laterally and physically coupled to one or more side walls of the housing 208. By further coupling the frame 104 with the test mass 102 via the one or more curved booms, the one or more curved booms are able to provide support for the test mass 102 when the package box 206 is moved (e.g.B. if the package box 206 is dropped), thereby protecting the test mass 102 from excessive unwanted movement that could damage the test mass 102.

[0021] In various embodiments, the MEMS actuator 101 can further be coupled to the base substrate 210 via one or more second coupling elements 212. In some embodiments, the armature 108 of the MEMS actuator 101 can be attached to the base substrate 210 by one or more second coupling elements 212. In some embodiments, one or more second coupling elements 212 can comprise conductive structures (e.g., solder bumps, vertical wire bonds, a wire stud, or the like) and / or a polymer. In some embodiments, one or more second coupling elements 212 can comprise a conductive structure (e.g., a vertical wire bond) surrounded by an encapsulating material (e.g., an epoxy resin, an epoxy resin with filler, epoxy acrylate, a polymer, or the like).In some embodiments, the armature 108 of the MEMS actuator 101 can be rigidly coupled to the base substrate 210 by one or more second coupling elements 212. In some additional embodiments (not shown), one or more additional coupling elements (e.g., vertical wire bonds, wire bonds, or the like) can be provided to electrically couple the test mass 102 and / or the integrated image sensor chip 202 to the base substrate 210.

[0022] An optical system 214 is arranged along an upper surface of the package box 206 and above the integrated image sensor chip 202. The optical system 214 comprises one or more lenses and / or mirrors. During operation, the optical system 214 is configured to focus incident radiation 216 onto one or more pixel areas of the integrated image sensor chip 202.

[0023] Fig. Figure 2B shows some embodiments of a top view 218 of the MEMS actuator 101 along the cross-sectional line AA' of Fig. 2A.

[0024] As shown in the top view 218, the test mass 102 of the MEMS actuator 101 is coupled to the frame 104 via one or more curved arms 106. In some embodiments, the test mass 102 has a maximum length 220 extending between its outermost edges. In some embodiments, the maximum length 220 of the test mass 102 is in a range between approximately 100 micrometers (µm) and approximately 2000 µm, between approximately 200 µm and approximately 1200 µm, or other similar values. In some embodiments, the ratio of the maximum length 220 of the test mass 102 to the maximum length of the one or more curved arms 106 is between approximately 1 and approximately 4, between approximately 1.15 and approximately 3.2, or other similar values.

[0025] During operation, an unwanted movement of the package box (e.g., 206 of Fig. 2A) cause a focal point of the optical system 214 to move, thereby causing incident radiation to strike different pixel areas within the integrated image sensor chip 202. The MEMS actuator 101 is configured to move the integrated image sensor chip 202 in response to unwanted movements of the package box 206 in order to reduce the effects of such movement on the integrated image sensor chip 202 (e.g., to reduce image blurring by minimizing the movement of incident radiation between pixels) and thus stabilize an image captured by the integrated image sensor chip 202. For example, if a change in the position of the integrated image sensor chip 202 is detected, a signal is applied to the armature 108 and / or the test ground 102 of the MEMS actuator 101. The signal moves the test mass 102 and the integrated image sensor chip 202 to mitigate the effects of the movement (e.g.in a direction opposite to the direction of the camera shake, thereby stabilizing an image captured by the integrated image sensor chip 202).

[0026] For example, the Fig. 3A to Fig. 3B some embodiments showing the operation of a disclosed MEMS actuator 101 with one or more curved arms.

[0027] As shown in the cross-sectional view 300 and the top view 302 of Fig. As shown in Figure 3A, the MEMS actuator 101 holds the integrated image sensor chip 202 at a first time point at a first angle θ1 with respect to a line 301 which is perpendicular to an upper surface of the base substrate 210 (i.e., which is oriented at an angle Φ of 90 degrees with respect to the upper surface of the base substrate 210). The first angle θ1 is achieved by having a first distance d1 between nested fingers within a first quadrant 304a surrounding a center of the anchor 108, a second distance d2 between nested fingers within a second quadrant 304b surrounding the center of the anchor 108, a third distance d3 between nested fingers within a third quadrant 304c surrounding the center of the anchor 108, and a fourth distance d4 between nested fingers within a fourth quadrant 304d surrounding the center of the anchor 108.In some embodiments, the first angle θ1 can be approximately 90 degrees. In such embodiments, several outer edges of the test mass 102 are located at substantially equal distances above the base substrate 210.

[0028] If the package box 206 moves (e.g., due to hand movement by a person holding a camera), the MEMS actuator 101 is configured to move the integrated image sensor chip 202 to compensate for the movement and thereby mitigate any blurring of an image captured by the integrated image sensor chip 202. For example, as shown in the cross-sectional view 306 and the top view 308 of Fig. As shown in Figure 3B, the MEMS actuator 101 compensates for a movement of the package box 206 at a second time point by moving the integrated image sensor chip 202 so that it is oriented at a second angle θ2 with respect to a line 307 that is perpendicular to an upper surface of the base substrate 210. To move the integrated image sensor chip 202 to compensate for the movement, the distances between nested fingers within one or more of the quadrants 304a-304d are changed. For example, a distance between nested fingers within the second quadrant 304b can change from the second distance d2 to a modified second distance d2. The change in the second distance alters the height of a first edge of the test mass 102, thereby rotating the test mass 102 and the integrated image sensor chip 202. In some embodiments, the distance between nested fingers can be adjusted by applying an electrical signal (e.g.,a voltage) to the armature 108 and / or the test mass 102 can be changed.

[0029] Fig. Figure 4A shows a top view of some additional embodiments of an integrated chip structure 400, which includes a MEMS actuator with a test mass coupled to a frame by one or more curved arms.

[0030] The integrated chip structure 400 comprises a MEMS actuator 101 with an armature 108 surrounded by a test mass 102. The test mass 102 is further surrounded by a frame 104. The armature 108 has a cross shape with a first plurality of branches 108b extending outwards from a central region 108c. In some embodiments, each of the first plurality of branches 108b has a first segment 109a extending in a first direction and a second segment 109b extending in a second direction perpendicular to the first direction. In some embodiments, each of the first plurality of branches 108b has a bend with a 90-degree angle. A first plurality of fingers 111 extends outwards from each of the first plurality of branches 108b of the armature 108.

[0031] In some embodiments, the width of the first segment 109a increases as its distance from the central region 108c increases. For example, the width of the first segment 109a of one of the first plurality of branches 108b can increase from a first width 402 near the central region 108c to a second width 404 at a greater distance from the central region 108c. In some embodiments, the width of the second segment 109b also increases as its distance from the first segment 109a increases. For example, the width of the second segment 109b of one of the first plurality of branches 108b can increase from a third width 406 near the first segment 109a to a fourth width 408 at a greater distance from the first segment 109a.

[0032] The test mass 102 surrounds the anchor 108. In some embodiments, the test mass 102 has a ring region 102r that wraps around the anchor 108 in a closed loop (e.g., an unbroken loop). A second plurality of branches 102b extends inward from inner side walls of the ring region 102r of the test mass 102, facing the anchor 108. A second plurality of fingers 103 extends outward from each of the second plurality of branches 102b. The first plurality of fingers 111 is nested with the second plurality of fingers 103.

[0033] One or more curved arms 106 couple the test mass 102 to the frame 104. The one or more curved arms 106 comprise curved outer surfaces with a plurality of inflection points 410. In some embodiments, the one or more curved arms 106 comprise side walls with a plurality of inflection points 410, as shown in the top view of Fig. 4A considered. In some embodiments, the one or more curved extensions 106 extend laterally past side walls of one or more of the second plurality of branches 102b.

[0034] In some embodiments, the test mass 102 may have four outer edges that are coupled to the frame 104 by four curved cantilevers, each arranged along one of the four outer edges of the test mass 102. In some such embodiments, the anchor 108 may comprise four branches extending outward from a central region 108c of the anchor 108, and the test mass 102 may comprise four branches extending inward from the ring region 102r. In some embodiments, the anchor 108 has a first branch extending outward to the right from the central region 108c, a second branch extending outward to the left from the central region 108c, a third branch extending downward outward from the central region 108c, and a fourth branch extending upward outward from the central region 108c, as viewed in a top view.In some embodiments, the four branches are aligned at approximately 90 degrees to each other. In such embodiments, the first plurality of fingers 111 is nested with the second plurality of fingers 103 within a first quadrant 304a, a second quadrant 304b, a third quadrant 304c, and a fourth quadrant 304d, which surrounds the central region 108c of the anchor 108.

[0035] In some embodiments, the one or more curved arms 106 extend from a surface of the test mass 102 facing a first direction to a surface of the frame 104 facing an opposite second direction. In some embodiments, the one or more curved arms 106 can be coupled to the test mass 102 and to the frame 104 via an absorber 412. The absorber 412 is designed to dampen vibrations on the one or more curved arms 106, thereby reducing the load on the one or more curved arms.

[0036] Fig. Figure 4B shows a top view 414 of some embodiments of an absorber 412 coupled to the one or more curved cantilevers 106. As shown in the top view 414, the absorber 412 may include a receiving element 416 coupled to the one or more curved cantilevers 106. The receiving element 416 is coupled to a damping element 420 via an elastic spring 418. During operation, the damping element 420 may move in response to a load due to an elastic line 422 coupled to a base 424. The elastic spring 418 may further move in response to the load, thereby reducing the stress on the ends of the one or more curved cantilevers 106.

[0037] Fig. Figure 5A shows a top view of 500 of some additional embodiments of an integrated chip structure comprising a MEMS actuator with a test mass coupled to a frame by one or more curved arms.

[0038] The MEMS actuator 101 has a test mass 102 which is coupled to a frame 104 via one or more curved arms 106. The test mass 102 surrounds an anchor 108. The test mass 102 has a first plurality of fingers and the anchor 108 has a second plurality of fingers which are nested with the first plurality of fingers.

[0039] The test mass 102 has a central area 502a of the test mass, which is surrounded by outer areas of the test mass, each comprising a test mass core 506a and a dielectric lining 504a of the test mass. The frame 104 has a central area 502b of the frame and one or more outer areas of the frame, each comprising a frame core material 506b surrounded by a dielectric lining 504b of the frame. The one or more curved booms 106 each comprise a central area 502c of the boom, which is surrounded by outer areas of the boom, each comprising a boom core material 506c surrounded by a dielectric lining 504c of the boom. The anchor 108 has a central area 502d of the anchor which is surrounded by outer areas of the anchor, each comprising an anchor core material 506d which is surrounded by a dielectric lining 504d of the anchor.

[0040] In some embodiments, the central regions 502a-502d may comprise a semiconductor material (e.g., silicon, polysilicon, crystallized silicon, doped silicon, or the like). In some embodiments, the dielectric linings 504a-504d may comprise an oxide (e.g., silicon dioxide), a nitride (e.g., silicon nitride, silicon oxynitride, etc.), a carbide (e.g., silicon carbide, silicon oxycarbide, etc.), or the like. In some embodiments, the core materials 506a-506d may comprise polysilicon. In some embodiments, the core materials 506a-506d may extend to a top surface of the dielectric linings 504a-504d and / or the central regions 502a-502d.

[0041] In some embodiments, the semiconductor material, core materials, and dielectric linings can each have a Young's modulus of more than approximately 100 GPa (gigapas), more than approximately 120 GPa, more than approximately 150 GPa, or other similar values. For example, in some embodiments, the dielectric lining can have a Young's modulus between approximately 150 GPa and approximately 200 GPa, the semiconductor material can have a Young's modulus between approximately 150 GPa and approximately 200 GPa, and the core material can have a Young's modulus between approximately 120 GPa and approximately 200 GPa. The relatively high Young's modulus of the semiconductor material, core materials, and dielectric linings improves the ability of the one or more curved cantilevers 106 to withstand stress, thereby further improving the reliability of the one or more curved cantilevers 106.

[0042] The top view 508 shows an enlarged view of a section of the MEMS actuator 101, which further shows the central areas 502a - 502c, the core materials 506a - 506c and the dielectric linings 504a - 504c within the test mass 102, the one or more curved cantilevers 106 and the frame 104.

[0043] Fig. Figure 5B shows a cross-sectional view 510 of the MEMS actuator 101 along line 509 of Fig. 5A. As shown in the cross-sectional view 510, the frame 104, the test mass 102, the one or more curved arms 106, and the armature 108 are arranged within a semiconductor layer 512 (e.g., of a MEMS substrate). The dielectric linings 504a–504d completely cover the side walls of the central regions 502a–502d and the core materials 506a–506d.

[0044] The one or more curved arms 106 are separated from the frame 104 and the test mass 102 by one or more first openings 105. The test mass 102 is further separated from the armature 108 by one or more second openings 107. The one or more first openings 105 and the one or more second openings 107 are each defined by side walls of the dielectric linings 504a-504d.

[0045] In some embodiments, a dielectric cap 514 can be arranged over the central areas 502a-502d, the dielectric linings 504a-504d, and the core materials 506a-506d within the frame 104, the test mass 102, the one or more curved arms 106, and the armature 108. In some embodiments, the dielectric cap 514 can comprise an oxide (e.g., silicon dioxide), a nitride (e.g., silicon nitride, silicon oxynitride, etc.), a carbide (e.g., silicon carbide, silicon oxycarbide, etc.), or the like. In such embodiments, the semiconductor layer 512, the dielectric linings 504a-504d, and the core materials 506a-506d can extend continuously from a bottom surface of the MEMS actuator 101 to the dielectric cap 514.In other embodiments, the dielectric cap 514 can be omitted, so that the semiconductor layer 512, the dielectric linings 504a-504d and the core materials 506a-506d extend continuously from a bottom surface of the MEMS actuator 101 to a top surface of the MEMS actuator 101.

[0046] Fig. Figure 5C shows a three-dimensional view 516 of a section 511 of the in Fig. 5A MEMS actuator 101. As shown in the three-dimensional view 516, the one or more curved arms 106 can have a thickness 518 which is approximately equal to the thickness of the test mass 104.

[0047] Fig. Figure 6 shows a top view illustrating some embodiments of a curved boom 600.

[0048] The curved boom 600 has a corrugated profile with opposing sides having curved segments. In some embodiments, the curved segments are separated by substantially straight sections. In other embodiments, the curved segments meet at a plurality of inflection points arranged along opposite sides of the curved boom. The curved boom 600 has a length 602, which lies in a range between about 200 micrometers (µm) and about 4000 µm, between about 230 µm and about 3840 µm, or other similar values. In some embodiments, the curved boom 600 may have a wavelength 604 (e.g., a length between peaks (maximum inflection points) and / or troughs (minimal inflection points) of the curved boom 600) which is in a range between about 100 µm and about 500 µm, between about 200 µm and about 400 µm, or other similar values.In some embodiments, the curved boom 600 may have a wave height 606 (e.g., a height between a tip and an adjacent trough of the curved boom 600) which is in a range between about 5 µm and about 150 µm, between about 10 µm and about 110 µm, or other similar values.

[0049] Due to the curvature of the curved boom 600, different locations on the curved boom 600 experience different amounts of stress during movement. For example, in some embodiments, the curvature of the curved boom 600 can cause a first stress 608 along an outer edge of the curved boom, located near an inflection point, which is greater than a second stress 610 along an outer edge of the curved boom, which is located near a local maximum inflection point and / or minimum inflection point of the curved boom 600. In some embodiments, the curvature of the curved boom 600 can cause a third stress 612 in a central region of the curved boom 600, which is greater than the second stress 610. In some embodiments, the second load 610 or the third load 612 can be a maximum load on the curved boom 600 that is less than about 2 × 10 4Mega Pascals (MPa), smaller than about 1.8 × 10 4 MPa, approximately 1.743 × 10 4 MPa or other similar values, such as approximately 1.158 × 10 3 MPa, in a drop test with a weight of 250 grams and a height of 1.5 meters. Because the maximum load on the curved boom is 600 less than that of a straight boom (e.g., less than about 1 × 10 6 MPa), it is less likely that the curved boom 600 will break during a high load (e.g., when dropped) on the curved boom 600, thereby improving the reliability of a disclosed MEMS actuator.

[0050] Fig. Figure 7 shows some additional embodiments of an integrated chip structure 700, which includes a MEMS actuator with a test mass coupled to a frame by one or more curved arms.

[0051] The integrated chip structure 700 comprises a package box 206 (e.g., a camera module) arranged above a base substrate 210. An optical system 214 is arranged along an upper surface of the package box 206. In some embodiments, the optical system 214 may include a lens 214a and a floating lens 214b, which are arranged between the lens 214a and the integrated image sensor chip 202. A MEMS actuator 101 is arranged within the package box 206 below the optical system 214. The MEMS actuator 101 has a frame 104 that is coupled to side walls of the package box 206. In some embodiments, a dielectric lining 504, arranged along an outermost side wall of the MEMS actuator 101, can be coupled to a side wall of the package box 206 (e.g. by an adhesive material).In other embodiments (not shown), a semiconductor material arranged along an outermost side wall of the MEMS actuator 101 can be coupled to a side wall of the package box 206.

[0052] An integrated image sensor chip 202 is arranged on the MEMS actuator 101 and between the MEMS actuator 101 and the optical system 214. The integrated image sensor chip 202 has an image acquisition element 710 arranged within the substrate 702. In some embodiments, the image acquisition element 710 can have a photodiode having a first region with a first doping type (e.g., n-type doping) and an adjacent second region with a second doping type (e.g., p-type doping) that differs from the first doping type. A transistor gate structure 704 is arranged along a first side of the substrate 702. In some embodiments, the transistor gate structure 704 can correspond to a transmission transistor. In such embodiments, the transistor gate structure 704 is arranged laterally between the image acquisition element 710 and a floating diffusion tray 712.The transistor gate structure 704 is set up to control the transfer of charge from the image acquisition element 710 (e.g. a photodiode) to the floating diffusion tray 712.

[0053] A dielectric structure 706 is arranged along the first side of the substrate 702. The dielectric structure 706 comprises a plurality of stacked dielectric intermediate layer (ILD) layers. In some embodiments, a plurality of conductive interconnects 708 (e.g., conductive contacts, interconnect wires, and / or interconnect vias) are arranged within the dielectric structure 706.

[0054] A dielectric planarization structure 714 can be arranged along a second side of the substrate 702. The dielectric planarization structure 714 has a substantially planar surface facing away from the substrate 702. In various embodiments, the dielectric planarization structure 714 can have one or more stacked dielectric layers (e.g., an oxide, a nitride, or the like). A lattice structure 716 is arranged on the dielectric planarization structure 714. In various embodiments, the lattice structure 716 can comprise a metal (e.g., aluminum, cobalt, copper, silver, gold, tungsten, etc.) and / or a dielectric material (e.g., SiO2, SiN, etc.). A color filter 718 is arranged within an opening in the lattice structure 716. The color filter 718 is configured to selectively transmit specific wavelengths of incident radiation.For example, the color filter 718 can transmit radiation with wavelengths within a first range (e.g., corresponding to green light), while a second color filter (not shown) can transmit radiation with wavelengths within a second range (e.g., corresponding to red light) that differs from the first range, and so on. A microlens 720 is arranged above the color filter 718. The microlens 720 is aligned laterally with the color filter 718 and is configured to focus the incident radiation (e.g., light) onto the image-capturing element 710.

[0055] In some embodiments, a MEMS gyroscope 722 and / or a MEMS accelerometer 724 can be arranged on the base substrate 210. The MEMS gyroscope 722 and / or the MEMS accelerometer 724 are configured to detect and / or measure movement of the package box 206. In some embodiments, the MEMS gyroscope 722 and / or the MEMS accelerometer 724 can be coupled to a control circuit arrangement 726, which is also arranged on the base substrate 210. The control circuit arrangement 726 is configured to send a signal to the MEMS actuator 101 based on a detected movement recorded by the MEMS gyroscope 722 and / or the MEMS accelerometer 724.The signal is configured to cause the MEMS actuator 101 to move in a manner that mitigates the effect of the movement of the package box 206 on the integrated image sensor chip 202 in order to mitigate blurring in images captured by the integrated image sensor chip 202.

[0056] The Fig. 8 to Fig. Figure 17 shows cross-sectional views 800 to 1700, which illustrate some embodiments of a method for forming an integrated chip structure comprising a MEMS actuator with a test mass coupled to a frame by one or more curved arms. Although the Fig. 8 to Fig. 17, which are described in relation to a procedure, it is recognized that the procedures described in the Fig. 8 to Fig. 17 disclosed structures are not limited to such a procedure, but can instead stand alone as structures independent of the procedure.

[0057] As shown in the cross-sectional view 800 (taken along line 812) and the top view 810 (taken along line 808) from Fig. As shown in Figure 8, a substrate 802 is provided. The substrate 802 has a lower semiconductor layer 804, which is separated from a semiconductor layer 512 by an insulating layer 806. In some embodiments, the lower semiconductor layer 804 and the semiconductor layer 512 may comprise silicon, germanium, gallium, or the like. In some embodiments, the insulating layer 806 may comprise an oxide (e.g., silicon oxide), a nitride (e.g., silicon oxynitride), or the like.

[0058] In some embodiments, the lower semiconductor layer 804 can be a first substrate comprising a first semiconductor body, a handling wafer, or the like. In some embodiments, the semiconductor layer 512 can be a second semiconductor body, a MEMS wafer, or the like. In some embodiments, the substrate 802 can be provided by forming the insulating layer 806 over the lower semiconductor layer 804 and subsequently bonding the semiconductor layer 512 to the insulating layer 806. In some embodiments, the insulating layer 806 can be formed by a thermal oxidation process, such as a thermal wet oxidation process or a thermal dry oxidation process.In such embodiments, the lower semiconductor layer 804 is placed in an oven and heated to a temperature typically in the range of about 800 degrees Celsius (°C) to about 1200 °C in the presence of oxygen to form the insulating layer 806. In other embodiments, the insulating layer 806 can be formed by a spin deposition process, a plasma vapor deposition (PVD) process, a chemical vapor deposition (CVD) process, an atomic layer deposition (ALD) process, or other techniques. In some embodiments, the semiconductor layer 512 is bonded to an upper surface of the insulating layer 806 by a fusion bonding process.

[0059] As shown in the cross-sectional view 900 (taken along line 812) and the top view 928 (taken along line 808) from Fig. As shown in Figure 9, the semiconductor layer 512 is structured to form a plurality of trenches extending into the semiconductor layer 512 to define a cantilever region 902, a frame region 904, a test mass region 906, and an anchor region 908. The cantilever region 902, the frame region 904, the test mass region 906, and the anchor region 908 are separated from each other by the plurality of trenches. In some embodiments, the cantilever region 902, the frame region 904, the test mass region 906, and the anchor region 908 can also be separated from each other by sacrificial regions 910-914. The cantilever region 902 is defined by curved sidewalls of the semiconductor layer 512 that extend continuously between the frame region 904 and the test mass region 906.

[0060] In some embodiments, the plurality of trenches comprises a plurality of curved trenches 916 on opposite sides of the boom area 902, a first plurality of straight trenches 918 on opposite sides of the test mass area 906, a second straight trench 920 between the frame area 904 and the plurality of curved trenches 916, and a third straight trench 922 between the anchor area 908 and the first plurality of straight trenches 918. The plurality of curved trenches 916 is separated from the first plurality of straight trenches 918 by a first sacrificial area 910 and from the second straight trench 920 by a second sacrificial area 912. The first plurality of straight trenches 918 is separated from the third straight trench 922 by a third sacrificial area 914.In some embodiments, the majority of curved trenches 916, the first majority of straight trenches 918, the second straight trench 920 and the third straight trench 922 have bottoms defined by horizontally extending surfaces of the semiconductor layer 512.

[0061] In some embodiments, the plurality of curved trenches 916, the first plurality of straight trenches 918, the second straight trench 920, and the third straight trench 922 are each defined by side walls and a horizontally extending surface of the semiconductor layer 512. In some embodiments, the plurality of curved trenches 916, the first plurality of straight trenches 918, the second straight trench 920, and the third straight trench 922 are formed by a lithography process that forms a structured masking layer 924 over the semiconductor layer 512 and subsequently etches exposed areas of the semiconductor layer 512 with an etchant 926. In some embodiments, the etchant 926 may comprise a dry etchant. In some embodiments, the dry etchant may comprise a fluorine-based etching chemistry.For example, the dry etchant may have an etching chemistry comprising carbon tetrafluoride (CF4), trifluoromethane (CHF3), octafluorocyclobutane (C4F8), or the like. In other embodiments, the dry etchant may comprise an etching chemistry comprising chlorine (Cl2), HB4, argon (Ar), or the like.

[0062] As shown in the cross-sectional view 1000 (taken along line 812) and the top view 1004 (taken along line 808) from Fig. As shown in Figure 10, one or more filling materials are formed within the plurality of trenches (e.g., the plurality of curved trenches 916, the first plurality of straight trenches 918, the second straight trench 920, and the third straight trench 922). The one or more filling materials completely fill the plurality of trenches. In some embodiments, the one or more filling materials may comprise a dielectric lining 504 formed along the inner surfaces of the plurality of trenches and a core material 506 arranged on the dielectric lining 504. In some embodiments, the dielectric lining 504 may comprise an oxide (e.g., silicon oxide), a nitride (e.g., silicon nitride), or the like. In some embodiments, the core material 506 may comprise polysilicon or the like.In some embodiments, one or more filling materials can comprise a Young modulus greater than or equal to approximately 120 GPa.

[0063] In some embodiments, the dielectric lining 504 can be formed by a thermal oxidation process. In such embodiments, the semiconductor layer 512 can be exposed to a high temperature (e.g., greater than or equal to about 700 °C, greater than or equal to about 800 °C, between about 900 °C and about 1100 °C, or other similar values). In some embodiments, the semiconductor layer 512 can be exposed to the high temperature in the presence of water vapor. The thermal oxidation process forms an oxide along the inner surfaces of the plurality of trenches. The core material 506 is subsequently formed onto the dielectric lining 504 and within the plurality of trenches by a deposition process. In various embodiments, the deposition process can include a PVD process, a CVD process, a PE-CVD process, an ALD process, or the like. In some embodiments, a planarization process (e.g.,A chemical-mechanical planarization process (CMP process) is carried out along line 1002 to remove excess semiconductor material above a top surface of semiconductor layer 512.

[0064] As shown in the cross-sectional view 1100 (taken along line 812) and the top view 1102 (taken along line 808) from Fig. As shown in Figure 11, a dielectric cap 514 is formed over the semiconductor layer 512. The dielectric cap 514 covers the cantilever area 902, the frame area 904, the test mass area 906, and the armature area 908. The dielectric cap 514 exposes the first sacrificial area 910, the second sacrificial area 912, and the third sacrificial area 914. In various embodiments, the dielectric cap 514 comprises an oxide (e.g., silicon oxide), a nitride (e.g., silicon nitride, silicon oxynitride, etc.), a carbide (e.g., silicon carbide, silicon oxycarbide, etc.), or the like.

[0065] As shown in the cross-sectional view 1200 (taken along line 812) and the top view 1206 (taken along line 808) from Fig. As shown in Figure 12, a separation etching process is carried out by exposing the semiconductor layer 512 to an etchant 1202, with the dielectric cap 514 placed over the semiconductor layer 512. The separation etching process removes the first sacrificial region (e.g., 910 of Fig. 11) and the second victim area (e.g. 912 of Fig. 11) to form one or more first openings 105 that separate one or more curved cantilevers 106 from a frame 104 and a test mass 102 by non-zero spaces. The separation etching process also removes the third sacrificial area (e.g., 914 of Fig. 11) to form one or more second openings 107 that separate the test mass 104 from an armature 108. The separation etching process also etches the semiconductor layer 512 beneath the one or more first openings 105 and / or the one or more second openings 107 to form a lower recess 1204 that extends beneath portions of the one or more curved cantilevers 106, the frame 104, the test mass 102, and the armature 108. In some embodiments, a lower recess 1204 is arranged within the semiconductor layer 512 and extends under parts of the frame 104, the test mass 102, the one or more curved arms 106, and the armature 108. The lower recess 1204 is connected to the one or more first openings 105 and the one or more second openings 107.

[0066] In some embodiments, the etchant 1202 is a wet etchant exhibiting high etch selectivity between the semiconductor layer 512 and the dielectric lining 504. The high etch selectivity causes the etchant 1202 to etch the semiconductor layer 512 at a first etch rate, while the dielectric lining 504 is etched at a second etch rate that is lower than the first. In some embodiments, the etchant 1202 may comprise hydrofluoric acid (HF) (e.g., aqueous HF etching or vapor HF etching). In other embodiments, the etchant 1202 may comprise hydrogen peroxide (H₂O₂), potassium hydroxide (KOH), or the like.

[0067] As shown in the cross-sectional view 1300 (taken along line 812) and the top view 1302 (taken along line 808) from Fig. As shown in Figure 13, the lower semiconductor layer and the insulating layer are removed from the semiconductor layer 512 to form a MEMS actuator 101. In some additional embodiments (not shown), the dielectric cap 514 can be removed from the semiconductor layer 512. In some embodiments, the lower semiconductor layer, the insulating layer, and / or the dielectric cap 514 can be removed by an etching process, a grinding process, a polishing process (e.g., a chemical-mechanical planarization (CMP) process), or the like. In some embodiments, the lower semiconductor layer, the insulating layer, and / or the dielectric cap 514 can be removed after attaching an integrated image sensor chip (e.g., as shown in cross-sectional view 1400).

[0068] As shown in the cross-sectional view 1400 (taken along line 1406) and the top view 1404 (taken along line 1402) from Fig. As shown in Figure 14, an integrated image sensor chip 202 is placed on the MEMS actuator 101. In some embodiments, the integrated image sensor chip 202 is coupled to the test material 102 of the MEMS actuator 101 via one or more first coupling elements 204. In some embodiments, the one or more first coupling elements 204 can comprise conductive structures (e.g., solder bumps, vertical wire bonds, a wire stud, or the like) and / or a polymer. In some embodiments, the one or more first coupling elements 204 can be in direct contact with the semiconductor layer (e.g., 512 of Fig. 13) be trained.

[0069] As shown in the cross-sectional view 1500 of Fig. As shown in Figure 15, the MEMS actuator 101 and the integrated image sensor chip 202 are placed within a package box 206 (e.g., of a camera module). The package box 206 has a housing 208 with side walls and a top surface that surrounds the MEMS actuator 101 and the integrated image sensor chip 202. In some embodiments, the frame 104 of the MEMS actuator 101 is physically coupled to side walls of the package box 206.

[0070] In some embodiments, an optical system 214 is arranged along a top surface of the package box 206 at a location directly above the integrated image sensor chip 202. The optical system 214 may include one or more lenses 214a-214b configured to focus incident radiation onto the integrated image sensor chip 202. In some embodiments (not shown), the MEMS actuator 101 and the integrated image sensor chip 202 can be placed inside the package box after the MEMS actuator 101 has been coupled to a base substrate.

[0071] As shown in the cross-sectional view 1600 of Fig. As shown in Figure 16, the package box 206 and / or the MEMS actuator 101 are coupled to a base substrate 210. In some embodiments, the base substrate 210 may comprise a printed circuit board (PCB). In some embodiments, the MEMS actuator 101 may be coupled to the base substrate 210 above the MEMS actuator 101 before the package box 206 is formed. In some embodiments, the MEMS actuator 101 may be coupled to the base substrate 210 via one or more secondary coupling elements 212. In some embodiments, the one or more secondary coupling elements 212 may comprise conductive structures (e.g., solder bumps, vertical wire bonds, a wire stud, or the like) and / or a polymer. In some embodiments, the armature 108 of the MEMS actuator 101 can be rigidly coupled to the base substrate 210 via one or more second coupling elements 212.

[0072] As shown in the cross-sectional view 1700 of Fig. As shown in Figure 17, one or more additional integrated chip elements 722-726 are coupled to the base substrate 210. In some embodiments, the one or more additional integrated chip elements 722-726 may comprise a MEMS gyroscope 722 and / or a MEMS accelerometer 724. The MEMS gyroscope 722 and / or the MEMS accelerometer 724 are configured to detect movement of the package box 206 (e.g., during a hand movement). In some embodiments, the one or more additional integrated chip elements 722-726 may further and / or alternatively comprise a control circuit arrangement 726 (e.g., a processor) configured to generate one or more signals to control the operation of the MEMS actuator 101 in response to movement of the package box 206.In various embodiments, the one or more additional integrated chip elements 722-726 can be coupled to the base substrate 210 by means of a bonding process that forms one or more conductive bumps (e.g. solder bumps) between the one or more additional integrated chip elements 722-726 and the base substrate 210.

[0073] Fig. Figure 18 shows a flow diagram of some embodiments of a method 1800 for forming an integrated chip structure comprising a MEMS actuator with a test mass coupled to a frame by one or more curved arms.

[0074] Although Procedure 1800 is presented and described here as a series of operations or events, it is recognized that the presented sequence of such operations or events is not to be interpreted in a restrictive sense. Some operations, for example, may occur in different sequences and / or concurrently with other operations or events beyond those presented and / or described here. Furthermore, it may not be necessary to include all of the operations presented to implement one or more aspects or embodiments of the description given here. Additionally, one or more of the operations presented here may be carried out in one or more separate operations and / or phases.

[0075] In process 1802, a substrate is provided that has a semiconductor layer separated from a lower semiconductor layer by an insulating layer. Fig. Figure 8 shows a cross-sectional view 800 and a top view 810 of some embodiments corresponding to process 1802.

[0076] In process 1804, a plurality of curved trenches are formed within the semiconductor layer to separate a cantilever area from a test mass area and a frame area. Fig. Figure 9 shows a cross-sectional view 900 and a top view 928 of some embodiments corresponding to process 1804.

[0077] In process 1806, a plurality of straight trenches are formed within the semiconductor layer and along sides of the test mass area and the frame area. The plurality of straight trenches are separated from the multiple curved trenches by sacrificial areas. Fig. Figure 9 shows a cross-sectional view 900 and a top view 928 of some embodiments corresponding to process 1806.

[0078] In process 1808, one or more filling materials are formed within the majority of curved trenches and the majority of straight trenches. Fig. Figure 11 shows a cross-sectional view 1000 and a top view 1004 of some embodiments corresponding to process 1808.

[0079] In process 1810, the semiconductor layer is structured to remove one or more sacrificial areas and to form non-zero spaces that separate a cantilever from a test mass and a frame. Fig. 11 to Fig. Figure 12 shows cross-sectional views 1100 and 1200 and top views 1102 and 1206 of some embodiments corresponding to process 1810.

[0080] In process 1812, the lower semiconductor layer and the insulating layer are removed to define a MEMS actuator. Fig. Figure 13 shows a cross-sectional view 1300 and a top view 1302 of some embodiments corresponding to process 1812.

[0081] In process 1814, sides of the MEMS actuator are coupled with one or more side walls of a package box. Fig. Figure 15 shows a cross-sectional view 1500 of some embodiments corresponding to process 1814.

[0082] Accordingly, in some embodiments, the present disclosure relates to an integrated chip structure comprising a MEMS (microelectromechanical systems) actuator with a test mass coupled to a frame by one or more curved arms.

[0083] In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure comprises a MEMS actuator (microelectromechanical systems actuator) having an armature with a first plurality of branches extending outward from a central region of the armature, each of the first plurality of branches having a first plurality of fingers; a test mass surrounding the armature, the test mass being movable, and having a second plurality of branches extending inward from an inner side wall of the test mass, each of the second plurality of branches having a second plurality of fingers that, viewed from a top view, are nested with the first plurality of fingers; one or more curved cantilevers coupled between the test mass and a frame, the frame wrapping around the test mass;and wherein, as viewed in plan view, the one or more curved arms comprise curved outer surfaces with one or more inflection points. In some embodiments, the anchor has a cross shape with the first plurality of arms extending outwards from the central region, each of the first plurality of arms being bent at a 90-degree angle. In some embodiments, the test mass has a closed loop that wraps around the anchor. In some embodiments, the one or more curved arms extend laterally past one or more side walls of the second plurality of arms. In some embodiments, the curved outer surfaces of the one or more curved arms comprise curved outer surfaces with a plurality of inflection points.

[0084] In other embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure comprises a MEMS actuator arranged over a base substrate and a frame coupled to a test mass by one or more curved arms and an anchor coupled to the base substrate, the test mass having a first plurality of fingers nested with a second plurality of fingers of the anchor; an integrated image sensor chip arranged on the MEMS actuator; and, as viewed in a top view of the one or more curved arms, the one or more curved arms comprising curved outer surfaces, the curved outer surfaces having a plurality of inflection points arranged between each inflection point.In some embodiments, the MEMS actuator further comprises an armature coupled to the base substrate, wherein the test mass has a first plurality of fingers nested with a second plurality of fingers of the armature. In some embodiments, the test mass has a first plurality of branches, each having a first plurality of fingers; and the MEMS actuator further comprises an armature with a second plurality of branches, each having a second plurality of fingers nested with the first plurality of branches. In some embodiments, the base substrate comprises a printed circuit board. In some embodiments, the frame wraps around the test mass in a closed loop. In some embodiments, the one or more curved arms comprise four curved arms, each arranged along a different side of the test mass.In some embodiments, the one or more curved arms extend from a surface of the test mass facing a first direction to a surface of the frame facing an opposite second direction, as viewed in the top view of the test mass. In some embodiments, the integrated chip structure further comprises a package box that surrounds the integrated image sensor chip and the MEMS actuator, the frame of the MEMS actuator being laterally coupled to a side wall of the package box; and an optical system comprising one or more lenses arranged within the package box and configured to focus incident radiation onto the integrated image sensor chip.In some embodiments, the integrated chip structure further comprises a control circuit arrangement located on the base substrate and configured to generate an electrical signal, wherein the electrical signal is configured to move the test mass in response to a detected movement of the package box. In some embodiments, the one or more curved arms each have a central region surrounded laterally on opposite sides by outer regions of the arms, wherein the outer regions of the arms comprise a dielectric lining surrounding a core material, as viewed in a cross-sectional view.

[0085] In other embodiments, the present disclosure relates to a method for forming an integrated chip structure. The method comprises providing a substrate with a lower semiconductor layer separated from a semiconductor layer by an insulating layer; structuring the semiconductor layer to form a plurality of curved trenches on opposite sides of a cantilever region, a first plurality of straight trenches on opposite sides of a test mass region, and a second straight trench between a frame region and the plurality of curved trenches, wherein the plurality of curved trenches are separated from the first plurality of straight trenches by a first sacrificial region of the semiconductor layer and from the second straight trench by a second sacrificial region of the semiconductor layer; filling the plurality of curved trenches,the first plurality of straight trenches and the second straight trench containing one or more filling materials; and removing the first sacrificial area and the second sacrificial area to form one or more curved cantilevers separated by openings from a test mass, wherein the test mass is movable, and a frame, the frame wrapping around the test mass, the one or more curved cantilevers having curved sidewalls extending continuously between the test mass and the frame. In some embodiments, the method further comprises removing the semiconductor layer from beneath a portion of the test mass to form a bottom surface of the test mass separated from the insulating layer by a second non-zero space. In some embodiments, the plurality of curved trenches, the first plurality of straight trenches, and the second straight trench have bottoms.which are defined by horizontally extending surfaces of the semiconductor layer. In some embodiments, filling the plurality of curved trenches with one or more filler materials includes performing a thermal oxidation process to form a dielectric lining along sidewalls of the semiconductor layer defining the plurality of curved trenches; and depositing polysilicon onto the dielectric lining to completely fill the plurality of curved trenches. In some embodiments, the method further includes attaching an integrated image sensor chip to the test mass; and attaching the frame to a sidewall of a package box.

Claims

[1] Integrated chip structure, comprising: a MEMS actuator (microelectromechanical systems actuator) (101), comprising: an armature (108) having a first plurality of branches (108b) extending outwardly from a central region (108c) of the armature (108), the first plurality of branches (108b) each having a first plurality of fingers (111); a proof mass (102) surrounding the armature (108) and having a second plurality of branches (102b) extending inwardly from an inner sidewall of the proof mass (102), the second plurality of branches (102b) each having a second plurality of fingers (103) interleaved with the first plurality of fingers (111) when viewed in plan view; one or more curved cantilevers (106) coupled between the proof mass (102) and a frame (104), the frame (104) wrapping around the proof mass (102); wherein, as viewed in plan view, the one or more curved arms (106) have curved outer surfaces with one or more inflection points (410); and further comprising: a package box (206) surrounding an integrated image sensor chip (202) and the MEMS actuator (101), wherein the frame (104) of the MEMS actuator (101) is laterally coupled to a side wall of the package box (206); and an optical system (214) comprising one or more lenses arranged within the package box (206) and configured to focus incident radiation (216) to the integrated image sensor chip (202). [2] The integrated chip structure of claim 1, wherein the anchor (108) has a cross shape with the first plurality of branches (108b) extending outwardly from the central region (108c), each of the first plurality of branches (108b) being bent at a 90-degree angle. [3] The integrated chip structure of claim 1 or 2, wherein the proof mass (102) comprises a closed loop wrapping around the armature (108). [4] The integrated chip structure of any preceding claim, wherein the one or more curved cantilevers (106) extend laterally past one or more sidewalls of the second plurality of branches (102b). [5] The integrated chip structure of any preceding claim, wherein the curved outer surfaces of the one or more curved cantilevers (106) comprise curved outer surfaces having a plurality of inflection points (410). [6] Integrated chip structure, comprising: a MEMS actuator (101) disposed over a base substrate (210) and having a frame (104) coupled to a proof mass (102) by one or more curved cantilevers (106); an integrated image sensor chip (202) arranged on the MEMS actuator (101); wherein, as viewed in a plan view of the one or more curved arms (106), the one or more curved arms (106) comprise curved outer surfaces, wherein, as viewed in the plan view, the curved outer surfaces have a plurality of inflection points (410) each disposed between inflection points (410); and further comprising: a package box (206) surrounding the integrated image sensor chip (202) and the MEMS actuator (101), wherein the frame (104) of the MEMS actuator (101) is laterally coupled to a side wall of the package box (206); and an optical system (214) comprising one or more lenses arranged within the package box (206) and configured to focus incident radiation (216) to the integrated image sensor chip (202). [7] The integrated chip structure of claim 6, wherein the MEMS actuator further comprises an armature coupled to the base substrate, the proof mass comprising a first plurality of fingers interleaved with a second plurality of fingers of the armature. [8] Integrated chip structure according to claim 6, wherein the proof mass (102) has a first plurality of branches (102b) each having a first plurality of fingers (103); and wherein the MEMS actuator (101) further comprises an armature (108) having a second plurality of branches (108b) each having a second plurality of fingers (111) interleaved with the first plurality of branches (102b). [9] Integrated chip structure according to one of claims 6 to 8, wherein the base substrate (210) comprises a printed circuit board. [10] Integrated chip structure according to one of claims 6 to 9, wherein the frame (104) wraps around the proof mass (102) in a closed loop. [11] The integrated chip structure of any one of claims 6 to 10, wherein the one or more curved cantilevers (106) comprise four curved cantilevers, each arranged along a different side of the proof mass (102). [12] The integrated chip structure of any one of claims 6 to 11, wherein, as viewed in the top view of the proof mass (102), the one or more curved cantilevers (106) extend from a surface of the proof mass (102) facing a first direction to a surface of the frame (104) facing an opposite second direction. [13] Integrated chip structure according to one of claims 6 to 12, further comprising: a control circuit arrangement arranged on the base substrate (210) and configured to generate an electrical signal, the electrical signal configured to move the proof mass (102) in response to a detected movement of the package box (206). [14] The integrated chip structure of any one of claims 6 to 13, wherein the one or more curved cantilevers (106) each have a central region (502c) laterally surrounded on opposite sides by outer regions of the cantilever, the outer regions of the cantilever comprising a dielectric liner (504c) surrounding a core material (506c) as viewed in a cross-sectional view (510). [15] A method of forming an integrated chip structure, comprising: Providing a substrate (802) having a lower semiconductor layer (804) separated from a semiconductor layer (512) by an insulating layer (806); Structuring the semiconductor layer (512) to form a plurality of curved trenches (916) on opposite sides of a cantilever region (902), a first plurality of straight trenches (918) on opposite sides of a proof mass region (906), and a second straight trench (920) between a frame region (904) and the plurality of curved trenches (916), wherein the plurality of curved trenches (916) are separated from the first plurality of straight trenches (918) by a first sacrificial region (910) of the semiconductor layer (512) and from the second straight trench (920) by a second sacrificial region (912) of the semiconductor layer (512); Filling the plurality of curved trenches (916), the first plurality of straight trenches (918) and the second straight trench (920) with one or more filling materials; and Removing the first sacrificial region (910) and the second sacrificial region (912) to form one or more curved cantilevers (106) separated by openings (105) from a proof mass (102), the proof mass (102) being movable, and a frame (104), the frame (104) wrapping around the proof mass (102), the one or more curved cantilevers (106) having curved sidewalls extending continuously between the proof mass (102) and the frame (104). [16] The method of claim 15, further comprising: Removing the semiconductor layer (512) from beneath a portion of the proof mass (102) to form a bottom surface of the proof mass (102) separated from the insulating layer (806) by a bottom recess (1204). [17] The method of claim 15 or 16, wherein the plurality of curved trenches (916), the first plurality of straight trenches (918), and the second straight trench (920) have bottoms defined by horizontally extending surfaces of the semiconductor layer (512). [18] The method of any one of claims 15 to 17, wherein filling the plurality of curved trenches (916) with one or more filling materials comprises: Performing a thermal oxidation process to form a dielectric liner (504) along sidewalls of the semiconductor layer (512) defining the plurality of curved trenches (916); and Depositing a polysilicon onto the dielectric liner (504) to completely fill the plurality of curved trenches (916). [19] A method according to any one of claims 15 to 18, further comprising: Attaching an integrated image sensor chip (202) to the proof mass (102); and Attaching the frame (104) to a side wall of a package box (206).

Images