ELECTRONIC DEVICE

Abstract

According to one embodiment, an electronic device is described comprising a counter circuit configured to detect first pulses in a received first output signal and to determine the number of detected first pulses, a counter circuit configured to detect second pulses in a received second output signal and to determine the number of detected second pulses, and an error detection circuit configured to register a first difference between the number of first pulses detected in a first time interval and the number of second pulses detected in the first time interval, to determine a second difference between the number of first pulses detected in a second time interval and the number of second pulses detected in the second time interval, and to indicate an error.if the first difference and the second difference differ from each other by at least a predetermined threshold value.

Description

[0001] Embodiments generally relate to electronic devices.

[0002] Depending on their application, electronic devices can have high reliability requirements. For example, an electronic control unit in a motor vehicle must generally meet a high safety standard (such as ASIL (Automotive Safety Integrity Level) D). This includes, in particular, robustness against errors in the connections between various components, such as the connection to a controlled device or another communication partner. While high reliability can be achieved through various approaches, e.g., by providing redundant elements, particularly redundant output connections (pins), these approaches increase complexity and thus, for example, the required chip area, power consumption, and thus costs. Accordingly, efficient approaches for detecting errors in the operation of electronic devices, especially in connections between two electronic devices, are desirable.

[0003] Publication JP H10-21 111 A describes a method for detecting short circuits between adjacent connection pins. To do this, a test signal is transmitted via one of the connection pins, and it is determined whether an input signal of the other connection pin is influenced by the output test signal.

[0004] The publication US 7,996,162 B1 describes a method for detecting short circuits between adjacent output terminals, in which rates of change and differences between the signals detected at adjacent output terminals are determined and, based on a comparison and various criteria, it is determined whether the output terminals are short-circuited.

[0005] Publication CN 1 13 296 998 A describes a method for recovering from data communication failures, comprising, when a first chip receives target data sent from a second chip and the target data is abnormal, detecting the target pin information of the second chip based on the first chip, determining a target processing mode for the second chip according to an information matching relationship between the target pin information and a preset pin set, and processing the target data in the second chip based on the target processing mode to enable normal data communication.

[0006] Publication US 2006 / 0190767 A1 describes a design optimization of microprocessors using free driver outputs for discrete input interfaces. An output driver is used to connect a discrete input to a microprocessor. An error detection mechanism of the output driver is used to read the discrete input. By monitoring an error register of the output driver, the state of an external switch can be determined.

[0007] According to one embodiment, an electronic device is provided, comprising • a signal generation circuit configured to generate a first output signal by adding a pulse signal to a first useful signal and supply it to a first output terminal of the electronic device, and to generate a second output signal by adding the pulse signal to a second useful signal and supply it to a second output terminal of the electronic device, • a counter circuit configured to receive the first output signal from the first output terminal, detect first pulses in the received first output signal and determine a number of the detected first pulses and to receive the second output signal from the second output terminal, detect second pulses in the received second output signal and determine a number of the detected second pulses and • an error detection circuit which is set up ◯ to register a first difference between the number of first pulses detected in a first time interval and the number of second pulses detected in the first time interval, ◯ to determine a second difference between the number of first pulses detected in a second time interval and the number of second pulses detected in the second time interval and ◯ indicate an error if the first difference and the second difference differ by at least a specified threshold.

[0008] The figures do not represent actual dimensions but are intended to illustrate the principles of the various embodiments. Various embodiments are described below with reference to the following figures. Fig. 1 shows an electronic device. Fig.2 shows an electronic device according to an embodiment. Fig. 3 shows an example of pin error detection. Fig. Figure 4 shows another example of pin error detection. Fig. Figure 5 illustrates the temperature dependence of pulse numbers. Fig. 6 shows an electronic device according to an embodiment. Fig. 7 shows a flowchart illustrating a method for detecting errors at output terminals of an electronic device.

[0009] The following detailed description refers to the accompanying figures, which show details and exemplary embodiments. These exemplary embodiments are described in such detail that those skilled in the art can carry out the invention. Other embodiments are also possible, and the exemplary embodiments can be modified structurally, logically, and electrically without departing from the scope of the invention. The various exemplary embodiments are not necessarily mutually exclusive, but different embodiments can be combined with one another to create new embodiments. In this description, the terms "connected," "connected," and "coupled" are used to describe both a direct and an indirect connection, a direct or indirect connection, and a direct or indirect coupling.

[0010] Fig. 1 shows an electronic device 100.

[0011] The electronic device 100 is, for example, an electronic control unit (ECU), in particular for a vehicle, but may also be a control unit or a data processing device for other devices such as machines, power generators, etc.

[0012] In the Fig. In the example shown in Figure 1, the electronic device 100 communicates with another electronic device 101 (e.g., in the same device 110), e.g., an actuator in a vehicle. For this purpose, the electronic device 100 has a CPU (Central Processing Unit) 102 and a communication interface module 103 (e.g., a bus chip, e.g., for supporting a peripheral bus) as a payload data source. A payload signal is output via a first port 104, a first pad 105, and a first pin 106 of the electronic device 100 to the other electronic device 101, which is connected to the first pin 106.

[0013] To comply with a safety standard such as ASIL-B, it is sufficient for the electronic device 101 to internally check the payload signal it delivers to the first pin 106. This means that only one pin is required to output a payload signal, but pin errors, such as a broken connection to the other electronic device 101 or a short circuit (or at least a connection) of the pin to a supply potential (high supply potential or ground), cannot be detected.

[0014] Since a more stringent safety standard, such as ASIL-D, may require that even such pin errors be detectable, a second pin 107 can be provided that receives feedback (i.e., a return) of the output useful signal from a point of connection between the pin and another electronic device 101 or the electronic device 101 itself. This feedback can then be delivered via a second pad 108 and a second port 109 to the communication interface module 103 for pin error detection. This makes pin errors detectable, but the complexity (and thus the space required, manufacturing costs, etc.) increases due to the required return path, particularly for the second pin 107.

[0015] According to various embodiments, an approach is therefore provided that allows pin errors to be detected with a single pin. The pin errors are, for example, • a broken connection line (at the pin). This leads to a decrease in capacitance at the pin and / or an increase in impedance at the pin (from the perspective of the electronic device whose pin it is). These effects can be used for detection. • A short circuit (or at least a connection with a certain resistance) of the pin to the (high) supply potential or to ground (i.e., the low supply potential). Depending on the situation, this decreases or increases the steepness of the falling or rising edges of the output signal. This effect can also be used for detection.

[0016] The useful signal that is output is, for example, • A bus signal, such as an ASCLIN signal, a QSPI signal, an I2C signal, a SENT signal or a PSI5 signal • A (possibly critical) enable signal • A PWM (pulse width modulation) signal or PDM (pulse density modulation) signal

[0017] It should be noted that for at least some interfaces that transmit such signals, two or even more useful signals must be output. For example, with a PWM controller, three useful signals (one per phase) are often output. Therefore, in the following embodiments, it is assumed that the respective electronic device has multiple (output) channels and thus also multiple pins. However, only one pin per output channel is required to detect pin errors, in contrast to, for example, Fig. 1, where two pins are provided for a single output channel to detect pin errors of the output channel.

[0018] Fig. 2 shows an electronic device 200 according to one embodiment.

[0019] As in the example of Fig.1, the electronic device 200 is connected to another electronic device 201 (e.g. in the same device 217), in contrast to Fig. 1, however, two output channels are realized: a first output channel, which is realized by means of a first pin 202, and a second output channel, which is realized by means of a second pin 203.

[0020] For each output channel, a respective signal source 204, 205 (which can also be realized by a common circuit or circuit arrangement, such as in the example of Fig.1 a CPU and a communications interface module), a respective useful signal. A pulse signal (generated by a signal generator (e.g., pulse generator) 208) is added to each of the two useful signals by a respective addition circuit (or "combination circuit") 206, 207 (which in turn can be implemented by a common circuit operating, for example, in time-division multiplexing). A respective output driver circuit 209, 210 then supplies the respective output signal thus generated for each output channel to the respective pin 202, 203.

[0021] The pulse signal added to the wanted signals is a "high-frequency" pulse signal compared to the "low-frequency" wanted signals, meaning the pulse length of the pulse signal is only a fraction of the pulse length of the wanted signals. For example, the pulse length of the pulse signal is 2.5 ns to 12.5 ns, while the pulse length of the wanted signal is, for example, 250 ns (meaning the pulse length of the high-frequency pulse signal is, for example, 20 times smaller than that of the wanted signal (or at least 10 times smaller, 5 times smaller, 30 times smaller, etc.).

[0022] To detect pin errors, the respective output signal at the respective pin 202, 203 is read out for each pin 202, 203 by a respective feedback circuit of the electronic device 200, in this embodiment a respective Schmitt trigger 211, 212. The signals output by the Schmitt triggers 211, 212 are referred to as received (or fed back) output signals. These contain pulses that correspond to those of the (high-frequency) pulse signal that was added to the useful signals (i.e. injected pulses that are contained in the received output signals at the points at which they were injected into the output signals). Which pulses the received output signals contain depends on various properties, in particular the states of the pins 202, 203 (includingthe associated connecting lines), but also other environmental properties such as a state of a circuit board on which the electronic device 200 and the other electronic device 201 are arranged, such as temperature and the (exact) level of the supply voltage, since the pulse shape of the pulses (in particular pulse length and pulse strength) varies depending on this and therefore pulses are filtered out by the Schmitt triggers 211, 212 depending on the various properties and environmental conditions. Since properties other than the state of the pins (such as temperature and level of the supply voltage) can also change, according to various embodiments, the number of (high-frequency) pulses of a received output signal is not used to detect pin errors, but rather the number of pulses between the channels is compared.This number doesn't need to be the same for both channels, but if the difference between the number of (high-frequency) pulses on the first channel and the number of (high-frequency) pulses on the second channel changes, this is considered an indication that a pin fault (for one of the channels) exists. For example, if the output impedance (or capacitance) changes on one pin but not on the other, this is reflected in a change in the difference in the number of pulses (provided the impedance or capacitance change is large enough). In other words, detection is based on the relative number of output channels, not on the absolute number of each output channel.

[0023] If there are more than two channels, it can also be determined for which of the two (or more) channels the difference has remained the same (e.g. based on a majority decision) which of the channels has a pin error.

[0024] To detect a pin error, an error detection circuit 213 counts the pulses in the received output signals (e.g., the rising and falling edges), for example, using a respective counter circuit, and initially registers (e.g., in a first time interval) the difference between the number of pulses of the first and second output channels (e.g., per predetermined interval length, e.g., per useful signal cycle). In later time intervals (e.g., in a second time interval), the error detection circuit 213 determines this difference again. If the difference determined for the first time interval differs from the difference determined for the second time interval, the error detection circuit outputs an error signal indicating a pin error.

[0025] For each output channel, the respective received output signal (if necessary filtered by a glitch filter 214, 215 to filter out the high-frequency pulses) can also be compared with the respective useful signal by a comparator 216 in order to detect output errors.

[0026] Fig. 3 shows an example of pin error detection.

[0027] A first diagram 301 shows the output signal 304 and the received output signal 305 for the first output channel in the first time interval.

[0028] A second diagram 302 shows the output signal 306 and the received output signal 307 for the second output channel in the first time interval. For simplicity, it is assumed that the waveforms of the output signal and the received output signal for the second output channel are the same in the second time interval (thus, they are also represented by the second diagram 302).

[0029] A third diagram 303 shows the output signal 308 and the received output signal 309 for the first output channel in the second time interval.

[0030] In the first time interval, the error detection circuit 213 registers the difference in the number of (high-frequency) pulses in the received output signal of the first channel and the second channel. In this embodiment, falling pulses (i.e., downward glitches, i.e., level drops (toward the low supply potential) of one or more (positive, i.e., toward the high supply potential) pulses of the wanted signal) and rising pulses (i.e., upward glitches, i.e., level excursions outside of pulses of the wanted signal) are counted separately, with three of each (for both the first and the second channel). The difference ("delta") is therefore zero for both the falling pulses and the rising pulses.

[0031] However, in the second time interval, the received output signal of the first channel contains four rising and four falling (high-frequency) pulses. The difference between the two pulses is now one. The error detection circuit 213 interprets this as a pin error.

[0032] Fig. 4 shows an example of pin fault detection, where the pin fault is an impedance increase of 100 Ω of the pin of the first output channel at a time 401.

[0033] In this example, the interval before time 401 is the first time interval and the interval after time 401 is the second time interval.

[0034] Shown are • the first useful signal 402 (ie the useful signal of the first channel) • the first output signal 403 (ie the output signal of the first channel) • the first received output signal 404 (ie the received output signal of the first channel) • the second useful signal 405 (ie the useful signal of the second channel) • the second output signal 406 (ie the output signal of the second channel) • the second received output signal 407 (ie the received output signal of the second channel)

[0035] In the first time interval, the error detection circuit 213 registers the difference in the number of (high-frequency) pulses in the received output signal of the first channel and the second channel. As in the example of Fig. 3, falling pulses (i.e., downward glitches) and rising pulses (i.e., upward glitches) are counted separately. In this example, three high-frequency falling pulses and two high-frequency rising pulses are counted for the first output channel, but two high-frequency falling pulses and one high-frequency rising pulse are counted for the second output channel. The difference is therefore one in each case.

[0036] In the second time interval, the received output signal for the first output channel contains five high-frequency falling pulses and four high-frequency rising pulses due to the increased impedance, while the pulse count for the second output channel remains the same. The difference between the counts is now three (i.e., it has increased by two). The error detection circuit 213 interprets this as an indication of a pin error.

[0037] As mentioned above, the number of pulses can change not only in the case of pin errors, but also depends on environmental conditions, such as the board temperature. However, the environmental conditions affect the number of pulses for all channels, so the difference between the numbers remains the same. This is Fig. 5 shown.

[0038] Fig. Figure 5 illustrates the temperature dependence of the pulse numbers.

[0039] In this example, in a first time interval 501 the board temperature is -40°, in a second time interval 502 the board temperature is 27°, and in a third time interval 503 the board temperature is 175°. Analogous to Fig. 4 shows the useful signal per output channel, the output signal per output channel and the received output signal per output channel and rising and falling glitches are counted separately.

[0040] In the first time interval 501, the received output signal for the first channel contains three falling high-frequency pulses and two rising high-frequency pulses, and the received output signal for the second channel contains two falling high-frequency pulses and one rising high-frequency pulse. The difference is therefore equal to one in each case.

[0041] In the second time interval 502, the received output signal for the first channel also contains three falling high-frequency pulses and two rising high-frequency pulses, and the received output signal for the second channel also contains two falling high-frequency pulses and one rising high-frequency pulse. The difference is therefore still one in each case.

[0042] In the third time interval 503, the received output signal for the first channel only contains two falling high-frequency pulses and one rising high-frequency pulse due to the high temperature, and the received output signal for the second channel contains one falling high-frequency pulse and no rising high-frequency pulse. The difference is therefore still one in each case, and therefore the error detection circuit 213 does not indicate a pin error, even though the number of pulses has changed due to the temperature change, because they have changed by the same amount for both channels.

[0043] Table 1 gives examples of how pin errors or changes in environmental conditions affect the difference between the number of high-frequency pulses of the two output channels. Table 1 Difference in the number of falling pulses Difference in the number of rising pulses Interruption of the connection of channel 1 (capacitance -50pF) +1 +1 Increase in line impedance of channel 1 by 100Ω +2 +2 Short circuit of the first channel pin to high supply potential with 200Ω -1 +1 Short circuit of the first channel pin to low supply potential with 200Ω +2 -1 Temperature variation from -40°C to 175°C 0 0 Voltage supply variation from 4.5V to 5.5V 0 0

[0044] Pin errors can thus be detected by changing the differences, while changes in environmental variations do not lead to false positives.

[0045] In summary, according to various embodiments, an electronic device is provided as described in Fig. 6 is shown.

[0046] Fig. 6 shows an electronic device 600 according to one embodiment.

[0047] The electronic device 600 has a signal generation circuit 601 which is configured to generate a first output signal by adding a pulse signal to a first useful signal and to supply it to a first output terminal 602 of the electronic device 600 and to generate a second output signal by adding the pulse signal to a second useful signal and to supply it to a second output terminal 603 of the electronic device 600.

[0048] The electronic device 600 further comprises a counter circuit 604 configured to receive the first output signal from the first output terminal 602, detect first pulses in the received first output signal, and determine a number of the detected first pulses, and to receive the second output signal from the second output terminal 603, detect second pulses in the received second output signal, and determine a number of the detected second pulses.

[0049] The electronic device further comprises an error detection circuit 605 which is configured • (to determine and) register a first difference between the number of first pulses detected in a first time interval and the number of second pulses detected in the first time interval, • to determine a second difference between the number of first pulses detected in a second time interval and the number of second pulses detected in the second time interval, and • indicate an error if the first difference and the second difference differ by at least a specified threshold.

[0050] In response to the error indication, error handling can be initiated (e.g., by another circuit of the electronic device). For example, the electronic device can be put into a safe mode or emit a signal that triggers a safe mode of a system (e.g., a vehicle) in which it is included. The useful signals are, for example, digital pulse signals.

[0051] In other words, according to various embodiments, a (high-frequency or out-of-band) signal is injected into an original (low-frequency) signal. This can occur within time periods (e.g., signal cycles) in useful operation (“mission mode”). Functional disruption can be avoided by filtering out the injected signal, e.g., using an external RC filter or an on-chip glitch filter. The injection (and error detection) can also occur only once in a fault-tolerant interval: In mission mode, the PWM duration (i.e., PWM pulse length) is approximately ~10us in one embodiment, and the fault-tolerant interval is typically in the range 10ms-150ms. This means that the high-frequency pulse can be added to every PWM pulse, or, for example, only to every thousandth PWM pulse.

[0052] Alternatively, the injection (and error detection) can be performed in a test mode, e.g. after each power-up or a periodic test interval.

[0053] Error detection is performed by cross-comparing the rising and / or falling pulses between two or more output channels. Since the outputs (e.g., GPIOs (General Purpose Input Outputs)) have a similar temperature and supply voltage dependence, any change in the difference in the number of detected pulses can be interpreted as an error.

[0054] For error detection, the output signals are fed back to the error detection circuit (feedback). However, the feedback is carried out (in contrast to, for example, Fig. 1 before the output terminals (e.g. pins), ie the return lines are connected to the output paths before the output terminals.

[0055] It should be noted that the evaluation does not have to be done immediately, but can also be done later. For example, the first difference and the second difference can be separated by a certain amount of time (a day, months, or even a year), and the first difference can be stored in a microcontroller's flash memory and regularly compared with a second difference.

[0056] It should also be noted that with very fine resolution of the high-frequency pulse signal, it may happen that the first difference and the second difference differ from each other by a small number of pulses, but this is tolerable. In this case, the specified threshold can be set to a tolerable number difference. Only when the deviation of the differences reaches (or exceeds) this limit will an error be indicated. If no tolerance is to be specified, the specified threshold (i.e., the tolerance limit) can also be set to one (i.e., an error is indicated as soon as the differences differ by at least one pulse, i.e., as soon as they are not equal).

[0057] According to various embodiments, a method is carried out (e.g. by a device having an electronic device) as described in Fig. 7 is shown.

[0058] Fig.7 shows a flowchart 700 illustrating a method for detecting errors at output terminals of an electronic device.

[0059] In 701, a first output signal is generated by adding a pulse signal to a first useful signal.

[0060] In 702, the first output signal is supplied to a first output terminal of the electronic device.

[0061] In 703, the first output signal is received from the first output terminal (e.g., within the electronic device, ie, it is fed back).

[0062] In 704, first pulses are detected in the received first output signal.

[0063] In 705, a number of detected first pulses is determined (each in a first time interval and a second time interval).

[0064] In 706, a second output signal is generated by adding a pulse signal to a second useful signal.

[0065] In 707, the second output signal is supplied to a second output terminal of the electronic device.

[0066] In 708, the second output signal is received from the second output terminal (e.g., within the electronic device, ie, it is fed back).

[0067] In 709, second pulses are detected in the received second output signal.

[0068] In 710, a number of detected second pulses is determined (in each of the first time interval and the second time interval).

[0069] In 711, a first difference between the number of first pulses detected in a first time interval and the number of second pulses detected in the first time interval is registered.

[0070] In 712, a second difference between the number of first pulses detected in a second time interval and the number of second pulses detected in the second time interval is determined.

[0071] In 713, an error is indicated (ie, for example, a detection signal indicating an error is output) if the first difference and the second difference differ from each other by at least a predetermined threshold value.

[0072] It should be noted that the process steps do not necessarily need to be performed in the order shown. For example, the first pulses and the second pulses are detected simultaneously in a respective time interval.

[0073] Various examples of implementation are given below.

[0074] Embodiment 1 is an electronic device as described with reference to Fig. 6 described.

[0075] Embodiment 2 is an electronic device according to Embodiment 1, wherein the first pulses and the second pulses are pulses injected into the first output signal and the second output signal, respectively, by adding the pulse signal to the first useful signal and the second useful signal, respectively.

[0076] Embodiment 3 is an electronic device according to embodiment 1 or 2, wherein the first pulses are level drops of one or more pulses of the first useful signal and wherein the second pulses are level drops of one or more pulses of the second useful signal

[0077] Embodiment 4 is an electronic device according to embodiment 3, wherein the counter circuit is further configured to detect third pulses in the received first output signal and to determine a number of the detected first pulses, wherein the third pulses are level excursions outside of pulses of the first useful signal, and to detect fourth pulses in the received second output signal and to determine a number of the detected first pulses, wherein the fourth pulses are level excursions outside of pulses of the second useful signal, and the error detection circuit is configured to register a third difference between the number of third pulses detected in the first time interval and the number of fourth pulses detected in the first time interval.to determine a fourth difference between the number of third pulses detected in the second time interval and the number of fourth pulses detected in the second time interval, to indicate an error if the third difference and the fourth difference differ from each other by at least a predetermined threshold value.

[0078] Embodiment 5 is an electronic device according to embodiment 1 or 2, wherein the first pulses are level excursions outside pulses of the first useful signal and the second pulses are level excursions outside pulses of the second useful signal.

[0079] Embodiment 6 is an electronic device according to any one of embodiments 1 to 5, wherein the second time interval follows the first time interval.

[0080] Embodiment 7 is an electronic device according to any one of embodiments 1 to 6, wherein the first output terminal is a first output pin of the electronic device and the second output terminal is a second output pin of the electronic device.

[0081] Embodiment 8 is an electronic device according to any one of embodiments 1 to 7, wherein the first useful signal and the second useful signal are control signals for controlling another electronic device.

[0082] Embodiment 9 is an electronic device according to embodiment 8, wherein the first useful signal and the second useful signal are pulse width modulation signals for the other electronic device.

[0083] Embodiment 10 is an electronic device according to any one of embodiments 1 to 9, wherein the first payload signal and the second payload signal are bus signals for communication with another electronic device.

[0084] Embodiment 11 is an electronic device according to any one of embodiments 1 to 10, wherein the first useful signal is a signal of a first output channel of the electronic device and the second useful signal is a signal of a second output channel of the electronic device.

[0085] Embodiment 12 is an electronic device according to Embodiment 11, wherein the output channels are output channels to the same other electronic device.

[0086] Embodiment 13 is an electronic device according to one of the embodiments 1 to 12, wherein the signal generation circuit is configured to generate a respective output signal for each of two or more output channels of the electronic device by adding a pulse signal to a respective useful signal and supplying it to a respective output terminal, the counter circuit is configured to receive the respective output signal from the respective output terminal, to detect respective pulses in the received respective output signal and to determine a number of the detected respective pulses, and the error detection circuit is configured,for each pair of output channels, to register a respective first difference between the number of respective pulses detected in a first time interval for the first output channel of the pair and the number of respective pulses detected in the first time interval for the second output channel of the pair, and to determine a respective second difference between the number of first pulses detected in a second time interval for the first output channel of the pair and the number of second pulses detected in the second time interval for the second output channel of the pair, and to indicate an error if, for at least one pair of output channels, the respective first difference and the respective second difference differ from each other by at least one respective predetermined threshold value.

[0087] Embodiment 14 is an electronic device according to embodiment 13, wherein the error detection circuit is further configured to determine for which output channel an error exists based on the pairs of output channels for which the respective first difference and the respective second difference do not differ from each other by at least the respective predetermined threshold value and the pairs of output channels for which the respective first difference and the respective second difference differ from each other by at least the predetermined threshold value.

[0088] Embodiment 15 is an electronic device according to any one of embodiments 1 to 14, wherein the fault is a pin fault.

[0089] Embodiment 16 is an electronic device according to any one of embodiments 1 to 15, wherein the first useful signal and the second useful signal are pulse signals.

[0090] Embodiment 17 is an electronic device according to any one of embodiments 1 to 16, wherein the pulse lengths of the pulse signal are a fraction of the pulse lengths of the first useful signal and the pulse lengths of the second useful signal.

[0091] Embodiment 18 is an electronic device according to one of embodiments 1 to 17, wherein the counter circuit is configured to receive the first output signal from the first output terminal via a first filter circuit configured to at least partially filter out pulses injected into the first output signal by adding the pulse signal to the first useful signal, and to receive the second output signal from the second output terminal via a second filter circuit configured to at least partially filter out pulses injected into the second output signal by adding the pulse signal to the second useful signal.

[0092] Embodiment 19 is a method for detecting faults at output terminals of an electronic device, as described with reference to Fig. 7 described.

[0093] Although the invention has been particularly shown and described with reference to specific embodiments, it should be understood by those skilled in the art that numerous changes in design and detail may be made therein without departing from the spirit and scope of the invention as defined by the following claims. The scope of the invention is therefore determined by the appended claims, and it is intended to embrace all changes that come within the letter or range of equivalence of the claims.

[0094] Reference symbol 100, 101 Electronic devices 102 CPU 103 Communication interface module 104 ports 105 Pads 106, 107 pins 108 Pads 109 Port 200, 201 Electronic devices 202, 203 pins 204, 205 Signal sources 206, 207 Addition circuits 208 Pulse generator 209, 210 Output driver circuit 211, 212 Schmitt trigger 213 Error detection circuit 214, 215 Glitch filter 216 comparators 217 device 301-303 Diagrams 304-309 Signals 401 Error Time 402-407 signals 501-503 Time intervals 600 Electronic device 601 Signal generation circuit 602, 603 output terminals 604 counter circuit 605 Error detection circuit 700 Flowchart 701-713 Process steps

Claims

[1] Electronic device comprising: A signal generating circuit configured to generate a first output signal by adding a pulse signal to a first useful signal and supply it to a first output terminal of the electronic device, and to generate a second output signal by adding the pulse signal to a second useful signal and supply it to a second output terminal of the electronic device; a counter circuit configured to receive the first output signal from the first output terminal, detect first pulses in the received first output signal, and determine a number of the detected first pulses, and to receive the second output signal from the second output terminal, detect second pulses in the received second output signal, and determine a number of the detected second pulses; and An error detection circuit arranged • to register a first difference between the number of first pulses detected in a first time interval and the number of second pulses detected in the first time interval, • to determine a second difference between the number of first pulses detected in a second time interval and the number of second pulses detected in the second time interval, • indicate an error if the first difference and the second difference differ by at least a specified threshold. [2] The electronic device according to claim 1, wherein the first pulses and the second pulses are pulses injected into the first output signal and the second output signal, respectively, by adding the pulse signal to the first useful signal and the second useful signal. [3] Electronic device according to claim 1 or 2, wherein the first pulses are level drops of one or more pulses of the first useful signal and wherein the second pulses are level drops of one or more pulses of the second useful signal [4] Electronic device according to claim 3, wherein the counter circuit is further configured to detect third pulses in the received first output signal and to determine a number of the detected first pulses, wherein the third pulses are level excursions outside pulses of the first useful signal and detecting fourth pulses in the received second output signal and determining a number of the detected first pulses, wherein the fourth pulses are level excursions outside pulses of the second useful signal and the error detection circuit is set up, • to register a third difference between the number of third pulses detected in the first time interval and the number of fourth pulses detected in the first time interval, • to determine a fourth difference between the number of third pulses detected in the second time interval and the number of fourth pulses detected in the second time interval, • indicate an error if the third difference and the fourth difference differ from each other by at least a specified threshold. [5] Electronic device according to claim 1 or 2, wherein the first pulses are level excursions outside pulses of the first useful signal and the second pulses are level excursions outside pulses of the second useful signal. [6] Electronic device according to one of claims 1 to 5, wherein the second time interval follows the first time interval. [7] The electronic device according to any one of claims 1 to 6, wherein the first output terminal is a first output pin of the electronic device and the second output terminal is a second output pin of the electronic device. [8] Electronic device according to one of claims 1 to 7, wherein the first useful signal and the second useful signal are control signals for controlling another electronic device. [9] The electronic device of claim 8, wherein the first wanted signal and the second wanted signal are pulse width modulation signals for the other electronic device. [10] Electronic device according to one of claims 1 to 9, wherein the first payload signal and the second payload signal are bus signals for communication with another electronic device. [11] Electronic device according to one of claims 1 to 10, wherein the first useful signal is a signal of a first output channel of the electronic device and the second useful signal is a signal of a second output channel of the electronic device. [12] The electronic device of claim 11, wherein the output channels are output channels to the same other electronic device. [13] Electronic device according to one of claims 1 to 12, wherein the signal generating circuit is arranged to generate a respective output signal for each of two or more output channels of the electronic device by adding a pulse signal to a respective useful signal and to supply it to a respective output terminal, the counter circuit is arranged to receive the respective output signal from the respective output terminal, to detect respective pulses in the received respective output signal and to determine a number of the detected respective pulses and the error detection circuit is set up for each pair of output channels • to register a respective first difference between the number of respective pulses detected in a first time interval for the first output channel of the pair and the number of respective pulses detected in the first time interval for the second output channel of the pair, and • to determine a respective second difference between the number of first pulses detected in a second time interval for the first output channel of the pair and the number of second pulses detected in the second time interval for the second output channel of the pair and to indicate an error if, for at least one pair of output channels, the respective first difference and the respective second difference differ from one another by at least one respective predetermined threshold value. [14] Electronic device according to claim 13, wherein the error detection circuit is further configured to determine for which output channel an error exists based on the pairs of output channels for which the respective first difference and the respective second difference do not differ from each other by at least the respective predetermined threshold value and the pairs of output channels for which the respective first difference and the respective second difference differ from each other by at least the predetermined threshold value. [15] The electronic device according to any one of claims 1 to 14, wherein the error is a pin error. [16] Electronic device according to one of claims 1 to 15, wherein the first useful signal and the second useful signal are pulse signals. [17] Electronic device according to one of claims 1 to 16, wherein the pulse lengths of the pulse signal are a fraction of the pulse lengths of the first useful signal and the pulse lengths of the second useful signal. [18] Electronic device according to one of claims 1 to 17, wherein the counter circuit is arranged to receive the first output signal from the first output terminal via a first filter circuit which is arranged to at least partially filter out pulses injected into the first output signal by the addition of the pulse signal to the first useful signal and to receive the second output signal from the second output terminal via a second filter circuit which is arranged to at least partially filter out pulses injected into the second output signal by the addition of the pulse signal to the second useful signal. [19] A method for detecting faults at output terminals of an electronic device, comprising: Generating a first output signal by adding a pulse signal to a first useful signal; Supplying the first output signal to a first output terminal of the electronic device; Receiving the first output signal from the first output terminal; Detecting first pulses in the received first output signal; Determining a number of the first pulses detected; Generating a second output signal by adding a pulse signal to a second useful signal; Supplying the second output signal to a second output terminal of the electronic device; Receiving the second output signal from the second output terminal; detecting second pulses in the received second output signal; Determining a number of detected second pulses; Registering a first difference between the number of first pulses detected in a first time interval and the number of second pulses detected in the first time interval; Determining a second difference between the number of first pulses detected in a second time interval and the number of second pulses detected in the second time interval; Indicate an error if the first difference and the second difference differ by at least a specified threshold.

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