Inverse converter circuit, power supply system and method for operating an inverse converter circuit

Abstract

The invention relates to an inverting converter circuit (1). The invention is characterized in that a main terminal (TM) is connected to a first node (N1) via a second switch (M2); a ground terminal (TG) is connected to the first node (N1) via a first switch (M1); an auxiliary terminal (TA) is connected to a third node (N3); the ground terminal (TG) is connected to the third node (N3) via a first capacitor (C1); the third node (N3) is connected to the first node (N1) via a first inductor (L1); the main terminal (TM) is connected to a second node (N2) via a fourth switch (M4); the ground terminal (TG) is connected to the second node (N2) via a third switch (M3); the processor terminal (TP) is connected to a fourth node (N4).

Description

[0001] The invention relates to an inverse converter circuit, a power supply system and a method for operating an inverse converter circuit.

[0002] Some devices contain processors or other elements that are powered by the main power source. The main power source may be a main battery provided in the device or the vehicle. To ensure the supply of at least some elements of the device with a predefined supply voltage, some devices include an additional battery, which may be configured as a backup battery or an auxiliary battery, which may be configured to provide an auxiliary supply voltage when the main battery does not provide the required voltage.

[0003] During operation, it is necessary to ensure that the voltage supplied by the main power source is converted into the voltage required to operate the device's components. Therefore, it may be necessary to convert the voltage supplied by the main power source into the charging voltage required to charge the auxiliary battery. When converting the voltage supplied by the auxiliary battery, it may be necessary to convert the voltage supplied by the auxiliary battery into the voltage required to operate the device.

[0004] To meet these requirements, the power supply systems include a converter circuit. According to the prior art, the power supply systems include a battery charger buck converter configured to reduce the main voltage supplied by the main power source to the charging voltage required to charge the auxiliary battery. The converter circuit also includes a battery boost charger configured to boost the main voltage normally supplied by the main battery with the auxiliary voltage supplied by the auxiliary battery. The circuit includes a main converter configured to reduce the main voltage supplied by the main power source or the auxiliary battery to the voltage required to operate the device.

[0005] The MAX20404 / MAX20405 / MAX20406 models from Analog Devices, Inc.® are state-of-the-art, fully integrated, synchronous silent switcher buck converters.

[0006] The MAX20094 / MAX20095 models from Analog Devices, Inc.® are state-of-the-art backup battery charger and backup battery boost charger controllers.

[0007] US 2020006980 A1 discloses an uninterruptible power supply (UPS) comprising: a power input, an interface configured to be coupled to a direct current (DC) source, an output, a PFC converter, a positive DC bus coupled to the PFC converter and configured to provide a positive DC output, a negative DC bus coupled to the PFC converter and configured to provide a negative DC output, a DC / DC converter coupled to the interface, and a controller configured to operate the PFC converter in a linear operating mode to supply the positive DC bus and the negative DC bus with regulated direct current derived from the input alternating current, and to operate the DC / DC converter in a buffer operating mode.to convert the buffer DC current into unregulated current, and to operate the PFC converter to supply the positive DC bus and the negative DC bus with regulated DC current derived from the unregulated current.

[0008] US 2016006295 A1 discloses a linear uninterruptible power supply topology. A single-phase topology comprises a main circuit and an auxiliary circuit. A power conversion stage of the main circuit comprises first to fourth parallel-connected branches between a positive busbar and a negative busbar, wherein the first branch consists of a series-connected first and second diode, the second branch consists of a series-connected second and third capacitor, and a first switch is connected between the intermediate nodes of the first branch and the intermediate nodes of the second branch. The third branch consists of a third switch, a fifth capacitor, a sixth capacitor, and a fourth switch, which are connected in series.The intermediate node of the second branch is connected to ground along with a node between the fifth capacitor and the sixth capacitor. The fourth branch consists of a fifth and sixth switch connected in series, the second switch being connected between the intermediate node of the second branch and the intermediate node of the fourth branch, and the third and fourth switches having a third and fourth diode connected in parallel. An input of the auxiliary circuit charger is connected to an AC input or positive and negative busbars of the uninterruptible power supply. An output of the DC / DC converter is connected to a node between the third switch and the fifth capacitor and a node between the sixth capacitor and the fourth switch.

[0009] US 11381159 B2 discloses a topology of a high-power density current transformer having a common neutral conductor between its input and output AC terminals and simultaneously a single DC busbar. A current transformer comprises an AC input having a phase input and a common neutral conductor, a DC busbar, and a current factor correction rectifier. The current factor correction rectifier comprises a first half-bridge between the common neutral conductor and the DC busbar, wherein the first half-bridge comprises a first switch connected in series with a second switch, wherein the first switch has a closed state and the second switch has an open state when a voltage of the phase input is negative with respect to the common neutral conductor.The current factor correction rectifier comprises a second half-bridge between the phase input and the DC bus, the second half-bridge comprising a third switch connected in series with a fourth switch, the third switch having a closed state and the fourth switch having an open state when the phase input voltage is positive with respect to the common neutral. The current factor correction rectifier comprises an input inductor having a first end between the first switch and the second switch and a second end between the third switch and the fourth switch.

[0010] The problem with prior art converter circuits is that the voltage provided by the auxiliary battery must be boosted before being delivered to a main regulator. This reduces the efficiency of the circuit and shortens the battery's lifespan. Either a boost converter must be used to boost the voltage supplied by the battery if a single battery is used, or, if two or more batteries are used, a method must be found to decouple the batteries from the main supply line, which can increase implementation costs.

[0011] It is an object of the present invention to provide a more efficient circuit for power supply systems.

[0012] This object is achieved by the subject matter of the independent claims. Advantageous further developments with useful and not irrelevant further embodiments of the invention are specified in the dependent claims, the following description, and the drawings.

[0013] According to a first aspect of the invention, an inverter circuit is provided. The inverter circuit comprises a main terminal, an auxiliary terminal, the processor terminal, and the ground terminal. The main terminal can be configured to electrically contact a main power source, such as the main battery. The main battery can provide a main voltage at the main terminal. The auxiliary terminal can be configured to electrically contact an auxiliary battery. The auxiliary battery can provide an auxiliary supply voltage at the auxiliary terminal. In addition, a predefined charging voltage can be provided at the auxiliary terminal to charge the auxiliary battery. The processor terminal can be configured to electrically contact a processor to be supplied with the predefined processor voltage.

[0014] It is intended that the main terminal is connected to the first node via a second switch. In other words, the main terminal is connected to a first terminal of the second switch. The second terminal of the second switch is connected to the first terminal of the second switch. Therefore, the connection between the main terminal and the first node can be made conductive or non-conductive using the second switch.

[0015] The ground terminal is connected to the first node via a first switch. In other words, the ground terminal is connected to the first terminal of the first switch. The second terminal of the first switch is connected to the first node. Therefore, the connection between the ground terminal and the first node can be made conductive or non-conductive using the first switch.

[0016] The auxiliary port is connected to a third node.

[0017] The ground terminal is connected to the server node via a first capacitor.

[0018] The third node is connected to the first node via a first inductor.

[0019] The main terminal is connected to the second node via a fourth switch. In other words, the main terminal is connected to the first terminal of the fourth switch. The second terminal of the fourth switch is connected to the second node. Therefore, the connection between the main terminal and the second node can be made conductive or non-conductive using the fourth switch.

[0020] The ground terminal is connected to the second node via a third switch. In other words, the ground terminal is connected to the first terminal of the third switch. The second terminal of the third switch is connected to the second node. Therefore, the connection between the ground terminal and the second node can be made conductive or non-conductive using the third switch.

[0021] The processor port is connected to a fourth node.

[0022] The ground terminal is connected to the fourth node via a second capacitor.

[0023] The fourth node is connected to the second node via a second inductor.

[0024] The first node is connected to the fifth node via an arrangement comprising the fifth switch and the diode connected in parallel with the fifth switch.

[0025] The second node is connected to the fifth node via an arrangement comprising a sixth switch and a diode connected in parallel with the sixth switch.

[0026] The invention also includes embodiments that provide additional technical advantages.

[0027] According to a further embodiment of the invention, the inverter circuit comprises the control unit configured to control the pass-through memories of the inverter circuit. In other words, the inverter circuit comprises the control unit, wherein the control unit is configured to set the pass-through memories of the inverter circuit to conductive or non-conductive.

[0028] According to a further embodiment of the invention, the control unit is configured to set the transit memories of the converter circuit to operate as a buck converter circuit in a first mode. In other words, the control unit is configured to control the contents of the transit memories to set the states of the switches in a first mode configuration. In the first mode, the first switch and the second switch are controlled by the control unit to operate in buck converter mode to reduce the main voltage supplied by the main terminal to a predefined charging voltage to be supplied to the auxiliary terminal.In other words, the first switch and the second switch are operated in the first mode to provide a buck converter configuration configured to reduce the voltage provided by the main terminal into the predefined charging voltage to be supplied to such auxiliary terminal to charge the auxiliary battery.

[0029] In the first case, the control unit is configured to control the fourth switch memory to operate in buck converter mode to reduce the main voltage supplied to the main terminal to the predefined processor supply voltage to be supplied to the processor terminal. In other words, the control unit is configured to control the fourth switch, and thus the switch, to provide a buck converter configured to reduce the main voltage supplied to the main terminal to the predefined processor supply voltage to be supplied to the processor terminal.

[0030] The controller is configured to set the fifth and sixth switches to non-conductive states in the first mode. In other words, the controller is configured to set the fifth switch, the first switch, and the sixth switch to non-conductive states to decouple the first node from the second node.

[0031] According to a further embodiment of the invention, the control device is designed to control the switches of the buck converter circuit such that they operate the inverse converter circuit in the second mode.

[0032] The controller is configured to control the first switch and the fifth switch to operate in boost mode to increase the auxiliary supply voltage supplied to the auxiliary terminal to the processor voltage to be supplied to the processor terminal. The controller is configured to set the sixth switch to conductive and the second switch to non-conductive. In other words, the controller is configured to control the converter provided between the auxiliary terminal and the processor terminal to increase the auxiliary supply voltage supplied to the auxiliary terminal to the processor voltage to be supplied to the processor terminal.

[0033] According to a further embodiment of the invention, the control unit is configured to control the switches of the buck converter to operate the inverting circuit at specific voltages, wherein the sixth switch is controlled by the control unit to operate in a buck converter mode to reduce the auxiliary supply voltage provided at the auxiliary terminal to the processor voltage to be supplied to the processor terminal. The control unit is configured to make the fifth switch conductive and the second switch conductive or non-conductive. In other words, the control unit is configured to control the switches to provide a buck converter between the auxiliary terminal and the processor terminal to reduce the auxiliary supply voltage provided at such an auxiliary terminal to the processor voltage to be supplied to the processor terminal.

[0034] According to a further embodiment of the invention, the control unit is configured to check whether the medium voltage supplied to the main terminal requires the main condition. In other words, the control unit checks the main voltage to be supplied to the main terminal. The main condition may include that the main voltage is within the predefined voltage range.

[0035] The controller is configured to drive the switches to operate the circuit in the first mode to provide the predefined charging voltage to the auxiliary terminal and to provide the predefined processor voltage to the processor terminal when the main condition is met. In other words, when the main condition is met, the main voltage supplied to the main terminal can be used to charge the auxiliary battery and power the processor. The controller is configured to operate the inverter circuit in the first mode to provide the inverter between the main terminal and the auxiliary terminal and to provide the inverter between the main terminal and the processor terminal.

[0036] According to a further embodiment, the control unit is configured to check whether the auxiliary supply voltage supplied to the auxiliary terminal is below the predefined supply voltage to be supplied to the processor terminal if the main condition is not met. In other words, if the main condition is not met—for example, the main voltage is outside the predefined voltage range—it may not be possible to charge the auxiliary battery or operate the processor using the main voltage supplied to the main terminal. In this case, the control unit checks whether the auxiliary supply voltage supplied to the auxiliary terminal is below the supply voltage to be supplied to the processor terminal. If the auxiliary supply voltage is below the predefined supply voltage, it is necessary to provide the boost converter between the auxiliary terminal and the processor terminal.

[0037] The controller is configured to drive the switches to operate the circuit in the second mode to provide a predefined processor voltage to the processor terminal when the auxiliary supply voltage supplied to the auxiliary terminal is below the predefined processor voltage to be supplied to the processor terminal.

[0038] According to a further embodiment, the control unit is configured to check whether the auxiliary supply voltage supplied to the auxiliary terminal is below the predefined supply voltage to be supplied to the processor terminal if the main condition is not met. The control unit is configured to drive the switches to operate a circuit in a specific mode to provide a predefined processor voltage to the processor terminal if the auxiliary supply voltage supplied to the auxiliary terminal is above the predefined processor voltage to be supplied to the processor terminal. In other words, if the auxiliary supply voltage supplied to the auxiliary terminal is higher than the processor voltage, it is necessary to reduce a voltage. Therefore, the control unit is configured to provide a buck converter between the auxiliary terminal and the processor terminal.

[0039] According to a second aspect of the invention, a power supply system is provided comprising an inverter circuit, wherein the main power source is connected to the main terminal, the auxiliary battery is connected to the auxiliary terminal, and the processor is connected to the processor terminal. The power supply system may be configured as a vehicle power supply system. The main power source may be configured as a main battery. The auxiliary battery may be configured as a second battery.

[0040] According to a third aspect of the invention, a method for operating an inverting converter circuit according to the first aspect of the invention is provided, comprising the steps performed by the controller.

[0041] The procedure includes checking whether the main voltage supplied to the main terminal meets the main condition.

[0042] The method includes driving the switches to operate the circuit in the first mode to provide the predefined charging voltage at the auxiliary terminal and to provide the predefined processor voltage at the processor terminal when the main condition is met.

[0043] The method includes checking whether the auxiliary supply voltage supplied to the auxiliary terminal is less than the supply voltage to be supplied to the processor terminal when the main condition is met.

[0044] The method includes driving the switches to operate the circuit in the second mode to provide the predefined processor voltage at the processor terminal when the auxiliary supply voltage provided to the auxiliary terminal is below the predefined processor voltage.

[0045] The method includes driving the switches to operate the circuit in the third mode to provide the predefined processor voltage at the processor terminal when the auxiliary supply voltage provided to the auxiliary terminal is above the predefined processor voltage.

[0046] For use cases or application situations that may occur within the scope of the method and which are not explicitly described here, it may be provided that - in accordance with the method - an error message and / or a prompt for user feedback is issued and / or default settings and / or a predefined initial state is / are set.

[0047] The invention also includes combinations of the features of the described embodiments.

[0048] An exemplary implementation of the invention is described below. The figures show the following: Fig. 1 is a schematic diagram of an inverse converter circuit; Fig. 2 another schematic representation of the inverse converter circuit of Fig. 1; Fig. 3 a schematic representation of the circuit in the first operating mode; Fig. 4 a schematic representation of the circuit in the second operating mode; Fig. 5 a schematic representation of the circuit in the third operating mode; Fig. 6 is a schematic diagram of a prior art circuit; Fig. 7 shows a further schematic representation of a circuit according to the prior art; Fig. 8 is a schematic diagram of a prior art circuit in a first mode; Fig. 9 is a schematic representation of a circuit according to the prior art in a second or third mode; and Fig. 10 is a schematic representation of a method for operating an inverse converter circuit.

[0049] The embodiment explained below is a preferred embodiment of the invention. However, in this embodiment, the described components of the embodiment each represent individual features of the invention, which are to be considered independent of one another and which also further develop the invention independently of one another and are therefore also to be considered part of the invention individually or in a combination other than that shown. Furthermore, the described embodiment can also be supplemented by further features of the invention that have already been described.

[0050] In the figures, elements that provide the same function are provided with identical reference numerals.

[0051] Fig. 1 shows a schematic representation of an inverse converter circuit 1.

[0052] The inverter circuit 1 can be placed in a power supply system 2. The power supply system 2 can be configured to supply a processor device 3 with a predefined processor voltage. The power supply system 2 can include a main battery 4 as the main power source and an auxiliary battery 5 as the secondary power source.

[0053] The inverter circuit 1 may include a control unit 6 configured to control the operation of the inverter circuit 1. The control unit 6 may be configured to set states of switches of the inverter circuit 1.

[0054] It may be necessary for the processor device 3 to be supplied with a predefined processor supply voltage from the main battery 4. The processor supply voltage may be within a range of 3.3 to 4 V. It may also be necessary for the auxiliary battery 5 to be supplied with a predefined charging voltage in order to charge the auxiliary battery 5. The predefined charging voltage may be 3.8 to 4.2 V.

[0055] When the main battery 4 does not supply power to operate the processor unit, the processor unit can be powered by the auxiliary battery 5.

[0056] A main voltage supplied by the main battery 4 can be 6 to 36 V. Since the main voltage supplied by the main battery 4 can be different from the processor supply voltage and / or the charging voltage, the main voltage may need to be converted to the predefined processor voltage in order to supply the processor device 3 with the processor supply voltage and to supply the auxiliary battery 5 with the charging voltage to charge the auxiliary battery 5. If the auxiliary supply voltage is supplied by the auxiliary battery 5, the auxiliary supply voltage supplied by the auxiliary battery 5 can also be different from the processor supply voltage; therefore, the auxiliary supply voltage may also need to be converted to the processor supply voltage.

[0057] The main battery 4 can be connected to a main terminal TM to provide the main voltage at the main terminal TM. The auxiliary battery 5 can be connected to an auxiliary terminal TA to provide the auxiliary supply voltage at the auxiliary terminal TA and / or to be supplied with the charging voltage at the auxiliary terminal TA. The processor device 3 can be connected to a processor terminal TP to be supplied with the processor supply voltage.

[0058] The main battery 4 can be connected to a battery filter 10. The battery filter 10 can be connected to an input of the battery buck converter 7. The output of the battery buck converter 7 can be connected to the auxiliary battery 5. The battery filter 10 can also be connected to an input of the main buck converter 8. The output of the main buck converter 8 can be connected to the processor device 3. The arrangement comprising the fifth and sixth switches can connect the nodes of the half-bridges of the battery buck converter 7 and the main buck converter 8.

[0059] Fig. Figure 2 shows a further schematic representation of the inverse converter circuit 1 of Fig. 1.

[0060] To provide the predefined charging voltage at the auxiliary terminal TA, the main terminal TM can be connected to the auxiliary terminal TA via the battery step-down converter 7. The battery step-down converter 7 can be configured to reduce the main voltage provided at the main terminal TM to the charging voltage to be supplied to the auxiliary terminal TA. The battery step-down converter 7 can comprise a first switch M1, a second switch M2, a first inductor L1, and a first capacitor C1. The main terminal TM can be connected to a first node N1 via the second switch M2. The ground terminal TG can be connected to the first node N1 via the first switch M1. In other words, a half-bridge is provided that connects the first node N1 to either the main terminal TM or the ground terminal TG. The first node N1 can be connected to a third node N3 via a first inductor L1.The third node N3 can be connected to the ground terminal TG via the first capacitor C1. The third node N3 can be connected to the auxiliary terminal TA.

[0061] To provide the processor supply voltage at the processor terminal TP, the main terminal TM may be connected to the processor terminal TP via the main buck converter 8. The main buck converter 8 may include a third switch M3, a fourth switch M4, a second inductor L2, and a second capacitor C2. The main terminal TM may be connected to the second via the fourth switch M4. The ground terminal TG may be connected to the second node N2 via the third switch M3. The second node may be connected to a fourth node N4 via the second inductor L2. The ground terminal TG may be connected to the fourth node N4 via the second capacitor C2. The fourth node N4 may be connected to the processor terminal TP.By providing the main buck converter 8, it may be possible to reduce the main voltage provided at the main terminal TM to the processor supply voltage provided at the processor terminal TM. The first node N1 of the half-bridge of the auxiliary buck converter and the second node N2 of the half-bridge of the main buck converter 8 may be connected by an arrangement of the circuit 1.

[0062] The first node N1 may be connected to a fifth node N5 via an arrangement comprising a fifth switch M5 and a sixth diode D6 connected in parallel with the fifth switch M5. The ground terminal TG may be connected to the fifth node via a third capacitor C3. The fifth node N5 may be connected to the second node N2 via an arrangement comprising a sixth switch M6 and a fifth diode D5 connected in parallel with the sixth switch.

[0063] The circuit 1 may include the control unit 6, which is configured to control the states of the switches. The control unit may include a microprocessor, a microcontroller, and / or a control circuit configured to control the switches.

[0064] The control unit 6 can operate the circuit 1 in three modes. In a first mode, the main voltage at the main terminal TM is provided by the main battery 4; in a second mode, the auxiliary voltage is provided by the auxiliary battery 5 at the auxiliary terminal TA.

[0065] To check the operating mode of circuit 1, controller 6 may be configured to check whether the main voltage supplied to main terminal TM satisfies the main condition. If the main voltage supplied to main terminal TM satisfies the main condition, main battery 4 may be used to charge auxiliary battery 5 and power processor device 3. Controller 6 may be configured to drive the switches to operate circuit 1 in the first mode when the main condition is met.

[0066] The control unit 6 is designed to check whether the auxiliary supply voltage supplied to the auxiliary terminal TA is below the predefined supply voltage to be supplied to the processor terminal TP or whether the auxiliary supply voltage supplied to the auxiliary terminal TA is above the predefined supply voltage to be supplied to the processor terminal TP if the main condition is not met.

[0067] If the auxiliary supply voltage applied to the auxiliary terminal TA is below the predefined processor voltage, the control unit 6 can drive the switches to operate the circuit 1 in the second mode.

[0068] When the auxiliary supply voltage applied to the auxiliary terminal TA is higher than the predefined processor voltage to be applied to the processor terminal TP, the control unit 6 can drive the switches to operate in the third mode to provide the predefined processor voltage to the processor terminal TP.

[0069] The first inductor L1 and / or the second inductor L2 may have an inductance of 4.7 µH. The first capacitor C1 and / or the second capacitor C2 may have a capacitance of 40 µF. The third capacitor C3 may have a capacitance of 10 µF. At least some of the switches may be MOSFETs, in particular N-channel power MOSFETs.

[0070] Fig. 3 shows a schematic representation of the circuit 1 in the first operating mode.

[0071] In the first mode, the main battery 4 can supply the main terminal TM with the main voltage. The control unit 6 can be configured to control the first switch M1 and the second switch M2 to operate in a buck converter mode to reduce the main voltage supplied to the main terminal TM to the predefined charging voltage to be supplied to the auxiliary terminal TA. The control unit 6 can be configured to control the fourth switch M4 and the third switch M3 to operate in a buck converter mode to reduce the main voltage supplied to the main terminal TM to the processor supply voltage to be supplied to the processor terminal TP. In the first mode, the processor can set the fifth and sixth switches M6 to non-conductive.

[0072] Fig. 4 shows a schematic representation of the circuit 1 in the second operating mode.

[0073] In the second mode, the processor device 3 can be powered by the auxiliary battery 5. In the second mode, the auxiliary supply voltage can be lower than the processor supply voltage. Therefore, it may be necessary to convert the auxiliary supply voltage provided at the auxiliary terminal TA into the processor supply voltage to be provided at the processor terminal TP. The control unit 6 can be configured to control the first switch M1 and the fifth switch M5 to operate in boost converter mode 9 to increase the auxiliary supply voltage to be supplied to the auxiliary terminal TA to the process voltage to be supplied to the processor terminal TP. The sixth switch M6 can be set to conductive, and the second switch M2, the fourth switch M4, and the third switch M3 can be set to non-conductive.An anode of a sixth diode D6 connected in parallel with the fifth switch M5 may be connected to the first node N1, and a cathode of the sixth diode D6 may be connected to the fifth node N5. An anode of the first diode may be connected to the second node N2, and a cathode of the fifth diode D5 may be connected to the fifth node N5.

[0074] Fig. Figure 5 shows a schematic representation of circuit 1 in the third operating mode.

[0075] In the third mode, the processor unit can be powered by the auxiliary battery 5. In the third mode, if the auxiliary supply voltage provided by the auxiliary battery 5 at the auxiliary terminal TA is higher than the processor supply voltage to be provided at the processor terminal TP, it may be necessary to reduce the auxiliary supply voltage to the processor supply voltage. To reduce the auxiliary supply voltage, the control unit 6 can be configured to control the sixth switch M6 and the third switch M3 to operate in a buck converter mode to reduce the auxiliary supply voltage provided at the auxiliary terminal TA to the process voltage to be supplied to the processor terminal TP. The fifth switch M5 can be set to conductive, and the second, first, and fourth switches M4 can be set to non-conductive.

[0076] Fig. 6 shows a schematic representation of a circuit 1 according to the prior art.

[0077] According to the prior art, the main terminal TM, which provides the main voltage, is connected to the auxiliary terminal TA via the battery buck converter 7. The main terminal TM is also connected to the processor terminal TP via the main buck converter 8. The auxiliary terminal TA is connected to the processor terminal TP via a boost converter 9 and the main buck converter 8.

[0078] Fig. 7 shows a further schematic representation of a circuit 1 according to the prior art.

[0079] Fig. 8 shows a schematic representation of a circuit 1 according to the prior art in a first mode.

[0080] In the first mode, the control unit 6 controls the battery step-down converter 7 to reduce the main voltage supplied by the main battery 4 to charge the auxiliary battery 5 to the predefined charging voltage. The control unit 6 can control the main step-down converter 8 to reduce the main voltage to the process supply voltage to be supplied to the processor device 3.

[0081] Fig. 9 shows a schematic representation of a circuit 1 according to the prior art in a second or third mode.

[0082] In the second and third modes, the controller 6 controls the main boost and buck converter 8 to convert the auxiliary supply voltage into the processor supply voltage. This means that the auxiliary voltage can be converted twice before being supplied to the processor terminal TP as the processor supply voltage.

[0083] Fig. 10 shows a schematic representation of a method for operating an inverse converter circuit 1

[0084] The procedure can be carried out with the Fig. 1 to Fig. 5 shown inverse converter circuit 1.

[0085] In a first step S1, the control unit 6 can check whether the main voltage supplied to the main terminal TM fulfills the predefined main condition.

[0086] If the main voltage supplied to the main terminal TM satisfies the main condition, the method can continue with step S2. In step S2, the control unit 6 can control the switches of the inverter circuit 1 such that the inverter circuit 1 operates in a first mode to provide the predefined charging voltage at the auxiliary terminal TA and to provide the predefined processor voltage at the processor terminal TP.

[0087] For this purpose, the control unit 6 can operate the switches in particular as follows: The control unit 6 can control the first switch M1 and the second switch M2 to operate in buck converter mode to increase the main voltage supplied to the main terminal TM to the predefined charging voltage to be supplied to the auxiliary terminal TA. The control unit 6 can control the fourth switch M4 and the third switch M3 to operate in buck converter mode to reduce the main voltage supplied to the main terminal TM to the processor supply voltage to be supplied to the processor terminal TP. The control unit 6 can control the fifth switch M5 and the sixth switch M6 to set the respective switches to non-conductive.

[0088] If the main voltage does not meet the main condition, the method can continue with step S3. In step S3, the control unit 6 can check whether the auxiliary supply voltage supplied by the auxiliary battery 5 to the auxiliary terminal TA is below or above the predefined supply voltage to be supplied to the processor terminal TP.

[0089] If the auxiliary supply voltage supplied to the auxiliary terminal TA is below the predefined supply voltage, the method can continue with step S4. If the auxiliary supply voltage supplied to the auxiliary terminal TA is above the predefined supply voltage, the method can continue with step S5. In step S4, the control unit 6 can control the switches of the inverter circuit 1 such that the inverter circuit 1 is operated in the second mode to increase the auxiliary supply voltage to the predefined processor voltage.

[0090] For this purpose, the control unit 6 can operate the switches in particular as follows: The control unit 6 can control the first switch M1 and the fifth switch M5 to operate in boost converter 9 mode to increase the auxiliary supply voltage supplied to the auxiliary terminal TA to the processor voltage to be supplied to the processor terminal TP. The control unit 6 can control the sixth switch M6 to set the sixth switch M6 to conductive. The control unit 6 can control the second switch M2, the fourth switch M4, and the third switch M3 to set the respective switches to non-conductive.

[0091] In step S5, the control unit 6 can control the switches of the inverter circuit 1 such that the inverter circuit 1 is operated in the third mode to reduce the auxiliary supply voltage to the predefined processor voltage.

[0092] For this purpose, the control unit 6 can operate the switches in particular as follows: The control unit 6 can control the sixth switch M6 and the third switch M3 to operate in a buck converter mode to reduce the auxiliary supply voltage provided at the auxiliary terminal TA to the processor voltage to be supplied to the processor terminal TP. The control unit 6 can control the fifth switch M5 to set the fifth switch M5 to conductive. The control unit 6 can control the second switch M2, the first switch M1, and the fourth switch M4 to set the respective switches to non-conductive.

[0093] The proposed solution aims to increase efficiency in applications where power is supplied by the auxiliary battery, thereby reducing implementation costs by eliminating a power coil and reducing overall board area. By eliminating a regulator stage compared to the state-of-the-art, the solution also aims to reduce the overall electromagnetic emissions of the power system.

[0094] The proposed solution eliminates components for one conversion stage. Therefore, fewer capacitors and inductors are required. Because the fifth switch M5 and the second switch M2 can have the same source voltage, the same bootstrap voltage / charge pump can be used to turn them ON. The same applies to the sixth switch M6 and the fourth switch M4. Since fewer switching stages are required, overall efficiency can be improved. This can also result in less expensive components for the output stages, as transistors with a lower on-resistance RDSon are easy to find, as long as parasitic capacitance due to fewer overall commutation switching operations is not a problem.

[0095] Overall, the example shows how a hybrid inverse bridge converter is provided by the invention. Reference symbol 1 circuit 2 Power supply system 3 Processor device 4 Main battery 5 Auxiliary battery 6 Control unit 7 Battery step-down converters 8 main buck converters 9 boost converters 10 battery filters N1 first node N2 second node N3 third node N4 fourth node N5 fifth node M switch M1 first switch M2 second switch M3 third switch M4 fourth switch M5 fifth switch M6 sixth switch C capacitor C1 first capacitor C2 second capacitor C3 third capacitor L Inductor L1 first inductor L2 second inductor TM main connection TA intermediate connection TP processor connection TG earthing connection D5 fifth diode D6 sixth diode QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] US 2020006980 A1

[0007] US 2016006295 A1

[0008] US 11381159 B2

[0009]

Claims

[1] Inverse converter circuit (1) comprising a main terminal (TM), an auxiliary terminal (TA), a processor terminal (TP) and a ground terminal (TG), characterized by , that - the main terminal (TM) is connected to a first node (N1) via a second switch (M2); - the earth terminal (TG) is connected to the first node (N1) via a first switch (M1); - the auxiliary terminal (TA) is connected to a third node (N3); - the earth terminal (TG) is connected to the third node (N3) via a first capacitor (C1); - the third node (N3) is connected to the first node (N1) via a first inductor (L1); - the main terminal (TM) is connected to a second node (N2) via a fourth switch (M4); - the earth terminal (TG) is connected to the second node (N2) via a third switch (M3); - the processor port (TP) is connected to a fourth node (N4); - the earth terminal (TG) is connected to the fourth node (N4) via a second capacitor (C2); - the fourth node (N4) is connected to the second node (N2) via a second inductor (L2); - the earth terminal (TG) is connected to a fifth node (N5) via a third capacitor (C3); - the first node (N1) is connected to the fifth node (N5) via an arrangement comprising a fifth switch (M5) and a diode connected in parallel with the fifth switch (M5); and - the second node (N2) is connected to the fifth node (N5) via an arrangement comprising a sixth switch (M6) and a diode connected in parallel with the sixth switch (M6). [2] Inverse converter circuit (1) according to claim 1, characterized bythat the inverse converter circuit (1) comprises a control device (6) which is designed to control the switches (M1, ..., M6) of the inverse converter circuit (1). [3] Inverse converter circuit (1) according to claim 2, characterized by that the control device (6) is designed to control the switches (M1, ... , M6) of the inverse converter circuit (1) in such a way that they operate the inverse converter circuit (1) in a first mode, wherein - the first switch (M1) and the second switch (M2) are controlled by the control unit (6) to operate in a step-down converter mode to reduce a main voltage supplied to the main terminal (TM) to a predefined charging voltage to be supplied to the auxiliary terminal (TA); - the fourth switch (M4) and the third switch (M3) are controlled by the control device (6) to operate in a step-down mode to reduce the main voltage supplied to the main terminal (TM) to a processor supply voltage to be supplied to the processor terminal (TP); and - the fifth switch (M5) and the sixth switch (M6) are set to non-conductive. [4] Inverse converter circuit (1) according to one of claims 2 or 3, characterized by that the control device (6) is designed to control the switches (M1, ... , M6) of the inverse converter circuit (1) so that they operate the inverse converter circuit (1) in a second mode, wherein - the first switch (M1) and the fifth switch (M5) are controlled by the control device (6) to operate in boost converter mode (9) to increase an auxiliary supply voltage supplied to the auxiliary terminal (TA) to the processor voltage supplied to the processor terminal (TA); - the sixth switch (M6) is set to conductive; and - the second switch (M2), the fourth switch (M4) and the third switch (M3) are set to non-conductive. [5] Inverse converter circuit (1) according to one of claims 2 to 4, characterized by that the control device (6) is designed to control the switches (M1, ... , M6) of the inverse converter circuit (1) in such a way that they operate the inverse converter circuit (1) in a third mode, wherein - the sixth switch (M6) and the third switch (M3) are controlled by the control unit (6) to operate in a step-down converter mode to reduce an auxiliary supply voltage provided at the auxiliary terminal (TA) to the processor voltage to be supplied to the processor terminal (TP); - the fifth switch (M5) is set to conductive; and - the second switch (M2), the first switch (M1) and the fourth switch (M4) are set to non-conductive. [6] Inverse converter circuit (1) according to one of claims 2 to 5, characterized by that the control device (6) is designed to - to check whether the main voltage provided at the main terminal (TM) meets a main condition; - driving the switches (M1, ... , M6) to operate the circuit (1) in the first mode to provide the predefined charging voltage at the auxiliary terminal (TA) and to provide the predefined processor voltage at the processor terminal (TP) when the main condition is met. [7] Inverse converter circuit (1) according to claim 6 with reference to claim 4, characterized by that the control device (6) is designed to - to check whether the auxiliary supply voltage supplied to the auxiliary terminal (TA) is lower than the supply voltage supplied to the processor terminal (TP) if the main condition is not met; and - driving the switches (M1, ... , M6) to operate the circuit (1) in the second mode to provide the predefined processor voltage at the processor terminal (TP) when the auxiliary supply voltage supplied to the auxiliary terminal (TA) is below the predefined processor voltage to be supplied to the processor terminal (TP). [8] Inverse converter circuit (1) according to claim 6 with reference to claim 5, characterized by that the control device (6) is designed to - to check whether the auxiliary supply voltage supplied to the auxiliary terminal (TA) is lower than the supply voltage supplied to the processor terminal (TP) if the main condition is not met; and - driving the switches (M1, ... , M6) in such a way that they operate the circuit (1) in the third mode in order to provide the predefined processor voltage at the processor terminal (TP) when the auxiliary supply voltage supplied to the auxiliary terminal (TA) is higher than the predefined processor voltage to be supplied to the processor terminal (TP). [9] Power supply system (2) comprising an inverse converter circuit (1) according to one of claims 1 to 8, a main power device connected to the main terminal (TM), an auxiliary battery (5) connected to the auxiliary terminal (TA) and a processor device (3) connected to the processor terminal (TP). [10] Method for operating an inverse converter circuit (1) according to one of claims 1 to 8, comprising the following steps performed by the control unit (6): - Check that the main voltage supplied to the main terminal (TM) meets a main condition; - driving the switches (M1, ... , M6) when the condition is met so that they operate the circuit (1) in the first mode to provide the predefined charging voltage at the auxiliary terminal (TA) and to provide the predefined processor voltage at the processor terminal (TP); - if the main condition is not met, check whether the auxiliary supply voltage supplied to the auxiliary terminal (TA) is lower than the predefined supply voltage to be supplied to the processor terminal (TP); - driving the switches (M1, ... , M6) when the auxiliary supply voltage supplied to the auxiliary terminal (TA) is below the predefined processor voltage so that they operate the circuit (1) in the second mode to provide the predefined processor voltage at the processor terminal (TP); and - driving the switches (M1, ... , M6) when the auxiliary supply voltage supplied to the auxiliary terminal (TA) is above the predefined processor voltage so that they operate the circuit (1) in the third mode to provide the predefined processor voltage at the processor terminal (TP).

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