MEMS with low parasitic capacity and methods for manufacturing them

Abstract

A MEMS device comprises a stack of layers with a plurality of MEMS layers arranged along a layer sequence direction. The MEMS device includes a movable element formed in a first MEMS layer, which is located between a second and a third MEMS layer of the stack. A drive unit comprises a drive structure mechanically rigidly connected to the second MEMS layer and is configured to generate a force within a working area of ​​the MEMS device to deflect the movable element.In a peripheral area that at least partially surrounds the working area and that has at least part of an electrical contacting of the drive devices and in which the first MEMS layer is mechanically connected to the second MEMS layer, a capacitance reduction is arranged which is designed to reduce a parasitic capacitance in the peripheral area compared to the working area.

Description

The present invention relates to a MEMS having a layer stack which comprises a working region and a peripheral region at least partially enclosing the working region. In the peripheral region, a capacitance reduction configured to reduce a parasitic capacitance in the peripheral region compared to the working region is arranged. The present invention further relates to a method of manufacturing such a MEMS and, further, to the reduction of capacitance in MEMS with a lid drive.Microelectromechanical systems, MEMS, may be implemented for, among other things, actuator and / or sensor operation. For an actuator operation, force members can be provided which provide a force for generating a signal and / or a movement. Thus, a movement of a MEMS can be provided, for example, by a comb drive or other electrostatic drives, wherein other actuators, such as piezoelectric, thermoelectric or other actuators, can also be used without further ado. In the sensory area, a detection of the movement or of the signal can take place in a manner complementary to a generation of a movement or of a signal. Both sensory and actuator operation may involve the use of electrical potentials that may be experienced by parasitic capacitances in a peripheral region of the MEMS.WO 2022 / 117197 A1 describes a MEMS with a so-called cover drive. Electrodes of the actuators are at a particularly preferred distance of approximately 100 nm from the movable element. In the peripheral region, the electrically insulating layers can be formed from silicon oxide.Desirable are MEMS with low energy consumption.It is therefore an object of the present invention to provide a MEMS and a method for producing the same, which enable low energy consumption.This object is achieved by the subject matter of the independent claims.A core idea of the present invention is to have recognized that a not inconsiderable proportion of the total energy consumption of a MEMS is caused by parasitic capacitances in the MEMS. These parasitic capacitances are arranged for a relevant portion in a peripheral region of the MEMS, that is to say a region away from the actual working region of the MEMS. The inventors have recognized that by reducing the parasitic capacitances in the peripheral region, the energy consumption of the MEMS can be reduced without adversely affecting the operation of the MEMS itself.According to one exemplary embodiment, a MEMS component comprises a layer stack having a plurality of MEMS layers which are arranged along a layer sequence direction. The MEMS component comprises a movable element formed in a first MEMS layer, which is arranged between a second MEMS layer and a third MEMS layer of the layer stack. The MEMS component comprises a drive device which has a drive structure which is mechanically fixedly connected to the second MEMS layer and is designed to generate a force for deflecting the movable element in a working region of the MEMS component. Furthermore, the MEMS component comprises a peripheral region which at least partially surrounds the working region, which has at least part of an electrical contacting of the drive device and in which the first MEMS layer is mechanically connected to the second MEMS layer. In the peripheral region, a capacitance reduction configured to reduce a parasitic capacitance in the peripheral region compared to the working region is arranged. By reducing the capacitance, comparatively low electrical losses and therefore a low total energy consumption are achieved.According to an embodiment, the capacitance reduction comprises a dielectric layer in the peripheral region and between the first MEMS layer and the second MEMS layer. The dielectric layer has a layer thickness along the layer sequence direction that is greater than a gap thickness of a gap between the movable member and the driving structure along the layer sequence direction in the work area. The comparatively increased distance achieved by the high thickness of the dielectric layer enables a reduction of the effective electrical capacitance of a capacitor influenced by the electrode distance.According to one exemplary embodiment, the gap thickness has a smaller dimension than the layer thickness. Thus, the gap thickness can have a value of at most 1000 nm, preferably at most 500 nm and particularly preferably at most 100 nm. In one embodiment, the layer thickness of the dielectric layer then has a value of at least or more than 1000 nm, at least or more than 500 nm or at least or more than 100 nm.According to an embodiment, the capacitance reduction alternatively or additionally to the above-described dielectric layer comprises a local structuring of electrically conductive material in the first MEMS layer and / or a local structuring of a material of the second MEMS layer in the peripheral region. The local structuring or the omission of the electrically conductive material in this region enables a reduction in the electrode areas of a capacitor providing the parasitic capacitance.According to one exemplary embodiment, the MEMS component is configured for at least three different electrical potentials in the peripheral region. One of these potentials may be a substrate potential which is possibly different from a potential of the driving device. This potential can have a relevant influence on the parasitic capacitance, wherein, according to exemplary embodiments, the influence can be reduced by a reduction in the effective area and / or by an increase in the distance between electrode areas of a capacitor under consideration.According to one exemplary embodiment, the structured material has a continuous region which is perforated regularly or irregularly by means of the local structuring. Unlike, for example, for structuring electrically conductive material for electrode surfaces or conductor tracks which are electrically insulated from one another, the total surface can have a common electrical potential, but is reduced with regard to its effective total surface because of the structuring.According to one exemplary embodiment, the capacitance reduction comprises a low-impedance electrical connection between the first MEMS layer and the second MEMS layer in the peripheral region. The low-impedance connection can bring about an effect similar or equal to an electrical short circuit between the layers, which is likewise advantageous with regard to a reduction in the acting electrical parasitic capacitance.According to one exemplary embodiment, the MEMS component is configured for a potential difference between the first MEMS layer and the second MEMS layer in the working region. This means that the low-impedance electrical connection in the peripheral region advantageously does not lead to a short circuit in the working region between the different MEMS layers. This enables a high reliability of the MEMS component.According to one exemplary embodiment, the low-impedance electrical connection is provided via a semiconductor layer epitaxially grown on the first MEMS layer and / or the second MEMS layer. Alternatively or additionally, the low-impedance electrical connection can be provided via a semiconductor layer remaining from an etching process. Both the epitaxial growth and the etching out of a gap in the working region when the semiconductor layer remains in the peripheral region can enable a simple connection of the MEMS layers to one another, for example using a bonding process, and can nevertheless be implemented with little outlay.According to one exemplary embodiment, the semiconductor layer has a layer thickness along the layer sequence direction of at least 80 nm.According to an embodiment, a gap between the movable element and the driving structure along the layer sequence direction is at least partially defined via a recess of semiconductor material arranged in the peripheral region. The gap may be generated, for example, by means of an etching process or by means of an epitaxial layer not grown in the gap or a combination thereof.According to an embodiment, electrodes of the drive structure are formed as metallic electrodes. The use of metallic materials enables reduced electrical parasitic capacitance compared to doped semiconductors, which is likewise advantageous in the sense of exemplary embodiments.According to one exemplary embodiment, a MEMS component is provided, in which a bond between the first MEMS layer and the second MEMS layer is arranged in a region facing away from the working region and enclosing a region of an electrical periphery to a extent of at least 90% of the bond. The peripheral region considered for the capacitance reduction can thus also enclose the electrical peripheral region of the MEMS, as a result of which the electrical operation of the MEMS can remain undisturbed per se.According to one exemplary embodiment, the drive device is designed to generate a drive force on the movable element, wherein the drive force is designed to deflect the movable element perpendicularly to the layer sequence direction, that is to say in-plane. MEMS components of this type are particularly advantageous since the chip area used can be used to a great extent.According to one exemplary embodiment, the drive device is a first drive device and the MEMS component has a second drive device, which is mechanically connected to the third MEMS layer and is designed to generate a force for deflecting the movable element in the working region of the MEMS component. The capacitance reduction is arranged on the one hand between the first MEMS layer and the second MEMS layer and on the other hand between the first MEMS layer and the third MEMS layer. For the capacitance reduction between the first MEMS layer and the third MEMS layer, the same measures can be used as for the capacitance reduction between the first MEMS layer and the second MEMS layer, but the specific implementations can also deviate from one another.According to an embodiment, a MEMS device comprises a substrate layer arrangement which is connected to the second MEMS layer at a side facing away from the first MEMS layer by a dielectric layer. The dielectric layer has a layer thickness along the layer sequence direction of at least 1.1 μm. Such a high layer thickness allows a slight effect of the substrate layer arrangement on the acting parasitic capacitance, which is advantageous.According to an embodiment, a MEMS device is provided, which comprises a layer stack with a plurality of MEMS layers arranged along a layer sequence direction. In the layer stack, a movable element is formed in the first MEMS layer, which movable element is arranged between a second MEMS layer and a third MEMS layer of the layer stack. The MEMS component comprises a drive device which has a drive structure which is mechanically fixedly connected to the second MEMS layer and is designed to generate a force for deflecting the movable element in a working region of the MEMS component. The MEMS device comprises a substrate layer arrangement which is connected to the second MEMS layer on a side facing away from the first MEMS layer by a dielectric layer. The dielectric layer has a layer thickness along the layer sequence direction of at least 1.1 μm. This achieves a low parasitic capacitance through the substrate layer arrangement. This measure is alternatively or additionally applicable with the capacity reduction in the peripheral area and, in itself, is not restricted to the peripheral area, nor necessarily to be implemented there.According to one exemplary embodiment, a MEMS described herein is formed as a MEMS loudspeaker, which comprises a MEMS component according to one exemplary embodiment.Further advantageous embodiments of the present invention are the subject matter of further dependent claims.Particularly preferred embodiments of the present invention will be explained below with reference to the accompanying drawings.The following are shown: FIG. 1 shows a schematic side sectional view of a MEMS component according to an embodiment; FIG. 2 shows a schematic side sectional view of a MEMS according to an exemplary embodiment for explaining a first possible implementation of a capacitance reduction from FIG. 1 ; FIG. 3 shows a schematic side sectional view of a MEMS according to an exemplary embodiment with an embodiment of dielectric layers according to the invention; FIG. 4 shows a schematic side sectional view of a MEMS component according to an exemplary embodiment for explaining a further embodiment of the capacitance reduction of the MEMS from FIG. 1 ; FIG. 5 shows a schematic plan view of a MEMS component according to an exemplary embodiment for explaining a further form of capacitance reduction by means of a selection of a bonding region; FIG. 6 ashows a schematic top view of a part of a MEMS according to an exemplary embodiment for explaining a local structuring from FIG. 2 ; FIG. 6 b shows an enlarged illustration of a detail of the MEMS from FIG. 6 a; FIG. 7 shows a schematic flow diagram of a method for producing an exemplary embodiment described herein according to a first aspect; and FIG. 8 shows a schematic flow diagram of a method with which a MEMS according to a further exemplary embodiment can be produced according to a second aspect.Before exemplary embodiments of the present invention are explained in more detail below with reference to the drawings, it is pointed out that identical, functionally identical or identically acting elements, objects and / or structures are provided with the same reference numerals in the different figures, with the result that the description of these elements shown in different exemplary embodiments is interchangeable or can be applied to one another.Exemplary embodiments described below are described in connection with a multiplicity of details. However, embodiments may also be implemented without these detailed features. Further, embodiments will be described for convenience using block diagrams to replace a detailed diagram. Furthermore, details and / or features of individual exemplary embodiments can be easily combined with one another, provided that it is not explicitly described to the contrary.Embodiments of the present invention uniformly relate to measures for minimizing or reducing parasitic capacitances on MEMS devices. According to a first aspect of embodiments described herein, a capacitance reduction in a peripheral region of a MEMS element is used for this purpose. According to a second aspect, a high layer thickness of a dielectric layer is used for further layer thicknesses, which can also be effective in an operating region of the MEMS component.FIG. 1 shows a schematic side sectional view of a MEMS component 10 according to an exemplary embodiment. The MEMS device 10 comprises a layer stack with a plurality of MEMS layers 14, 16 and 18. Each of the MEMS layers 14, 16 and / or 18 taken alone may comprise together with at least one other MEMS layer or each comprise one or more individual layers. Thus, different MEMS layers 14, 16 and / or 18 may comprise, for example, semiconductor layers, electrically conductive layers and / or electrically insulating or dielectric layers. In embodiments discussed herein, the MEMS layers 14, 16, and 18 are functional layers that may be single-layered or multi-layered. Thus, a movable element 22 is arranged in the MEMS layer 14. An extension of the movable element 22 is not limited to the first MEMS layer 14, but can also extend partially along a stacking direction 24, along which the MEMS layers 14, 16 and 18 are arranged, into one or both of the adjacent MEMS layers 16 and / or 18. The movable element 22 can be arranged so as to be movable in an out-of-plane manner along the stacking direction 24 and / or in-plane manner perpendicular thereto.According to embodiments, the drive device can be configured to generate a drive force on the movable element, wherein the drive force is configured to deflect the movable element perpendicular to the layer sequence direction.However, due to the functional consideration of the MEMS layers 14, 16 and 18, it is also clear that the MEMS layers 14 and 18 can be integrally formed. For example, the MEMS layer 14 can be understood as that height section of the layer stack 12 along the stacking direction 24 in which the cavity 36 is arranged, for example generated by means of an etching process or the like. A remaining layer that may form a lid or bottom of the cavity 36 may be understood as a MEMS layer 18, and therefore an interface (interface) may be provided between the layers 14 and 18, but not necessarily.The MEMS component comprises a drive device 26 which has a drive structure 28 which is mechanically fixedly connected to the MEMS layer 16 and is designed to generate a force for deflecting the movable element 22 in a working region 32 of the MEMS component 10. The drive device 26 can comprise, for example, but not necessarily, a cover drive described in WO 2022 / 117197 A1, so that the drive structure 28 can have, for example, one or more electrically conductive electrodes which are designed to generate an electrostatic and / or electrodynamic field between the electrodes and the movable element 22 or electrodes arranged thereon or arranged therein in order to deflect the movable element 22. Other principles for deflecting the movable element 22 are readily possible, but it becomes clear that electrical signals or potentials can be applied at least to the drive device 26, but possibly also to the movable element 22 or elements arranged thereon. These electrical potentials can be conducted to the working region 32 through a peripheral region 34 at least partially enclosing the working region 32, for which reason electrically conductive materials and / or structures can also be arranged in the peripheral region 34. The peripheral region 34 has at least part of an electrical contacting of the drive device 26. Furthermore, in the peripheral region, the MEMS layer 14 and the MEMS layer 16, and preferably the MEMS layer 14 and the MEMS layer 18, are mechanically fixedly connected to one another. This mechanical connection can be effected, for example, by means of a bonding process, an adhesive process or by means of other mechanical fixings.A cavity 36 may be arranged in the layer stack 12 and implemented, for example, in the MEMS layer 14, wherein the cavity 36, if it is arranged in the MEMS component 10, may also extend partially into the MEMS layer 16 and / or the MEMS layer 18. In the cavity 36, a movement of the movable element 22 may be possible without problems, for example for fluid displacement, if the MEMS component 10 is implemented as a MEMS loudspeaker or as a MEMS pump.In the peripheral region 34, a capacitance reduction 38 is arranged, which is designed to reduce a parasitic capacitance C PAR in the peripheral region 34 compared to the working region 32. This can be understood to mean that the capacity reduction represents a local measure taken in the peripheral region 34.FIG. 2 shows a schematic side sectional view of a MEMS 20 according to an exemplary embodiment for explaining a first possible implementation of the capacitance reduction 38 from FIG. 1.By way of example, a plurality of movable elements 22 are arranged in the cavity 36 in a 1-225 manner in a number of at least 1, at least 2, at least 3 or more, for example at least 6 or more, at least 10 or more or higher. The movable elements may be individually movable or mechanically coupled together.The MEMS layer 14 or the layer arrangement can be formed from silicon material, for example, from a silicon wafer. Alternatively, other semiconductor materials, such as poly-Si or other MEMS-compatible semiconductor materials, can also be arranged. The layers 56 1 and / or 56 2 may be formed individually or together of possibly monocrystalline silicon material, as may the MEMS layers 16 and / or 18, wherein polycrystalline silicon may also be used. Other materials, such as other semiconductor materials, electrically insulating materials, or electrically conductive materials, may also be used.The MEMS layer 14 may comprise an electrically conductive layer 42 as a layer arrangement, for instance a doped semiconductor layer or the like. Further, dielectric layers 44 1 and 44 2 may be part of the MEMS stack 14. The MEMS layer 14 can also be understood as a device wafer having one or more layers. The MEMS layer 16 may form at least a part of a lid wafer 46, wherein the MEMS layer 16 may comprise e.g. electrically conductive regions 28 1 and / or 28 2 which may serve as part of a drive structure. One or more openings 52 1-526 may be used for fluidic exchange between an environment of the MEMS 20 and the cavity 36.A bottom wafer 54 may include, for example, the MEMS layer 18, which may optionally, but not necessarily, also include electrodes for deflecting the movable elements 22 in 1-225 fashion. Although dielectric layers 44 1 and 44 2 are shown as being part of device wafer 14 and lid wafer 46 is described as including both MEMS layer 16 and dielectric layer 44 3 in addition to substrate layer 56 1, such functional partitioning may be done otherwise as desired. In particular, for example, dielectric layer 44 1 may also be associated with lid wafer 46 and / or dielectric layer 44 2 may be associated with bottom wafer 54. Alternatively or additionally, substrate layers 56 1 and / or 56 2 may also be associated with other wafer arrangements.A section 58, which is also shown enlarged in FIG. 2, describes a possible implementation of the capacitance reduction 38 from FIG. 1. The dielectric layer 44 1 and possibly, but independently of this, the dielectric layer 44 2 may have a layer thickness 62 in the peripheral region between the MEMS layers 14 and 16, which is greater than a gap thickness 64 between the movable element 22 5 and the drive structure in the MEMS layer 16. Along the layer sequence direction 24 and in the working region 32, while the gap thickness 64 may be kept as low as possible in the interest of an electrical efficiency of the MEMS 20, for example with a gap thickness of at most 1000 nm, preferably at most 500 nm and further preferably 150 nm or less, for example in about 100 nm, an additional thickness 66 may be provided in the dielectric layer 44 1 by the dielectric layer being at least 1000 nm or more, at least 500 nm or more or at least 150 nm or more. In other words, a design goal can be to choose the layer thickness 62 of the dielectric layer 44 and, in particular, the additional thickness 66 to be as high as possible within limits, while the gap thickness is simultaneously chosen to be as small as possible.In the design of the gap 64 and the layer thickness 62, however, it is advantageous if the layer thickness 62 is greater than the gap thickness 64, namely in a range of at least 100 nm, at least 150 nm or more, for example 200 nm or more. This enables decoupling of the step, which may be 100 nm in size, in the insulating material in the actuator region and in the peripheral region. In the actuator region, for example, a 100 nm step (fluid / air-filled) can be provided, see gap thickness 64, which enables a large force for the actuator. In the peripheral region, the gap between the layers 14 and 16, on the other hand, can be larger and can be, for example, 200 nm and more, which enables a smaller parasitic capacitance.A measure which is likewise possible independently of this for implementing the capacitance reduction 38 from FIG. 1 is discussed on the basis of the local structures 68 1-684 of the MEMS 20. A capacitance reduction according to embodiments comprising a local structuring of electrically conductive material makes it possible to reduce the electrode areas acting in the parasitic capacitance in the peripheral region 34. Thus, FIG. 2 shows, for example, that electrically conductive material of the MEMS layer 16 is locally removed in the peripheral region. Alternatively or additionally, a portion of the semiconductor layer 42 in the peripheral region may also be removed, which has a similar effect of reducing capacitance. This means that the capacitance reduction can comprise a local structuring of electrically conductive material of the MEMS layer 14 and / or a local structuring of a possibly electrically conductive material of the MEMS layer 16 in the peripheral region. However, such a structuring differs from a structuring as is possibly provided for the 1, 282 execution of conductor tracks for the movable elements and / or the drive structures 28. While these may have to be electrically insulated from an environment in order to conduct electrical potentials without short circuits, due to the local structures 68 1-684 a continuous region which is perforated 1-684 regularly or irregularly by means of the local structure 68 may be provided.In a MEMS according to an exemplary embodiment, three or more different electrical potentials are set up in the peripheral region. These may be electrical potentials for the drive devices 28 1, 282 and, in addition, may be a further electrical potential for an outer substrate 56 1 and / or 56 2. Optionally, a further electrical potential can also be provided, for example for application to at least one of the movable elements 22 1-225.According to an implementation of the capacitance reduction that can be used independently of the gap thicknesses 64, 62 and 66, the drive structures 28 1 and / or 28 2 can be formed from a metal layer or comprise metallic materials, which comprises a capacitance reduction compared to the use of semiconductor materials. One or more electrodes of the drive structure can be formed as metallic electrodes, wherein this is understood to mean an individual metallic material, but also alloys. For example, it is particularly suitable. Aluminum, since wafer level bonding is also possible in addition therewith. Alternatively or additionally, compounds such as AlSiCu, AICu and / or AISiTi are also suitable materials for this purpose. Other metal materials are not excluded as a result, even if they are not suitable for a bonding process.An additional measure that can be implemented independently of this, but without problems, for reducing effective parasitic capacitances in the MEMS 20 is to make a layer thickness 72 1 of the dielectric layer 44 3 between the MEMS layer 16 and the substrate layer 56 1 and / or a layer thickness 72 2 of a dielectric layer 44 4 between the MEMS layer 18 and a substrate layer 56 2 particularly thick. Thus, the layer thicknesses 72 1 and 72 2 can have a layer thickness of at least 1.1 μm, at least 1.2 μm or more, for example at least 1.3 μm or at least 1.5 μm independently of one another along the layer sequence direction 24. Since the dielectric layers 44 3 and 44 4 can also extend into the working region 32, the advantageous effect of the low effective parasitic capacitance can also be obtained there without any problem.Optionally, the drive means between the movable elements 22 1-225 and the working structures 28 1 and 28 2 may be a first drive means. A second drive device 26 may be arranged 2 which comprises further drive structures 28 3 and 28 4 which start from the movable elements 22 1-225 and are arranged opposite the drive structures 28 1 and 28 2 respectively.It is advantageous if in such a case the capacitance reduction is set up between the MEMS layers 14 and 16 on the one hand and between the MEMS layers 14 and 18 on the other hand. These can be symmetrical measures as shown in FIG. 2, but individual measures can also be arranged asymmetrically, for example local structuring on one of the top side and the bottom side and the use of metallic electrodes on only one of the two sides in combination with the use of semiconductor-based electrodes on an opposite side or the like.The movable elements 22 1-225 can be deflectable in-plane, i.e. perpendicular to the stacking direction 24, for example in accordance with WO 2022 / 117197 A1. However, the exemplary embodiments described herein for reducing capacitance or increasing layer thickness to outer substrate layers also act in the case of movable elements which are movable out-of-plane, for example membrane structures which can be deflected along the stacking direction 24.In other words, FIG. 2 shows a MEMS with cover drive according to exemplary embodiments with a reduction in the parasitic capacitances. The system has an air gap of 100 nm between the actuators and the electrodes and an SiO 2- layer of, for example, at least 200 nm up to 1 μm in the region of the periphery. That is, the oxide in the periphery is at least twice or more thicker than a gap is provided in the active region. In addition, the device may have a local lattice structure / structuring of SiO 2 and poly-Si / Si in an active area of the periphery and a thicker oxide layer of 1.5 μm between the substrate and poly-Si. Instead of poly-Si, metal layers may be arranged, for instance, to implement conductive regions.FIG. 3 shows a schematic side sectional view of a MEMS 30 according to an exemplary embodiment, in which although a capacitance reduction according to FIG. 1 and FIG. 2 is not implemented, it shows a configuration of the dielectric layers 44 3 and 44 4 in that a layer thickness 72 1 and / or 72 2 is arranged along the layer sequence direction of at least 1.1 μm. It is also pointed out here that, for example, the 4 dielectric layer 44 is optional, for example when the cavity 36 already ends in the MEMS layer 14, that is to say is not continuously etched, for example. Also for the case of the arrangement of a dielectric layer 44 3 and 44 4 on both sides, advantageous embodiments of this aspect are already obtained if only one of the two layers 44 3 or 44 4 has a layer thickness 72 1 or. 72 2 which has a layer thickness of at least 1.1 μm.It is further pointed out at this point that terms such as bottom wafer and lid wafer serve merely for the illustrative description of exemplary embodiments discussed herein, but are not restrictive for the positioning on the MEMS itself or for the orientation in space. It is understood that terms such as left, right, top, bottom, front, rear, bottom or cover can be interchanged arbitrarily in space if an orientation of the MEMS in space is changed. Moreover, it is also pointed out that the bottom and the cover are not to be understood as being a final layer starting from the cavity 34.The MEMS 30 can be easily extended by the capacitance reduction in the peripheral area.In other words, FIG. 3 illustrates a MEMS component with a cover drive, as is known from the prior art, but is advantageously modified in 4 by the larger oxide layer 44. The system has an air gap of at least 100 nm, at least 130 nm, at least 160 nm or at least 150 nm between the actuators and electrodes (active region) and in the region of the periphery, bond pads and feed lines, an SiO 2- layer 44 1 of at least 100 nm, at least 130 nm, at least 160 nm or at least 190 nm, i.e. the air gap in the active region and the SiO 2- layer in the periphery have approximately the same size: 100 nm / 100 nm, 130 nm / 130 nm, 160 nm / 160 nm, 190 nm / 190 nm etc.FIG. 4 shows a schematic side sectional view of a MEMS component 40 according to an exemplary embodiment for explaining a further embodiment of the capacitance reduction 38 of the MEMS 10. According to the embodiment, the capacitance reduction comprises a low-impedance electrical connection between the MEMS layer 14 and the MEMS layer 16 in the peripheral region 34. The low-impedance electrical connection can be made possible, for example, by direct contacting of doped layers 14 and 16 and / or by additional layers.Thus, for example, a semiconductor layer epitaxially grown on the MEMS layer 14 and / or MEMS layer 16, in particular a doped or highly doped semiconductor layer 74, can be provided, which permits an electrically low-impedance contacting between the layers 14 and 16. Alternatively or additionally, the low-impedance electrical connection can be provided via a semiconductor layer remaining from an etching process.For example, a free space 76 may be exposed from a material of the MEMS layer 14 and / or a layer 74 grown therein by an etching process, for example separately or in the same process for exposing the movable elements 22 1 and / or 22 2. A layer thickness 78 of a semiconductor layer, for example parallel to the stacking direction 24, may have a value of at least 80 nm, at least 90 nm or at least 100 nm or more, for example. The gap 64 between one or more movable elements 22 1 and / or 22 2 and the drive structure 28 1, 282, 283 along the layer sequence direction 24 may be at least partially defined across the free space or the recess of semiconductor material 78 disposed in the peripheral region 34. This means that the gap 64 can be produced at least partially by exposing the free space 74. The gap 64 can be wet or dry etched, for example, directly in the semiconductor material, for example silicon. In the etchings, although a uniformity of the etching process across the wafer may be less precise, for example in comparison with other wafers or in comparison from one lot to another lot, for example since etching is carried out without an etching stop, which may make the use of an epitaxially grown layer in the peripheral region 34 advantageous, in particular if the epitaxially grown layer has an etching stop layer towards the MEMS layer 14. However, the uniformity at this point is less relevant to the performance of the MEMS device 40, so that it is also possible to take into account the lower uniformity, but in order to be able to use a simpler process for this purpose.Despite the at least approximately obtained short circuit 82 in the peripheral region 34, the MEMS component 40 is advantageously set up for a potential difference U between the MEMS layers 14 and 16 in the working region 32. For this purpose, the electrodes or drive structures 28 1, 282 and 28 3 can advantageously be electrically insulated from a short-circuited region of the MEMS layer 16.In other words, a MEMS with a cover drive is illustrated in FIG. 4. Instead of the SiO 2- layer for the actuator stage of 200 nm to 1 μm, an epi layer, an epitaxially grown layer of 80 nm, 90 nm or 100 nm is arranged in the region of the periphery, or a stage is etched into the silicon of the layer 14. In the periphery, poly-Si may be electrically connected to the device wafer / fins, movable elements, which may greatly reduce to maximally reduce the capacitance in this range.FIG. 5 shows a schematic plan view of a MEMS component 50 according to an exemplary embodiment. With reference to MEMS device 50, another form of implementations discussed herein for reducing capacitance of MEMS device 10 is described. According to exemplary embodiments, a bond between the first MEMS layer 14 and the MEMS layer 16 can be arranged to an extent of at least 90% of the bond, see in this regard, for example, the region of the layer 74 in the MEMS component 40, in a region 86 facing away from the working region 32 and enclosing a region of an electrical periphery 84. Bonding only outside the electrical periphery enables a virtually complete suppression of the parasitic capacitance.The portion 86 may provide a passive bonding frame for wafer-based bonding. The working region 32 can comprise an actuator region 88, in which, for example, a movement of movable elements is generated. The peripheral region 34 may include the electrical periphery 84 and the bonding region 86. Outside the MEMS chip 50, edges of other MEMS devices possibly obtained by singulation are visible. Since the bonding may possibly generate parasitic capacitances, arranging the bonding outside the working region 32 is advantageous for avoiding parasitic capacitances.In other words, FIG. 5 shows a plan view of a chip with bonding only outside the electrical periphery. This is advantageous in order not to obtain short circuits between the device wafer and the fins and the electrically active poly-Si.FIG. 6 ashows a schematic top view of a part of a MEMS 60 according to an exemplary embodiment for explaining the local structuring 68 from FIG. 2, thus, feed lines 92 for movable elements 22 are shown by way of example there in order to deflect the same. The supply lines 92 can apply voltages or potentials +U / -U, for example.A cutout 94 at the edge of the MEMS 60 is shown enlarged in FIG. 6 b. While structures 94 1 and 94 2 may be designed, for example, to electrically isolate drive structures 28 1 and 28 2, for example electrodes, from one another, for example, in order to be able to apply potentials +U and -U to adjacent electrodes, local structures 68 1-684 may be arranged, for example, in region 86, the electrically passive periphery. Alternatively or additionally, local structures 68 5-688 can also be arranged in the region of the electrical periphery 84 for short-circuit reduction, wherein a size can be locally adapted, see the comparison between the local structures 68 6 and 68 3. In addition, the arrangement of local structures 68 9 and 68 10 may also be advantageous within the working region 32, in order to likewise reduce the parasitic capacitance there.In connection with the capacitance reduction, for example using local structuring, a short circuit or the layer thicknesses of the layers 44 3 and 44 4 embodiments relate to arranging such measures alternatively or additionally or even independently of the peripheral region in the working region. Thus, for example, the local structuring and / or the increase in the layer thickness can be used in order to reduce the capacitance. Although it is limited, it is also possible to arrange a short circuit in the working region as long as it is ensured that no electrical short circuits are caused between the drive signals.A MEMS component can therefore have the same or a further reduction in capacitance in the working region in addition to the reduction in capacitance in the peripheral region.According to one embodiment, a MEMS device is provided, which, with reference to the other embodiments, comprises a layer stack with a plurality of MEMS layers arranged along the layer sequence direction. The MEMS component comprises a movable element formed in a first MEMS layer; said movable element being arranged between a second MEMS layer and a third MEMS layer of the layer stack. The MEMS component has a drive device which has a drive structure which is mechanically fixedly connected to the second MEMS layer and is designed to generate a force for deflecting the movable element in a working region of the MEMS component. A peripheral region is provided which at least partially encloses the working region, which peripheral region has at least a part of an electrical contacting of the drive device and in which the first MEMS layer is mechanically connected to the second MEMS layer. A capacitance reduction is arranged in the working area, which is designed to reduce a parasitic capacitance in the working area. It can be provided that the MEMS component has the same or a further reduction in capacitance in the peripheral region.FIG. 7 shows a schematic flow diagram of a method 700 for producing an embodiment described herein. In a step 710, a layer stack is provided having a plurality of MEMS layers which are arranged along a layer sequence direction. A step 720 comprises arranging a movable element in a first MEMS layer between a second MEMS layer and a third MEMS layer of the layer stack. A step 730 comprises arranging a drive device such that the drive device has a drive structure which is mechanically fixedly connected to the second MEMS layer and is designed to generate a force for deflecting the movable element in a working region of the MEMS component, such that a peripheral region is obtained which at least partially surrounds the working region, which has at least part of an electrical contact connection of the drive device and in which the first MEMS layer is mechanically connected to the second MEMS layer. A step 740 includes arranging a capacitance reduction in the peripheral area to reduce a parasitic capacitance in the peripheral area compared to the working area.The method 700 can also be carried out in such a way that, alternatively or in addition to step 740, the same or a different capacity reduction is arranged in the working area.FIG. 8 shows a schematic flow diagram of a method 800 with which a MEMS according to a further exemplary embodiment can be produced. Steps 810 and 820 of method 800 may correspond to steps 710 and 720, respectively. A step 830 comprises arranging a drive device such that the drive device has a drive structure which is mechanically fixedly connected to the second MEMS layer and is designed to generate a force for deflecting the movable element in a working region of the MEMS component.A step 840 comprises arranging a substrate layer arrangement such that the substrate layer arrangement is connected to the second MEMS layer on a side facing away from the first MEMS layer by a dielectric layer such that the dielectric layer has a layer thickness along the layer sequence direction of at least 1.1 μm.Embodiments of the present invention enable advantageous operation of any MEMS. Embodiments described herein are particularly advantageous in MEMS devices that are part of a MEMS loudspeaker, and therefore embodiments relate to MEMS loudspeakers with a MEMS device described herein.Embodiments of the present invention relate to microelectromechanical systems configured to have a large effective area for interaction with a fluid. The exemplary embodiments can be used inter alia and particularly advantageously for reducing the capacity of the cover drive actuator. The parasitic capacitance in MEMS loudspeakers leads to a higher energy consumption, which can be improved according to the invention.A cover drive chip, as is known, for example, from WO 2022 / 117197 A1, can be roughly divided into three regions, see FIG. 5 in this context. the actuator region 88 and the periphery, which can be used in an electrically active part with bond pads and leads, such as the region 84, which can, however, also be used partially as a bond frame for wafer bonding, belong to these regions. Furthermore, a passive bonding frame for wafer bonding is provided, which is not electrically active, for example the region 86.Exemplary embodiments achieve the object of reducing the parasitic capacitance, for example in the region of the periphery, in the case of a MEMS loudspeaker. This results in reduced power consumption of the loudspeakers.The object is achieved, for example, by the air gap in the actuator region being smaller than the insulating layer in the peripheral region. For example, the MEMS component has an air gap of approximately 100 nm between the actuators and electrodes in the actuator region or active region 32 and in the region of the periphery 34 an electrically insulating layer of more than 100 nn, approximately 200 nm to 1 μm. This ensures that the force of the cover drive in the active region remains high on account of the small air gap, but the capacitance in the periphery is reduced, since a thicker insulation layer, for example an oxide layer, is arranged here.The device may alternatively or additionally include the features to further reduce parasitic capacitance, such as a local lattice structure or patterning of SiO 2 and poly-Si / Si, see layers 44 and 16 in FIG. 2 Alternatively or additionally, a thicker oxide layer of, for example, more than 1.1 μm or 1.5 μm may be disposed between the substrate and the poly-Si, see layer 44 4 in FIG. 2 Metal layers may be used as electrodes instead of poly-Si. Alternatively or additionally, an electrical contact or short circuit may be disposed between the fin, layer 14, and poly-Si, layer 16, in the passive bonding frame.For example, an increase in the oxide layer in the periphery from 100 nm to 1 μm results in a 10-fold decrease in the capacitance C (C=A / d) with A of the electrode surface and d in the distance between the electrodes.Embodiments of the present invention may include some or all of the following features. A MEMS loudspeaker with an air gap of 100 nm between actuator and poly-Si electrodes and in the periphery can typically be configured such that an SiO 2- layer of 200 nm to 1 μm or larger is arranged in the region of the periphery and this layer is thicker than the gap in the active region. Alternatively or additionally, a local lattice structure in at least one region of the periphery is made of SiO 2 and poly-Si / Si. Alternatively or additionally, an oxide layer of at least 1.1 μm or at least 1.5 μm is typically present between the substrate and poly-Si. Optionally, a metal layer is typically used instead of poly-Si. Alternatively, an epi layer of at least 80 nm, 90 nm or 100 nm arranged in the region of the periphery is characteristic. Alternatively or additionally, bonding is characteristic only outside the electrical periphery.Although some aspects have been described in connection with a device, it is understood that these aspects also represent a description of the corresponding method, so that a block or a component of a device is also to be understood as a corresponding method step or as a feature of a method step. Analogously, aspects described in connection with or as a method step also represent a description of a corresponding block or detail or feature of a corresponding device.The above-described embodiments are merely illustrative of the principles of the present invention. It is to be understood that modifications and variations of the arrangements and details described herein will be apparent to others skilled in the art. Therefore, it is intended that the invention be limited only by the scope of the following claims and not by the specific details presented herein by way of description and explanation of the embodiments.References included in the specificationThis list of documents cited by the applicant has been produced in an automated manner and is only included for the better information of the reader. The list is not part of the German patent application or utility model application. The DPMA does not take any adhesion for any faults or omissions.Patent Literature citedWO 2022 / 117197 A1 [0003, 0035, 0051, 0076]

Claims

A MEMS component comprising: a layer stack (12) having a plurality of MEMS layers arranged along a layer sequence direction (24); a movable element (22) formed in a first MEMS layer (14); which is arranged between a second MEMS layer (16) and a third MEMS layer (18) of the layer stack (12), a drive device (26), which has a drive structure (28) mechanically fixedly connected to the second MEMS layer (16) and is configured to generate a force for deflecting the movable element (22) in a working region (32) of the MEMS component; a peripheral region (34) which at least partially surrounds the working region (32), which has at least part of an electrical contacting of the drive device (26) and in which the first MEMS layer (14) is mechanically connected to the second MEMS layer (16); wherein a capacitance reduction (38) is arranged in the peripheral region (34), which is designed to reduce a parasitic capacitance in the peripheral region (34) compared to the working region (32).The MEMS device of claim 1, wherein the capacitance reduction (38) comprises a dielectric layer (44 1) in the peripheral region (34) and between the first MEMS layer (14) and the second MEMS layer (16), wherein the dielectric layer (44 1) has a layer thickness (62) along the layer sequence direction (24) that is greater than a gap thickness (64) of a gap between the movable element (22) and the drive structure (28) along the layer sequence direction (24) in the working region (32).The MEMS device according to claim 2, wherein the gap thickness (64) has at most 1000 nm and wherein the layer thickness (62) of the dielectric layer (44 1) has at least 1000 nm; or wherein the gap thickness (64) has at most 500 nm and wherein the layer thickness (62) of the dielectric layer (44 1) has at least 500 nm; or wherein the gap thickness (64) has at most 150 nm and wherein the layer thickness (62) of the dielectric layer (44 1) has at least 150 nm.MEMS component according to one of the preceding claims, wherein the capacitance reduction (38) comprises a local structuring (68) of electrically conductive material of the first MEMS layer (14) and / or a local structuring (68) of a material of the second MEMS layer (16) in the peripheral region (34).The MEMS component according to claim 4, which is configured for at least three different electrical potentials in the peripheral region (34).The MEMS device according to claim 4 or 5, wherein the structured material comprises a continuous region which is regularly or irregularly perforated by means of the local structuring.The MEMS device according to one of the preceding claims, wherein the capacitance reduction (38) comprises a low-resistance electrical connection (82) between the first MEMS layer (14) and the second MEMS layer (16) in the peripheral region (34).The MEMS device according to claim 7, which is configured for a potential difference between the first MEMS layer (14) and the second MEMS layer (16) in the working region (32).The MEMS device according to claim 7 or 8, wherein the low-ohmic electrical connection is provided via a semiconductor layer (74) epitaxially grown on the first MEMS layer (14) and / or the second MEMS layer (16); or wherein the low-ohmic electrical connection is provided via a semiconductor layer remaining from an etching process.The MEMS device according to claim 9, wherein the semiconductor layer (74) has a layer thickness along the layer sequence direction (24) of at least 80 nm.The MEMS device according to claim 9 or 10, wherein a gap (64) between the movable element (22) and the drive structure (28) along the layer sequence direction (24) is at least partially defined via a recess of semiconductor material arranged in the peripheral region (34).MEMS component according to one of the preceding claims, in which electrodes of the drive structure (28) are formed as metallic electrodes.MEMS component according to one of the preceding claims, in which a bond between the first MEMS layer (14) and the second MEMS layer (16) is arranged in a region (86) facing away from the working region (32) and enclosing a region of an electrical periphery to an extent of at least 90% of the bond.MEMS component according to one of the preceding claims, wherein the drive device (26) is configured to generate a drive force on the movable element (22), and the drive force is configured to deflect the movable element (22) perpendicular to the layer sequence direction (24).The MEMS component according to one of the preceding claims, wherein the drive device is a first drive device (26 1) and the MEMS component comprises a second drive device (26 2) which is mechanically fixedly connected to the third MEMS layer (18) and is designed to generate a force in the working region (32) of the MEMS component for deflecting the movable element (22); wherein the capacitance reduction (38) is configured between the first MEMS layer (14) and the second MEMS layer (16) on the one hand and between the first MEMS layer (14) and the third MEMS layer (18) on the other hand.The MEMS device according to any one of the preceding claims, comprising: a substrate layer arrangement connected to the second MEMS layer (16) at a side facing away from the first MEMS layer (14) by a dielectric layer (44 3) ; wherein the dielectric layer (44 3) has a layer thickness (72 1) along the layer sequence direction (24) of at least 1.1 μm.MEMS device according to one of the preceding claims, wherein the same or a further reduction in capacitance is arranged in the working region (32).A MEMS component comprising: a layer stack (12) having a plurality of MEMS layers arranged along a layer sequence direction (24); a movable element (22) formed in a first MEMS layer (14); which is arranged between a second MEMS layer (16) and a third MEMS layer (18) of the layer stack (12), a drive device (26), which has a drive structure (28) mechanically fixedly connected to the second MEMS layer (16) and is configured to generate a force for deflecting the movable element (22) in a working region (32) of the MEMS component; a peripheral region (34) which at least partially surrounds the working region (32), which has at least part of an electrical contacting of the drive device (26) and in which the first MEMS layer (14) is mechanically connected to the second MEMS layer (16); wherein a capacitance reduction (38) is arranged in the working region (32), which is designed to reduce a parasitic capacitance in the working region (32).The MEMS device of claim 18, wherein the same or a further capacitance reduction is arranged in the peripheral region (34).A MEMS component comprising: a layer stack (12) having a plurality of MEMS layers arranged along a layer sequence direction (24); a movable element (22) formed in a first MEMS layer (14); which is arranged between a second MEMS layer (16) and a third MEMS layer (18) of the layer stack (12), a drive device (26), which has a drive structure (28) mechanically fixedly connected to the second MEMS layer (16) and is configured to generate a force for deflecting the movable element (22) in a working region (32) of the MEMS component; a substrate layer arrangement which is connected to the second MEMS layer (16) on a side facing away from the first MEMS layer (14) by a dielectric layer (44 3) ; wherein the dielectric layer (44 3) has a layer thickness (72 1) along the layer sequence direction (24) of at least 1.1 μm.The MEMS component according to claim 20, comprising: a peripheral region (34), which at least partially encloses the working region (32), which has at least part of an electrical contact connection of the drive device (26) and in which one of the first MEMS layers (14) is mechanically connected to the second MEMS layer (16); wherein a capacitance reduction (38) is arranged in the peripheral region (34), which is configured to reduce a parasitic capacitance in the peripheral region (34) compared to the working region (32).MEMS loudspeaker comprising a MEMS component according to one of the preceding claims.Method (700) for providing a MEMS component, comprising the following steps: providing (710) a layer stack having a plurality of MEMS layers which are arranged along a layer sequence direction; arranging (720) a movable element in a first MEMS layer between a second MEMS layer and a third MEMS layer of the layer stack; arranging (730) a drive device, such that the drive device has a drive structure which is mechanically fixedly connected to the second MEMS layer and is designed to generate a force for deflecting the movable element in a working region of the MEMS component; so that a peripheral region is obtained which at least partially encloses the working region, which has at least part of an electrical contacting of the drive device and in which one of the first MEMS layers is mechanically connected to the second MEMS layer; arranging (740) a reduction in capacitance in the peripheral region in order to reduce a parasitic capacitance in the peripheral region compared to the working region.Method (700) for providing a MEMS component, comprising the following steps: providing (710) a layer stack having a plurality of MEMS layers which are arranged along a layer sequence direction; arranging (720) a movable element in a first MEMS layer between a second MEMS layer and a third MEMS layer of the layer stack; arranging (730) a drive device, such that the drive device has a drive structure which is mechanically fixedly connected to the second MEMS layer and is designed to generate a force for deflecting the movable element in a working region of the MEMS component; so that a peripheral region is obtained which at least partially encloses the working region, which has at least a part of an electrical contacting of the drive device and in which one of the first MEMS layers is mechanically connected to the second MEMS layer; arranging a reduction in capacitance in the working region in order to reduce a parasitic capacitance in the working region.Method (800) for providing a MEMS component, comprising the following steps: providing (810) a layer stack comprising a plurality of MEMS layers arranged along a layer sequence direction; arranging (820) a movable element in a first MEMS layer between a second MEMS layer and a third MEMS layer of the layer stack; arranging (830) a drive device, such that the drive device has a drive structure which is mechanically fixedly connected to the second MEMS layer and is designed to generate a force for deflecting the movable element in a working region of the MEMS component; arranging (840) a substrate layer arrangement, such that the substrate layer arrangement is connected to the second MEMS layer on a side remote from the first MEMS layer by a dielectric layer; such that the dielectric layer has a layer thickness along the layer sequence direction of at least 1.1 μm.

Images