INTELLIGENT AND ADAPTIVE DIVISION OF POWER ACROSS POWER DELIVERAGE CONNECTIONS

Abstract

A technology for the intelligent and adaptive sharing of power between the charging ports of a multi-port power delivery (PD) system is described. In some embodiments, a method includes monitoring the power consumption of at least one device from a plurality of devices. Each device from the plurality of devices is connected to a port from a plurality of ports, which have a system power allocation. The power consumption monitoring includes obtaining at least one current measurement of the actual power consumption by the at least one device.The procedure further includes determining whether the at least one current measurement meets a threshold condition, and, in response to determining that the at least one current measurement meets the threshold condition, causing the system power to be reassigned between each connection of the plurality of connections.

Description

CROSS-REFERENCE TO RELATED APPLICATION(S)

[0001] This application claims the benefit of U.S. Provisional Application No. 63 / 536,195, filed September 1, 2023, entitled “INTELLIGENT AND ADAPTIVE SHARING OF POWER AMONG USB TYPE-C / PD PORTS,” the entire contents of which are hereby incorporated by reference. GENERAL STATE OF THE ART

[0002] Various electronic devices (e.g., smartphones, tablets, notebooks, laptops, hubs, chargers, adapters, etc.) are configured to transfer power via Universal Serial Bus (USB) connectors according to the USB power delivery protocols defined in various versions of the USB Power Delivery Deployment Policy (USB-PD Policy). For example, in some applications, an electronic device may be configured as a power consumer to receive power through a USB connector (e.g., to charge batteries), while in other applications, an electronic device may be configured as a power provider to provide power to another device connected to it via a USB connector. However, the USB-PD Policy allows power providers and power consumers to dynamically negotiate the levels of supplied voltages (V) and currents. BRIEF DESCRIPTION OF THE CHARACTERS

[0003] The disclosure is illustrated by way of example and without limitation in the figures of the accompanying drawings. Fig. 1 illustrates a block diagram of a multi-port power delivery (PD) system with a master port and a slave port, according to some embodiments. Fig. 2A-2B together illustrate a flowchart of a method for implementing intelligent inter-port power distribution in a multi-port PD system according to some embodiments. Fig. 3 illustrates a flowchart of a method for determining the charging characteristic for adaptive power distribution according to some embodiments. Fig. 4 illustrates a schematic diagram of an example finite state machine (FSM) of a slave controller of a multi-port PD system, according to some embodiments. Fig. 5 illustrates a schematic diagram of an example finite state machine (FSM) of a master controller of a multi-port PD system, according to some embodiments. Fig. 6 illustrates a schematic diagram of an example finite state machine (FSM) of a master controller and a slave controller handling a communication error, according to some embodiments. Fig. 7A-7C are flowcharts of example methods for implementing intelligent inter-port power distribution in a multi-port PD system according to some embodiments. Fig. 8A is a block diagram of various multi-port wall adapters configured to intelligently distribute power among the ports using a firmware-based method, according to some embodiments. Fig. 8B is an illustration of a multi-port AC wall adapter configured to intelligently distribute power using a firmware-based method, according to some embodiments. Fig. 9 is a block diagram illustrating a system for a USB-enabled device according to some embodiments. DETAILED DESCRIPTION

[0004] The following description sets forth numerous specific details, such as examples of specific systems, components, methods, and so forth, in order to provide a thorough understanding of various embodiments of the techniques described herein for intelligently and adaptively sharing power among multiple power delivery ports. However, one skilled in the art will appreciate that at least some embodiments may be practiced without these specific details. In other instances, well-known components, elements, or methods are not described in detail or are presented in simple block diagram form so as not to unnecessarily obscure the techniques described herein. Therefore, the specific details set forth below are merely exemplary.Individual embodiments may vary from these exemplary details and still be considered within the spirit and scope of embodiments of the present invention.

[0005] References throughout the specification to "one embodiment," "an exemplary embodiment," "some embodiments," and "various embodiments" mean that a particular feature, structure, step, act, or characteristic described in connection with the embodiment(s) is included in some embodiments of the invention. Furthermore, the appearances of the terms "one embodiment," "an exemplary embodiment," "some embodiments," and "various embodiments" in various places in the specification do not necessarily refer to the same embodiment(s).

[0006] The description includes references to the accompanying drawings, which form a part of the detailed description. The drawings show illustrations according to exemplary embodiments. These embodiments, which may also be referred to herein as "examples," are described in sufficient detail to enable those skilled in the art to practice the embodiments of the claimed subject matter described herein. The embodiments may be combined, other embodiments may be utilized, or structural, logical, and electrical changes may be made without departing from the scope and spirit of the claimed subject matter. It should be understood that the embodiments described herein are not intended to limit the scope of the subject matter, but are intended to enable those skilled in the art to practice, make, and / or use the subject matter.

[0007] Described herein are various embodiments of techniques that enable intelligent and adaptive sharing of system power among multiple power delivery (PD) ports or multi-port controllers connected to electronic devices. In some embodiments, an electronic device is a Universal Serial Bus (USB)-enabled electronic device that uses a Universal Serial Bus (USB) connector (interface) for communication, battery charging, and / or PD. Examples of such electronic devices include, without limitation, personal computers (e.g., laptops, notebooks, etc.), mobile computing devices (e.g., tablets, tablet computers, e-reader devices, etc.), mobile communication devices (e.g., smartphones, cellular phones, personal digital assistants, messaging devices, pocket PCs, etc.), connectivity devices (e.g.,Hubs, docking stations, etc.), audio / video / data recording and / or playback devices (e.g., cameras, voice recorders, handheld scanners, monitors, etc.), and other similar electronic devices. The embodiments described herein may be used in wall-mounted power solutions with USB-PD capability. Aspects of the present disclosure may enable a power source to have a much lower capacitance, thereby reducing cost and complexity, while still efficiently utilizing the maximum charging potential of its multiple ports.

[0008] A USB-enabled electronic device or system may conform to at least one version of a USB Deployment Standard. Examples of such USB Deployment Standard include, without limitation, the USB Deployment Standard, Revision 2.0, the USB 3.0 Deployment Standard, the USB 3.1 Deployment Standard, and / or various supplements (e.g., On-The-Go or OTG), versions, and misprints thereof. The USB Deployment Standard generally defines the characteristics (e.g., attributes, protocol definition, transaction types, bus management, programming interfaces, etc.) of a differential serial bus required for the design and construction of standard communications systems and peripherals. For example, a USB-enabled peripheral connects to a USB-enabled host device through a USB port on the host device to form a USB-enabled system. A USB 2.0 Deployment Standard may be used to implement a USB-enabled system.0 port includes a 5V power line (labeled VBUS), a differential pair of data lines (labeled D+ or DP and D- or DN), and a power return ground line (labeled GND). A USB 3.0 port also provides the VBUS, D+, D-, and GND lines for backward compatibility with USB 2.0. To support a faster differential bus (the USB SuperSpeed ​​bus), a USB 3.0 port also provides a differential pair of transmitter data lines (labeled SSTX+ and SSTX-), a differential pair of receiver data lines (labeled SSRX+ and SSRX-), a power line (labeled DPWR), and a power return ground line (labeled DGND). A USB 3.1 port provides the same wires as a USB 3.0 port to ensure backward compatibility with USB 2.0 and USB 3.0 communication, but extends the performance of the SuperSpeed ​​bus with a set of features known as Enhanced SuperSpeed.

[0009] A newer USB connector technology, called USB Type-C (USB-C), is defined in various versions of the USB Type-C Deployment Guideline. The USB Type-C Deployment Guideline defines Type-C receptacles, Type-C plugs, and Type-C cables that support both USB communication and power delivery via newer USB power delivery protocols defined in various versions of the USB PD Deployment Guideline. Examples of USB-C features and requirements may include, without limitation, data and other communications as defined by USB 2.0 and USB 3.0 / 3.1, electromechanical definitions and performance requirements for Type-C cables, electromechanical definitions and performance requirements for Type-C receptacles, electromechanical definitions and performance requirements for Type-C plugs, requirements for Type-C-to-legacy cable assemblies and adapters, requirements for Type-C-based device detection and interface configuration, requirements for optimized power delivery for Type-C plugs, etc. According to the USB-C Deployment Guideline(s), a Type-C connector provides, among other things, the VBUS, D+, D-, GND, SSTX+, SSTX-, SSRX+, and SSRX- lines. In addition, a Type-C connector also provides a sideband utilization line (referred to as SBU) for signaling sideband functions and a configuration channel line (referred to as CC) for discovering, configuring, and managing connections over a Type-C cable.A Type-C connector can be associated with a Type-C plug and / or a Type-C receptacle. For ease of use, the Type-C plug and Type-C receptacle are designed as a reversible pair that operates regardless of the orientation of the plug relative to the receptacle. For example, a standard USB-C connector, arranged as a standard Type-C plug or socket, provides connections for four VBUS lines, four ground return (GND) lines, two D+ lines (DP1 and DP2), two D- lines (DN1 and DN2), two SSTX+ lines (SSTXP1 and SSTXP2), two SSTX- lines (SSTXN1 and SSTXN2), two SSRX+ lines (SSRXP1 and SSRXP2), two SSRX- lines (SSRXN1 and SSRXN2), two CC lines (CC1 and CC2), and two SBU lines (SBU1 and SBU2), among others.

[0010] Some USB-enabled electronic devices may comply with a specific revision and / or version of the USB PD Deployment Guideline. The USB PD Deployment Guideline defines a standard protocol designed to enable maximum functionality of USB-enabled devices by providing more flexible power delivery along with data communication over a single USB Type-C cable through USB Type-C connectors. The USB PD Deployment Guideline also describes the architecture, protocols, power delivery behavior, parameters, and cabling required to manage power delivery over USB Type-C cables with a power output of up to 100 W (or more, up to 240 W, in the case of an Extended Power Range or EPR). According to the USB PD Deployment Guideline, devices with USB Type-C connectors (e.g.,USB-enabled devices) over a USB Type-C cable can negotiate more power and / or higher or lower voltages than those allowed by older USB deployment guidelines (e.g., the USB 2.0 deployment guideline, the USB Battery Charging Deployment Guideline Rev. 1.1 / 1.2, etc.). For example, the USB PD deployment guideline defines the requirements for a power delivery (PD) contract that can be negotiated between a pair of USB-enabled devices. The PD contract can specify both the power level and the direction of power transfer that can be adopted by either device and can be dynamically renegotiated upon request from one of the devices and / or in response to various events and conditions, such as power role swap, data role swap, hard reset, power source failure, etc.

[0011] According to the USB PD deployment guideline, an electronic device is typically configured to supply power to another device via a power path configured on a USB VBUS line. The device supplying power is typically referred to as (or includes) a "supplier" (or power source), and the device consuming power is typically referred to as (or includes) a "consumer" (or power sink). A power supply path typically includes a power switch connected in series on the VBUS line and configured to turn the power supply on and off. In some embodiments, a USB PD power supply may be configured to draw power from a direct current (DC) power supply and may include a direct current (DC) to direct current (DC) converter.In other embodiments, a USB PD power source may be configured to draw power from an AC wall adapter or other AC source.

[0012] In some implementations of USB chargers with multiple USB ports (e.g., USB-C / PD chargers with multiple USB-C ports), power sharing solutions may be required to adjust the power budget (PB) allocated to a USB port ("port"). Using a lower-capacity power source that provides lower system power may result in failures if each port uses its full power simultaneously. Furthermore, for a given power source, it is not possible to increase the power of individual ports without increasing the system power or fuse rating. Some power sharing techniques are implemented with little or no adaptability and use techniques such as equitable sharing, first-come, first-served, and / or limiting the power available to each port.With fair sharing, each port is allocated the same amount of power, regardless of the number of devices connected or the power requirements of the connected devices. With first-come, first-served, the first load device connected is allocated power based on its power requirement, while the power requirements of subsequent load devices connected may not be met. By limiting the power available to each port (e.g., to 15 W), power cannot be redistributed to other ports. With either of these techniques, failure detection cannot be communicated between ports.Another power-sharing technique involves implementing an external controller separate from the USB-C / PD controllers paired with each port to allocate the power. However, this technique may lack a fair-sharing implementation, fail to redistribute unused power, and only allow power to be shared between two ports. Further communication failures between the external controller and the ports may not be detected.

[0013] Some power sharing implementations use a load balancing algorithm to distribute power across multiple ports based on Request Data Objects (RDOs) received from sink devices, which indicate the power requirements of each device. However, these power sharing implementations do not consider the actual power consumed by each device; instead, power sharing is calculated based on the initial RDOs, not the actual power consumed. Consequently, multiple sink devices charging at different rates can further change the power they consume without changing the originally requested RDO.For example, after a sink device has been charged, power continues to be provided based on the originally requested RDO and is not efficiently redistributed within the system, preventing a sink device connected to a different port from receiving more power and charging faster. Because sink devices can charge at different rates and constantly change the power consumed without changing the RDO, a power redistribution mechanism is required to achieve efficient power distribution in a multi-port system.

[0014] Described herein are various embodiments of techniques that enable intelligent and adaptive power sharing between connected charging ports. In some embodiments, a port is a USB port (e.g., a USB-C port). The embodiments described herein can address the above and other challenges by providing techniques to detect the actual power consumed by the connected sink devices, if any, and intelligently distribute the available system power among the various ports, regardless of the connection order.The embodiments described herein can be used to reduce form factors and can be seamlessly integrated into existing designs by defining a power-sharing master ("Master") as the sole arbiter for power delivery and one or more power-sharing slaves ("Slaves") that respond to the power-sharing master. The embodiments described herein can also facilitate runtime configuration of the master and slave roles based on system requirements, which can enable a symmetric, firmware-based approach with little to no impact on data transfer or user experience. The power-sharing ports are independent of each other, so they continue to function even if communication between the ports is lost.The embodiments described herein may further enable fair and intelligent redistribution of available system power, may be resilient to communication failures, may be scalable for systems with more than two ports, and may be compatible with a dynamic power throttling algorithm.

[0015] In some embodiments, at least one processing device detects a power demand of at least one connected sink device, if any, and intelligently allocates or distributes power to the ports connected to the at least one connected sink device. Once the system power is distributed, the at least one processing device may monitor the power consumption of the at least one connected sink device and determine whether to redistribute the system power to one and / or all of the at least one connected sink device (e.g., by increasing and / or decreasing).In some embodiments, at least one processing device is configured to detect and store the charging characteristics of a connected sink device and use the stored data from the next time to provide a better charging experience for that particular sink device, as well as to perform efficient and stable power sharing. This adaptive power distribution mechanism is particularly useful for end users who repeatedly use the same system configuration to charge the same devices, such as the same laptop, mobile phone, etc.

[0016] Fig. 1 is a block diagram of a multi-port power delivery system 100 having a master port 102 and a slave port 104, according to some embodiments. The multi-port PD system 100 may be a USB-C / PD system. A firmware-based method may enable sharing of system power between ports, such as the master port 102 and the slave port 104, of the multi-port PD system 100. The master port 102 is controlled by the master controller 112, which is a sole PD arbiter, while the slave port 104 is controlled by the slave controller 114, which is a PD responder capable of responding to commands initiated by the master controller 112. The master controller 112 is also referred to as the load sharing (LS) master controller 112, and the slave controller 114 is also referred to herein as the LS slave controller 114.The master controller 112 is configured to receive a port connection state of the slave port 104 from the slave controller 114. The master controller 112 is further configured to allocate a fair share of power to all ports. The master controller 112 and the slave controller 114 can then redistribute power based on the connected ports. In some embodiments, the master port 102 and the slave port 104 are identical.In some embodiments, the master controller 112 and the slave controller 114 are identical, except that the master controller 112 is assigned (or otherwise programmed) by the firmware-based method to operate as a master to control the slave controller 114, and the slave controller 114 is assigned (or otherwise programmed) by the firmware-based method to operate as a slave and respond to the master controller 112.

[0017] The multi-port PD system 100 has an input voltage VIN from a power source on input line 106. The power source provides system power (or total system power) to the multi-port PD system 100. The power converter 108 converts one input voltage to another voltage, which is supplied to the master port 102. The power converter 109 converts the input voltage to another voltage, which is supplied to the slave port 104. In some embodiments, the power converters 108 and 109 may reduce the input voltage VIN to a lower voltage (e.g., referred to as voltage stepping down). The serial bus line 110 couples the power converter 108 to the LS master controller 112. The serial bus line 111 couples the power converter 109 to the LS slave controller 114.In the illustrated embodiment, the power source coupled to power converter 108 and power converter 109 provides system power to be allocated between master port 102 and slave port 104. Field effect transistor (FET) 122 can be turned on or off to provide power to master port 102. LS master controller 112 provides a signal to turn FET 122 on or off. FET 124 can be turned on or off to provide power to slave port 104. LS slave controller 114 provides a signal to turn FET 124 on or off. FETs 122 and 124 are coupled to master port 102 and slave port 104 via VBUS lines 116.

[0018] In some embodiments, the power converters 108 may be linear DC-DC converters, switched DC converters, switched DC converters, rectifiers, or the like. Although in Fig. 1 as DC-DC converters, the power converters 108 can be implemented as rectifiers or other power converters. The FETs 122 and 124 can be N-channel FETs, P-channel FETs, or the like. The master port 102 and the slave port 104 can be USB Type-C ports or other power-providing or power-receiving ports, and the like.

[0019] The CB master controller 112 and the CB slave controller 114 may be configured to communicate with each other for load sharing (or power sharing) via the communication interface 118. The communication interface 118 may include a unidirectional clock line (CLK line) over which the CB master controller 112 sends a clock signal to the CB slave controller 114, a unidirectional interrupt line over which the CB slave controller 114 sends an interrupt signal to the CB master controller 112, and a bidirectional data line over which signals are sent between the CB master controller 112 and the CB slave controller 114. The communication interface 118 may be a serial communication interface such as I2C, recommended standard (RS)-232, RS-485, serial peripheral interface (SPI), local interconnect network (LIN), or the like.The role of the LS master controller 112 is to monitor the state of all port connections, including a port connection state of its own port (master port 102) and the port connection state of the slave port 104. In some embodiments, the LS slave controller 114 notifies the LS master controller 112 of the port connection state of the slave port 104. In another embodiment, the LS master controller 112 may query the LS slave controller 114 about the connection state of the slave port 104. The port connection state may indicate whether a sink device is connected to the port. When a sink device is connected to a port, the port is said to be connected. When no sink device is connected to a port, the port is said to be "detached."The LS master controller 112 may send commands to the LS slave controller 114 to update the PD of the slave port 104. In response to receiving a command from the LS master controller 112, the LS slave controller 114 initiates a PD change based on the received command. A sink device may be any device connected to or connected to a port and consuming power from the port, such as a mobile phone, a tablet, a laptop, or the like.

[0020] In some embodiments, the LS master controller 112 includes a first port 134 coupled to the master port 102 and a first set of terminals 136 coupled to the communication interface 118. The LS slave controller 114 includes a second port 138 coupled to the slave port 104 and a second set of terminals 140 coupled to the communication interface 118. The LS master controller 112 and the LS slave controller 114 are coupled and communicate via the communication interface 118.

[0021] The commands sent by the LS master controller 112 depend on the connection states of all ports of the multi-port PD system 100. The LS master controller 112 can send a first type of command when all ports of the multi-port PD system 100 are disconnected, a second type of command when one port of the multi-port PD system 100 is connected, and a third type of command when more than one port of the multi-port PD system 100 is connected.

[0022] Some embodiments that may be implemented in the multi-port PD system 100 may utilize symmetric firmware (FW) capable of dynamically identifying the LS master controller 112 and the LS slave controller 114. In these embodiments, the LS master controller 112 may be dynamically configured as the sole PD arbiter for power sharing, and the LS slave controller 114 may be dynamically configured as the responder. The LS master controller 112 is configured to detect or otherwise determine the full / total port power and redistribute the available / total system power based on the actual / current power consumption of the sink devices connected to ports 102 and 104.The power-sharing configuration of the LS master controller 112 and the LS slave controller 114 is such that it ensures no adverse impact on USB data communication during operation and does not otherwise compromise end-user convenience. Furthermore, the power-sharing configuration supports any combination of PD port and pure Type-C device operation.

[0023] In some embodiments, a firmware-based method is performed to distribute a total system power (SP) across N ports, regardless of the order in which sink devices are connected to the ports. The total system power can be distributed without leaving any portion of the total system power unallocated. It should be noted that, although in Fig. 1, two ports are shown, a multi-port PD system may have a positive integer (N) of ports, such as three, four, five, or more. Each port is capable of sourcing an individual port budget (PB) (also referred to herein as a port power). PB may be less than the total system power (SP), e.g., PB < SP. However, the total port power of all ports (N * PB) may be greater than the total system power, e.g., N * PB > SP, although the adaptive and intelligent power sharing algorithm described herein prevents the multi-port PD system from outputting higher power than SP. If all N ports are disconnected from the sink devices, each of the N ports may be allocated a fair share of power, e.g., SP / N. If a sink device is connected to a port, PB may be assigned to the connected port.A system's remaining power or unused power is the difference between the system power and the PB of the connected port (e.g., SP - PB). The remaining disconnected ports (of which there are N - 1) may be allocated a fair share of the remaining power, e.g., (SP - PB) / (N - 1), where N - 1 represents the number of remaining disconnected ports. If more than one port is connected to a corresponding sink device, each port may first be allocated SP / N, followed by redistribution of the unused power among the connected ports according to the techniques described herein. If a port selects or is allocated a lesser amount of power than SP / N, it may be referred to herein as a DOWN port. If a port selects or is allocated an SP / N amount of power, it may be referred to herein as an UP port.The down ports are assigned a lower PD, creating residual power that is redistributed to the up ports. The residual power is reallocated to the up ports using an equitable sharing model.

[0024] The LS master controller 112 may send messages to the LS slave controller 114 to determine if there is a communication failure between the LS master controller 112 and the LS slave controller 114. In some embodiments, the messages are heartbeat messages that the LS master controller 112 sends to the LS slave controller 114 at regular, predetermined intervals. In some embodiments, the regular, predetermined intervals may be a number of seconds and may be programmable. In another embodiment, the messages are heartbeat messages that the LS master controller 112 sends to the LS slave controller 114 at various times during operation of the multi-port PD system 100.In some embodiments, heartbeat messages may not occur at regular, predefined intervals, for example, in the event of intermittent communication problems between the master CB controller 112 and the slave CB controller 114, or in the event of a permanent communication failure. If the slave CB controller 114 does not receive a heartbeat message within a first threshold period, it determines that there is a communication failure between the slave CB controller 114 and the master CB controller 112. If the slave CB controller 114 receives a heartbeat message, it sends an acknowledgment or heartbeat acknowledgement to the master CB controller 112.If the LS master controller 112 does not receive a heartbeat acknowledgment within a second threshold period, it determines that a communication failure has occurred between the LS master controller 112 and the LS slave controller 114. Once a communication failure is detected, both the PB of the master port 102 and the PB of the slave port 104 are reduced to the fair share, e.g., SP / N, if their previously allocated PB was greater than the fair share.

[0025] The LS master controller 112 may determine whether a state change of the master port 102 or the slave port 104 is valid or invalid. In some embodiments, the state change may be determined as valid when a user connects / disconnects a sink device to the multi-port PD system 100, when the sink device no longer draws power, or the like. In some embodiments, the state change may be determined as invalid when the sink device has a faulty connection to the multi-port PD system 100, when the sink device malfunctions, or the like.In some embodiments, if at least one port (either the master port 102 or the slave port 104) is already connected, each subsequent port state change is considered valid if it remains unchanged or stable after a threshold period, referred to herein as tDebounce. tDebounce is a period of time over which the port state change should remain consistent to be considered valid if at least one other port is already connected. If the port connection state is not consistent for the threshold period, the port connection state change is ignored by the LS master controller 112. In some embodiments, tDebounce may be a number of milliseconds. Alternatively, tDebounce may also be a different period of time.Any power-sharing-specific PD update of the master port 102 or the slave port 104 occurs only after tDebounce has expired. This makes the multi-port PD system 100 resilient to a faulty connection or disconnection of the sink device and prevents unnecessary reallocation of power to already connected ports in such a scenario.

[0026] Although the multi-port PD system 100 in Fig. 1 with one slave port, in other embodiments, the multi-port PD system may have a different number of slave ports, such as two, three, four, or another positive integer, N ports. Although the multi-port PD system 100 in Fig. 1 as a single device, the firmware-based method for intelligent and adaptive power sharing described herein can be implemented in multiple PD devices with a common power source.

[0027] Although the multi-port PD system 100 in Fig. 1 with a master controller having an associated master port and a slave controller having an associated slave port, in other embodiments, the multi-port PD system may have only one master controller controlling all ports in the system. In such an embodiment, the master controller sends commands for distributing power between the ports directly to each respective port, rather than to a slave controller.

[0028] Fig. 2A and Fig. 2B together illustrate a flowchart of a method 200 for implementing intelligent inter-port power distribution in a multi-port PD system, according to some embodiments. In an exemplary embodiment, the method 200 is executed on a LS master controller. The method 200 may be performed by processing logic that includes hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. In some embodiments, the method 200 may be performed by any of the processing devices described herein. In some embodiments, the method 200 is performed by processing logic embodied in a master controller, such as the LS master controller 112 of Fig. 1. In some embodiments, the master controller executes a firmware-based method that performs method 200. In another embodiment, the master controller includes embedded code or logic and is configured to execute instructions to perform the illustrated operations.

[0029] The method 200 begins at point A 202, which represents a previous operating state. In the previous operating state, the master controller may monitor for a change in a port connection state. The port connection state indicates whether a port has a sink device that is connected. The change in the port connection state indicates that a sink device has been connected to or disconnected from a port. The master controller is in a "RUNNING" state after power distribution has been completed for a predetermined change in the port connection state. While monitoring the change, the master controller may determine whether a communication error or communication failure is detected (block 204).A heartbeat message may be sent from the master controller to all slave controllers at predetermined regular time intervals, tHeartBeat. If a slave controller does not receive a heartbeat message within a certain time period, tCommunicationFailure, it determines that there is a communication failure with the master controller. In some embodiments, the communication failure is caused by a failure of a serial communication interface between the master controller and the slave controller. In another embodiment, the communication failure is caused by a failure of the master controller or the slave controller. If a slave controller receives a heartbeat message within the certain time period, tCommunicationFailure, it transmits a heartbeat acknowledgment to the master controller.If the master controller does not receive a heartbeat acknowledgment from the slave controller for longer than the period of time, tCommunicationFailure, it determines that there is a communication failure with the slave controller. In some embodiments, when a communication failure is detected, the master controller sets the PB of the master port to a fair-sharing value SP / N equal to the total system power divided by the total number of ports if the PB of the master port was previously greater than the fair-sharing value, and the slave controller sets the PB of the slave port to the fair-sharing value SP / N if the PB of the slave port was previously greater than the fair-sharing value (block 206).In another embodiment, when a communication failure is detected, the master controller sets the PB of the master port to a value smaller than the fair sharing value if the PB of the master port was previously greater than the fair sharing value, and the slave controller sets the PB of the slave port to a value smaller than the fair sharing value if the PB of the slave port was previously greater than the fair sharing value.

[0030] The master controller may determine the port connection status (block 208). When the master controller determines the port connection status, the master controller is in a "DETERMINE_PORT_CONNECT_STATUS" state. When the master controller is in the "DETERMINE_PORT_CONNECT_STATUS" state, the master controller determines or ascertains the port connection status of all ports, and power allocation is subsequently determined based on the port connection status of all ports. Any change in the port status causes the master controller to change its state to "DETERMINE_PORT_CONNECT_STATUS."In some embodiments, a port state change is caused when one or more sink devices are connected to or disconnected from one of the power sharing ports, resulting in the port connection state being connected or detached, respectively. In another embodiment, a port state change is caused when one or more sink devices have a faulty connection to the port, after which the master controller performs a debouncing procedure. The master controller can determine the port connection state as one of three possibilities: that all ports are disconnected, that one port is connected, or that more than one port is connected. Once the master controller determines the port connection state, it transitions to the "DISTRIBUTE_LOAD" state.The "DISTRIBUTE_LOAD" state is a first level of power distribution (e.g., port budget distribution (PB distribution)). PB is a power amount that the master controller assigns to a port, corresponding to a maximum power amount that the port is allowed to provide to a connected sink device. In some cases, a sink device may request a power amount (a requested power or a required power) that is lower than the port's budget, or specify a higher power requirement (e.g., in the event of a capability mismatch), and the master controller reconfigures the PB assigned to each port.

[0031] In a first case, the master controller determines a port connection state where all ports are disconnected. The master controller may enter the "DISTRIBUTE_LOAD" state and assigns ALL PORTS to the variable X (block 210). ALL PORTS refers to the total number of ports, so X = N. The master controller then checks whether the state of any of the ports has changed (block 212), so that the multi-port PD system has no ports connected. If the state of a port does not change, this may indicate that the multi-port PD system was initialized with no ports connected and one PB of each port is equal to one PB of every other port. The master controller may assign power to each of the X ports, corresponding to a portion of the total system power (block 214).The portion is equal to the total system power divided by the number of ports, or SP / N. In other embodiments, the portion may correspond to a fraction of the total system power, and each portion may be a different fraction of the total system power that, in sum, equals the total system power. In other words, the total system power is allocated without, in some cases, leaving any portion of the total system power unused. In other cases, the total system power is substantially allocated. To allocate power to each of the ports, the master controller may send a signal to a slave controller corresponding to each of the ports, which may cause the slave controller to update a PB of its corresponding port. The master controller may further update the PB of its own corresponding port.To ensure that the PB of each port has been successfully updated, the master controller exits the "DISTRIBUTE_LOAD" state and enters the "WAIT_FOR_SLAVE_COMPLETE" or "WAIT_FOR_MASTER_COMPLETE" state. In the "WAIT. - FOR - SLAVE -COMPLETE, the master controller has initiated a slave PB change and must wait for the slave controller to update the PB of its corresponding slave port. The slave controller can send a message to the master controller when the operation is complete to inform the master controller of the completion. In the WAIT_FOR_MASTER_COMPLETE state, the master controller has initiated a PB change of its own master port and must wait until the operation is complete. The master controller performs a power completion check to verify that the PB of all ports has been successfully updated (block 216).Once the PB of all ports has been successfully updated and the master controller has received a message from the slave controllers, the master controller exits the "WAIT_FOR_SLAVE_COMPLETE" and "WAIT_FOR_MASTER_COMPLETE" states and re-enters the "RUNNING" state. The master controller may monitor the state of all ports to determine if there is a change (e.g., a communication failure, a port being connected, and the like) (block 218). The master controller may then repeat the process.

[0032] Returning to block 212, if the master controller is in the "DISTRIBUTE_LOAD" state, if the master controller instead determines that the state of one or more ports has changed, then this indicates that a sink device was connected to one of the ports and that the sink device has been disconnected, so the multi-port PD system no longer has a connected sink device. As described in detail below in the second case, when a sink device is connected, a power amount PB is allocated to the port to which it was connected, while the remaining ports are allocated a portion of the remaining total power equal to (SP - PB) / (N - 1) and less than PB.In other embodiments, the portion may correspond to a fraction of the remaining total system power, and each portion may be a different fraction of the total system power that, in sum, corresponds to the remaining total system power. The master controller may allocate a first fraction of the total system power, corresponding to SP / N, to each of the one or more ports in descending order of power requirements (e.g., from high PB to low PB) (block 220). This is done so that the total power allocated to all ports never exceeds the total system power SP. The master controller then exits the "DISTRIBUTE_LOAD" state and enters the "WAIT_FOR_SLAVE_COMPLETE" and "WAIT_FOR_MASTER_COMPLETE" states. The master controller may then perform a power processing completion check (similar to the power completion check of block 216) (block 222).Once the master controller determines that power processing is complete and that the PBs of the one or more ports have been successfully updated, the master controller exits the "WAIT_FOR_SLAVE_COMPLETE" and "WAIT_FOR_MASTER_COMPLETE" states and reenters the "DISTRIBUTE_LOAD" state. The master controller assigns the REMAINING PORTS corresponding to the ports for which the PBs have not yet been updated to the variable X (block 224). The master controller then performs the steps of blocks 214, 216, and 218 as described above.

[0033] In some embodiments, the master controller need not allocate the first portion SP / N of the total system power to each of the one or more ports in descending order of power requirements. For example, the master controller may allocate the first fraction to each of the one or more ports in a random order, a sequential order, or another order.

[0034] In a second case, in which the master controller determines that there is a connected port (after block 208) while in the "DETERMINE_PORT_CONNECT_STATUS" state, the master controller enters the "DISTRIBUTE_LOAD" state and allocates a second fraction of the total system power to each of the connected ports, where the second fraction is (SP - PB) / (N - 1), from high PB to low PB (block 226). The master controller then changes its state to "WAIT - FOR - SLAVE -COMPLETE" and "WAIT_FOR_MASTER_COMPLETE" and may perform a completed power processing check to ensure that the PB of each of the unconnected ports has been successfully updated (block 228). Once the master controller determines that the PB of each of the unconnected ports has been successfully updated, the master controller changes its state to "DISTRIBUTE_LOAD" and allocates a power of PB to the connected port, thereby providing the connected port with the maximum power supported by a port (block 230). The master controller may then perform a completed power processing check to ensure that the PB of the connected port has been successfully updated (block 216).Once the master controller has determined that the PB of the connected port has been successfully updated, the master port changes its state to "RUNNING" and monitors all port states to determine if there is a change (block 218).

[0035] In a third case, where the master storage device determines during the "DETERMINE_PORT_CONNECT_STATUS" state that more than one port is connected (after block 208), the master controller transitions to the "DISTRIBUTE_LOAD" state. The master controller can then allocate power to each port for equitable sharing of SP / N in order from high PB to low PB to ensure that the total allocated power never exceeds the total system power SP (block 232). The master controller changes its state to "WAIT_FOR_SLAVE_COMPLETE" and / or "WAIT_FOR_MASTER_COMPLETE" and performs a completed power processing check to ensure that the ports' PB has been successfully updated (block 234). The master controller then changes its state to "REDISTRIBUTE_UNUSED_LOAD" and performs a power redistribution procedure at point B 236.

[0036] In both the second and third cases, before changing its state from "DETERMINE_PORT_CONNECT_STATUS" (block 208) to "DISTRIBUTE_LOAD" (blocks 226 and 232), the master controller waits for a threshold period, tDebounce, before beginning to reallocate power. tDebounce is a time parameter that defines a duration during which a port state change should remain consistent to be considered valid if at least one port is already connected. If at least one port is already connected, each subsequent port state change can be considered valid if it is consistent for the threshold time tDebounce. The PB updates specific to power sharing can occur when the state change is considered valid.This makes the system resilient to a faulty connection or disconnection to / from a sink device port, preventing unnecessary reassignment of power to already connected ports in such a scenario. The master control device can apply the threshold time tDebounce to check whether a port state change is valid before assigning or reassigning power, since ports can be connected or detached at any time during operation.

[0037] The method beginning with point B 236 can be implemented when the master controller determines that there is more than one connected terminal and that the power output should be redistributed between the connected terminals. When implementing the dynamic and intelligent power sharing method, the master controller enters various operating states.

[0038] In block 238, the master controller changes its state to "REDISTRIBUTE_UNUSED_LOAD." When a sink device is connected or plugged into a port, a port connection state of the port is appended, and the sink device requests a power amount, RP, from the port. The requested power amount or requested power can be configured to be a selected power data object (PDO) voltage multiplied by a PDO current, or a selected PDO voltage multiplied by a requested data object (RDO) current. If no sink device is connected to a port (e.g., if the port is detached), the requested power of the corresponding port is zero. The master controller can define an initial number of DOWN devices as zero and an initial number of UP devices as zero (block 238).An UP port is a port whose requested power is greater than or equal to the threshold. In some embodiments, the threshold is SP / N. In another embodiment, the threshold may be chosen as (SP / N) - 1 to avoid decimal conversion problems. The master controller compares the RP of each port to the threshold (block 240) and counts the number of UP ports and the number of DOWN ports (blocks 242-246). In the "REDISTRIBUTE_UNUSED_LOAD" state, the master controller attempts to redistribute the remaining or unused power load of the DOWN ports to the UP ports, if any. After the master controller counts the number of UP ports and the number of DOWN ports, the master controller may check whether the number of UP ports is either zero or the total number of ports, N (block 248).If there are no ports requested to deliver power greater than or equal to the threshold, the master controller does not need to redistribute power among the ports, and each port retains a fair share of SP / N power. If all ports are requested to deliver power greater than or equal to the threshold, there is no unused power load for the master controller to redistribute. If the number of UP ports is zero or N, the master controller does not need to or cannot redistribute power and changes its state to "RUNNING" and continues checking for port state changes (block 250).

[0039] If the number of UP ports is not equal to 0 or N, the master controller remains in the "REDISTRIBUTE_UNUSED_LOAD" state and continues to decrease the power allocated to the DOWN ports and then increase the power allocated to the UP ports. The master controller calculates a first value SP / N - DOWN(RP) for each DOWN port and sums each of the first values ​​to obtain PDOWN(TOTAL) (block 252). The master controller calculates a second value PUP(TOTAL) = (PB - SP / N) * UP(COUNT) for all UP ports (block 254). The master controller calculates a third value, which is the minimum of the first value and the second value: REDISTRIBUTE_POWER = MIN(PDOWN(TOTAL), PUP(TOTAL)) (block 256). The master controller then decrements each PB of the DOWN port by allocating a power of MAX((SP - REDISTRIBUTE_POWER) / N, RP) (Block 258), where RP is the requested power of the respective DOWN terminal. The master control device then goes into the "WAIT" state. - FOR - SLAVE - COMPLETE" or "WAIT_FOR_MASTER_COMPLETE" to ensure that the PB values ​​for all DOWN ports have been successfully updated (Block 260).

[0040] Once the PB values ​​for all DOWN ports have been successfully updated, the master controller returns to the "REDISTRIBUTE_UNUSED_LOAD" state. The master controller increments each PB of the UP port by assigning a power of (SP + REDISTRIBUTE_POWER) / N to each UP port (block 262). The master controller then enters the "WAIT" state. - FOR - SLAVE -COMPLETE" or "WAIT_FOR_MASTER_COMPLETE" to ensure that the PB values ​​for all UP ports have been successfully updated (block 264). The master controller then changes its state to "RUNNING" and checks for port state changes (block 266).

[0041] Fig. 3 illustrates a flowchart of a method 300 for determining the charging characteristic for adaptive power distribution, according to some embodiments. In some embodiments, the method 300 is executed on a LS master controller. The method 300 may be performed by processing logic that includes hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. In some embodiments, the method 300 may be performed by any of the processing devices described herein. In some embodiments, the method 300 is performed by processing logic embodied in a master controller, such as the LS master controller 112 of Fig. 1. In some embodiments, the master controller executes a firmware-based method that performs method 300. In some embodiments, the master controller includes embedded code or logic and is configured to execute instructions to perform the illustrated operations.

[0042] At operation 310, processing logic determines whether a device is connected. If not, the process returns to operation 310. At operation 320, if it is determined that a device is connected, the processing logic determines whether the device is a known device. A known device refers to a device that was previously determined to be connected.

[0043] At operation 330, if the device is determined to be a known device, the processing logic retrieves a charge table associated with the device. In some embodiments, retrieving the charge table includes retrieving the charge table from the flash memory corresponding to the device. At operation 340, the processing logic obtains a battery charge level from the device. At operation 350, the processing logic causes power to be provided to a port based on the battery charge level and the charge table.

[0044] If, at operation 360, it is determined that the device is an unknown device (e.g., a device that has not been determined to have been previously connected), the processing logic stores a charging pattern associated with the device. In some embodiments, the charging pattern is stored in flash corresponding to the device. At operation 370, the processing logic causes power to be provided to a port using a load balancing algorithm.

[0045] Fig. 4 is a schematic diagram of an FSM 400 of a slave controller of a multi-port PD system, according to some embodiments. The FSM 400 may correspond to operations performed by processing logic that includes hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. The FSM 400 may correspond to operations performed by any of the processing devices described herein. In some embodiments, the FSM 400 corresponds to operations performed by the processing logic of a slave controller, such as the slave LS controller 114 of Fig. 1. In some embodiments, the slave controller executes a firmware-based method that performs operations associated with the following states. In another embodiment, the slave controller includes embedded code or logic and is configured to execute instructions to perform the illustrated operations.

[0046] The task of the slave controller is to detect a power change (e.g., PB change) of a slave terminal associated with the slave controller in response to receiving a command from a master controller, such as the LS master controller 112 of Fig. 1, and inform the master controller of the slave port's status. The slave controller informs the master controller of the slave port's connection status (e.g., whether the slave port is connected to a sink device or not) and notifies the master controller when the slave port's power change is successfully completed. The slave controller receives periodic heartbeat messages from the master controller at regular intervals (tHeartBeat) to check for communication failures. The slave controller transmits heartbeat acknowledgment messages to the master controller to confirm receipt of the heartbeat message. A communication failure may occur if the slave controller has not received a heartbeat message within a certain threshold time period (tCommunicationFailure).In the event of a communication failure with the master controller, the slave controller can perform any necessary PB reduction. In some embodiments, the PB of the slave port is greater than the fair-sharing value SP / N at the time of the communication failure, and the slave controller performs the necessary PB reduction by updating the PB of the slave port to the fair-sharing value. In another embodiment, the PB of the slave port is less than or equal to the fair-sharing value SP / N at the time of the communication failure, and the slave controller performs the required PB reduction by taking no action.

[0047] During operation of the multi-port PD system, the slave controller operates in various states. Initially, when the multi-port PD system is started, the slave controller is in a "WAIT_FOR_ATTACH" state (block 402). The slave controller remains in the "WAIT_FOR_ATTACH" state if the slave port is not connected. In the "WAIT_FOR_ATTACH" state, the slave controller can receive a command from the master controller to trigger a power change of the slave port. The slave controller enters a "WAIT" state. - FOR - LOAD - CHANGE -COMPLETE" state (block 404) while updating the slave port's power and the power change is in progress. The slave controller exits the "WAIT_FOR_LOAD_CHANGE_COMPLETE" state when it sends a message to the master controller that the slave port's power change is complete and successful. When the power change is complete, the slave controller returns to the "WAIT_FOR_ATTACH" state.

[0048] If a sink device is connected to the slave port, the slave port is connected, and the slave controller enters a "RUN" state (block 406) in which power is provided to the sink device. The slave controller remains in the "RUN" state when connected and when no power change is in progress. While in the "RUN" state, the slave controller can receive a command from the master controller to initiate a power change of the slave port when the energized current or RDO voltage changes. The slave controller enters the "WAIT" state. - FOR - LOAD - CHANGE -COMPLETE" state while updating the slave port's power and the power change is in progress. The slave controller exits the "WAIT_FOR_LOAD_CHANGE_COMPLETE" state when it sends a message to the master controller that the slave port's power change is complete and successful. When the power change is complete, the slave controller returns to the "RUNNING" state. When the sink device disconnects from the slave port, the slave port is detached, and the slave controller returns to the "WAIT_FOR_ATTACH" state.

[0049] Fig. 5 is a schematic diagram of an FSM 500 of a master controller of a multi-port PD system according to some embodiments. The FSM 500 may correspond to operations performed by processing logic that includes hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. The FSM 500B may correspond to operations performed by any of the processing devices described herein. In some embodiments, the FSM 500 corresponds to operations performed by the processing logic of a master controller, such as the master LS controller 112 of Fig. 1. In some embodiments, the master controller executes a firmware-based method that performs the operations associated with the following states. In some embodiments, the master controller includes embedded code or logic and is configured to execute instructions to perform the operations associated with the following states. The master controller may include the LS master controller 112 of Fig. 1 and the multi-port PD system can be the multi-port PD system 100 of Fig. 1.

[0050] In accordance with the techniques described herein, in some embodiments, the role of the master controller is to track the connection state of each port (including slave ports and a master port) and distribute system power based on the actual / current power consumed by the respective sink devices connected to each port. The master controller corresponds to the master port, and the master controller determines a port connection state and the current power consumption of the master port. The master controller may determine a port connection state and the actual power consumption of the slave ports by receiving a message from the corresponding slave controllers.The master controller sends commands to the slave controllers to update the PBs of the corresponding slave ports according to the techniques described herein. The master controller receives notifications or indications from the slave controllers when the corresponding PBs have been successfully updated. The master controller can update a PB of the master port when needed. The master controller can send periodic heartbeat messages to the slave controller at predefined intervals to monitor for communication failures.

[0051] A communication failure with a slave controller may occur if the master controller has not received a heartbeat acknowledgment from the slave controller within a certain threshold time period (tCommunicationFailure). In the event of a communication failure with the slave controller, the master controller may perform any necessary PB reduction. In some embodiments, the PB of the master port is greater than the fair-sharing value SP / N at the time of the communication failure, and the master controller performs a PB reduction by updating the PB of the master port to the fair-sharing value. The PB budget of the master port is less than or equal to the fair-sharing value SP / N, and the master controller performs a PB reduction by taking no action.

[0052] In some embodiments, the master controller may determine that power is reallocated between ports when a sink device is connected to or disconnected from a port, causing the port to be connected or detached, respectively. In some cases, such as when the sink device is faulty or the connection to a port is lost, the port's connection state may change rapidly. If the port connection state changes within the debounce time, tDebounce, the master controller considers it invalid. The threshold debounce time is a time parameter over which the port connection state change should remain consistent to be considered valid if at least one other port is already connected.

[0053] During operation of the multi-port PD system, the master controller operates in various states. Initially, when the multi-port PD system is started, the master controller is in a "DETERMINE_PORT_CONNECT_STATUS" state (block 502). In the "DETERMINE_PORT_CONNECT_STATUS" state, the master controller determines the port connection state of each port, including the master port and the slave port, as described in block 208 of Fig. 2A. The master control device determines based on the terminal connection state, as described with reference to Fig. 2A-2B describe how power should be allocated among the terminals.

[0054] Once the port connection status of each port is known, the master controller transitions to the "DISTRIBUTE_LOAD" state (block 504). The "DISTRIBUTE_LOAD" state is a first level of PB distribution. If no ports are connected, the master controller allocates power to each port to fairly share SP / N. If there is one connected port, the master controller allocates a PB of (SP - PB) / (N - 1) to each unconnected port and allocates power of PB to the one connected port.

[0055] In the "DISTRIBUTE_LOAD" state, the master controller may initiate a power change (e.g., PB change). In some embodiments, the power change is a power decrease event. In some embodiments, the power change is a power increase event. After triggering the power change, the master controller may enter the "WAIT" state. - FOR - LOAD - CHANGE - COMPLETE" (block 506). When the power change is complete, the master controller may return to the "DISTRIBUTE_LOAD" state.

[0056] When power allocation (e.g., load balancing) for the last determined port connection state is complete, the master controller may transition to the "RUNNING" state (block 508). The master controller is in the "RUNNING" state after power allocation for the last determined port connection state is complete for each port. Any port connection state change that differs from the last determined state or change request (e.g., asynchronous change) may trigger the master controller to transition to the "DETERMINE_PORT_CONNECTION_STATUS" state. Furthermore, any port debounce failure may trigger the master controller to transition to the "DETERMINE_PORT_CONNECTION_STATUS" state. In some embodiments, the master controller spends most of its time in the "RUNNING" state (compared to the other states).

[0057] If there are multiple attached ports, the master controller may increase or decrease the current carrying current by a current carrying current threshold ("Threshold") and enter the "REDISTRIBUTE_UNUSED_LOAD" state (block 510). In the "REDISTRIBUTE_UNUSED_LOAD" state, the master controller attempts to redistribute power from ports that are not connected or from ports connected to sink devices with low power requirements (DOWN ports) to ports connected to sink devices with high power requirements (UP ports). Increasing or decreasing the current carrying current may cause the master controller to enter the "WAIT" state. - FOR - LOAD - CHANGE -COMPLETE". When the power changes for all ports are completed, the master controller returns to the "REDISTRIBUTE_UNUSED_LOAD" state. When the power reallocation (e.g., load balancing) for the last determined port connection state is completed, the master controller transitions to the "RUNNING" state. The master controller may transition to the "RUNNING" state after the power distribution for the last determined port state is completed for each port. Further details regarding the operations described with respect to the FSMs 400 and 500 are described below with reference to Fig. 7B.

[0058] Fig. 6 is a schematic diagram of an FSM 600 of a master controller and a slave controller handling a communication error, according to some embodiments. The FSM 600 may correspond to operations performed by processing logic that includes hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. The FSM 600 may correspond to operations performed by any of the processing devices described herein. In some embodiments, the FSM 600 is performed by processing logic from a control device, such as the master LS controller 112 of Fig. 1. In some embodiments, the FSM 600 is performed by processing logic of a controller, such as the slave LS controller 114 of Fig. 1. In some embodiments, the controller executes a firmware-based method that performs operations associated with the following states. In another embodiment, the controller includes embedded code or logic and is configured to execute instructions to perform the operations associated with the following states.

[0059] A communication failure can occur at any time and in any state between a master controller and a slave controller. The master controller sends periodic heartbeat messages to the slave controllers at predefined intervals (tHeartBeat) to monitor them for communication failures. The slave controller receives the heartbeat messages and can transmit heartbeat acknowledgment messages to the master controller to confirm receipt of the heartbeat message. A communication failure between the slave controller and the master controller can occur if the slave controller has not received a heartbeat message from the master controller and the master controller has not received a heartbeat acknowledgment from the slave controller within a certain threshold time period (tCommunicationFailure).In case of communication failure between the master controller and the slave controller, the master controller and the slave controller can perform any required PB reduction.

[0060] If the PB of the master port is greater than the fair share value SP / N at the time of the communication failure, the master controller can perform PB reduction by updating the PB of the master port to the fair share value. If the PB of the master port is less than or equal to the fair share value SP / N at the time of the communication failure, the slave controller performs PB reduction by taking no action. The master controller enters the "WAIT_FOR_MASTER_COMPLETE" state (block 602) while the PB reduction takes place and returns to its previous state when the PB reduction is complete.

[0061] If the PB of the slave port is greater than the fair-sharing value SP / N at the time of the communication failure, the slave controller can perform PB reduction by updating the PB of the slave port to the fair-sharing value. If the PB of the slave port is less than or equal to the fair-sharing value SP / N at the time of the communication failure, the slave controller can perform PB reduction by taking no action. The slave controller enters the "WAIT" state. - FOR - LOAD - CHANGE - COMPLETE" (Block 604) while the PB reduction is taking place and returns to its previous state when the PB reduction is complete.

[0062] Fig. 7A is a flowchart of a method 700 for implementing intelligent inter-port power distribution in a multi-port PD system, according to some embodiments. The method 700A may be performed by processing logic that includes hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. In some embodiments, the method 700A may be performed by any of the processing devices described herein. In some embodiments, the method 700 is performed by processing logic from a control device, such as the master LS controller 112 of Fig. 1. In some embodiments, method 700A is performed by processing logic of a controller, such as the slave LS controller 114 of Fig. 1. In some embodiments, the controller executes a firmware-based method that performs the following operations. In some embodiments, the controller includes embedded code or logic and is configured to execute instructions to perform the following operations. In some embodiments, the operations of method 700A may be distributed between the master controller and the slave controller.

[0063] At operation 710, the processing logic identifies a system power between each port of a plurality of ports in a multi-port PD system. In some embodiments, identifying the system power includes dynamically allocating the system power. An example implementation of dynamically allocating the system power is described above with reference to Fig. 1-6 and is described in more detail below with reference to Fig. 7B.

[0064] At operation 720, the processing logic updates the system power allocation based on power consumption. An example implementation of updating the system power allocation based on power consumption is described above with reference to Fig. 1-6 and is described in more detail below with reference to Fig. 7C described.

[0065] Fig. 7B is a flowchart of a method 710 for dynamically allocating system power between each port of a plurality of ports in a multi-port PD system, according to some embodiments. The method 710 may be performed by processing logic including hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. In some embodiments, the method 710 may be performed by any of the processing devices described herein. In some embodiments, the method 710 is performed by processing logic from a controller, such as the master LS controller 112 of Fig. 1. In some embodiments, the method 710 is performed by the processing logic of a controller such as the LS slave controller 114 of Fig. 1. In some embodiments, the controller executes a firmware-based method that performs the following operations. In some embodiments, the controller includes embedded code or logic and is configured to execute instructions to perform the following operations. In some embodiments, the operations of method 710 may be distributed between the master controller and the slave controller.

[0066] At operation 712, the processing logic determines a port connection state of each port of a plurality of ports, the port connection state indicating a number of devices connected to the plurality of ports. The plurality of ports may be included in a multi-port PD system. In some embodiments, each port of the plurality of ports is a USB-C / PD port.

[0067] In operation 714, the processing logic determines a power requirement of each device of the plurality of devices.

[0068] At operation 716, the processing logic dynamically allocates system power between each port of the plurality of ports. The system power may be allocated independently of a connection order of the plurality of devices.

[0069] In some embodiments, the processing logic for dynamically allocating system power determines an order for the devices. The processing logic assigns a fraction of the system power to each port of the plurality of ports in the order. The fraction is equal to the system power divided by a number of USB-C / PD ports. After allocating the fraction to each port of the plurality of ports, the processing logic may determine an amount of unused system power. The processing logic may redistribute the unused amount of power to at least one port of the plurality of ports.In some embodiments, the processing logic redistributes the unused amount of power to each port of the plurality of ports connected to a respective device whose power request (or requested power or current-carrying power consumption) is greater than the fraction.

[0070] In some embodiments, the order is a descending order of the power requirements for the devices. In other embodiments, the order may be a random order of the devices, an order in which the devices were connected, or some other order.

[0071] In some embodiments, the processing logic to determine the power requirement of each of the devices determines a first power requirement of a first device connected to a first port of the plurality of ports and a second power requirement of a second device connected to a second port of the plurality of ports. In some embodiments, the processing logic determines that the second power requirement is less than the first power requirement. The processing logic may allocate half of the system power to the first port and half of the system power to the second port. The processing logic may determine a remaining power amount as a difference between half of the system power and the second power requirement and allocates the remaining power amount to the first port in addition to half of the system power already allocated to the first port.In some embodiments, the processing logic allocates a fraction of the remaining power amount to the first port and the second port.

[0072] In some embodiments, the processing logic determines a change in the port connection state of one or more ports of the plurality of ports. In some embodiments, the change in the port connection state indicates that no devices are connected to any port of the plurality of ports. In some embodiments, the processing logic is initialized with no devices connected to any port of the plurality of ports, and the processing logic allocates a portion of the system power to each port of the plurality of ports in response to the change in the port connection state. In some embodiments, the portion of the system power is equal to the system power divided by a number of ports of the plurality of ports.Alternatively, a portion of the system power may be equal to a fraction of the total system power, and each portion of the system power may be a different fraction of the total system power that, in sum, equals the total system power. In some embodiments, the change in port connection state indicates that a device that was connected to a port has been disconnected, and that no devices are connected to any port of the plurality of ports. The processing logic may assign the portion of the system power to each port of the plurality of ports in order from the ports with the highest PB to the ports with the lowest PB in response to the change in port connection state.

[0073] In some embodiments, the change in port connection state indicates that only a first device is connected to a first port of the plurality of ports. The processing logic allocates an amount of system power to the first port. In some embodiments, the amount corresponds to a first power request of the first device. In another embodiment, the amount may be greater than the first power request of the first device. In another embodiment, the amount may be less than the first power request of the first device but greater than a fair share fraction, where the fair share fraction is equal to the system power divided by the number of ports of the plurality of ports. The processing logic may determine a remaining power equal to the difference between the system power and the amount of power (allocated to the first port).The processing logic may, in response to the change in port connection state, allocate to each of the unconnected ports a fraction of the residual power equal to the residual power divided by the number of unconnected ports. Alternatively, the processing logic may allocate a portion of the residual power. The portion may correspond to a fraction of the residual power, and each portion may be a different fraction of the total system power that, in sum, equals the residual power. The processing logic allocates the fraction of the residual power to each port of the plurality of ports in order from the ports with the highest PB to the ports with the lowest PB, in response to the change in port connection state.

[0074] In some embodiments, the change in port connection state indicates that a subset of devices of the plurality of devices is connected to a subset of ports of the plurality of ports. The subset of devices may include more than one device. The processing logic may determine an ordering for the subset of devices. The processing logic may allocate to each port of the subset of ports in the ordering a fraction of the system power equal to the system power divided by a number of ports of the subset of ports. Alternatively, the processing logic may allocate a portion of the system power. The portion may correspond to a fraction of the system power, and each portion may be a different fraction of the system power that, in sum, equals the remaining power.The processing logic determines an amount of unused power of the system power after the fraction has been allocated to each port of the subset of ports. The processing logic may redistribute the amount of unused power to at least one port of the subset of ports. In some embodiments, the order is a descending order of power requirements for the subset of devices. In some embodiments, the order may be a random order of the subset of devices, an order in which the subset of devices were connected, or another order.

[0075] In some embodiments, the processing logic determines whether the change in the port connection state is valid. The processing logic may determine whether the change in the port connection state remains consistent over a specific period of time. If the change in the port connection state does not remain constant during the specified period of time, the processing logic may ignore the change in the port connection state. If the port connection state remains consistent during the specified period of time, the processing logic may reallocate system power between each of the USB-C / PD ports.

[0076] In some embodiments, processing logic detects a communication error between a first controller and a second controller. In some embodiments, the processing logic is the processing logic of the first controller. In some embodiments, the processing logic is the processing logic of the second controller. The processing logic may perform PB reduction in response to detecting the communication error. The processing logic performs the PB reduction by allocating a fraction of the system power to a subset of ports of the plurality of ports. The fraction may be equal to the system power divided by a number of ports of the plurality of ports or the number of ports of the subset of ports. In some embodiments, the processing logic assigns the fraction to each port of the plurality of ports.In some embodiments, the processing logic assigns the fraction to the first and second controllers. In some embodiments, the processing logic assigns the fraction to the first controller if the first controller previously had a power allocation greater than the fraction, and the processing logic assigns the fraction to the second controller if the second controller previously had a power allocation greater than the fraction.

[0077] In some embodiments, the processing logic determines a load balancing role of a control device coupled to a first port of the plurality of ports. The load balancing role can be either master or slave. In some embodiments, the processing logic determines the load balancing role of the control device as the master. The processing logic can query one or more slaves via a communication interface and initiate a finite-state master machine. Each of the slaves can be an additional control device coupled to a respective port of the plurality of ports. In some embodiments, the processing logic determines the load balancing role of the control device as the slave. The processing logic can register the control device with the master via the communication interface to receive master commands.The master may be a second control device coupled to a second terminal of the plurality of terminals.

[0078] In some embodiments, when the load balancing role of the control device is slave, the processing logic determines whether a master command has been received from the master. The master command may be at least one of the following commands: a first command that sets a PB for a first port coupled to the control device, a second command that starts or stops heartbeat signaling between the slave and the master over the communication interface, or a third command that provides the master with a port connection state of the first port. The processing logic may determine whether a communication error has occurred between the master and the slave over the communication interface.If the processing logic determines that a communication error has occurred between the master and the slave via the communication interface, the processing logic can adjust a slave PB for the first port to a fair-sharing allocation if the slave PB is larger than the fair-sharing allocation. If the slave PB is smaller than the fair-sharing allocation, the processing logic may not adjust the slave PB. The processing logic can monitor for a change in the port connection state of the first port, and if the processing logic detects a change in the port connection state of the first port, the processing logic can report the change to the master via the communication interface.

[0079] In some embodiments, when the load balancing role of the control device is master, the processing logic determines whether a communication error has occurred between the master and the slave over the communication interface. If the processing logic determines that a communication error has occurred, the processing logic may adjust a master PB for a first port coupled to the control device to a fair share allocation if the master PB is larger than the fair share allocation. If the master PB is smaller than the fair share allocation, the processing logic may not adjust the master PB. In some embodiments, the processing logic determines a port connection state of each port of the plurality of ports as an indication that more than one port of the plurality of ports is connected to a number of devices.The processing logic may determine an ordering of power requirements for the number of devices and allocate a first fraction (or a first portion) of the system power to each port of the plurality of ports in the ordering. The first fraction may be equal to the system power divided by a number of ports of the plurality of ports. The processing logic may redistribute an amount of unused power of the system power to one or more ports of the plurality of ports after allocating the first fraction to each port of the plurality of ports, wherein the one or more ports of the plurality of ports are each coupled to one or more devices having a power requirement greater than the first fraction. The ordering may be a descending ordering of power requirements for the devices.Alternatively, the order may be a random order of the devices, an order in which the devices were connected, or some other order.

[0080] In some embodiments, the processing logic determines the port connection state of each port of the plurality of ports as an indication that only a first port is connected to a first device. The processing logic may allocate an amount of system power to the first port. In some embodiments, the amount corresponds to a first power requirement of the first device. In some embodiments, the amount is greater than the first power requirement of the first device. In some embodiments, the amount is less than the first power requirement of the first device but greater than a fair-sharing fraction equal to the system power divided by a number of ports of the plurality of ports.The processing logic may determine an ordering of the PBs for the number of ports and assign a second fraction (or second portion) of a remaining power to a remaining number of ports of the plurality of ports in the ordering. The remaining power may be determined as the difference between the system power and the first power requirement. The second fraction may equal the remaining power divided by the remaining number of ports. The ordering may be a descending order of the power requirements for the devices. Alternatively, the ordering may be a random ordering of the devices, an order in which the devices were connected, or another ordering.

[0081] In some embodiments, the processing logic may determine the port connection state of each port of the plurality of ports to indicate that no devices are connected to any port of the plurality of ports. The processing logic may determine an ordering of the PBs for the plurality of ports and assign a first fraction of the system power to each port of the plurality of ports in the ordering. The first fraction is equal to the system power divided by a number of ports of the plurality of ports. The ordering may be a descending order of power requirements for the devices. Alternatively, the ordering may be a random ordering of the devices, an order in which the devices were connected, or another ordering.

[0082] Fig. 7C is a flowchart of a method 720 for updating the allocation of system power based on power consumption, according to some embodiments. The method 720 may be performed by processing logic that includes hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. In some embodiments, the method 720 may be performed by any of the processing devices described herein. In some embodiments, the method 720 is performed by processing logic from a controller, such as the master LS controller 112 of Fig. 1. In some embodiments, the method 720 is performed by the processing logic of a controller such as the LS slave controller 114 of Fig. 1. In some embodiments, the controller executes a firmware-based method that performs the following operations. In some embodiments, the controller includes embedded code or logic and is configured to execute instructions to perform the following operations. In some embodiments, the operations of method 720 may be distributed between the master controller and the slave controller.

[0083] At operation 722, the processing logic monitors the power consumption of at least one device of a plurality of devices. Each device of the plurality of devices may be connected to one of a plurality of ports of a multi-port PD system. In some embodiments, a port is a USB port. For example, a port may be a USB-C / PD port. System power is allocated between each port of a plurality of ports.

[0084] At operation 724, the processing logic determines, based on the power consumption of the at least one device, whether to reallocate system power between each port of the plurality of ports. If the processing logic determines that system power should not be reallocated between each port of the plurality of ports, the processing logic may return to operation 722 to continue monitoring power consumption by the at least one device.

[0085] If the processing logic determines at operation 726 that system power should be reallocated between each port of the plurality of ports, the processing logic may cause the system power to be reallocated between each port of the plurality of ports. Reallocating the system power may also include redistributing the system power.

[0086] In some embodiments, monitoring power consumption at operation 722 includes causing data indicative of current-carrying power consumption to be obtained. In particular, the data may include at least one current measurement of the actual power consumption of the at least one device. A current measurement (I Mess. ) may reflect the amount of current (e.g., power) consumed by a device connected to a port of the multi-port PD system. For example, a current measurement may correspond to an amount of power or current consumed by a device connected to a port of the multi-port PD system that is less than or equal to a PB assigned to the port.

[0087] In some embodiments, the at least one current measurement is periodically polled at a live current polling time interval. The live current polling time interval can be configured depending on system requirements. In some embodiments, the live current polling time interval is between about 50 milliseconds (ms) and about 200 ms. In some embodiments, the at least one current measurement is obtained using an interrupt-based approach.

[0088] In some embodiments, determining whether to reallocate system power includes, at operation 724, determining whether the at least one power measurement meets a threshold condition. The threshold condition indicates whether I Mess. a threshold for measuring a current carrying current (I T) in either direction (e.g., increased or decreased). In some embodiments, determining whether the at least one current measurement satisfies the threshold condition includes determining whether the at least one current measurement is greater than a previously stored live current measurement (I gespeichert ) plus the threshold for current measurement (I Mess. > I gespeichert + I T ), or determining whether the at least one current measurement is less than the stored current measurement minus the current measurement threshold (I Mess. < I gespeichert - I T ). In some embodiments, I T based on a performance threshold (P T ), and the RDO voltage (V RDO ). For example, I T as PTVRDO In some embodiments, the power threshold is determined based on a power offset (P Versatz). The power offset refers to the additional power that can be provided to the connection beyond its actual power consumption. For example, P T = P Versatz - P OR , where P OR a power offset reduction. The current-carrying current measurement threshold, the power threshold, the power offset, and / or the power offset reduction can be determined according to system requirements (e.g., how much power is required to trigger a new power allocation).

[0089] For illustration purposes, assume that the RDO voltage is 20 V, the current-carrying measurement (e.g., actual power consumption) is 3 amperes (A), the power threshold is 3 W, and the power offset is 5 W. The actual power consumption, which is the product of the RDO voltage and the actual power consumption, is 60 W. A power allocation, which is the sum of the actual power consumption and the power offset, is therefore 65 W. A current offset, defined as the power threshold divided by the RDO voltage, is 0.15 A = 150 milliamperes (mA). Thus, in this example, system power can be reallocated when the current-carrying measurement increases or decreases by 150 mA.

[0090] In some embodiments, a debounce count is used to increase efficiency and reduce or avoid false triggers. For example, the debounce count may be three. However, any suitable debounce count may be used in accordance with the embodiments described herein.

[0091] If the at least one power measurement does not meet the threshold condition, the processing logic may continue monitoring power consumption. If the at least one power measurement meets the threshold condition, then causing system power to be reallocated may include, in operation 726, causing the processing logic to reallocate system power based on the at least one power measurement. Causing system power to be reallocated may include determining the amount of power (P verbraucht). In some embodiments, P verbraucht for a device based on the product of V RDO and I stromführend For example, P verbraucht for a device as P verbraucht = V RDO × I stromführend + P Versatz The processing logic can also be I gespeichert with I stromführend update.

[0092] Fig. Figure 8A is a block diagram of various multi-port power supplies 800A configured to dynamically and intelligently distribute power among the ports using a firmware-based method, according to one embodiment. The multi-port power supply 800A may be configured similarly to the multi-port PD system 100 of Fig. 1, as noted by similar reference numerals. The multi-port wall adapter 1100a includes a master port 102 and one or more slave ports 104. The master port 102 may be controlled by a master device 112. The slave ports 104 may be controlled by a corresponding slave control device 114. Power converters 108 convert one input voltage to another voltage. In the illustrated embodiment, the power converters 108 are DC-DC converters. In some embodiments, the multi-port wall adapter 800A is an automotive multi-port rear seat charger of an automobile. In another embodiment, the multi-port wall adapter 1100 is part of a rear seat entertainment system in an automobile.A rear seat entertainment system may include a display system-on-a-chip (SoC), and one or more displays or other power-consuming devices may be connected to the display SoC. In another embodiment, the multi-port AC adapter 800A is part of an automobile head unit. The vehicle head unit may include a USB hub, and a power-consuming device may be connected to the USB hub. Power-consuming devices may consume power from the same power source as the master port 102 and the slave ports 104, or power-consuming devices may consume power from a different source.In the case where power consuming devices consume power from the same source as the master port 102 and the slave ports 104, the firmware-based method may dynamically and intelligently allocate power between each of the master port 102, the slave ports 104, and the power consuming devices.

[0093] In other embodiments, the multi-port wall adapter 800A may be part of a multi-port USB-C charger in a vehicle, car, truck, van, boat, airplane, building, home, or the like. In other embodiments, the multi-port wall adapter 800A is a multi-port USB-C wall charger, a multi-port USB-C power bank, a multi-port USB-C power hub, a shared multi-port wall adapter, or the like. In other embodiments, the multi-port wall adapter 1100A may use ports other than USB-C ports and is a multi-port wall charger, a multi-port power hub, a multi-port power bank, or the like.In other embodiments, the multi-port wall adapter 800A may also utilize connectors other than USB-C, such as wall outlets, micro-USB ports, or the like. In some embodiments, the connectors of the USB-C multi-port wall adapter 800A may not all be the same. For example, the USB-C multi-port wall adapter may include a number of USB Type-C connectors and a number of other connectors, such as USB-A, micro-USB, and USB-A 3.0 connectors.

[0094] The firmware-based method may be implemented by the multi-port power adapter 800A to dynamically share overall system power among the connected multi-port USB-C / PD charging ports or USB-C / PD control devices by sensing a power demand from the connected sink devices. The multi-port power adapter allocates the available power between the ports regardless of the order in which the ports are connected. In some embodiments, the multi-port power adapter 800A may include additional power sinks or power-consuming devices 850, such as a video display, an audio output, or the like. In some embodiments, the firmware-based method may be applied to any distribution of resources.

[0095] Fig. 8B is an illustration of a multi-port AC wall adapter 800B configured to dynamically and intelligently distribute power using a firmware-based method, according to one embodiment. In some embodiments, the multi-port AC wall adapter 800B may be a wall power adapter that includes a master port 102, a slave port 104, and power ports 850. The master port 102 may be controlled by a master device (in Fig. 11B not shown), and the slave terminal 104 can be controlled by a slave control device (in Fig. 11B not shown). Rectifiers (not shown) may convert an input AC supply voltage into a DC voltage to be supplied to the master control device and the slave control device. In some embodiments, the multi-port AC adapter 800B may be configured to implement operations for distributing system power between the master port 102 and the slave port 104, while each port 850 may supply a fixed port power. In other embodiments, the ports 850 may be configured as slave ports, and the multi-port AC adapter 800B may be configured to implement operations for distributing system power between the master port 102, the slave port 104, and the ports 850. Although in Fig. 8B as a wall plug-in power supply, the multi-port AC plug-in power supply 800B may be another type of multi-port AC plug-in power supply such as might be found in a vehicle, car, truck, van, boat, aircraft, building, house, or the like.

[0096] Fig.9 is a block diagram illustrating a system 900 for a USB device for use in USB power delivery, according to some embodiments. The system 900 may include a peripheral subsystem 910 that includes a number of components for use in USB power delivery (USB-PD). The peripheral subsystem 910 may include a peripheral interconnect 911 that includes a clock module, the peripheral clock (PCLK) 912, for providing clock signals to the various components of the peripheral subsystem 910. The peripheral interconnect 911 may be a peripheral bus, such as a single-level or multi-level Advanced High Performance Bus (AHB), and may provide a data and control interface between the peripheral subsystem 910, the CPU subsystem 930, and the system resources 940.The peripheral connection 911 may include controller circuitry, such as direct memory access (DMA) controllers, that can be programmed to transfer data between peripheral blocks without input, control from, or load to the CPU subsystem 930.

[0097] Peripheral connection 911 can be used to couple components of peripheral subsystem 910 to other components of system 900. A series of general-purpose input / outputs (GPIOs) 915 for sending and receiving signals can be coupled to peripheral connection 911. GPIOs 915 can include circuitry configured to implement various functions, such as pull-up, pull-down, input threshold selection, input and output buffer enable / disable, individual multiplexing, etc. Other functions can also be implemented by GPIOs 915.One or more timer / counter / pulse width modulator (TCPWM) 917 may also be coupled to the peripheral connection and include circuitry for implementing timing circuits (timers), counters, pulse width modulators (PWMs), decoders, and other digital functions that operate on I / O signals and can provide digital signals to system components of the system 900. The peripheral subsystem 910 may also include one or more serial communication blocks (SCBs) 919 for implementing serial communication interfaces such as I2C, serial peripheral interface (SPI), universal asynchronous receiver / transmitter (UART), controller area network (CAN), clock expansion peripheral interface (CXPI), etc.

[0098] For USB power delivery applications, the peripheral subsystem 910 may include a USB power delivery subsystem 920 coupled to the peripheral connection and including a number of USB PD modules 921 for use in USB power delivery. USB PD modules 921 may be coupled to the peripheral connection 911 via a USB PD connection 923. USB PD modules 921 may include an analog-to-digital converter (ADC) module for converting various analog signals into digital signals; an error amplifier (AMP) that regulates the output voltage on the VBUS line according to a PD contract; a high-voltage regulator (HV) for converting the power source voltage to a precise voltage (such as 3.5-5 V) to power the system 900; and a low-side current sense amplifier (LSCSA) for accurately measuring the load current.an overvoltage protection module (OVP module) and an overcurrent protection module (OCP module) for providing overcurrent and overvoltage protection on the VBUS line with configurable thresholds and response times; one or more gate drivers for external power field-effect transistors (FETs) used in USB power delivery in provider and consumer configurations; and a communication channel PHY module (CC BB PHY module) for supporting communication on a Type-C communication channel line (CC line). USB PD modules 921 may also include a charger detection module for determining that a charging circuit is present and coupled to the system 900, and a VBUS discharge module for controlling voltage discharge on the VBUS. The discharge control module may be configured toto be coupled to a power source node on the VBUS line or to an output (current sink) node on the VBUS line and to discharge the voltage on the VBUS line to the desired voltage level (i.e., the voltage level negotiated in the PD contract). The USB power delivery subsystem 920 may also include pads 927 for external connections and electrostatic discharge (ESD) protection circuits 929, which may be required for a Type-C connector. USB PD modules 921 may also include a bidirectional communication module that supports bidirectional communication with another control device, such as between a primary-side control device and a secondary-side control device of a flyback converter.

[0099] GPIO 915, TCPWM 917, and SCB 919 may be coupled to an input / output (I / O) subsystem 950, which may include a high-speed (HS) I / O matrix 951 coupled to a series of GPIOs 953. GPIOs 915, TCPWM 917, and SCB 919 may be coupled to GPIOs 953 via the HS I / O matrix 951.

[0100] System 900 may also include a central processing unit (CPU) subsystem 930 for processing instructions, storing program information, and data. CPU subsystem 930 may include one or more processing units 931 for executing instructions and reading and writing memory locations from a variety of memories. Processing unit 931 may be a processor suitable for operation in an integrated circuit (IC) or a system-on-a-chip (SOC). In some embodiments, processing unit 931 may be optimized for low-power operation with extensive clock gating. In this embodiment, various internal circuits may be implemented for operating the processing unit in different power states.For example, the processing unit 931 may include a wake-up interrupt controller (WIC controller) configured to wake the processing unit from a sleep state so that power output can be turned off when the IC or SOC is in a sleep state. The CPU subsystem 930 may include one or more memories, including flash memory 933, static random access memory (SRAM) 935, and read-only memory (ROM) 937. The flash memory 933 may be non-volatile memory (NAND flash, NOR flash, etc.) configured to store data, programs, and / or other firmware instructions. The flash memory 933 may include a read accelerator and improve access times by integrating it with the CPU subsystem 930.SRAM 935 may be a volatile memory configured to store data and firmware instructions accessible by processing unit 931. ROM 937 may be configured to store boot routines, configuration parameters, and other firmware parameters and settings that do not change during operation of system 900. SRAM 935 and ROM 937 may include associated control circuitry. Processing unit 931 and the memories may be coupled to a system interconnect 939 to route signals to and from the various components of CPU subsystem 930 to other blocks or modules of system 900. System interconnect 939 may be implemented as a system bus, such as a single-stage or multi-stage AHB. System interconnect 939 may be configured as an interface to couple the various components of CPU subsystem 930 together.The system interconnect 939 may be coupled to the peripheral interconnect 911 to provide signal paths between the components of the CPU subsystem 930 and the peripheral subsystem 910.

[0101] System 900 may also include a set of system resources 940, including a power module 941, a clock module 943, a reset module 945, and a test module 947. Power module 941 may include a sleep control module, a wake-up interrupt control (WIC) module, a power-on-reset (POR) module, a set of voltage references (REF), and a PWRSYS module. In some embodiments, power module 941 may include circuitry that enables system 900 to source and / or provide power from / to external sources with different voltage and / or current levels and to support operation of the control device in various power states, such as active, low-power, or sleep. In various embodiments, multiple power states may be implemented when system 900 throttles operation to achieve a desired power consumption or output.Clock module 943 may include a clock control module, a watchdog timer (WDT), an internal low-speed oscillator (ILO), and an internal master oscillator (IMO). Reset module 945 may include a reset control module and an external reset module (XRES module). Test module 947 may include a module for controlling and invoking a test mode, as well as test control modules for analog and digital functions (digital test and analog DFT).

[0102] System 900 may be implemented on a monolithic (e.g., single) semiconductor chip. In other embodiments, different parts or modules of system 900 may be implemented on different semiconductor chips. For example, the memory modules of CPU subsystem 930 may be on-chip or separate. In still other embodiments, circuits on separate chips may be packaged into a single multi-chip module or may remain separate and be arranged as separate elements on a circuit board (or in a USB cable connector).

[0103] System 900 may be implemented in a variety of application contexts to provide USB PD functionality therefor. In each application context, an IC controller or SOC implementing system 900 may be disposed and configured in an electronic device (e.g., a USB-enabled device) to perform operations according to the techniques described herein. In one exemplary embodiment, system 900 may be disposed and configured in a wall-mounted power adapter for a personal computer (PC) for a laptop, notebook, etc. In another exemplary embodiment, system 900 may be disposed and configured in a wall-mounted power adapter (e.g., a wall charger) for a mobile electronic device (e.g., a smartphone, tablet, etc.).In another exemplary embodiment, system 900 may be disposed and configured in a wall outlet configured to provide power via USB Type-A and / or Type-C port(s). In another exemplary embodiment, system 900 may be disposed and configured in a car charger configured to provide power via USB Type-A and / or Type-C port(s). In another exemplary embodiment, system 900 may be disposed and configured in a power bank that can be charged and then provide power to another electronic device via a USB Type-A or Type-C port. In other embodiments, a system such as system 900 may be configured with the power switch gate control circuitry described herein and disposed in various other USB-enabled electronic or electromechanical devices.

[0104] It should be understood that a system such as system 900, implemented on or as an IC controller, can be arranged into various applications that may differ in terms of the type of power source used and the direction in which power is delivered. For example, in a car charger, the power source is a car battery providing direct current, whereas in a mobile power adapter, the power source is an alternating current wall outlet. Furthermore, in a PC power adapter, the flow of power output is from a power provider device to a load device, whereas in a power bank, the flow of power output can flow in either direction, depending on whether the power bank is operating as a power provider (e.g., to supply power to another device) or as a power load (e.g., to charge itself).For these reasons, the various applications of the 900 system should be considered in an illustrative rather than a limiting sense.

[0105] In the foregoing description, some portions of the detailed description are presented in the form of algorithms and symbolic representations of operations on bits of data in a computer memory. These algorithmic descriptions and representations are the means used by those skilled in the data processing industry to most effectively communicate the content of their work to others skilled in the art. An algorithm is understood here and generally as a self-consistent sequence of steps that leads to a desired result. The steps are those that require physical manipulation of physical quantities. Typically, but not necessarily, these quantities take the form of electrical or magnetic signals that can be stored, transferred, combined, compared, and otherwise manipulated.It has sometimes been found convenient to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like, primarily for reasons of general usage.

[0106] It should be noted, however, that all these and similar terms must be associated with the corresponding physical quantities and are merely convenient labels applied to these quantities. Unless explicitly stated otherwise, as is clear from the discussion above, discussions throughout this specification that use terms such as "determine," "assign," "dynamically allocate," "redistribute," "ignore," "reassign," "detect," "perform," "query," "register," "monitor," or the like, are intended to refer to the actions and processes of a computing system or similar electronic computing device that processes data embodied as physical (e.g.,manipulates and converts physical (electronic) quantities represented in the registers and memories of the computer system into other data similarly represented as physical quantities in the memories or registers of the computer system or in other such devices for storing, transmitting or displaying information.

[0107] The words "example" or "exemplary" are used herein to serve as an example, instance, or illustration. Any aspect or configuration described herein as an "example" or "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects or configurations. Rather, the use of the words "example" or "exemplary" is intended to concretely illustrate concepts. As used in this application, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or." That is, unless otherwise stated or clear from the context, "X includes A or B" is intended to mean any of the naturally inclusive permutations. That is, if X includes A; X includes B; or X includes both A and B, then "X includes A or B" is satisfied in each of the foregoing instances.Furthermore, as used in this application and the appended claims, the terms "a," "an," or "a" should generally be construed to mean "one, one, or more," unless otherwise stated or the context clearly indicates that they refer to a singular form. Furthermore, the use of the term "an embodiment" or "an embodiment" or "an embodiment" or "an embodiments" as a whole does not imply that all embodiments are the same unless described as such.

[0108] The embodiments described herein may also relate to a device for performing the operations herein. This device may be specially constructed for the desired purposes or may consist of a general-purpose computer that is selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a non-transitory, computer-readable storage medium, such as, but not limited to, any type of disk, including floppy disks, optical disks, CD-ROMs, and magnetic-optical disks, read-only memories (ROMs), random access memories (RAMs), EPROMs, EEPROMs, magnetic or optical cards, flash memories, or any type of media suitable for storing electronic instructions. The term "computer-readable storage medium" is to be understood as meaning a single medium or multiple media (e.g.,a central or distributed database and / or associated caches and servers) that store one or more sets of instructions. The term "computer-readable medium" is also intended to include any medium that can store, encode, or carry a set of instructions for execution by the machine, and that causes the machine to perform one or more of the methodologies of the present embodiments. Accordingly, the term "computer-readable storage medium" is intended to include, but is not limited to, solid-state storage, optical media, magnetic media, and any medium that can store a set of instructions for execution by the machine, and that causes the machine to perform one or more of the methodologies of the present embodiments.

[0109] The methods and displays presented herein are not inherently tied to any particular computer or other device. Various general-purpose systems may be used with programs according to the teachings herein, or it may prove convenient to construct a more specialized device to perform the required method steps. The required structure for many of these systems will be apparent from the description below. Furthermore, the present embodiments are not described with respect to any particular programming language. It is understood that a variety of programming languages ​​may be used to implement the teachings of the embodiments described herein.

[0110] The foregoing description sets forth numerous specific details, such as examples of specific systems, components, methods, etc., in order to provide a thorough understanding of some embodiments of the present disclosure. It should be understood that the foregoing description is intended to be illustrative and not restrictive. Many other embodiments will become apparent to those skilled in the art upon reading and understanding the foregoing description. The scope of the disclosure should, therefore, be determined by reference to the appended claims, along with the full scope of equivalents to which such claims are entitled. QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] US 63 / 536,195

[0001]

Claims

[1] A procedure that includes: Monitoring, by at least one processing device, power consumption by at least one device of a plurality of devices, wherein each device of the plurality of devices is connected to a port of a plurality of ports having an allocation of system power, and wherein monitoring power consumption includes obtaining at least one power measurement of actual power consumption by the at least one device; Determining, by the at least one processing device, whether the at least one current measurement satisfies a threshold condition; and in response to determining that the at least one current measurement satisfies the threshold condition, causing, by the at least one processing device, the system power to be reallocated between each port of the plurality of ports. [2] The method of claim 1, wherein determining whether the at least one current measurement satisfies the threshold condition further includes determining whether the at least one current measurement is greater than a sum of a stored current measurement and a first current measurement threshold or the at least one current measurement is less than a difference between the stored current measurement and a second current measurement threshold. [3] The method of claim 1, wherein causing system power to be reallocated between the ports of the plurality of ports further comprises: Determining at least one amount of power consumed by the at least one device based on at least one voltage for requesting a data object (RDO voltage) and the at least one current measurement; and Causing system power to be reallocated between each port of the plurality of ports based on the at least one amount of power consumed by the at least one device. [4] The method of claim 1, further comprising: Obtaining, by the at least one processing device, a set of charging characteristics of a given device of the plurality of devices, the given device being connected to a given port of the plurality of ports; and Using, by the at least one processing device, the set of loading characteristics to reallocate system power. [5] A method according to claim 4, wherein: the given device is a known device; obtaining the set of charging properties further includes obtaining a charging table and a charging state corresponding to the given device; and using the set of charging characteristics to reallocate system power further includes causing an amount of power to be supplied to the given port based on the charging table and the state of charge. [6] A method according to claim 4, wherein: the given device is an unknown device; obtaining the set of charging properties further includes storing a charging pattern corresponding to the given device; and after saving the charging pattern, using the set of charging properties to reallocate system power further includes causing an amount of power to be provided to the given port. [7] The method of claim 1, further comprising, prior to monitoring power consumption by the at least one device: Determining, by the at least one processing device, a power requirement for each device of the plurality of devices; and Allocating, by the at least one processing device, system power between each port of the plurality of ports based on each power request, regardless of a connection order of the plurality of devices. [8] A system that includes: a memory; and at least one processing device operatively coupled to the memory for: Monitoring power consumption by at least one device of a plurality of devices by obtaining at least one power measurement of the actual power consumption by the at least one device, wherein each device of the plurality of devices is connected to one of a plurality of ports having an allocation of system power; Determining whether the at least one current measurement satisfies a threshold condition; and in response to determining that the at least one current measurement satisfies the threshold condition, causing system power to be reallocated between each port of the plurality of ports. [9] The system of claim 8, wherein the at least one processing device is further to determine whether the at least one current measurement satisfies the threshold condition by determining whether the at least one current measurement is greater than a sum of a stored current measurement and a first current measurement threshold or the at least one current measurement is less than a difference between the stored current measurement and a second current measurement threshold. [10] The system of claim 8, wherein the at least one processing device is further to cause the system power to be reallocated between the ports of the plurality of ports by: Determining at least one amount of power consumed by the at least one device based on at least one voltage for requesting a data object (RDO voltage) and the at least one current measurement; and Causing system power to be reallocated between each port of the plurality of ports based on the at least one amount of power consumed by the at least one device. [11] The system of claim 8, wherein the at least one processing device further serves to: Obtaining a set of charging characteristics of a given device of the plurality of devices, the given device being connected to a given terminal of the plurality of terminals; and Using the set of load properties to reallocate system power. [12] System according to claim 11, wherein: the given device is a known device; the at least one processing device is to obtain the set of charging properties by obtaining a charging table and a charging state corresponding to the given device; and the at least one processing device is to use the set of loading properties to reallocate system power by causing that an amount of power is supplied to the given connection based on the charging table and the state of charge. [13] System according to claim 11, wherein: the given device is an unknown device; the at least one processing device is to obtain the set of charging properties by storing a charging pattern corresponding to the given device; and after storing the charging pattern, the at least one processing device is to use the set of charging characteristics for reallocating system power by causing an amount of power to be provided to the given port. [14] The method of claim 8, wherein the at least one processing device, prior to monitoring power consumption by the at least one device, further serves to: Determining a power requirement for each device of the plurality of devices; and Allocating system power between each port of the plurality of ports based on each power requirement, regardless of a connection order of the plurality of devices. [15] A system that includes: a plurality of Universal Serial Bus Type-C (USB-C) ports with an allocation of system power; a plurality of devices, each device of the plurality of devices being connected to a respective USB-C port of the plurality of USB-C ports; and at least one processing device operatively coupled to a memory for: Monitoring the power consumption of at least one device of the plurality of devices by obtaining at least one power measurement of the actual power consumption by the at least one device; Determining whether the at least one current measurement satisfies a threshold condition; and in response to determining that the at least one current measurement meets the threshold condition, causing system power to be reallocated between each USB-C port of the plurality of USB-C ports. [16] The system of claim 15, wherein the at least one processing device is further to determine whether the at least one current measurement satisfies the threshold condition by determining whether the at least one current measurement is greater than a sum of a stored current measurement and a first current measurement threshold or the at least one current measurement is less than a difference between the stored current measurement and a second current measurement threshold. [17] The system of claim 15, wherein the at least one processing device is further to cause system power to be reallocated between each USB-C port of the plurality of USB-C ports by: Determining at least one amount of power consumed by the at least one device based on at least one voltage for requesting a data object (RDO voltage) and the at least one current measurement; and Causing system power to be reallocated between each USB-C port of the plurality of USB-C ports based on the at least one amount of power consumed by the at least one device. [18] The system of claim 15, wherein the at least one processing device further serves to: Obtaining a set of charging characteristics of a given device of the plurality of devices, wherein the given device is connected to a given USB-C port of the plurality of USB-C ports; and Using the set of load properties to reallocate system power. [19] System according to claim 18, wherein: the given device is a known device; the at least one processing device is to obtain the set of charging properties by obtaining a charging table and a charging state corresponding to the given device; and the at least one processing device is to use the set of loading properties to reallocate system power by causing that an amount of power is supplied to the given USB-C port based on the charging table and the charge level. [20] System according to claim 18, wherein: the given device is an unknown device; the at least one processing device is to obtain the set of charging properties by storing a charging pattern corresponding to the given device; and after storing the charging pattern, the at least one processing device is to use the set of charging characteristics to reallocate system power by causing an amount of power to be provided to the given USB-C port.

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