PHASE CORRECTION BASED ON BASE BAND DELAY
By directly measuring and correcting base band delays, the radar device achieves enhanced phase alignment and reduced phase errors, improving the accuracy and reliability of automotive radar systems, particularly in cascaded configurations.
Patent Information
- Application Number
- DE102024128091
- Authority / Receiving Office
- DE · DE
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-29
- Filing Date
- 2024-09-27
- Publication Date
- 2025-04-03
AI Technical Summary
Existing radar devices in automotive applications face challenges in accurately correcting phase deviations due to base band delays, which are not adequately addressed by current methods, leading to insufficient phase error compensation, especially in cascaded radar systems.
A radar device that directly measures the base band delay of analog base band processing components, determines the phase response using a phase transmission function model, and corrects the digitized output signal to achieve precise phase alignment across multiple reception channels.
The solution provides improved phase error compensation, reducing phase errors to less than ±5 degrees, enhancing the accuracy and reliability of radar systems, particularly in cascaded configurations, while eliminating the need for external measurement equipment and reducing costs and environmental impact.
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Abstract
Description
BACKGROUND
[0001] Radar devices are used in a variety of applications to detect objects, with detection typically involving measuring distances, speeds, or angles of arrival associated with detected targets. In the automotive sector in particular, there is a growing need for radar devices capable of being used in driver assistance systems (e.g., advanced driver assistance systems (ADAS)) such as adaptive cruise control (ACC) or radar cruise control systems. Such systems are capable of automatically adjusting the speed of a motor vehicle to maintain a safe distance from other motor vehicles traveling in front (and from other objects and pedestrians).Other exemplary applications of a radar device in the automotive sector include blind spot detection, lane change assistance, and the like. SUMMARY
[0002] There may be a need to provide an improved concept for a method and a radar device.
[0003] Such a need may be satisfied by the subject matter of one of the claims.
[0004] In some implementations, a method includes determining a corner frequency associated with a first analog baseband processing component in a first receive (RX) channel of a radar device; measuring a baseband delay associated with the first analog baseband processing component; determining a phase response of the first analog baseband processing component based on the corner frequency, the baseband delay, and a phase transfer function model associated with the first analog baseband processing component; digitizing an analog output signal of the first analog baseband processing component to generate a digitized output signal associated with the first RX channel; and correcting the digitized output signal based on the phase response to generate a phase-corrected output signal associated with the first RX channel.
[0005] In some implementations, a radar device comprises a first RX channel comprising a first analog baseband processing component; a second RX channel comprising a second analog baseband processing component; one or more components configured to: provide, during a first time window, a reference signal at a first node in the first analog baseband processing component; provide, during the first time window, the reference signal at a second node in the second RX channel; and determine a first baseband delay associated with the first analog baseband processing component based on a difference between a phase of the reference signal at an output of the first RX channel and a phase of the reference signal at an output of the second RX channel.
[0006] In some implementations, a method comprises providing, during a first time window, a reference signal at a first node in a first analog baseband processing component of a first RX channel of a radar device; providing, during the first time window, the reference signal at a second node in a second RX channel of the radar device, the second RX channel comprising a second analog baseband processing component; determining a first baseband delay associated with the first analog baseband processing component based on a difference between a phase of the reference signal at an output of the first RX channel and a phase of the reference signal at an output of the second RX channel; determining a first phase response of the first analog baseband processing component based on the first baseband delay;and correcting a digitized output signal of the first RX channel based on the first phase response to generate a phase-corrected output signal associated with the first RX channel; BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a diagram of an exemplary application for a frequency-modulated continuous-wave (FMCW) radar device. Fig. Figure 2 illustrates an example of frequency modulation of a transmitted radar signal transmitted by the FMCW radar device. Fig. 3 is a block diagram illustrating an exemplary structure of the FMCW radar device. Fig. Figure 4 illustrates an exemplary implementation of the FMCW radar device according to the example of Fig. 3. Fig. 5 is a schematic block diagram illustrating a cascaded radar system including a controller and a plurality of cascaded monolithic microwave integrated circuits (MMICs), according to one or more implementations. Fig. 6A-6E are diagrams illustrating examples associated with performing phase correction using a measured baseband delay. Fig. 7 is a flow diagram of an exemplary process associated with phase correction based on baseband delay. Fig. Figure 8 is a flow diagram of an exemplary process associated with measuring a baseband delay. DETAILED DESCRIPTION
[0007] Details are set forth below to provide a more thorough explanation of the example implementations. However, it will be apparent to those skilled in the art that these implementations may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form or in a schematic view rather than in detail to avoid obscuring the implementations. Additionally, features of the various implementations described below may be combined with one another unless specifically noted otherwise.
[0008] Furthermore, equivalent or identical elements, or elements with equivalent or identical functionality, are denoted by equivalent or identical reference numerals in the following description. Since the same or functionally equivalent elements are given the same reference numerals in the figures, a repeated description for elements provided with the same reference numerals can be omitted. Thus, descriptions for elements with the same or similar reference numerals are interchangeable.
[0009] Each of the depicted x-axis, y-axis, and z-axis is substantially perpendicular to the other two axes. In other words, the x-axis is substantially perpendicular to the y-axis and the z-axis, the y-axis is substantially perpendicular to the x-axis and the z-axis, and the z-axis is substantially perpendicular to the x-axis and the y-axis. In some cases, a single reference number refers to a surface, or fewer than all instances of a part may be labeled with all surfaces of that part. All instances of the part may include associated surfaces of that part, even if not every surface is labeled.
[0010] The orientations of the various elements in the figures are shown as examples, and the illustrated examples can be rotated relative to the illustrated orientations. The descriptions provided herein and the following claims apply to any structures having the described relationships between various features, regardless of whether the structures are in the particular orientation of the drawings or rotated relative to that orientation. Similarly, for ease of description, spatially relative terms such as "top," "bottom," "beneath," "lower," "over," "upper," "middle," "left," and "right" may be used herein to describe the relationship of one element to one or more other elements as illustrated in the figures.The spatially relative terms are intended to encompass various orientations of the element, structure, and / or assembly in use or operation in addition to the orientations depicted in the figures. A structure and / or assembly may be oriented differently (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein may also be interpreted accordingly. Furthermore, the cross-sectional views in the figures show only features within the planes of the cross sections and do not show materials behind the planes of the cross sections unless otherwise noted to simplify the drawings.
[0011] It should be noted that when an element is described as being "connected" or "coupled" to another element, the element may be directly connected or coupled to the other element, or intervening elements may be present. Conversely, when an element is described as being "directly connected" or "coupled" to another element, no intervening elements are present. Other terms used to describe the relationship between elements should be interpreted similarly (e.g., "between" versus "directly between," "adjacent" versus "directly adjacent," etc.).
[0012] In implementations described herein or shown in the drawings, any direct electrical connection or coupling, e.g., any connection or coupling without additional intervening elements, may also be implemented by an indirect connection or coupling, e.g., a connection or coupling with one or more additional intervening elements, or vice versa, as long as the general purpose of the connection or coupling, e.g., transmitting a particular type of signal or transmitting a particular type of information, is substantially maintained. Features of different implementations may be combined to form further implementations. For example, variations or modifications described with respect to one of the implementations may also be applicable to other implementations, unless otherwise stated.
[0013] As used herein, the terms "substantially" and "approximately" mean "within reasonable manufacturing and measurement tolerances." The terms "substantially" and "approximately" may be used herein, for example, to account for small manufacturing tolerances or other factors (e.g., within 5%) considered acceptable in the industry without departing from the aspects of the implementations described herein. For example, a resistor with an approximate resistance value may practically have a resistance value within 5% of the approximate resistance value. As another example, an approximate signal value may practically have a signal value within 5% of the approximate signal value.
[0014] In the present disclosure, terms including ordinal numbers, such as "first,r,s," "second,r,s," and / or the like, may modify various elements. However, such elements are not limited by the preceding terms. For example, the preceding terms do not limit the order and / or importance of the elements. The preceding terms are used solely for the purpose of distinguishing one element from the other elements. For example, a first box and a second box indicate different boxes even though both are boxes. As another example, a first element could be referred to as a second element, and similarly, a second element could be referred to as a first element, without departing from the scope of the present disclosure.
[0015] A monolithic radar microwave integrated circuit (MMIC), sometimes referred to as a single radar chip, can incorporate all core functions of a radar transceiver's radio frequency (RF) front-end (e.g., local oscillator, power amplifier, low-noise amplifiers (LNAs), mixer, etc.), analog preprocessing of the intermediate frequency (IF) or baseband signals (e.g., filters, amplifiers, etc.), and analog-to-digital conversion into a single package. The RF front-end typically includes multiple receive (RX) and transmit (TX) channels, particularly in applications that utilize beam steering techniques, phased array antennas, or similar. In a radar application, phased array antennas can be employed to detect the angle of arrival (also referred to as the "direction of arrival" or DOA) of incoming RF radar signals.
[0016] In the context of radar MMICs, so-called "cascaded systems" have emerged, in which multiple MMICs are connected to form a single overall system with increased resolution for radar target discrimination. In a multiple-input multiple-output (MIMO) system, a local oscillator source distributes an RF signal to the transmit and receive channels of each radar MMIC. For advanced MIMO and reconfigurable radars, it can also be useful to have a large number of transmitter outputs on a radar chip, with each transmitter output coupled to a different antenna.
[0017] For some applications, the phase relationship between channels is important from both an inter-chip and intra-chip perspective. A phase difference between transmit channels can drift or become unbalanced, for example, due to temperature changes. This parameter can be referred to as "phase deviation" or "phase drift," and ensuring a low phase deviation can be technically challenging. To reduce or minimize the effect of phase deviation in a cascaded radar system, phase transfer functions of all RX channels must be aligned across all MMICs. However, such alignment is not practically feasible, and therefore, signals from the RX channels are typically post-processed to compensate for the process-dependent phase transfer functions of each RX channel across the cascaded MMICs.Contributors to the phase error of a given RX channel include an RF-related delay, a baseband delay, and a clock delay. For example, a radar device may be configured to use a range of intermediate frequency (IF) frequencies (e.g., 10 kilohertz (kHz) to 22.5 megahertz (MHz)). A precise-tone IF frequency corresponds to the range of a target, and thus the baseband delay causes a different phase error, or DoA error, depending on the range.
[0018] A known technique for providing correction for phase deviation caused by baseband delay involves measuring a high-pass filter (HPF) corner frequency and an anti-aliasing filter (AAF) corner frequency, and then scaling phase transfer function models associated with the HPF and the AAF based on the HPF corner frequency and the AAF corner frequency, respectively. Next, a phase response is determined using the phase transfer function models, and a correction is applied to a digitized output signal based on the phase response. However, since this known technique uses an indirect measurement of baseband delay (e.g.,a delay attributable to a set of components including the AAF and a transimpedance amplifier (TIA), which can be the cause of approximately 80% of a total phase error, there are two contributors that cause some phase deviation to remain uncorrected: (1) an error caused by a TIA delay spread or other analog baseband component parts, which is not reflected in the AAF corner frequency measurement, and (2) an error caused by trimming, when some (but not all) filter poles are trimmed or when the filter poles are trimmed unequally, causing the AAF corner frequency to be not well correlated with the phase transfer function. The known technique uses a semi-direct measurement of an AAF roll-off effect, which can be the cause of approximately 20% of the total phase error.As a result of these factors, the known technique achieves in one example only ± 10 degrees (°) of post-compensation phase error for a 20 megahertz (MHz) IF bandwidth, which may be insufficient for some applications.
[0019] Some implementations described herein provide techniques and apparatus for phase correction based on baseband delay. In some implementations, a radar device may determine a corner frequency associated with a first analog baseband processing component in a first RX channel of the radar device and may measure a baseband delay associated with the first analog baseband processing component. The radar device may determine a phase response of the first analog baseband processing component based on the corner frequency, the baseband delay, and a phase transfer function model associated with the first analog baseband processing component, and may then digitize an analog output signal of the first analog baseband processing component to generate a digitized output signal associated with the first RX channel.The device may then correct the digitized output signal based on the phase response to produce a phase-corrected output signal associated with the first RX channel.
[0020] In particular, the techniques and devices described herein use a direct measurement of the baseband delay, and therefore, an error caused by a TIA delay spread can be compensated. Although the techniques and devices described herein use an indirect measurement of the AAF roll-off effect, meaning that some error caused by AAF corner trimming and baseband delay measurement accuracy may be present, such an error is negligible and can be accepted in most applications. Overall, with reasonable measurement accuracy (e.g., less than approximately ±1.5°), a radar device using the techniques and devices described herein can achieve, for example, a ±5° post-compensation phase error, meaning that operation of the radar device is improved (e.g., compared to a result using the known technique).
[0021] Furthermore, the techniques and devices described herein enable baseband delay measurement. Traditionally, baseband delay of an RX channel (or one or more components of the RX channel) of an MMIC is measured using external measurement equipment (i.e., one or more components not integrated on the MMIC). However, such a procedure is time-consuming, increases costs, introduces measurement error, and, in addition, cannot be extended to monitoring baseband delay over the life cycle of the MMIC.
[0022] Some implementations described herein provide techniques and apparatus for measuring a baseband delay. In some implementations, a radar device may provide, during a first time window, a reference signal at a first node in a first analog baseband processing component of a first RX channel of the radar device. The radar device may also provide, during the first time window, the reference signal at a second node in a second RX channel of the radar device. The radar device may then determine a first baseband delay associated with the first analog baseband processing component based on a difference between a phase of the reference signal at an output of the first RX channel and a phase of the reference signal at an output of the second RX channel.The determined baseband delay can be used, for example, for phase correction in a digitized output signal (e.g. as described above).
[0023] This approach to baseband delay measurement is advantageous because a reference signal source can be integrated into the MMIC, allowing the reference signal to be provided internally to various nodes of the MMIC's various RX channels using digital circuitry. No external measurement equipment is required, reducing sources of potential measurement error. This means measurement accuracy is improved, which in turn improves the accuracy and reliability of phase correction performed by the radar device. Furthermore, the techniques and devices described herein enable monitoring and correction throughout the MMIC's lifecycle.In addition, the techniques and apparatus described herein for baseband delay measurement can reduce the cost, time, and resources required for component verification and testing, resulting in a reduction in energy consumption and associated carbon emissions by avoiding unnecessary test processes.
[0024] Fig. Figure 1 is a diagram illustrating an exemplary application of a frequency-modulated continuous wave (FMCW) radar sensor in the form of a radar device 100 for measuring distances, velocities, or angles of arrival (AoAs) associated with objects referred to as targets. As shown in Fig. 1, radar device 100 may include one or more TX antennas 102 and one or more RX antennas 104. In some implementations, a single antenna may be used to simultaneously serve as both TX antenna 102 and RX antenna 104.
[0025] During operation, the TX antenna 102 continuously emits an RF signal s RF (t) (also referred to as transmitted radar signal), which is frequency modulated, for example, by a periodic linear frequency ramp signal (also referred to as frequency sweep or chirp signal). The transmitted radar signal s RF (t) is backscattered at a target T and a reflected signal y RF (t) (e.g., a backscattered signal, an echo signal, a received RF signal, or a received radar signal) is received by the RX antenna 104. Fig. 1 shows a simplified example - in practice, the radar device 100 may comprise a plurality of TX antennas 102 and RX antennas 104 to be able to measure an AoA of the received RF signal y RF(t) and therefore to locate the target T with increased accuracy compared to a radar device that may use a single TX antenna and / or a signal RX antenna.
[0026] As used herein, "(t)" refers to an analog signal, defined as a continuous-time signal that may change over a time period t, and "[n]" refers to a digital signal, defined as a discrete-time signal, where n is an integer and may represent an nth sample or a signal comprising n samples. A signal may be represented with or without its continuous-time or discrete-time domain identifiers (t) and [n], respectively. It is understood that RF circuits, such as radar device 100, may be used in fields other than radar. For example, RF circuits may be used in RF communication systems. Accordingly, in some implementations, radar device 100 may be used in an RF application other than radar, such as RF communication.
[0027] As shown above, Fig. 1 is provided as an example. Other examples may differ from what is stated in relation to Fig. 1 described.
[0028] Fig. 2 shows an example of frequency modulation of the RF signal s RF (t). As shown in the upper diagram 200 of Fig. 2, the RF signal s RF (t) a plurality of frequency ramps or a series of “chirps”; that is, the RF signal s RF (t) comprises a sequence of sinusoidal signal profiles (e.g., waveforms) with an increasing frequency (referred to as an up-chirp) or a decreasing frequency (referred to as a down-chirp). Fig. In the example shown in Figure 2, the instantaneous frequency f LO (t) of a chirp linearly from a starting frequency f START to a stop frequency f STOP within a time interval T CHIRP as shown in the lower diagram 210 of Fig. 2. Such chirps are also called linear frequency ramps. During a measurement, a sequence of frequency ramps is emitted, and a resulting echo signal is evaluated in the baseband to detect one or more radar targets.
[0029] A frequency-modulated ramp signal, such as a local oscillator signal used to generate a radar signal, may comprise a plurality of radar frames, which may also be referred to as radar operating cycles or chirp frames. A sequence of ramps may comprise each radar frame. For example, a radar operating cycle may comprise several hundred radar ramps (sweeps), lasting up to 10-30 milliseconds (ms) in total. One frame length of the radar frame may correspond to one radar operating cycle. Consecutive ramps may have a short pause between them, and a longer pause may be used between consecutive radar frames. The longer pause between consecutive radar frames may be referred to as a configuration interval, during which one or more ramp parameters of the RF signal are RF (t) can be adjusted for subsequent radar frames. A ramp start time T STARTspecifies a start time for each chirp and can occur at a predetermined interval, e.g., corresponding to a number of clock cycles.
[0030] The starting frequency f START and the stop frequency f STOP The ramps can be set within a frequency band with the minimum frequency F min and the maximum frequency F max As a result, define the minimum frequency F min and the maximum frequency F max an operating frequency range or frequency band that can be used for the ramp signals, and thus the frequency range or frequency band of the radar application of a radar MMIC. In some implementations, the frequency range covered by a single ramp with start and stop frequencies f START and f STOP be smaller than the usable radar frequency band. However, any ramps generated during operation may be between the frequencies F min and Fmax of the radar frequency band (e.g. between 76-81 gigahertz (GHz)) used to generate the ramp signals.
[0031] Fig. Figure 2 illustrates three identical linear frequency ramps or chirps. The parameters f START , f STOP , T CHIRP and / or the pause between the individual frequency ramps may, however, vary depending on the actual implementation and use of the radar device 100. In practice, the frequency variation may, for example, be linear (linear ramp, frequency ramp), exponential (exponential ramp), or hyperbolic (hyperbolic ramp). In some implementations, the frequency during the time interval T CHIRP decrease instead of increasing. In some implementations, a center frequency of each ramp (and thus f START and f STOP) (e.g., from ramp to ramp or after interference is detected) to allow the use of all or part of the frequency band. In one example, the frequency band has a minimum frequency F min of 76 GHz and a maximum frequency F max of 81 GHz.
[0032] While three identical linear frequency ramps or chirps with the same starting frequency f START and stop frequency f STOP in Fig. 2, the starting frequency f START and the stop frequency f STOP thus vary within a radar frame or across multiple radar frames. A local oscillator signal s LO (t) can be used to calculate the RF signal s RF (t). Thus, it can be said that the local oscillator signal s LO (t) and the RF signal s RF(t) are frequency-modulated ramp signals generated within an operating frequency range (e.g., a predefined radar frequency range). For example, the local oscillator signal s LO (t) be a frequency-modulated ramp signal comprising a plurality of frequency ramps, each starting at a respective ramp start frequency and ending at a respective ramp stop frequency, and the respective ramp start frequencies and the respective ramp stop frequencies of the plurality of frequency ramps define a frequency range within the limits of the operating frequency range. The frequency range of the plurality of frequency ramps can be limited by the lowest start frequency f START and the highest stop frequency f STOP from the frequency ramps in a specific time interval (e.g., in an implementation where the frequency increases within each frequency ramp). As mentioned previously, the starting frequency fSTART and the stop frequency f STOP a sequence of frequency ramps and thus the center frequency of each ramp can be constant. Alternatively, the center frequency of each ramp (and thus f START and f STOP ) may vary from ramp to ramp or after interference is detected. The bandwidth (e.g., the frequency range) of each ramp may also vary from ramp to ramp or after interference is detected.
[0033] As shown above, Fig. 2 is provided as an example. Other examples may differ from what is stated in relation to Fig. 2 described.
[0034] Fig. 3 is a block diagram illustrating an example structure of radar device 100. As shown, radar device 100 may include one or more TX antennas 102, one or more RX antennas 104, an MMIC 106 (comprising an RF front end 108, a baseband signal processing circuit 110, and an analog-to-digital converter (ADC) 112), a digital signal processor (DSP) 114, and a controller 116. In some implementations, MMIC 106 may include a digital front end (DFE) coupled downstream of ADC 112. The digital front end may include circuit components associated with signal processing on a digital signal generated by ADC 112 (e.g., digital filtering). In some cases, the DFE may include DSP 114.
[0035] In the radar device 100, the one or more TX antennas 102 and the one or more RX antennas 104 are connected to the RF front-end 108. The RF front-end 108 may include circuit components associated with performing RF signal processing. These circuit components may include, for example, a local oscillator (LO), one or more RF power amplifiers, one or more LNAs, one or more directional couplers (e.g., rat-race couplers, circulators, or the like), or one or more mixers for downconverting (e.g., downconverting or demodulating) RF signals to the baseband or an IF band. The RF front-end 108 may be integrated with one or more other components into the MMIC 106, as in Fig. 3. The IF band is sometimes also referred to as the baseband. Accordingly, "baseband" and "IF band" may be used synonymously herein. Baseband signals are the signals on the basis of which radar targets are detected.
[0036] Instead of individual antennas, antenna arrays can be used. The example shown shows a bistatic (or pseudo-monostatic) radar device having separate RX and TX antennas. In the case of a monostatic radar device, a single antenna or antenna array can be used for both receiving and transmitting electromagnetic (radar) signals. In this case, a directional coupler (e.g., a circulator) can be used to separate the RF signals to be transmitted to the radar channel from the RF signals received by the radar channel. In practice, radar devices often include multiple TX and RX channels, which allows the measurement of the direction (e.g., direction of arrival) from which the radar returns are received.Thus, in some implementations, radar device 100 may include a plurality of TX antennas 102 and a plurality of RX antennas 104, allowing radar device 100 to measure an AoA from which radar returns are received. In the case of such MIMO systems, individual TX channels and RX channels may be constructed identically or similarly and may be distributed across one or more MMICs 106.
[0037] In some implementations, a signal emitted by the TX antenna 102 may be in a range of approximately 20 GHz to approximately 100 GHz, for example, in a range between approximately 76 GHz and approximately 81 GHz. As previously mentioned, a radar signal received by the RX antenna 104 includes radar echoes (e.g., chirped echo signals); that is, those signal components that are backscattered off one or more targets.
[0038] The received RF signal y RF(t) is downconverted to the baseband to produce a baseband signal y BB (t), and the baseband signal y BB (t) is further processed in the baseband by means of analog signal processing performed by the baseband signal processing circuit 110. In some implementations, the baseband signal processing circuit 110 may be configured to process the baseband signal y BB (t) to generate an analog (baseband) output signal y(t) which is derived from the baseband signal y BB (t). The baseband signal y BB (t) can also be referred to as analog radar data. When the received RF signals are downconverted to the IF band, the baseband signal processing circuit 110 can be referred to as an IF signal processing circuit. Therefore, the baseband signal processing circuit 110 can also generally be referred to as an analog signal processing circuit.
[0039] The ADC 112 may be configured to convert the baseband signal y BB (t) or digitize the analog output signal y(t) to generate a digital baseband signal y[n], also called the digital output signal. The digital baseband signal y[n] is representative of the signals contained in the received RF signal y RF (t) received radar data. The DSP 114 may be configured to further process the digital baseband signal y[n] in the digital domain. For example, the DSP 114 may be configured to receive the digital radar data in the digital baseband signal y[n] and to process the digital radar data using the ramp parameters (e.g., respective ramp start frequencies, the respective ramp stop frequencies, a bandwidth of a frequency range, a ramp start time, or a sampling start time) used to generate the respective frequency ramps of the received RF signal y RF(t) can be used to generate a range / Doppler map, which can then be further used by the DSP 114 for object detection, classification, etc.
[0040] In some implementations, the controller 116 is configured to control the operation of the radar device 100 (e.g., by controlling one or more other components of the radar device 100, as in Fig. 3). The controller 116 may, for example, comprise a microcontroller (µC).
[0041] In some implementations, the RF front-end 108, the baseband signal processing circuitry 110, the ADC 112, and / or the DSP 114 may be integrated into a single MMIC 106 (e.g., an RF semiconductor chip). Alternatively, two or more of these components may be distributed across multiple MMICs 106. In some implementations, the DSP 114 may be included in the controller 116.
[0042] As shown above, Fig. 3 is provided as an example. Other examples may differ from what is stated in relation to Fig. 3. The number and arrangement of Fig. The devices and components shown in Figure 3 are provided as an example. In practice, there may be additional devices or components, fewer devices or components, different devices or components, or differently arranged devices or components than those shown in Fig. 3. Furthermore, two or more devices or components shown in Fig. 3 may be implemented within a single device or component, or a single device or component that is shown in Fig. 3 may be implemented as multiple, distributed devices or components. Additionally or alternatively, a set of devices or components (e.g., one or more devices or components) shown in Fig. 3, perform one or more functions described as being performed by another set of devices or components shown in Fig. 3 are shown.
[0043] Fig. 4 illustrates an exemplary implementation of the radar device 100 according to the example of Fig. 3. The Fig. The example shown in Figure 4 represents an example of the RF front end 108 of the radar device 100. Fig. Figure 4 illustrates a simplified circuit diagram to show a basic structure of the RF front-end 108 with a TX channel TX1 and an RX channel RX1. As mentioned above, the radar device 100 may in practice comprise a plurality of TX channels and / or a plurality of RX channels.
[0044] The RF frontend 108 includes a LO 402 which generates an RF oscillator signal s LO (t). The RF oscillator signal s LO(t) is frequency modulated during operation (e.g. as described above with reference to Fig. 2) and can also be referred to as an LO signal, an input RF signal, or a reference signal. In radar applications, the LO signal can be in a super high frequency (SHF) band (e.g., centimeter wave) or an extremely high frequency (EHF) band (e.g., millimeter wave), e.g., in a range between approximately 76 GHz and approximately 81 GHz. In some radar applications, the LO signal can be in a 24 GHz ISM (Industrial, Scientific, and Medical) band. The LO signal can also be generated at a lower frequency and then upconverted using frequency multiplication units. The LO signal s LO (t) is processed in both the transmitted radar signal path TX1 (in the TX channel) and the received RF signal path RX1 (in the RX channel).
[0045] While the LO 402 may be provided on a chip, the LO 402 may also be provided externally thereto. For example, the LO signal may be provided by an external local oscillator, and / or the LO signal may be provided to the MMIC 106 from another MMIC in a primary / secondary relationship. In particular, the MMIC 106 may be part of a MIMO radar device comprising a plurality of coupled (cascaded) MMICs, wherein one of the MMICs is configured as the primary MMIC and the remaining MMICs are configured as secondary MMICs. Each of the MMICs may include a local oscillator that generates a respective RF oscillator signal s LO(t). However, for the operation of the MIMO radar device, it may be advantageous if LO signals used by the MMICs are coherent. Therefore, the LO signal can be generated in one MMIC (e.g., the primary MMIC), and a representation of the LO signal can be distributed to the secondary MMICs. For example, the representation can be identical to the LO signal, or the representation can be a frequency-divided signal that is then reconstructed at each MMIC by frequency multiplication. While the following description describes a distribution of the LO signal, the following description can also be applied to a frequency-divided distribution of the LO signal. In some implementations, the primary MMIC can also use the LO signal to feed itself through a signal loop to ensure that the LO signal is evenly delayed between the primary MMIC and the secondary MMICs.
[0046] The RF oscillator signal s LO (t) is processed in both the transmit signal path TX1 (in the TX channel) and the receive signal path RX1 (in the RX channel). The RF signal s RF (t) (ie the outgoing radar signal) transmitted by the TX antenna 102 can be obtained by amplifying the RF oscillator signal s LO (t), for example by an RF power amplifier 404, and can therefore be an amplified and possibly phase-shifted (e.g. by a phase shifter 406) version of the RF oscillator signal s LO (t). The transmit channel may also include a phase shifter 406 for applying a programmable phase shift φ to the RF oscillator signal s LO (t). For example, the phase shifter 406 can be controlled by a phase control signal Δφ TXbe configurable and can be used to manipulate the overall phase delay caused by the transmit channel TX1. The size or power level (e.g., the gain) of the RF power amplifier 404 can also be programmable and adjustable by a gain control signal ΔA.
[0047] Both the phase control signal Δφ TX Both the gain control signal ΔA and the gain control signal ΔA can be set and adjusted by a controller of the radar device 100 (e.g., controller 116). For example, by adjusting the power level of the RF power amplifier 404, the transmission power of the transmission channel TX1 can be set to a transmission power, while the LO 402 generates the RF oscillator signal s LO (t) with the frequency ramps generated as the RF signal s RF (t) (e.g. the transmitted signal) and as the received RF signal y RF(t) for radar data processing. The output of the RF power amplifier 404 can be coupled to the TX antenna 102 (in the case of a bistatic / pseudomonostatic radar configuration). In some cases, the power level of the RF power amplifier 404 can be set to zero to disable the transmit channel TX1 (e.g., to prevent transmission of the RF signal s RF (t) to deactivate). In other words, when the power level of the RF power amplifier 404 is set to zero, the output power of the RF power amplifier 404 is zero and no signal is provided to the TX antenna 102.
[0048] The RX channel RX1 comprises a mixer 408 and an optional amplifier 410. The RF signal y received by the RX antenna 104 RF(t) is supplied to a receiver circuit in the RX channel RX1 and thus directly or indirectly to an RF port 412 of the mixer 408. In the present example, the received RF signal y RF (t) (antenna signal) is pre-amplified by the amplifier 410 with a gain g. The mixer 408 thus receives the amplified received RF signal g · y RF (t). Amplifier 410 may, for example, be a low-noise amplifier.
[0049] The mixer 408 further includes a reference port 414 connected to the RF oscillator signal s LO (t) so that the mixer 408 can convert the (pre-amplified) received RF signal y RF (t) into the baseband (or the IF band). The downconverted baseband signal (mixer output signal) is BB (t). This baseband signal y BB(t) is further processed in the analog domain by the baseband signal processing circuit 110, which essentially causes amplification and filtering (e.g., bandpass filtering, low-pass filtering, and / or high-pass filtering) to, for example, reject unwanted sidebands and / or image frequencies. The resulting analog output signal is denoted by y(t) and is fed to the ADC 112. The ADC 112 is configured to convert the analog output signal y(t) into the digital baseband signal y[n] (e.g., the digital output signal), which is subjected to further digital post-processing via a signal processor (e.g., the DSP 114). Further digital processing of the digital baseband signal y[n] may, for example, include range Doppler analysis.
[0050] In the present example, the mixer 408 may pre-amplified the received RF signal g · y RF(t) (e.g., the amplified antenna signal) to baseband. In some implementations, the mixing may be performed in one stage (e.g., from the RF band directly to baseband) or via one or more intermediate stages (e.g., from the RF band to an intermediate frequency band and further to baseband). In the latter case, the mixer 408 may comprise a plurality of individual mixer stages connected in series. In some implementations, a mixer stage may comprise an in-phase and quadrature (IQ) mixer that generates two baseband signals (in-phase and quadrature signals) that can be interpreted as the real and imaginary parts of a complex baseband signal. In other words, the IQ mixer may be used to generate complex baseband signals (e.g., comprising in-phase and quadrature components).
[0051] As in Fig. 4, the RX antenna 104 of the RX channel RX1 can receive a superposition that represents a received RF signal y RF,T (t) reflected from the target T and a direct crosstalk from the transmitting antenna 102, also known as the leakage signal y RF,L (t). Reflections from an object directly in front of the antennas (sometimes called a "blocker") are also referred to as crosstalk and can contribute to the leakage signal. Both signals y RF,T (t) and y RF,L (t) are essentially delayed and attenuated versions of the RF signal s RF (t) of the transmit channel TX1. A time delay between the RF signal s RF (t) of the transmit channel TX1 and the received leakage signal y RF,L (t) (e.g. the crosstalk signal) is compared to a time delay of the received RF signal y RF,T(t) received from the target T is relatively short. In a normal radar mode, the received leak signal y RF,L (t) therefore a corresponding low frequency component in the baseband signal y BB (t), and this low frequency component of the baseband signal y BB (t) may be discarded in the baseband signal processing circuit 110. For this purpose, the baseband signal processing circuit 110 may comprise a bandpass filter, a lowpass filter, and / or a highpass filter with a suitable cutoff frequency.
[0052] As shown above, Fig. 4 is provided as an example. Other examples may differ from what is stated in relation to Fig. 4. The number and arrangement of Fig. The devices and components shown in Figure 4 are provided as an example. In practice, there may be additional devices or components, fewer devices or components, different devices or components, or differently arranged devices or components than those shown in Fig. 4. Furthermore, two or more devices or components shown in Fig. 4 may be implemented within a single device or component, or a single device or component that is shown in Fig. 4 may be implemented as multiple, distributed devices or components. Additionally or alternatively, a set of devices or components (e.g., one or more devices or components) shown in Fig. 4, perform one or more functions described as being performed by another set of devices or components shown in Fig. 4 are shown.
[0053] Fig. 5 is a block diagram illustrating a cascaded radar system 500 including a controller and a plurality of cascaded MMICs, according to one or more implementations. In particular, the cascaded radar system 500 is a MIMO radar system including a plurality of coupled (cascaded) MMICs 501, 502, 503, and 504, which are further coupled to a microcontroller 505. The microcontroller 505 may implement some of the functionality of the controllers associated with Fig. 3. Although microcontroller 505 is shown external to MMICs 501-504, microcontroller 505 may be integrated within any of MMICs 501-504 while performing the same functions described herein. Furthermore, MMIC 501 may be configured as the primary MMIC, and MMICs 502, 503, and 504 may be configured as secondary MMICs. For example, a secondary MMIC may utilize one or more signals and / or information provided by the primary MMIC to perform one or more functions.
[0054] Each MMIC 501, 502, 503, and 504 may include a plurality of transmit channels TX01, TX02, TX03 and a plurality of receive channels RX01, RX02, RX03, RX04. Each of the transmit channels may be coupled to a respective transmit antenna for transmitting radar signals, and each of the receive channels may be coupled to a respective receive antenna for receiving (reflected) radar signals. However, as mentioned above, it is also possible for an MMIC to include only a receiver with no transmitter or a transmitter with no receiver. Thus, in some cases, an MMIC may not include any transmit channels or may not include any receive channels.
[0055] Each of the MMICs 501 -504 may include an LO that generates an RF oscillator signal LO(t) (e.g., an LO signal). However, for the operation of the cascaded radar system 500, it may be advantageous if the LO signals used by the MMICs 501-504 are coherent. Therefore, the RF oscillator signal s LO (t) in an MMIC (e.g. the MMIC 501 as the primary MMIC) and thus for a representation of the RF oscillator signal S LO (t) is distributed to the secondary MMICs 502, 503 and 504. For example, the representation of the RF oscillator signal s LO (t) identical to the RF oscillator signal s LO (t), or the representation of the RF oscillator signal s LO (t) can be a frequency-divided signal, which is then reconstructed by frequency multiplication at each secondary MMIC.
[0056] While the following example shows a distribution of the RF oscillator signal s LO (t), a frequency-divided distribution of the RF oscillator signal s LO(t) can also be used in some implementations. In the illustrated example, the RF oscillator signal s LO (t) from an LO output LO out the primary MMIC 501 to the LO inputs LO in the respective secondary MMICs 502, 503 and 504. In some implementations, a unidirectional power splitter may first separate the RF oscillator signal s LO (t) is received by the primary MMIC 501 and the divided signal is applied to the LO inputs LO in the secondary MMICs 502, 503 and 504. In some implementations, the LO output LO out the primary MMIC 501 with the LO input LO in the primary MMIC 501 such that the primary MMIC 501 itself receives the RF oscillator signal s LO (t) to ensure that the RF oscillator signal s LO(t) is equally delayed between the primary MMIC 501 and the secondary MMICs 502, 503 and 504.
[0057] The LO output LO out and the LO inputs LO in can be implemented as a pin, solder ball, or similar, depending on the chip package of the MMIC. In some example implementations, the LO output LO out and / or the LO inputs LO in by dedicated external contacts (e.g., pin, solder ball, etc.). To minimize the number of external contacts of the MMICs, the output of a transmit channel (e.g., channel TX04) can also be reconfigured as an LO output or LO input. However, a transmit channel configured as an LO output or LO input is then no longer available as an antenna port for connecting a (transmit) antenna. According to the Fig. 5, the RF output of the transmit channel TX04 in the primary MMIC 501 can be designed as an LO output, for which purpose it is useful to adapt the gain of the RF amplifier (cf. Fig. 4, amplifier 404). The resulting adaptation (reduction) of the signal power may be useful or appropriate to minimize crosstalk to the receive channels RX01, RX02, or the like, and to save power. In the case of the secondary MMICs 502, 503, and 504, the RF outputs of the respective transmit channels TX04 may be configured as LO inputs, which can be implemented using couplers and / or switches.
[0058] In the Fig. In the example illustrated in Figure 5, the outputs labeled TX01, TX02, TX03, and TX04 may be connected to (transmit) antennas, and the inputs labeled RX01, RX02, RX03, and RX04 may be connected to (receive) antennas. All of the MMICs 501-504 may each include a local oscillator (e.g., LO 402), but the local oscillators may not be used in the MMICs 502-504, which are configured as secondary MMICs. For normal radar operation, the RF oscillator signal S LO (t) are generated centrally in the primary MMIC 501 and distributed to the secondary MMICs 502-504. As a result, the RF oscillator signals S processed in the MMICs 501-504 are LO (t) coherent.
[0059] In the Fig. 5, the primary MMIC 501 can receive the RF oscillator signal s LO (t) and the RF oscillator signal s LO(t) via the LO output of the primary MMIC 501 to the secondary MMICs 502, 503, and 504. Consequently, the MMICs 501-504 can be connected in a cascaded configuration. A clock signal s CLK (t) (e.g., a system clock signal) may also be generated by the primary MMIC 501 and distributed to the secondary MMICs 502, 503, and 504. The primary MMIC 501 may generate the clock signal s CLK (t) from a reference clock signal received from a separate reference clock generator, e.g., a crystal oscillator. For this purpose, MMICs 501, 502, 503, and 504 each have a separate clock output CLK out or clock input CLK in which can be connected via strip lines. The clock signal s CLK (t) may have a clock frequency in a megahertz (MHz) range (e.g. 200 MHz), whereas the LO signal has a LO frequency f LOa plurality of GHz (e.g., 76-81 GHz) or a corresponding divided value (e.g., 13 GHz or 39 GHz). Alternatively, the clock signal s CLK (t) is generated by the reference clock. In this case, the clock signal s CLK (t) generated by the clock generator chip is supplied to all of the MMICs (primary MMIC 501 and secondary MMICs 502-504).
[0060] In some implementations, microcontroller 505 may be configured to send control signals to MMICs 501, 502, 503, and 504 using a control signal bus 506. The control signals may be used to control one or more functions of MMICs 501, 502, 503, and 504. The control signals may be received at a control input CTRL of MMICs 501, 502, 503, and 504. The control signals may be provided from the control input CTRL to a processing component of a respective MMIC. The processing component may be, for example, an integrated controller or other processing circuitry of the respective MMIC.
[0061] In some implementations, each MMIC 501, 502, 503 and 504 may further include a data output D outfor sending data. The data from each MMIC 501, 502, 503 and 504 can be sent as feedback information to the microcontroller 505, which receives the data at a data input D inreceives. Based on the data received from one or more of the MMICs 501, 502, 503, and 504, the microcontroller 505 may control one or more functions of one or more of the MMICs 501-504. For example, the microcontroller 505 may be configured to receive the data from the MMICs 501, 502, 503, and 504 via a data bus 507 and generate control signals based on the received data. In some implementations, the control signals may be deactivation signals or activation signals that control the activation and deactivation of the radar signal channels, including transmit channels and / or receive channels, at each MMIC 501, 502, 503, and 504. In some implementations, the control signals may be phase control signals that control a phase of one or more of the radar signal channels. The phase control signals can be used, for example, to control a phase setting of the phase shifters 406 of the MMICs 501, 502, 503 and 504.
[0062] As further shown, each MMIC 501, 502, 503, and 504 may include a respective control circuit 508-511 (e.g., a radar operation controller) configured to control one or more components of a corresponding MMIC. A control circuit 508-511 may perform some of the functionality of the associated Fig. 3. For example, each control circuit 508-511 may trigger a start of a radar frame comprising a sequence of frequency ramps for its corresponding MMIC. In some implementations, each control circuit 508-511 may initiate a radar frame by starting a transmission of the sequence of frequency ramps. Each control circuit 508-511 may initiate the radar frame based on receiving a trigger. In some implementations, each control circuit 508-511 may generate phase information based on a monitoring operation and provide the phase information via a respective data output D out output. In some implementations, each control circuit 508-511 may receive control signals from microcontroller 505.
[0063] As shown above, Fig. 5 is provided as an example. Other examples may differ from what is described in relation to Fig. 5 described.
[0064] Fig. 6A-6E are diagrams illustrating examples associated with performing phase correction using a measured baseband delay. In particular, Fig. 6A illustrates an exemplary process of injecting a reference signal into an RX channel (e.g., RX1) of a radar device 100 in association with measuring a magnitude response of an analog baseband processing component, such as a baseband signal processing circuit 110. Fig. 6B illustrates an example of the magnitude response of the analog baseband processing component that can be used to determine a corner frequency associated with the analog baseband processing component. Fig. 6C-6E illustrate an example of measuring a baseband delay associated with the analog baseband processing component. As described below, a phase response of the analog baseband processing component can be determined based on the corner frequency, the baseband delay, and a phase transfer function model associated with the analog baseband processing component. While the Fig. 6A-6E are described with respect to an RX channel (RX1), the example shown with respect to Fig. 6A-6E may be used for any RX channel of the radar device 100.
[0065] The Fig. The RX channel RX1 shown in Figure 6A differs from the one shown in Fig. 4 illustrated RX channel by the fact that the Fig. 6A, the RX channel RX1 comprises a coupler 602 which allows a reference signal s REF(t) is fed into the RF signal path (e.g. in addition to or alternatively to the received RF signal y RF (t) received via the receiving antenna 104). As further shown, the reference signal may be (selectively) injected at a first node in the baseband signal processing circuit 110 of the RX channel RX1 and / or at a second node in the RX channel RX1 (e.g., in association with measuring a baseband delay φ BB , which is associated with the baseband signal processing circuit 110 in the RX channel RX1, or in association with measuring a baseband delay φ BB , which is assigned to a baseband signal processing circuit 110 in another RX channel of the radar device 100, as described below with reference to Fig. 6C-6E). The mixer 408 and the subsequent baseband signal processing circuit 110 process the reference signal s REF (t) in the same way as the received RF signal y RF(t). The coupler 602 may include, for example, a branch line coupler, a taper line coupler, or a ratrace coupler, among other examples.
[0066] In some implementations, the reference signal s REF (t) a CW signal and a frequency f REF of the reference signal s REF (t) differs from a frequency f LO of the RF oscillator signal s LO (t) by a defined frequency offset f X (e.g. f REF = f LO + f X ). Therefore, the baseband signal y BB (t) when it is derived from the reference signal s REF (t), the frequency f X in the absence of an RF signal y RF (t). That is, a filter component 604 of the baseband signal processing circuit 110 sees a CW signal at the frequency f X In some implementations, an alternative to the reference signal s REF(t) a baseband signal at frequency f X directly into the baseband signal processing circuit 110, in which case the coupler 602 is not required. As in Fig. 6A, in some implementations, the baseband signal processing circuit 110 may include an amplifier 606 (e.g., a PGA).
[0067] The baseband signal y BB (t) at frequency f Xis attenuated by one or more components of filter component 604 according to filter characteristics. Filter component 604 may, for example, comprise an HPF, an AAF (e.g., including a low-pass filter (LPF), a programmable gain amplifier (PGA)), or one or more other components. The analog output signal y(t) from baseband signal processing circuit 110 is digitized by ADC 112, and the amplitude A of the digital baseband signal y[n] may be determined by DSP 114. Here, the amplitude A of the digital baseband signal y[n] is proportional to the amplitude of the analog output signal y(t).
[0068] In some implementations, radar device 100 (e.g., DSP 114, controller 116, or the like) may determine a high-pass corner frequency associated with baseband signal processing circuitry 110 in RX channel RX1. For example, radar device 100 may determine frequency f X(e.g. in steps) and a resulting amplitude A of the digital baseband signal y[n] can be determined for each of the different frequency values for the frequency f X An example associated with such a procedure is shown in Fig. 6B. Here, the frequency-dependent amplitude A(f X ) - that is, the magnitude response of the baseband signal processing circuit 110 point by point for each of the frequency values of the frequency f X determined. In Fig. 6B, the high-pass cutoff frequency f CH from the response |A(f X )|. In this example, the high-pass cutoff frequency f CH a frequency at which the amplitude A has fallen by a threshold amount, such as 6 decibels (dB), (i.e., has been reduced by approximately a factor of 2). That is, |A(f CH )| / A0 = 1 / 2, where A0 represents the amplitude at the 0 dB line, as in Fig. 6B illustrates the magnitude response instead of the 6 dB cutoff frequencies. Another characteristic value or threshold is, for example, the 3 dB cutoff frequency. The magnitude response is also called the amplitude response. A frequency response is a spectrum that includes a magnitude response and a phase response. The measured magnitude response information therefore represents the characteristic profile of the magnitudes of the amplitudes A(f X ) based on frequency.
[0069] As in Fig. 6B illustrates, a low-pass cutoff frequency f CL be determined in a similar manner. However, in some implementations, the radar device 100 is not required to determine the low-pass cutoff frequency. Instead, the radar device 100 may determine a baseband delay φ BBassociated with the baseband signal processing circuit 110, as described below. Thus, in some implementations, the radar device 100 may only measure the high-pass corner frequency f CH and not the low-pass cutoff frequency f CL determine.
[0070] In some implementations, the radar device 100 (e.g., the DSP 114, the controller 116, or the like) may include a baseband delay φ BB associated with the baseband signal processing circuit 110 in the RX channel RX1. As noted above, Fig. 6C-6E illustrate an example of measuring a baseband delay associated with baseband signal processing circuit 110.
[0071] As in Fig. 6C, the radar device 100 may be associated with measuring the baseband delay φ BB, which is assigned to the baseband signal processing circuit 110a in the RX channel RX1, during a first time window the reference signal s REF (t) at a first node in the baseband signal processing circuit 110a of the RX channel RX1 and at a second node in the RX channel RX2 of the radar device 100. In one example, the first node in the baseband signal processing circuit 110a of the RX channel RX1 is an input of a TIA, and the second node of the RX channel RX2 is the ADC 112b. In some implementations, the first node, which is located before the TIA on the signal path, allows for a parasitic influence of the TIA to be compensated (since, for example, the parasitic influence of the TIA in the baseband delay φ BB, which is calculated in the manner described below). More generally, the first node may be between the mixer 408 of the RX channel RX1 and the baseband signal processing circuit 110a, and the second node may be between a baseband signal processing circuit 110b in the RX channel RX2 and the ADC 112b. In some implementations, the reference signal s REF (t) can be a single tone signal. Alternatively, the reference signal s REF (t) may be a multi-tone signal in some implementations. In some implementations, the reference signal s REF (t) be a square wave signal.
[0072] In practice, phase transfer functions of the ADCs 112 of the radar device 100 can be strongly correlated, which means that the RX channels of the radar device 100 are well matched and can be used as such for a phase measurement. Thus, the reference signal s REF(t) is applied to each of the RX channels by a multiplexer (MUX) 608 for a phase measurement associated with each RX channel. In some implementations, as shown in Fig. 6C, a MUX switch 610 may be used to cause the reference signal s REF (t) is input to different nodes in the RX channels during a given time window. In some implementations, the reference signal s REF (t) are generated by an on-chip signal source and provided via an on-chip signal multiplexer. That is, in some implementations, RX channels of the radar device 100 are implemented on an MMIC 106 and the reference signal s REF(t) is generated by a source 612 on the same MMIC 106 and provided to the RX channels via the MUX 608 (also implemented on the same MMIC 106). Alternatively, the MUX 608 and / or the source 612 may be external to the MMIC 106 in some implementations.
[0073] In some implementations, the radar device 100 may evaluate digital baseband signals y[n] derived from the reference signal s REF (t) to determine the baseband delay φ BB associated with the baseband signal processing circuit 110a in the RX channel RX1. For example, the radar device 100 may determine the baseband delay φ BB , which is assigned to the baseband signal processing circuit 110a in the RX channel RX1, based on a difference between a phase of a digitized version of the reference signal s REF(t) (ie a digital baseband signal y[n]) at an output of the RX channel RX1 and a phase of a digitized reference signal s REF (t) at an output of the RX channel RX2. Fig. Figure 6D is a diagram illustrating an exemplary phase difference as determined by the radar device 100 when the reference signal s REF (t) is provided at the first node in the baseband signal processing circuit 110a of the RX channel RX1 and at the second node in the RX channel RX2 of the radar device 100. In this way, the radar device 100 can determine the baseband delay φ BB associated with the baseband signal processing circuit 110a in the RX channel RX1.
[0074] The radar device 100 may have a baseband delay φ BB for the RX channel RX2 in a similar way. For example, as shown in Fig. Figure 6E illustrates that the radar device 100, during a second (later) time window, receives the reference signal s REF (t) at a first node in the baseband signal processing circuit 110b of the RX channel RX2 and at a second node in the RX channel RX1. In one example, the first node in the baseband signal processing circuit 110b of the RX channel RX2 is an input of a TIA and the second node of the RX channel RX1 is the ADC 112a. The radar device 100 can then provide the baseband delay φ BB , which is assigned to the baseband signal processing circuit 110b in the RX channel RX2, based on a difference between a phase of a digitized version of the reference signal s REF (t) (ie a digital baseband signal y[n]) at an output of the RX channel RX2 and a phase of a digitized reference signal s REF (t) at an output of the RX channel RX1. In particular, while Fig. 6C-6E illustrate an example using a single pair of adjacent RX channels of an MMIC 116, this technique can be similarly applied to an MMIC 106 comprising more than two RX channels (e.g., four RX channels, five RX channels, eight RX channels, or the like). In such a case, two or more baseband delays φ BB associated with two or more respective baseband signal processing circuits 110 are measured or determined simultaneously. Furthermore, in some implementations, a given pair of RX channels may not be adjacent on the MMIC 106. In general, RX channel pairs may be spaced apart for a baseband delay φ BB -Measurement based on layout symmetry and load balancing.
[0075] In some implementations, the radar device 100 may determine a phase response of a baseband signal processing circuit 110 based on the measured baseband delay φ BBand can correct a digitized output signal (e.g., a digital baseband signal y[n]) associated with a given RX channel based on the phase response, as described below.
[0076] In some implementations, the radar device 100 may determine a phase response of the baseband signal processing circuit 110 associated with a given RX channel based on the determined high-pass corner frequency f CH and the measured baseband delay φ BBand using a phase transfer function model associated with the baseband signal processing circuit 110. In particular, the phase response is substantially dominated by the phase response of the filter component 604 (e.g., the HPF, the AAF, or the like), and therefore the phase response of the filter component 604 is representative of the phase response of the baseband signal processing circuit 110. In some implementations, the corner frequency f CH and the baseband delay φ BB Inputs to a phase transfer function (i.e., a model) representing the filter component 604. When the phase transfer function is based on the parameters f CH and φ BBcan be determined, then the phase response of the filter component 604 (or the filter stages therein) can be calculated. For example, the filter component 604 can include an HPF (e.g., a first-order HPF) and an AAF (e.g., including a sixth-order LPF, a PGA, a TIA, or the like). Here, a phase transfer function representing the filter component 604 can include a transfer function corresponding to the HPF (i.e., a submodel representing the HPF) and a transfer function corresponding to the AAF (i.e., a submodel representing the AAF). The transfer function representing the HPF can be calculated based on the frequency f CH and the transfer function representing the AAF can be calculated based on the baseband delay φ BBThe phase response of the filter component 604 can therefore be determined using the phase transfer function model, which includes the transfer function representing the HPF and the transfer function representing the AAF.
[0077] The transfer function representing the HPF of the baseband signal processing circuit 110 is referred to herein as T HPF (j · ω), while the transfer function representing the AAF of the baseband signal processing circuit 110 is referred to herein as T AAF (j · ω), where j represents the imaginary unit and ω = 2 πf represents an angular frequency. The product T AAF (j · ω) · T HPF (j · ω) characterizes a series circuit comprising the HPF and the AAF in the baseband signal processing circuit 110. The transfer function T AAF (j · ω) can be a phase response F AAF (ω) (e.g. F AAF (ω) = arg{TAAF (j · ω)}) and the transfer function T HPF (j · ω) can be a phase response F HPF (ω) (e.g. F HPF (ω) = arg{T HPF (j · ω)}). These transfer functions model filter stages of the baseband signal processing circuit 110 for a nominal corner frequency f nom or a nominal baseband delay φ nom . Phase responses F AAF,k (ω) and F HPF,k (ω) for a specific RX channel RX k can be calculated from a corner frequency f CH,k and a baseband delay φ BB,k can be determined as follows, where the index k denotes the specific RX channel: FHPF,k(ω)=FHPF(ω⋅fCH,k / fnom) FAAF,k(ω)=FAAF(ω⋅φBB,k / φnom)
[0078] In this example, the overall phase response F k (ω) for the RX channel RX k to the sum of F AAF,k (ω) and F HPF,k (ω) (e.g. F k (ω) = F HPF,k(ω) + F AAF,k (ω)), which is the total phase distortion introduced by the RX channel RX k A phase response for each RX channel of radar device 100 can be determined in a similar manner. The phase responses of the individual RX channels may differ due to production-specific variation or tolerances. During radar operation of radar device 100, the phase responses can be used to compensate for the phase differences between the individual RX channels of radar device 100. In some implementations, compensation can be performed, for example, by DSP 114. In conventional range Doppler analysis, the phase responses specific to each RX channel of radar device 100 can be taken into account after the first Fourier transform in the frequency domain.
[0079] In some implementations, correction of the phase distortion introduced by a channel RX k caused during operation of the radar device 100, as part of a digital post-processing. The phase distortion F k (ω) transmitted through an RX channel RX k corresponds to the following transfer function H(j · ω): H(j⋅ω)=exp(j⋅Fk(ω)).
[0080] The transfer function H(j · ω) can be assigned an inverse transfer function: H¯(j⋅ω)=exp(−j⋅Fk(ω)) where H(j · ω) H(j · ω) = 1. Here, the 1" can be considered as a reference transfer function. The analog output signal y(t) from the relevant RX channel RX kincludes a phase distortion caused by the baseband signal processing circuit 110 and can be described by the transfer function H(j · ω). In the frequency domain, this phase distortion can be eliminated by multiplying by the inverse transfer function H(j · ω): Y(j⋅ω)=Y(j⋅ω)⋅H¯(j⋅ω)=Y(j⋅ω)⋅exp(−j⋅Fk(ω)) where Y(j · ω) denotes the Fourier transform of the analog output signal y(t) (Y(j · ω) = F {y(t)}, where the operator F denotes the Fourier transform) and Y(j · ω) denotes the Fourier transform of the modified analog output signal y(t) in which the phase distortion of the analog front-end has been compensated. This process can be referred to as phase correction or phase equalization, where exp(-j · F k(ω)) is the correction / equalization function. In particular, the multiplication by the transfer function H(j · ω) used for the correction is a multiplication by a window function in the frequency domain. This means that the phase correction can be implemented without additional computational effort in an implementation where the transfer function H(j · ω) used for the correction is calculated into a window function of the next transform stage (also called a Doppler Fast Fourier Transform (FFT)).
[0081] In some implementations, the phase correction is performed in the digital domain, since a Fourier transform is already applied to the analog output signals y(t) from the individual RX channels during normal operation of the radar device 100. The above equation can be written in the digital domain as follows: Y[u]=Y[u]⋅H¯[u]=Y[u]⋅exp(−j⋅Fk[u]),where Fk(u / Ts).
[0082] In the above equation, u denotes a digital frequency and T s denotes a sampling time interval. The discrete Fourier transform Y[u] of the digital baseband signal y[n] can be calculated, for example, using the FFT algorithm. Y[u] denotes the discrete Fourier transform of the modified analog output signal y(t). When a windowed FFT is used, the phase correction can be incorporated into the window function, as mentioned above.
[0083] In operation, the radar device 100 may, as part of a range Doppler analysis, generate digital baseband signals y k[n] in a first transformation stage (referred to as a range FFT) into the frequency domain. In some implementations, the radar device 100 may perform a phase correction (i.e., phase equalization) after this transformation. The modified signals Y[u] (in the frequency domain) are then fed to a second transformation stage (referred to as a Doppler FFT). The result is a two-dimensional array of complex numerical values, referred to as a range / Doppler map. Since the phase distortion correction for all channels is performed with the same model-based phase response F k (ω) = F HPF (ω · f CH,k / f nom ) + F AAF (ω · φ BB,k / φ nom ), phase differences generated by the baseband signal processing circuits 110 between the individual digital baseband signals y k [n] caused, compensated.
[0084] In particular, in the example described above, the radar device 100 scales the phase transfer function model associated with the baseband signal processing circuit 110 based on the high-pass corner frequency f CH and the baseband delay φ BB to generate a scaled phase transfer function model and uses the scaled phase transfer function model in association with determining the phase response. However, in some implementations, the radar device 100 may be configured to determine the baseband delay φ BB without scaling the phase transfer function model based on the baseband delay φ BB The radar device 100 can, for example, perform direct baseband delay compensation by subtracting the baseband delay φ BB from the output signal.
[0085] Fig. Figure 7 is a flow diagram of an example process 700 associated with phase correction based on baseband delay. In some implementations, one or more process blocks of Fig. 7 is performed by a radar device (e.g., radar device 100) or one or more components of the radar device (e.g., the DSP 114, the controller 116, or the like).
[0086] As in Fig. 7, process 700 may include determining a corner frequency associated with a first analog baseband processing component in a first RX channel of a radar device (block 710). For example, the radar device may determine a corner frequency associated with a first analog baseband processing component (e.g., baseband signal processing circuit 110) in a first RX channel of the radar device, as described above.
[0087] As further stated in Fig. 7, process 700 may include measuring a baseband delay associated with the first analog baseband processing component (block 720). For example, the radar device may measure a baseband delay associated with the first analog baseband processing component as described above.
[0088] As further stated in Fig. 7, process 700 may include determining a phase response of the first analog baseband processing component based on the corner frequency, the baseband delay, and a phase transfer function model associated with the first analog baseband processing component (block 730). For example, the radar device may determine a phase response of the first analog baseband processing component based on the corner frequency, the baseband delay, and a phase transfer function model associated with the first analog baseband processing component, as described above.
[0089] As further stated in Fig. 7, process 700 may include digitizing an analog output signal of the first analog baseband processing component to generate a digitized output signal associated with the first RX channel (block 740). For example, the radar device may digitize an analog output signal of the first analog baseband processing component to generate a digitized output signal associated with the first RX channel, as described above.
[0090] As further stated in Fig. 7, process 700 may include correcting the digitized output signal based on the phase response to generate a phase-corrected output signal associated with the first RX channel (block 750). For example, the radar device may correct the digitized output signal based on the phase response to generate a phase-corrected output signal associated with the first RX channel, as described above.
[0091] The process 700 may include additional implementations, such as any single implementation or any combination of implementations described below and / or in conjunction with one or more other processes described herein.
[0092] In a first implementation, determining the corner frequency comprises determining only one high-pass corner frequency.
[0093] In a second implementation, alone or in combination with the first implementation, determining the phase response comprises scaling the phase transfer function model based on the baseband delay to generate a scaled phase transfer function model, and determining the phase response based on the scaled phase transfer function model.
[0094] In a third implementation, alone or in combination with one or more of the first and second implementations, correcting the digitized output signal comprises compensating for the baseband delay without scaling the phase transfer function model based on the baseband delay.
[0095] In a fourth implementation, alone or in combination with one or more of the first to third implementations, determining the phase response comprises scaling the phase transfer function model based on the corner frequency to generate a scaled phase transfer function model, and determining the phase response based on the scaled phase transfer function model.
[0096] In a fifth implementation, alone or in combination with one or more of the first to fourth implementations, measuring the baseband delay comprises providing, during a first time window, a reference signal at a first node in the first analog baseband processing component, providing, during the first time window, the reference signal at a second node in a second RX channel of the radar device, and determining the baseband delay based on a difference between a phase of the reference signal at an output of the first RX channel and a phase of the reference signal at an output of the second RX channel.
[0097] In a sixth implementation, alone or in combination with one or more of the first to fifth implementations, the first node is between a mixer of the first RX channel and the first analog baseband processing component, and the second node is between a second analog baseband processing component in the second RX channel and an analog-to-digital converter.
[0098] In a seventh implementation, alone or in combination with one or more of the first to sixth implementations, the first RX channel and the second RX channel are implemented on a chip and the reference signal is generated by an on-chip signal source and is provided via an on-chip signal multiplexer implemented on the chip.
[0099] In an eighth implementation, alone or in combination with one or more of the first through seventh implementations, the process 700 includes providing, during a second time window, the reference signal at a first node in the second analog baseband processing component, providing, during the second time window, the reference signal at a second node in the first RX channel, and determining a baseband delay associated with the second analog baseband processing component based on a difference between a phase of the reference signal at an output of the second RX channel and a phase of the reference signal at an output of the first RX channel.
[0100] In a ninth implementation, alone or in combination with one or more of the first through eighth implementations, the process 700 includes determining a phase response of the second analog baseband processing component based on the baseband delay, and correcting a digitized output signal of the second analog baseband processing component based on the phase response of the second analog baseband processing component.
[0101] Although Fig. 7 shows exemplary blocks of the process 700, in some implementations the process 700 includes additional blocks, fewer blocks, different blocks, or differently arranged blocks than those shown in Fig. 7. Additionally or alternatively, two or more of the blocks of process 700 may be performed in parallel.
[0102] Fig. Figure 8 is a flow diagram of an example process 800 associated with measuring a baseband delay. In some implementations, one or more process blocks of Fig. 8 by a radar device (e.g., radar device 100) or one or more components of the radar device (e.g., the DSP 114, the controller 116, or the like).
[0103] As in Fig. 8, process 800 may include providing, during a first time window, a reference signal at a first node in a first analog baseband processing component of a first RX channel of a radar device (block 810). For example, during a first time window, the radar device may provide a reference signal at a first node in a first analog baseband processing component (e.g., baseband signal processing circuit 110) of a first RX channel of a radar device, as described above.
[0104] As further stated in Fig. 8, process 800 may include providing, during the first time window, the reference signal at a second node in a second RX channel of the radar device, wherein the second RX channel includes a second analog baseband processing component (block 820). For example, during the first time window, the radar device may provide the reference signal at a second node in a second RX channel of the radar device, wherein the second RX channel includes a second analog baseband processing component, as described above.
[0105] As further stated in Fig. 8, process 800 may include determining a first baseband delay associated with the first analog baseband processing component based on a difference between a phase of the reference signal at an output of the first RX channel and a phase of the reference signal at an output of the second RX channel (block 830). For example, the radar device may determine a first baseband delay associated with the first analog baseband processing component based on a difference between a phase of the reference signal at an output of the first RX channel and a phase of the reference signal at an output of the second RX channel, as described above.
[0106] As further stated in Fig. 8, process 800 may include determining a first phase response of the first analog baseband processing component based on the first baseband delay (block 840). For example, the radar device may determine a first phase response of the first analog baseband processing component based on the first baseband delay, as described above.
[0107] As further stated in Fig. 8, process 800 may include correcting a digitized output signal of the first RX channel based on the first phase response to generate a phase-corrected output signal associated with the first RX channel (block 850). For example, the radar device may correct a digitized output signal of the first RX channel based on the first phase response to generate a phase-corrected output signal associated with the first RX channel, as described above.
[0108] The process 800 may include additional implementations, such as any single implementation or any combination of implementations described below and / or in conjunction with one or more other processes described elsewhere herein.
[0109] In a first implementation, determining the first phase response comprises scaling a phase transfer function model associated with the first analog baseband processing component based on the first baseband delay to generate a scaled phase transfer function model, and determining the first phase response based on the scaled phase transfer function model.
[0110] In a second implementation, alone or in combination with the first implementation, the process 800 comprises providing, during a second time window, the reference signal at a first node in the second analog baseband processing component, providing, during the second time window, the reference signal at a second node in the first RX channel, determining a second baseband delay associated with the second analog baseband processing component based on a difference between a phase of the reference signal at an output of the second RX channel and a phase of the reference signal at an output of the first RX channel, determining a second phase response of the second analog baseband processing component based on the second baseband delay, and correcting a digitized output signal of the second RX channel based on the second phase response.to generate a phase-corrected output signal associated with the first RX channel.
[0111] Although Fig. 8 shows exemplary blocks of the process 800, in some implementations the process 800 includes additional blocks, fewer blocks, different blocks, or differently arranged blocks than those shown in Fig. 8. Additionally or alternatively, two or more of the blocks of process 800 may be performed in parallel.
[0112] The following is an overview of some aspects of the present disclosure: Aspect 1: A method comprising the steps of: determining a corner frequency associated with a first analog baseband processing component in a first RX channel of a radar device; measuring a baseband delay associated with the first analog baseband processing component; determining a phase response of the first analog baseband processing component based on the corner frequency, the baseband delay, and a phase transfer function model associated with the first analog baseband processing component; digitizing an analog output signal of the first analog baseband processing component to generate a digitized output signal associated with the first RX channel; and correcting the digitized output signal based on the phase response to generate a phase-corrected output signal associated with the first RX channel. Aspect 2: The method of aspect 1, wherein determining the corner frequency comprises determining only one high-pass corner frequency. Aspect 3: The method of any of aspects 1-2, wherein determining the phase response comprises: scaling the phase transfer function model based on the baseband delay to generate a scaled phase transfer function model; and determining the phase response based on the scaled phase transfer function model. Aspect 4: The method of any one of aspects 1-2, wherein correcting the digitized output signal comprises compensating for the baseband delay without scaling the phase transfer function model based on the baseband delay. Aspect 5: The method of any of aspects 1-4, wherein determining the phase response comprises: scaling the phase transfer function model based on the corner frequency to generate a scaled phase transfer function model; and determining the phase response based on the scaled phase transfer function model. Aspect 6: The method of any of aspects 1-5, wherein measuring the baseband delay comprises: providing, during a first time window, a reference signal at a first node in the first analog baseband processing component; providing, during the first time window, the reference signal at a second node in a second RX channel of the radar device; and determining the baseband delay based on a difference between a phase of the reference signal at an output of the first RX channel and a phase of the reference signal at an output of the second RX channel. Aspect 7: The method of aspect 6, wherein the first node is between a mixer of the first RX channel and the first analog baseband processing component, and the second node is between a second analog baseband processing component in the second RX channel and an analog-to-digital converter. Aspect 8: The method of any of aspects 6-7, wherein the first RX channel and the second RX channel are implemented on a chip and the reference signal is generated by an on-chip signal source and provided via an on-chip signal multiplexer implemented on the chip. Aspect 9: The method of any of aspects 6-8, further comprising: providing, during a second time window, the reference signal at a first node in the second analog baseband processing component; providing, during the second time window, the reference signal at a second node in the first RX channel; and determining a baseband delay associated with the second analog baseband processing component based on a difference between a phase of the reference signal at an output of the second RX channel and a phase of the reference signal at an output of the first RX channel.Aspect 10: The method of aspect 9, further comprising: determining a phase response of the second analog baseband processing component based on the baseband delay; and correcting a digitized output signal of the second analog baseband processing component based on the phase response of the second analog baseband processing component. Aspect 11: A radar device comprising: a first receive (RX) channel comprising a first analog baseband processing component; a second RX channel comprising a second analog baseband processing component; one or more components configured to: provide, during a first time window, a reference signal at a first node in the first analog baseband processing component; provide, during the first time window, the reference signal at a second node in the second RX channel; and determine a first baseband delay associated with the first analog baseband processing component based on a difference between a phase of the reference signal at an output of the first RX channel and a phase of the reference signal at an output of the second RX channel. Aspect 12: The radar device of aspect 11, wherein the one or more components are further configured to: determine a phase response of the first analog baseband processing component based on the first baseband delay; and correct a digitized output signal of the first RX channel based on the phase response to generate a phase-corrected output signal associated with the first RX channel. Aspect 13: The radar device according to aspect 12, wherein the one or more components for determining the phase response are configured to: scale a phase transfer function model associated with the first analog baseband processing component based on the first baseband delay to generate a scaled phase transfer function model; and determine the phase response based on the scaled phase transfer function model. Aspect 14: The radar device according to aspect 12, wherein the digitized output signal is corrected based on the first baseband delay without scaling a phase transfer function model based on the first baseband delay. Aspect 15: The radar device of any of aspects 11-14, wherein the one or more components are further configured to: provide, during a second time window, the reference signal at a first node in the second analog baseband processing component; provide, during the second time window, the reference signal at a second node in the first RX channel; and determine a second baseband delay associated with the second analog baseband processing component based on a difference between a phase of the reference signal at an output of the second RX channel and a phase of the reference signal at an output of the first RX channel. Aspect 16: The radar device of aspect 15, wherein the one or more components are further configured to: determine a phase response of the second analog baseband processing component based on the second baseband delay; and correct a digitized output signal of the second RX channel based on the phase response to generate a phase-corrected output signal associated with the second RX channel. Aspect 17: The radar device according to any one of aspects 11-16, wherein the radar device is implemented on a chip and the reference signal is generated by an on-chip signal source and provided via an on-chip signal multiplexer implemented on the chip. Aspect 18: A method comprising: providing, during a first time window, a reference signal at a first node in a first analog baseband processing component of a first receive (RX) channel of a radar device; providing, during the first time window, the reference signal at a second node in a second RX channel of the radar device, the second RX channel comprising a second analog baseband processing component; determining a first baseband delay associated with the first analog baseband processing component based on a difference between a phase of the reference signal at an output of the first RX channel and a phase of the reference signal at an output of the second RX channel; determining a first phase response of the first analog baseband processing component based on the first baseband delay;and correcting a digitized output signal of the first RX channel based on the first phase response to generate a phase-corrected output signal associated with the first RX channel; Aspect 19: The method of aspect 18, wherein determining the first phase response comprises: scaling a phase transfer function model associated with the first analog baseband processing component based on the first baseband delay to generate a scaled phase transfer function model; and determining the first phase response based on the scaled phase transfer function model. Aspect 20: The method of any of aspects 18-19, further comprising: providing, during a second time window, the reference signal at a first node in the second analog baseband processing component; providing, during the second time window, the reference signal at a second node in the first RX channel; determining a second baseband delay associated with the second analog baseband processing component based on a difference between a phase of the reference signal at an output of the second RX channel and a phase of the reference signal at an output of the first RX channel; determining a second phase response of the second analog baseband processing component based on the second baseband delay; and correcting a digitized output signal of the second RX channel based on the second phase response to generate a phase-corrected output signal associated with the first RX channel. Aspect 21: A system configured to perform one or more of the operations specified in one or more of aspects 1-20. Aspect 22: An apparatus comprising means for performing one or more of the operations recited in one or more of aspects 1-20. Aspect 23: A non-transitory computer-readable medium storing a set of instructions, the set of instructions comprising one or more instructions that, when executed by a device, cause the device to perform one or more operations recited in one or more of aspects 1-20. Aspect 24: A computer program product comprising instructions or code for performing one or more of the operations recited in one or more of aspects 1-20.
[0113] The above disclosure provides illustration and description, but is not intended to be exhaustive or to limit implementations to the particular form disclosed. Modifications and variations are possible in light of the above disclosure or may be learned from practice of implementation.
[0114] As used herein, the term "component" is to be understood in the broadest sense as hardware, firmware, or a combination of hardware and software. It is understood that systems and / or methods described herein may be implemented in various forms of hardware, firmware, or a combination of hardware and software. The actual specialized control hardware or software code used to implement these systems and / or methods is not limiting to the implementations. The operation and behavior of the systems and / or methods have thus been described here without reference to any specific software code—it being understood that software and hardware may be designed to implement the systems and / or methods based on the description herein.
[0115] Any of the processing components may be implemented as a central processing unit (CPU) or other processor that reads or executes a software program from a non-transitory computer-readable recording medium, such as a hard disk or a semiconductor memory device. For example, instructions may be executed by one or more processors, such as one or more CPUs, DSPs, general-purpose microprocessors, application-specific integrated circuits (ASICs), field-programmable logic arrays (FPLAs), programmable logic controllers (PLCs), or other equivalent integrated or discrete logic circuitry.Accordingly, the term "processor" as used herein refers to any of the foregoing structures or any other structure suitable for implementing the techniques described herein. Software may be stored on a non-transitory computer-readable medium such that the non-transitory computer-readable medium includes program code or a program algorithm stored thereon that, when executed, causes the processor, via a computer program, to perform the steps of a method.
[0116] A controller including hardware may also perform one or more of the techniques of this disclosure. A controller including one or more processors may use electrical signals and digital algorithms to perform its receptive, analytical, and control functions, which may further include corrective functions. Such hardware, software, and firmware may be implemented within the same device or within separate devices to support the various techniques described in this disclosure.
[0117] A signal processing circuit and / or a signal conditioning circuit may receive one or more signals (e.g., measurement signals) from one or more components in the form of raw measurement data and may derive further information from the measurement signal. Signal conditioning, as used herein, refers to the manipulation of an analog signal in such a way that the signal meets the requirements of a next stage for further processing. Signal conditioning may include analog-to-digital conversion (e.g., via an analog-to-digital converter), amplification, filtering, conversion, biasing, range adjustment, isolation, and any other processes required to make a signal suitable for processing after conditioning.
[0118] Some implementations may be described herein in connection with thresholds. As used herein, meeting a threshold may refer to a value that is greater than the threshold, more than the threshold, higher than the threshold, greater than or equal to the threshold, less than the threshold, less than the threshold, lower than the threshold, less than or equal to the threshold, equal to the threshold, or the like.
[0119] Although certain combinations of features are recited in the claims and / or disclosed in the description, these combinations are not intended to limit the disclosure of implementations described herein. Many of these features may be combined in ways not specifically recited in the claims and / or disclosed in the description. For example, the disclosure encompasses each dependent claim in a claim set in combination with every other individual claim in that claim set and any combination of multiple claims in that claim set. As used herein, a phrase referring to "at least one of" a list of elements refers to any combination of those elements, including individual parts. For example, "at least one of: a, b, or c" is intended to cover a, b, c, a + b, a + c, b + c, and a + b + c, as well as any combination including multiples of the same element (e.g.,a + a, a + a + a, a + a + b, a + a + c, a + b + b, a + c + c, b + b, b + b + b, b + b + c, c + c and c + c + c or any other order of a, b and c).
[0120] Furthermore, it should be understood that the disclosure of multiple steps or functions disclosed in the description or claims may not be construed as being in the particular order. Therefore, the disclosure of multiple steps or functions does not limit them to a particular order, unless those steps or functions are not interchangeable for technical reasons. Furthermore, in some implementations, a single step may include multiple substeps or may be divided into multiple substeps. Such substeps may be included and be part of the disclosure of that single step unless explicitly excluded.
[0121] When "a component" or "one or more components" (or other element such as "a controller" or "one or more controllers") is described or claimed (within a single claim or across multiple claims) to perform or be configured to perform multiple operations, such language is intended to cover a variety of architectures and environments. Unless explicitly stated otherwise (e.g.,by the use of "first component" and "second component" or other wording that distinguishes components in the claims), this wording is intended to cover, for example, a single component that performs or is configured to perform all operations, a group of components that jointly perform all operations or are configured to perform the same, a first component that performs or is configured to perform a first operation and a second component that performs or is configured to perform a second operation, or any combination of components that perform or are configured to perform the operations.For example, if a claim takes the form "one or more components configured to perform X; Y; and Z", that claim should be construed to mean "one or more components configured to perform X; one or more (possibly different) components configured to perform Y; and one or more (also possibly different) components configured to perform Z".
[0122] No element, step, or instruction used herein shall be construed as critical or essential unless explicitly described as such. Furthermore, as used herein, the articles "a," "an," "a," or "an" are intended to include one or more elements and may be used synonymously with "one or more." Furthermore, the article "the," "the," is intended to include one or more elements referred to in conjunction with the article "the," and may be used synonymously with "the one or more." Where only one element is intended, the phrase "only one," "single," or similar language is used. Furthermore, as used herein, the terms "comprise," "comprise," "having," or the like are intended to be open-ended terms that do not limit an element they modify (e.g., an element that "comprises" A may also include B).Furthermore, the term "based on" shall mean "based, at least in part, on" unless expressly stated otherwise. For the purposes of this document, the term "several" may be replaced with "a plurality of," and vice versa. The term "or" is also intended to be inclusive when used in a series and may be used interchangeably with "and / or" unless expressly stated otherwise (e.g., when used in combination with "either" or "only one of").
Claims
[1] A method comprising: Determining a corner frequency associated with a first analog baseband processing component in a first receive, RX, channel of a radar device; measuring a baseband delay associated with the first analog baseband processing component; Determining a phase response of the first analog baseband processing component based on the corner frequency, the baseband delay, and a phase transfer function model associated with the first analog baseband processing component; digitizing an analog output signal of the first analog baseband processing component to generate a digitized output signal associated with the first RX channel; and Correcting the digitized output signal based on the phase response to produce a phase-corrected output signal associated with the first RX channel. [2] The method of claim 1, wherein determining the corner frequency comprises determining only a high-pass corner frequency. [3] The method according to claim 1 or 2, wherein determining the phase response comprises: Scaling the phase transfer function model based on the baseband delay to generate a scaled phase transfer function model; and Determine the phase response based on the scaled phase transfer function model. [4] The method according to any one of the preceding claims, wherein correcting the digitized output signal comprises compensating for the baseband delay without scaling the phase transfer function model based on the baseband delay. [5] The method according to any one of the preceding claims, wherein determining the phase response comprises: Scaling the phase transfer function model based on the corner frequency to generate a scaled phase transfer function model; and Determine the phase response based on the scaled phase transfer function model. [6] The method according to any one of the preceding claims, wherein measuring the baseband delay comprises: Providing, during a first time window, a reference signal at a first node in the first analog baseband processing component; Providing, during the first time window, the reference signal at a second node in a second RX channel of the radar device; and Determining the baseband delay based on a difference between a phase of the reference signal at an output of the first RX channel and a phase of the reference signal at an output of the second RX channel. [7] The method of claim 6, wherein the first node is between a mixer of the first RX channel and the first analog baseband processing component, and the second node is between a second analog baseband processing component in the second RX channel and an analog-to-digital converter. [8] The method according to claim 6 or 7, wherein the first RX channel and the second RX channel are implemented on a chip and the reference signal is generated by an on-chip signal source and provided via an on-chip signal multiplexer implemented on the chip. [9] The method according to any one of claims 6 to 8, further comprising: Providing, during a second time window, the reference signal at a first node in a second analog baseband processing component in the second RX channel; Providing, during the second time window, the reference signal at a second node in the first RX channel; and Determining a baseband delay associated with the second analog baseband processing component based on a difference between a phase of the reference signal at an output of the second RX channel and a phase of the reference signal at an output of the first RX channel. [10] The method according to claim 9, further comprising: Determining a phase response of the second analog baseband processing component based on the baseband delay; and Correcting a digitized output signal of the second analog baseband processing component based on the phase response of the second analog baseband processing component. [11] A radar device comprising: a first receive, RX, channel comprising a first analog baseband processing component; a second RX channel comprising a second analog baseband processing component; one or more components designed to: Providing, during a first time window, a reference signal at a first node in the first analog baseband processing component; Providing, during the first time window, the reference signal at a second node in the second RX channel; and Determining a first baseband delay associated with the first analog baseband processing component based on a difference between a phase of the reference signal at an output of the first RX channel and a phase of the reference signal at an output of the second RX channel. [12] The radar device according to claim 11, wherein the one or more components are further configured to: Determining a phase response of the first analog baseband processing component based on the first baseband delay; and Correcting a digitized output signal of the first RX channel based on the phase response to generate a phase-corrected output signal associated with the first RX channel. [13] The radar device according to claim 11 or 12, wherein the one or more components for determining the phase response are configured to: Scaling a phase transfer function model associated with the first analog baseband processing component based on the first baseband delay to generate a scaled phase transfer function model; and Determine the phase response based on the scaled phase transfer function model. [14] The radar device according to claim 12 or 13, wherein the digitized output signal is corrected based on the first baseband delay without scaling a phase transfer function model based on the first baseband delay. [15] The radar device according to any one of claims 11 to 14, wherein the one or more components are further configured to: Providing, during a second time window, the reference signal at a first node in the second analog baseband processing component; Providing, during the second time window, the reference signal at a second node in the first RX channel; and Determining a second baseband delay associated with the second analog baseband processing component based on a difference between a phase of the reference signal at an output of the second RX channel and a phase of the reference signal at an output of the first RX channel. [16] The radar device according to claim 15, wherein the one or more components are further configured to: Determining a phase response of the second analog baseband processing component based on the second baseband delay; and Correcting a digitized output signal of the second RX channel based on the phase response to generate a phase-corrected output signal associated with the second RX channel. [17] The radar device according to any one of claims 11 to 16, wherein the radar device is implemented on a chip and the reference signal is generated by an on-chip signal source and provided via an on-chip signal multiplexer implemented on the chip. [18] A method comprising: Providing, during a first time window, a reference signal at a first node in a first analog baseband processing component of a first receive, RX, channel of a radar device; Providing, during the first time window, the reference signal at a second node in a second RX channel of the radar device, the second RX channel comprising a second analog baseband processing component; Determining a first baseband delay associated with the first analog baseband processing component based on a difference between a phase of the reference signal at an output of the first RX channel and a phase of the reference signal at an output of the second RX channel; Determining a first phase response of the first analog baseband processing component based on the first baseband delay; and Correcting a digitized output signal of the first RX channel based on the first phase response to generate a phase-corrected output signal associated with the first RX channel. [19] The method of claim 18, wherein determining the first phase response comprises: Scaling a phase transfer function model associated with the first analog baseband processing component based on the first baseband delay to generate a scaled phase transfer function model; and Determine the first phase response based on the scaled phase transfer function model. [20] The method according to claim 18 or 19, further comprising: Providing, during a second time window, the reference signal at a first node in the second analog baseband processing component; Providing, during the second time window, the reference signal at a second node in the first RX channel; Determining a second baseband delay associated with the second analog baseband processing component based on a difference between a phase of the reference signal at an output of the second RX channel and a phase of the reference signal at an output of the first RX channel; Determining a second phase response of the second analog baseband processing component based on the second baseband delay; and Correcting a digitized output signal of the second RX channel based on the second phase response to generate a phase-corrected output signal associated with the first RX channel.
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RADAR DEVICE AND METHOD FOR COMPENSATING PHASE IMBALISMS IN FILTERS OF A RADAR DEVICE
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