Power factor correction circuit - switching method for reducing leakage current

Abstract

A PFC circuit switching method may include: connecting a PFC circuit (122) and an AC power (110) to enable a controller (140) to perform an initial charging operation on an output capacitor (101) to first boost an output capacitor voltage (S710), enabling the controller (140) to second boost the output capacitor voltage (S730) in response to whether the first boosted output capacitor voltage reaches a first preset reference voltage (S720), and enabling the controller (140) to switch a first pole (210) and a second pole (220) configured in the PFC circuit (122) with different duty cycles (S750, S760) in response to whether the second boosted output capacitor voltage reaches a second preset reference voltage (S740).

Description

Technical FieldThe present disclosure and invention relates to a technique for switching a power factor correction circuit.BackgroundVehicle-mounted (hereinafter briefly: vehicle-mounted) chargers typically include a power factor correction (PFC) stage and an isolated DC / DC (DC / DC) stage. A transformer in this isolated DC / DC stage causes power losses during battery charging, which is a limiting factor in decreasing charging time. In addition, the transformer occupies a large volume inside the vehicle-mounted charger together with an electrolytic capacitor, which is also a disadvantage in terms of volume reduction.There is a need to develop and install transformerless, non-insulated vehicle-mounted loads to improve their commercialization. Generally, these non-isolated vehicle-mounted chargers provide the advantages of improved efficiency and volume reduction, but may suffer from high common-mode leakage currents (e.g., common-mode leakage currents) compared to isolated vehicle-mounted chargers.In addition, in non-isolated vehicle-mounted charging devices, there is no galvanic isolation between the 'PFC and DC / DC primary side' and the 'DC / DC secondary side and the high-voltage battery' due to the removal of the transformer. As a result, a Y capacitor (also referred to as "suppression capacitor") of the 'DC / DC output side and the battery' is projected onto the 'PFC and DC / DC primary sides'. That is, a Y capacitor voltage of the 'DC / DC output side and the HV battery' fluctuates under the influence of the PFC stage, and causes a common mode leakage current on the AC input side of the vehicle-mounted charger.On the other hand, the electric vehicle supply device (EVSE) or the leakage protection device (RCD) continuously detects the common mode leakage current generated by the vehicle-mounted charging device.In this case, when the common mode leakage current exceeds a predetermined value, the EVSE or the RCD cuts off the power supply to stop charging the battery of electric vehicles (EVs). According to NFPA 70 "National Electrical Code" (NEC) 208.8, lavatorys, garages, etc. are equipped with ground fault circuit breakers (GFCI). In this case, the leakage current is limited to approximately 5 mA according to the UL943 Class A standard.Therefore, reducing common mode leakage current may be of substantial importance to the development and / or application of non-isolated vehicle-mounted charging devices.In addition, bridgeless PFC circuits and their control have been used primarily for isolated vehicle-mounted charging facilities, but are not necessarily applicable to non-isolated onboard charging facilities (OBCs). Generally, in the bridgeless PFC circuits, the low-speed switching pole centers and the AC input terminal are connected to each other neutral.In addition, two switches constituting the low-speed switching pole alternately turn on and off in each half cycle of the AC input. As a result, the voltages of the Y capacitors of the PFC output and the DC / DC output appear in the form of square waves, which fluctuate rapidly for each half wave of the AC input. This phenomenon is the same for nested bridgeless PFCs. As a result, due to the rapid change in the voltage of the Y capacitor at each input half-wave, a large spike-like (e.g., spike-shaped) leakage current can be generated.In addition, since the voltage of the Y capacitor of the DC / DC output does not have a constant value, a battery management system (BMS) detects insulation failure and stops the charging of the vehicle. Therefore, a non-insulated vehicle-mounted charging device operating with a controller other than that of the bridgeless PFC may be required.Moreover, although the inverter PFC does not have any peaks in the voltage of the Y capacitor, it has low-frequency fluctuations in the AC input frequency. That is, the inverter PFC does not have the spike leakage current of the bridgeless PFC, but has a low-frequency leakage current.The low-frequency leakage current increases as the size of the output-side Y capacitor increases, and in the case of an uninsulated PFC, the high-voltage battery-side Y capacitor is projected, which leads to a high leakage current. Therefore, it may be necessary to design an uninsulated vehicle-mounted charger that is used with a new inverter controller instead of a typical inverter PFC.EXPLANATION OF THE INVENTIONThe present disclosure (hereinafter, briefly, disclosure) relates to a technique for switching a power factor correction circuit, and more particularly, to a power factor correction circuit switching method for reducing a common mode leakage current in a non-insulated vehicle-mounted (i.e., vehicle-mounted) charger.An embodiment of the present disclosure may provide a power factor correction (PFC) circuit switching method capable of applying inverter control while maintaining a structure of a bridgeless PFC circuit.An embodiment of the present disclosure may provide a power factor correction (PFC) circuit switching method capable of improving a problem of common mode leakage current and ground fault current cut-off of a non-insulated vehicle-mounted charger by applying inverter PFC circuit control.An embodiment of the present disclosure may provide a power factor correction (PFC) circuit switching method capable of applying inverter control while maintaining a structure of a bridgeless PFC circuit.In an embodiment of the present disclosure, the PFC circuit switching method (i.e., method for switching a PFC circuit) may include: connecting a PFC circuit and an AC power to allow a controller to perform an initial charging operation on an output capacitor to first boost an output capacitor voltage (i.e., perform a first boost of the output capacitor voltage, and first boost the output capacitor voltage / first), respectively, enabling the controller to control the output capacitor voltage in response to whether the first boosted output capacitor voltage reaches a first preset reference voltage, second boost (i.e., e.g., perform a second boost of the output capacitor voltage or boost the output capacitor voltage second / second times), and enable the controller to switch first and second poles formed in the PFC circuit with different duty cycles (e.g., also referred to as duty cycles) in response to whether the second boosted output capacitor voltage reaches a second preset reference voltage.The first-up (i.e., e.g., first-time increase) of the output capacitor voltage may include (e.g., involve) electrically conductive anti-parallel diodes (e.g., electrically conducting current through anti-parallel diodes) from first to fourth switching elements configured to increase the output capacitor voltage at the first and second poles.The second-increasing (i.e. for example second-time increasing) the output capacitor voltage may comprise: enabling the controller to check whether the first-increased output capacitor voltage reaches the first preset reference voltage, and if, as a result of the check, the first-increased output capacitor voltage reaches the first preset reference voltage, enabling the controller to alternately operate all of the first to fourth switching elements arranged (for example provided) at the first and second poles with a variable duty cycle.Switching the first and second poles with different duty cycles may include allowing the controller to check whether the second-increased output capacitor voltage reaches the second preset reference voltage, and when, as a result of the check, the second-increased output capacitor voltage reaches the second preset reference voltage, allowing the controller to be connected to a current carrying alternating current (AC) input terminal called phase or "live", for example, an AC phase conductor terminal, to alternately operate the first and second switching elements arranged (e.g., provided) at the first pole with the variable duty cycle.The alternating operation of the first and the second pole with different duty ratios may include: enabling the controller to be connected to an AC input terminal Neutral, for example a neutral conductor terminal, to alternately operate the third and the fourth switching elements arranged (e.g. provided) at the second pole with a fixed preset duty ratio.A control command for the first pole may be a sinusoidal wave of 0° to 360°, and a control command for the second pole may be a constant voltage.A pole voltage of the first pole may be a sinusoidal wave of 0° to 360°, and a pole voltage of the second pole may be a constant voltage.The pole voltage of the first pole may be a voltage between a first node at the first pole and a third node at an output terminal of the PFC circuit.A pole voltage of the second pole may be a voltage between a second node at the second pole and a third node at an output terminal of the PFC circuit.The output capacitor voltage generated first from the output terminal of the PFC circuit or the output capacitor voltage generated first may be the sum of a voltage of an upper Y capacitor (e.g., upper suppression capacitor) arranged (e.g., provided) at an upper side of an output terminal of the second pole and a voltage of a lower Y capacitor (e.g., lower suppression capacitor) arranged (e.g., provided) at a lower side at the output terminal of the second pole.The leakage current (e.g., leakage current) may be an AC input-side low-frequency common mode leakage current, and may be calculated using a Kirchhoff mesh control (KVL) mesh including the lower Y capacitor, an inductance connected to the second node formed at the second pole, the second node, a third node representing a midpoint of the output terminal of the PFC circuit, and the lower Y capacitor.The PFC circuit may be a bridgeless PFC circuit.According to an embodiment of the present disclosure, the low-frequency AC input component, which is the main frequency component of the common mode leakage current generated in a power factor correction circuit of the inverter, can be reduced, so that the magnitude of the entire common mode leakage current can be reduced.In addition, an embodiment of the present disclosure may prevent earth leakage breaker (GFCI) and electric vehicle supply equipment (EVSE) from being shut off, and may enable a normal charging operation of an on-board charger (OBC). Moreover, an embodiment of the present disclosure may prevent a user from an electric shock accident that may occur during charging of an electric vehicle (EV).An embodiment of the present disclosure may achieve voltage compensation of the Y capacitor and improve the problem of misdiagnosis of a battery insulation failure in a battery management system (BMS).An embodiment of the present disclosure may substantially contribute to design and development, volume reduction, efficiency improvement, and user experience improvement of non-isolated vehicle-mounted charging facilities.Brief Description of the DrawingsFIG. 1 is a block diagram illustrating the configuration of a power factor correction (PFC) circuit switching device according to an embodiment of the present disclosure, FIG. 2 is a circuit diagram illustrating a PFC circuit including a filter illustrated in FIG. 1, according to an embodiment of the present disclosure, FIG. 3 is a circuit diagram illustrating a PFC circuit without the filter illustrated in FIG. 1, according to an embodiment of the present disclosure, FIG. 4 is a diagram illustrating a KVL mesh (KVL=Kirchhoff mesh rule) for calculating a Y capacitor voltage in FIG. 3 according to an embodiment of the present disclosure, FIGS. 5A and 5B are waveform diagrams of a pole reference voltage and an individual pole voltage according to an embodiment of the present disclosure, FIG. 6 is a waveform diagram of an output voltage of a Y capacitor according to an embodiment of the present disclosure, FIG. 7A is a flowchart illustrating a process of controlling a PFC circuit according to an embodiment of the present disclosure, FIG. 7B is a diagram illustrating an operation portion according to an embodiment of the present disclosure, FIG. 8 is a graph illustrating a leakage current simulation of a PFC circuit according to an embodiment of the present disclosure; and FIGS. 9 and 10 are graphs illustrating experimental results according to an embodiment of the present disclosure.Detailed DescriptionThe above characteristics and advantages will be described in more detail with reference to the accompanying drawings for example embodiments, so that a person skilled in the art to which the present disclosure pertains can readily realize the technical ideas of the present disclosure. When it is determined in the description of embodiments of the present disclosure that a detailed description of the conventional art relating to the present disclosure would unnecessarily obscure the gist of the disclosure, the detailed description may be omitted.Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Like reference numerals may be used to refer to identical or similar components in the drawings.FIG. 1 is a block diagram showing the configuration of a power factor correction circuit (PFC) switching device 100, according to an embodiment of the present disclosure. Referring to FIG. 1, the PFC circuit switching device 100 may include a charger (also, for example, charger, particularly onboard charger or onboard charger) 120 that receives external alternating current (AC) power, for example, alternating current and alternating voltage) 110 and converts the AC power into direct current (DC) power, a battery 130 that is charged by the DC power, a PFC circuit 122, and a controller 140 that controls a converter 123.The charger 120 may include a filter 121 that may remove spurious electromagnetic waves from the AC power V in the PFC circuit 122 that may convert the AC power to DC power and correct power losses during the conversion operation, and the converter 123 that may increase or decrease (e.g., boost or buck) the DC power.The filter 121 may serve to remove spurious electromagnetic waves from the AC power V in. An example of a spurious electromagnetic wave may be electromagnetic interference (EMI). Types of electromagnetic interference may include conduction emissions and (radiated) emissions.The PFC circuit 122 may serve to convert the AC power from which the spurious electromagnetic waves are removed to DC power and reduce power loss during this operation. In other words, the PFC circuit 122 may have an inverter structure (e.g., a structure as an inverter) that satisfies the function of converting AC power to DC power, and a structure that improves the power factor. In other words, the PFC circuit 122 may be an inverter-type PFC.The converter 123 may perform the function of increasing or decreasing the DC power (e.g., by boosting / decreasing the DC voltage and / or adjusting the DC current). The converter 123 may be a DC / DC converter.The battery 130 may include battery cells in series and / or parallel configuration (not shown), which may be a high voltage (HV) battery cell for electric vehicles (EVs), such as nickel metal battery cells, lithium ion battery cells, lithium polymer battery cells, lithium sulfur battery cells, sodium sulfur battery cells, all solid state battery cells, and the like.Generally, a high voltage battery may refer to a battery that is used as a power / power source for activating an electric vehicle and has a high voltage of 100 volts or more. However, the battery is not limited thereto, but may be a low-voltage battery (e.g., less than 100 volts).The controller 140 may perform a function of controlling the PFC circuit 122, the converter 123, and the like. In particular, the controller 140 may perform switching control to control switching operation for the PFC circuit 122 to reduce common-mode leakage current (e.g., common-mode leakage current). The controller 140 may include a microprocessor, a microcomputer, a modulation driving circuit that generates a modulation signal for switching, and the like. The modulation signal may be a pulse width modulation (PWM) signal, a pulse frequency modulation (PFM) signal, or the like.A first output capacitor 101 and a second output capacitor 102 may be Y=Y capacitors connected to the ground (ground) GND and the output side of the PFC circuit 122 / converter 123, respectively. In this case, a high common mode leakage current i CM can be generated. In an embodiment of the present disclosure, to reduce such a high common mode leakage current i CM the controller 140 may perform switching control via the PFC circuit 122.FIG. 2 is a circuit diagram showing a PFC circuit including the filter 121 illustrated in FIG. 1. Referring to FIG. 2, the filter 121 may be / can be connected to an external AC power source 110. In other words, both ends of the filter 121 can be / are connected to an AC input terminal Neutral (e.g. an AC input terminal for the neutral conductor) 201 and a (current-carrying) AC input terminal Phase or "live" (e.g. an AC input terminal for the so-called "live" conductor, wherein "live" conductor stands for the outer conductor or phase conductor or also current-carrying conductor, for example) 202. The PFC circuit 122 may be a bridgeless PFC circuit.The first and second inductors L b1,PFC and L b2,PFC may be connected to the output terminal of the filter 121. A current can flow in the first inductance L b1,PFC. The first inductor L b1,PFC may be connected to a first pole (e.g., a first half bridge) 210 and the second inductor L b2,PFC may be connected to a second pole (e.g., a second half bridge) 220. At the first pole 210, a first switching element Q 1 and a second switching element Q 2 may be connected in series at a predetermined or fixed distance, and at the second pole 220, a third switching element Q 3 and a fourth switching element Q 4 may be connected in series at a predetermined or fixed distance. The first pole 210 and the second pole 220 may be configured to be connected in parallel.The first to fourth switching elements Q 1 to Q 4 may mainly use power metal oxide silicon field effect transistors (MOSFETs), but may also use field effect transistors (FETs), insulated gate bipolar transistors (IGBTs), and the like. The voltages V Q1( t), V Q2( t), V Q2( t), and V Q2( t) may be applied to the capacitors of the first to fourth switching elements Q 1 to Q 4 respectively. The first to fourth switching elements Q 1 to Q 4 may be formed with anti-parallel diodes. By electrically conducting these anti-parallel diodes, the output capacitor voltage of the output capacitor 101 can be increased.At the output terminal of the second pole 220, an upper Y capacitor (e.g., upper suppression capacitor) C YPFC1 may be arranged (e.g., provided) at the top of the output terminal of the second pole 220, and a lower Y capacitor (e.g., lower suppression capacitor) C YPFC2 may be arranged (e.g., provided) at the bottom of the output terminal of the second pole 220, and an upper output capacitor C PFC1 and a lower output capacitor C PFC2 may be arranged (e.g., provided) in parallel with the upper Y capacitor C YPFC1 and the lower Y capacitor C YPFC2. The midpoints of the upper Y capacitor C YPFC1 and the lower Y capacitor C CPFC2 may be connected to the ground GND (e.g., a node between the upper Y capacitor C YPFC1 and the lower Y capacitor C CPFC2 may be connected to the ground GND). As a result, a common mode leakage current i CYPFC12( t) can flow from the midpoints (e.g., the node between the upper Y capacitor C YPFC1 and the lower Y capacitor C CPFC2) to the AC input side.The upper Y capacitor C YPFC1 and the lower Y capacitor C YPFC2 can be supplied with the voltages v CYPFC1( t) and v CYPFC2( t), respectively. A current i YPFC1( t) and i CYPFC2( t) may flow through the upper Y capacitor C YPFC1 and the lower Y capacitor C YPFC2 respectively.The upper output capacitor C PFC1 and the lower output capacitor C PFC2 may be polarized capacitors that may output an output voltage (e.g., 0.5 V PFC).FIG. 3 is a circuit diagram showing a PFC circuit 122 without the filter 121 illustrated in FIG. 1. In FIG. 3, the filter 121 of FIG. 2 may be omitted for simplicity, and an external AC power V in( t) may be connected to the first pole 210 and the second pole 220, respectively, via the first and second inductances L b1,PFC and L b2,PFC respectively. The first inductor L b1,PFC may be connected to a first node A of the first pole 210, and the second inductor L b2,PFC may be connected to a second node B of the second pole 220. It can also be assumed that a third node O, a fourth node P, and a fifth node N representing the center, the top, and the bottom may be virtually present at the output terminal of the bridgeless PFC circuit 122.FIG. 4 is a diagram showing a KVL mesh (KVL=Kirchhoff mesh rule) for calculating a Y capacitor voltage in FIG. 3. Referring to FIG. 4, the KVL mesh may include a mesh of C YPFC2- L b2,PFC- second node B - third node O - C PFC2. In other words, the KVL stitch may be a rectangular stitch formed along the arrows and dashed lines. As an additional explanation, the KVL mesh may calculate the voltage relationships between the respective elements in the rectangular mesh region. 1 2 (where v BO( t) is the voltage between the third node O and the second node B is) 3 4 i CM.LowFreq CYPFC12( i t) = i CYPFC1( t) - i CYPFC2( t) (where i CM.LowFreq is the AC input-side low-frequency common mode leakage current) ⑤In the above formulas, the brackets (<> Ts) represent the mean symbol to indicate the mean of the variables therein, and in the following formulas, the mean symbol (<>) is used for convenience.The above equation 1 means the average value of v 1b2,PFC( t), i.e., the voltage of the inductance L b2,PFC in the rectangular area of the KVL mesh. The average voltage of v Lb2,PFC( t) is equal to 0 V due to the basic nature of the inductance element.The above Equation 2 means that the voltage relationship of the rectangular region is calculated in consideration of the above Formula 1.The voltage ratio is calculated along the direction of the respective arrows from the left and right of the dotted line.In addition, the voltage relationship is equal to the sum of the three arrow voltages 0.5 V PFC, v BO( t), and v Lb2,PFC( t) from the fifth node N on the right side and via the third node O and the second node B.These three voltages can be averaged and can be calculated by giving the mean symbol (<>) together. However, 0.5 V PFC may always be a constant value, so that it is not necessary to indicate the average symbol. Finally, since v BO( t) and v Lb2,PFC( t) may be equal to 0 V, <v CYPFC2( t)> is equal to 0.5 V PFC.In the case of the above equation 3, the voltage from the fifth node N to the fourth node P is the sum of the two V PFC, since there are two 0.5 V PFC. However, the voltage from the fifth node N to the fourth node P is also equal to the sum of v CYPFC1( t) and v CYPFC2( t). The mathematical expression for this is as follows: V PFC= < v CYPFC1( t)> Ts+ < v CYPFC2( t)> Ts.In the above expression, <v CYPFC2( t)> Ts is transposed, and in the previous expression, <v CYPFC2( t)>Ts is equal to 0.5V PFC, so that the mathematical expression shown in Equation 3 above is derived.In the case of Equation 4 above, the low frequency common mode leakage current i CM.LowFreq is approximately equal to i CYPFC12( t). In this case, the low-frequency common mode leakage current i CM.LowFreq is equal to i CYPFC1( t) minus i CYPFC2( t) according to the direction of the current arrow.In the case of the above equation 5, i CYPFC1( t) and i CYPFC2( t) are the currents flowing in the first Y capacitor C YPFC1 and the second Y capacitor C YPFC2 and the current flowing in the capacitor can be calculated according to the basic differential equation of a capacitor i=C (dv / dt). The low frequency common mode leakage current i CM.LowFreq is expressed as in the above equation 5, where the symbol for averaging (<x>) is given together to take the calculation with the average voltage into account.In the case of Equation 5 above, v CYPFC1( t) and v CYPFC2( t) may be a constant of 0.5 V PFC so that when the differential operator is applied, it becomes zero. Therefore, the low-frequency common mode leakage current i may be CM.LowFreq0 A.FIGS. 5A and 5B are waveform diagrams of a pole reference voltage and an individual pole voltage according to an embodiment of the present disclosure. More specifically, FIG. 5A is a waveform diagram of the pole reference voltage, and FIG. 5B is a waveform diagram of the individual pole voltage.Referring to FIG. 5A, the first and second poles 210 and 220 share the same carrier wave, and a control command V A.ref( t) for the first pole 210 is a sine wave of 0° to 360° varying between +0.5VPFC and -0.5VPFC. In addition, the control command V A.ref( t) has a height V g( t) from 0 V to the bottom (e.g., the valley or peak) of the sine wave. The control command V B.ref( t) for the second pole 220 has a constant voltage (e.g., 0 V).Thus, the control command V A.ref( t) for the first pole 210 and the control command V B.ref( t) for the second pole 220 may have a phase difference of 90° with respect to each other.Referring to FIG. 5B, the pole voltage <V AO( t)> Ts of the first pole 210 is a sine wave of 0° to 360°, which varies between +0.5 V PFC and -0.5 V PFC. Further, the pole voltage <V AO( t)> Ts of the first pole 210 has a height V g( t) from 0 V to the bottom (e.g., the valley or the peak) of the sine wave. The pole voltage <V BO( t)> Ts of the second pole 220 has a constant voltage (e.g., 0 V).The pole voltage <V AO( t)> Ts of the first pole 210 is a voltage between the first node (A in FIG. 3 ) at the first pole 210 and the third node (O in FIG. 3 ) at the output terminal of the PFC circuit 122. The pole voltage <V BO( t)> Ts of the second pole 220 is a voltage between the second node (B in FIG. 3 ) at the second pole 220 and the third node (O in FIG. 3 ) at the output terminal of the PFC circuit 122.FIG. 6 is a waveform diagram of an output voltage of a Y capacitor according to an embodiment of the present disclosure. In FIG. 6, an output voltage of the first output capacitor 101 connected to the output terminal of the PFC circuit 122 is illustrated. The output capacitor voltage V PFC is the sum of the voltage v CYPFC1( t) of the upper Y capacitor C YPFC1 and the voltage v CYPFC2( t) of the lower Y capacitor C YPFC2. In other words, the voltage v CYPFC1( t) of the upper Y capacitor C YPFC1 and the voltage v CYPFC2( t) of the lower Y capacitor C YPFC2 are each 0.5 V PFC. The output capacitor voltage V PFC is an increased voltage from the fifth node (N in FIG. 3 ) which is 0 V.FIG. 7A is a flowchart illustrating a process of controlling a PFC circuit 122 according to an embodiment of the present disclosure. Referring to FIG. 7A, when the external AC power 110 is / is connected to the charging device 120, the controller 140 may perform an initial charging operation of the output capacitor 101 to first boost (i.e., first increase / first increase) the output capacitor voltage in operation S 710. The output capacitor 101 includes an upper Y capacitor C YPFC1 and a lower Y capacitor C YPFC2. In this case, the first and second poles 210 and 220 are not switched. However, the anti-parallel diodes of the first to fourth switching elements Q 1 to Q 4 are electrically conductive, so that the output capacitor voltage is increased for the first time. The magnitude of the increased output capacitor voltage may be about 311V.Then, in operation S 720, the controller 140 may check whether the first-highest output capacitor voltage reaches a first reference voltage (e.g., about 311 V).As a result of the check in operation S 720, if the first-highest output capacitor voltage reaches the first reference voltage (e.g., about 311 V), the controller 140 may perform a high-speed switching operation of several (e.g., several, in particular more than dozen) kHz for both the first and second poles 210 and 220 of the PFC circuit 122 to second-increase (e.g., second-time / second-time increase) the output capacitor voltage in operation S 730. Advantageously, the first to fourth switching elements Q 1 to Q 4, which are configured (e.g. provided) on the first and second poles 210 and 220, can all be actuated alternately with a variable duty cycle (wherein the duty cycle can also be referred to as duty cycle or duty cycle, for example).On the other hand, if the output capacitor voltage does not reach the first reference voltage (e.g., about 311 V) as a result of the check in operation S 720, operations S 710 to S 720 may be performed again.After operation S 730, the controller 140 may check whether the second-highest output capacitor voltage reaches a second reference voltage (e.g., about 750 V) in operation S 740.As a result of the check in operation S 740, if the second-highest output capacitor voltage reaches the second reference voltage (e.g., about 750 V), the controller 140 may operate to switch the provided first and second poles 210 and 220 with different duty cycles in operations S 750 and S 760.In addition, the controller 140 may alternately operate the first and second switching elements Q 1 and Q 2 connected to the AC current-carrying input terminal (also called phase or "live") 202 at a variable preset duty cycle through operation S 750. That is, in the case of the first pole 210, a variable duty cycle may be used.Further, the controller 140 may alternately operate the third and fourth switching elements Q 3 and Q 4 connected to the AC input terminal Neutral 201 at a fixed duty ratio in operation S 360. That is, for the second pole 220, operation with a fixed duty ratio of 0.5 may be applied.Operations S 750 and S 760 are separated from each other for illustration, but operations S 750 and S 760 may be performed simultaneously.On the other hand, as a result of the check in operation S 740, if the second-highest output capacitor voltage does not reach the second reference voltage, operations S 730 to S 740 may be performed again.FIG. 7B is a diagram illustrating an operation portion according to an embodiment of the present disclosure. The first operation portion (portion 1) corresponds to operation S 710, the second operation portion (portion 2) corresponds to operation S 730, and the third operation portion (portion 3) corresponds to operations S 750 and S 760.FIG. 8 is a graph illustrating a leakage current simulation of a PFC circuit according to an embodiment of the present disclosure. Referring to FIG. 8, shown from top to bottom are command waveforms 810 and 820 representing command voltages for first pole 210 and command voltages for second pole, an input voltage waveform 830 representing an input voltage V in an inductor current waveform 840 representing an inductor current, an output voltage waveform 850, 860 and 870 representing output capacitor voltages V PFC, a voltage across a lower Y capacitor C YPFC2 and a voltage across an upper Y capacitor C YPFC1 and a current waveform 880 representing a leakage current i cm.The root mean square value of the leakage current in FIG. 8 is about 2.6 mA rms, indicating that an on-board charger (OBC) performs a charging operation in a normal manner. In addition, the waveform of the leakage current i cm in FIG. 8 shows that the low-frequency leakage current is greatly reduced and only the high-frequency component is present.In the case of Fig. 8, the main parameters of the example simulation are as follows. Table 1 Table 1Input voltage (V in)220 VacInput voltage frequency (F line)50 Hz HzOutput voltage (V PFC)750 V DCInductance (L b1,PFC & L b2,PFC)180 μHOutput capacitor (C PRC1 & CPFC2)1,1 mFSwitching Frequency50 kHzOutput Y Capacitor (C YPFC1 & CYPFC2)100 nFThe calculation of the frequency derivative component (i.e. for example of the frequency-dependent derivative current) is as follows:FIGS. 9 and 10 are graphs illustrating experimental results according to an embodiment of the present disclosure. Referring to FIGS. 9 and 10, the experimental condition is that the output Y capacitor is, for example, 100 nF.FIG. 9 is a waveform for the no-load operation, and FIG. 10 is a waveform for the 3.3 kW operation. In FIG. 9, there is no low-frequency component in the leakage current i CM. In the case of FIG. 10, although the high frequency component of the leakage current i CM increases as the load increases, the low frequency reduction performance (the leakage current) can be sufficiently confirmed when the switching technique according to an embodiment of the present disclosure is applied.Further, the steps of the method or algorithm described in connection with the embodiments disclosed herein may be implemented in the form of program instructions that may be executed and retrieved / recorded from / on a computer readable medium by numerous computer implementations such as microprocessors, processors, central processing units (CPUs), or the like. The computer readable medium may include, alone or in combination, program codes (opcodes), data files, data structures, and the like.

Claims

A PFC circuit switching method for reducing leakage current (i CM), the method comprising: connecting a PFC circuit (122) and an AC power (110) to enable a controller (140) to perform an initial charging operation on an output capacitor (101) to first boost an output capacitor voltage (S710); enabling the controller (140) to second boost the output capacitor voltage (S730) in response to whether the first boosted output capacitor voltage reaches a first preset reference voltage (S720); and enabling the controller (140) to a first pole (210) and a second pole (220) configured in the PFC circuit (122), switching with different duty cycles (S 750, S 760) in response to whether the second-highest output capacitor voltage reaches a second preset reference voltage (S 740).The method of claim 1, wherein the output capacitor voltage is first boosted by electrically conductive anti-parallel diodes of first to fourth switching elements (Q 1 to Q 4), configured at the first and second poles (210, 220) to boost the output capacitor voltage, the output capacitor voltage being second boosted by: enabling the controller (140) to check whether the first boosted output capacitor voltage reaches the first preset reference voltage, and if, as a result of the check, the first boosted output capacitor voltage reaches the first preset reference voltage, enabling the controller (140) to alternately enable all of the first to fourth switching elements (Q 1 to Q 4), configured at the first and second poles (210, 210), 220) are configured to operate with a variable duty cycle.The method of claim 2, wherein allowing the controller (140) to switch the first and second poles (210, 220) with a variable duty cycle comprises: allowing the controller (140) to check whether the second-highest output capacitor voltage reaches the second preset reference voltage, and when, as a result of the check, the second-highest output capacitor voltage reaches the second preset reference voltage, allowing the controller (140) to be connected to a current carrying alternating current (AC) input terminal called phase or "live" (202) to alternately operate the first and second switching elements (Q 1, Q 2), which are arranged at the first pole (210), with the variable duty cycle, wherein alternately operating the first and second poles (210, 220) at different duty cycles comprises: enabling the controller (140) to be connected to an AC input terminal neutral (201) to alternately operate the third and fourth switching elements (Q 3, Q 4), which are arranged at the second pole (220), at a fixed preset duty cycle.The method according to any one of claims 1 to 3, wherein a first control command (V A.Ref( t)) for the first pole (210) is a sinusoidal wave of 0° to 360°, and a second control command (V B.Ref( t)) for the second pole (220) is a constant voltage.The method according to any one of claims 1 to 4, wherein a first pole voltage (<V AO( t)> Ts) of the first pole (210) may be a sinusoidal wave of 0° to 360°, and a second pole voltage (<V BO( t)> Ts) of the second pole (220) may be a constant voltage.The method of claim 5, wherein the first pole voltage (<V AO( t)> Ts) of the first pole (210) is a voltage between a first node (A) at the first pole (210) and a third node (O) at an output terminal of the PFC circuit (122).The method of claim 5 or 6, wherein the second pole voltage (<V BO( t)> Ts) of the second pole (220) is a voltage between a second node (B) at the second pole (220) and a third node (O) at an output terminal of the PFC circuit (122).The method according to any one of claims 1 to 7, wherein the output capacitor voltage generated from the output terminal of the PFC circuit or the generated output capacitor voltage is the sum of a voltage (v CYPFC1( t)) of an upper Y capacitor (C YPFC1), which is arranged at an upper side of an output terminal of the second pole (220), and a voltage (v CYPFC2( t)) of a lower Y capacitor (C YPFC2), which is arranged at a lower side at the output terminal of the second pole (220), wherein the leakage current (i CM) is an AC input-side low-frequency common mode leakage current (i CM.LowFreq) and is calculated using a Kirchhoff mesh control (KVL) mesh including the lower Y capacitor (C YPFC2), an inductance (L b2,PFC), which is connected to the second node (B) formed at the second pole (220), the second node (B), a third node (O), which represents a midpoint of the output terminal of the PFC circuit (122), and the lower Y capacitor (C YPFC2).The method of any of claims 1 to 8, wherein the PFC circuit (122) is a bridgeless PFC circuit.A system for charging a battery (130) for a vehicle, the system comprising: a charger (120) configured to connect an alternating current (AC) power source (110) and the battery (130) of the vehicle, and a controller (140) connected to the charger (120), wherein the controller (140) is configured to control charging of the battery (130) from the alternating current (AC) power source (110) via the charger (120), and wherein the controller (140) is configured to: perform an initial charging operation on an output capacitor (101) of the charger (120) to first boost an output capacitor voltage of the charger (120), second boost the output capacitor voltage of the charger (120) with a variable duty ratio, in response thereto, wherein the first-highest output capacitor voltage reaches a first preset reference voltage, and switching first and second poles (210, 220) in a power factor correction, PFC, circuit (122) of the charger (130) with different duty cycles in response to the second-highest output capacitor voltage reaching a second preset reference voltage.

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