Method for manufacturing optoelectronic semiconductor devices and optoelectronic semiconductor device

By identifying and bypassing defect regions in the manufacturing process of optoelectronic semiconductor devices, the method enhances production yield by ensuring functional devices are produced, even with defects present, achieving nearly 100% functionality.

DE112017001895B4Active Publication Date: 2026-03-26OSRAM OPTO SEMICON GMBH & CO OHG
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Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Filing Date
2017-04-06
Publication Date
2026-03-26

AI Technical Summary

Technical Problem

Existing optoelectronic semiconductor devices, such as LEDs, are rendered inoperable or partially functional due to crystal defects, particularly in modules with closely packed chips, making it difficult to replace defective chips and leading to high failure rates.

Method used

A method for manufacturing optoelectronic semiconductor devices involves determining defect regions within the semiconductor layer sequence, forming functional areas that bypass these defects, and isolating the devices to exclude defect regions, ensuring that current flows around them, thus maintaining functionality.

Benefits of technology

This method significantly increases the yield of functional semiconductor devices by identifying and addressing defects early in the process, allowing for nearly 100% yield by ensuring that defect regions do not impair device functionality, even in the presence of defects.

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Abstract

Method for the fabrication of optoelectronic semiconductor devices (1) comprising the steps: a) Providing a composite (3) comprising a sequence of semiconductor layers (2) having an active region (20) intended for generating or receiving radiation; b) Determining the position of at least one defect region (4) of the semiconductor layer sequence (2); c) Forming a plurality of electrically contactable functional areas (5), each comprising a portion of the semiconductor layer sequence (2) and free from a defect region (4); and d) Separating the assembly (3) into a plurality of optoelectronic semiconductor devices (1), each having at least one of the functional areas (5), wherein - at least two of the functional areas (5) formed in step c), each adjacent to the position of a defect area (4), differ from each other with regard to their geometric design; - the semiconductor devices (1) have a plurality of pixels (7) and at least one pixel (7) has a substructure (70) with a plurality of sub-regions (7R, 7G, 7B); and - in each pixel (7) a first part of the sub-areas (7R, 7G, 7B) for generating radiation of a first color and a second part of the sub-areas (7R, 7G, 7B) for generating radiation of a second color different from the first color are formed and the sub-structure (70) in each pixel (7) that overlaps with a defect area (4) is varied while maintaining an area ratio of the total area of ​​the first part to the total area of ​​the second part.
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Description

[0001] The present application relates to a method for manufacturing optoelectronic semiconductor devices and an optoelectronic semiconductor device.

[0002] Methods for manufacturing optoelectronic semiconductor devices and optoelectronic semiconductor devices are known from documents DE 10 2004 025 684 A1, US 2006 / 0 192 209 A1, US 2003 / 0 111 447 A1 and US 2010 / 0 109 575 A1.

[0003] In optoelectronic semiconductor chips, such as light-emitting diodes (LEDs), crystal defects can render the LEDs inoperable. In particular, in modules with a large number of optoelectronic semiconductor chips, depending on the requirements, even a single defective chip can render the entire module, containing hundreds of chips, unusable. This applies, for example, to video walls, where the semiconductor chips are located very close together, making it difficult to replace a defective chip.

[0004] One task is to reduce the failure rate in the production of optoelectronic semiconductor components.

[0005] This problem is solved, inter alia, by a method for manufacturing optoelectronic semiconductor devices or by an optoelectronic semiconductor device according to the independent claims. Further embodiments and advantages are the subject of the dependent claims.

[0006] A method for manufacturing optoelectronic semiconductor components is described.

[0007] The process includes a step in which a composite is provided with a sequence of semiconductor layers. The semiconductor layer sequence has an active region designed for generating or receiving radiation. For example, a peak wavelength of the radiation lies in the ultraviolet, visible, or infrared spectral range.

[0008] For example, the semiconductor layer sequence is provided on a support. The support can be a growth substrate for the semiconductor layer sequence or a different support from the growth substrate.

[0009] The method includes a step in which the position of one or more defect regions within the semiconductor layer sequence is determined. In other words, a spatially resolved determination of defect regions across the entire assembly is performed.

[0010] For the purposes of this application, a defect region is generally understood to be an area in which the semiconductor layer sequence does not meet the specified properties and which, in particular, can lead to a semiconductor device formed from the semiconductor layer sequence being non-functional or only partially functional due to this defect region. The defect region is, for example, an epitaxial defect where non-radiative recombination or an electrical short circuit occurs. Specifically, a check for defect regions is carried out across the entire usable area of ​​the composite. Advantageously, the position of at least one defect region is stored and kept available for the subsequent process steps.

[0011] The method comprises a step in which a plurality of electrically contactable functional areas are formed. Each functional area comprises a portion of the semiconductor layer sequence and is free of any defect region. In particular, each functional area comprises a portion of the active region. This step is performed, in particular, after determining the position of at least one defect region, so that the position of the at least one defect region can be taken into account in the spatial arrangement of the functional areas.

[0012] The process comprises a step in which the composite is isolated into a plurality of optoelectronic semiconductor devices, each of which has at least one of the functional areas. This step is carried out in particular after determining the position of the at least one defect area and after forming the electrically contactable functional areas.

[0013] In at least one embodiment of the method, a composite with a semiconductor layer sequence is provided, wherein the semiconductor layer sequence has an active region intended for generating or receiving radiation. The position of one or more defect regions of the semiconductor layer sequence is determined. A plurality of electrically contactable functional regions are formed, wherein the functional regions each comprise a portion of the semiconductor layer sequence and are free of a defect region. The composite is isolated into a plurality of optoelectronic semiconductor devices, wherein each semiconductor device comprises at least one of the functional regions.

[0014] This method allows defect areas to be identified at an early stage of the process and taken into account during the formation of the functional areas. In particular, the functional areas can be formed while bypassing the defect areas, so that small defect areas on the assembly do not represent a failure point for a finished semiconductor device. In other words, defect areas can be excluded during the formation of the functional areas by means of a structure specific to each assembly and adapted to the position of the defect areas. This increases the yield in the production of semiconductor devices. The improvement in yield is greater the larger the lateral extent of the individual semiconductor device.

[0015] At least two of the functional areas adjacent to a defect area differ in their geometric design. For example, the functional areas may differ in their area and / or basic geometric shape when viewed from above. For instance, two functional areas may have a polygonal shape in which at least two interior angles differ, for example, by at least 5°. In particular, functional areas may differ in their area and / or basic geometric shape even though they fundamentally perform the same technical function, such as generating or receiving radiation of a specific wavelength.

[0016] According to at least one embodiment of the method, at least one of the isolated semiconductor devices has one of the defect regions, wherein, during operation of the semiconductor device, a current flows within the semiconductor device, bypassing the location of the defect region. In other words, the defect region is electrically deactivated, so that the semiconductor device remains functional even in the presence of a defect region. The yield in the production of the semiconductor devices can thus be further increased.

[0017] According to at least one embodiment of the method, the active region in the at least one defect region is removed or electrically isolated from the active region of an adjacent functional region, in particular from all adjacent functional regions, on at least one side of the active region. For example, the active region is electrically isolated on an n-type and / or a p-type side of the active region. In other words, during operation of the semiconductor device, charge carriers with different conductivity types, i.e., electrons and holes, cannot enter the active region from opposite sides and recombine there, emitting radiation. This ensures in a simple way that the active region in the defect region has no negative impact on the functionality of the semiconductor device.

[0018] According to at least one embodiment of the method, the active area is structured laterally during the formation of the plurality of electrically contactable functional areas such that the active area in the at least one defect area is spatially separated from the active area of ​​an adjacent functional area. This is achieved, for example, by means of a recess, particularly a trench-shaped one, which surrounds the defect area at least partially in a lateral direction. In particular, a portion of the recess, particularly a trench-shaped one, is located at each imaginary connecting line between the defect area and the adjacent functional area, so that there is no direct connection between the active area of ​​the adjacent functional area and the active area of ​​the defect area.

[0019] According to at least one embodiment of the method, the spatial separation of the defect area from the functional area and the formation of an outer boundary of the active area of ​​the semiconductor device are performed in a single manufacturing step. The outer boundary defines the circumferential boundary of the active area in the lateral direction. Therefore, no part of the active area of ​​the semiconductor device lies outside the outer boundary. The spatial separation of the defect area can thus be achieved without an additional structuring step, such as an additional etching step.

[0020] For external electrical contacting, semiconductor components advantageously each have at least one electrical contact surface.

[0021] According to at least one embodiment of the method, the contact surface is designed, depending on the determined position of the at least one defect region, such that the contact surface overlaps the defect region. In this way, an area of ​​the semiconductor device can be used to form the defect region, the active area of ​​which would otherwise be unusable for generating or receiving radiation.

[0022] According to at least one embodiment of the method, the at least one defect area is determined by measuring radiation emission under optical excitation, for example, by means of a spatially resolved photoluminescence measurement. With such a method, defect areas can be determined simply and reliably with spatial resolution, and in particular, automatically, especially defect areas where no luminescence occurs under optical excitation. Specifically, defect areas can be identified even before metallic contact structures for electrical contacting are applied to the semiconductor layer sequence. In principle, however, any other method that can identify defect areas with spatial resolution is also suitable for determining the defect areas, for example, by automated optical inspection (AOI).

[0023] The semiconductor devices each have a plurality of pixels, with at least one pixel having a substructure comprising a plurality of sub-regions. For example, a first sub-region is configured for generating radiation of a first color, and a second sub-region is configured for generating radiation of a second color different from the first. For example, each pixel comprises one or more sub-regions for generating radiation in the red spectral range, one or more sub-regions for generating radiation in the green spectral range, and / or one or more sub-regions for generating radiation in the blue spectral range.

[0024] According to at least one embodiment of the method, the substructure is designed, depending on the identification of the at least one defect area, such that the sub-areas are free of a defect area. In other words, the defect area is avoided in the design of the sub-areas based on the identified position of the at least one defect area.

[0025] According to at least one embodiment of the method, the substructure differs for at least two pixels. For example, the shape of the individual sub-areas is individually adapted by means of an automated data processing method based on the determined position of the at least one defect area for each pixel whose position overlaps with the position of a defect area, so that all sub-areas of the pixel are arranged without overlap with the defect area.

[0026] In each pixel, a first portion of the sub-areas is formed for generating radiation of a first color, and a second portion is formed for generating radiation of a second color different from the first. The substructure in each pixel that overlaps with a defect area is varied while maintaining the area ratio of the total area of ​​the first portion to the total area of ​​the second portion. The substructure is thus designed in such a way that the area ratio does not change, or at least not significantly, even if there is a deviation in the size and / or shape of the sub-areas.

[0027] Furthermore, an optoelectronic semiconductor device is specified.

[0028] The optoelectronic semiconductor device comprises a semiconductor body with a sequence of semiconductor layers. This sequence of semiconductor layers includes an active region designed for generating or receiving radiation.

[0029] The semiconductor body has a functional area and a defect area, wherein the active area of ​​the defect area is electrically isolated from the active area of ​​the functional area.

[0030] In at least one embodiment of the optoelectronic semiconductor device, the optoelectronic semiconductor device comprises a semiconductor body with a sequence of semiconductor layers. The sequence of semiconductor layers includes an active region for generating or receiving radiation. The semiconductor body has a functional region and a defect region, wherein the active region of the defect region is electrically isolated from the active region of the functional region.

[0031] The defect area does not necessarily have to be present in the semiconductor device. Alternatively, it is also conceivable that the defect area is completely removed during the manufacturing of the semiconductor device. For example, the semiconductor body has a recess at the location where the defect area was originally present.

[0032] The semiconductor device has multiple pixels. At least one pixel and one pixel each have a substructure with multiple sub-regions. The substructure of the first pixel differs from the substructure of the second pixel. In particular, the substructure of a pixel that overlaps with a defect region differs from the substructure of a pixel without a defect region and / or from the substructure of another pixel with a defect region. Specifically, the pixels are individually segmented by the substructure in such a way that defect regions are excluded and have no effect on the rest of the semiconductor device.

[0033] The individual sub-areas can differ from one another in terms of their size and / or their basic geometric shape. In particular, the pixels and the substructure can also be designed so that the resulting pixels are somewhat smaller or larger than in a corresponding conventional pattern that does not take defect areas into account. By individually adjusting the substructure, this can be achieved in such a way that the color and brightness impression of each pixel remains largely stable and unchanged.

[0034] Alternatively or additionally, individual sub-areas can be designed to operate with different currents. This allows a predetermined target color and / or brightness of the pixel to be achieved even in the presence of a defect area.

[0035] In each pixel, a first portion of the sub-areas for generating radiation of a first color and a second portion of the sub-areas for generating radiation of a second color different from the first are formed, and the sub-structure of the first pixel and the sub-structure of the second pixel are designed such that the total area of ​​the first portion of the first pixel and the total area of ​​the first portion of the second pixel differ from each other by no more than 10%. A uniform color impression / brightness impression of the pixels can thus be achieved more easily.

[0036] The described method is particularly suitable for the fabrication of the described optoelectronic semiconductor device. Features described in connection with the method can therefore also be applied to the optoelectronic semiconductor device, and vice versa.

[0037] Further designs and advantages will become apparent from the following description of the exemplary embodiments in conjunction with the figures.

[0038] They show: The Fig. 1A, Fig. 1B and Fig. 1C an embodiment of a method for the manufacture of optoelectronic semiconductor devices based on intermediate steps shown schematically in sectional view; Fig. 2A An embodiment of a section of a composite in schematic top view and an embodiment of a semiconductor device formed with the section, shown in schematic top view ( Fig. 2B) and two schematic sectional views along the in Fig. 2B shown lines AA' and BB' in the Fig. 2C or 2D; Fig. 3A an exemplary embodiment of a section of a composite and Fig. 3B an embodiment of a semiconductor device formed with the cutout, each in a schematic top view; Fig. 4A an exemplary embodiment of a section of a composite and Fig. 4B an embodiment of a semiconductor device formed with the cutout, each in a schematic top view; Fig. 5A An embodiment of a section of a composite in schematic top view and an embodiment of a semiconductor device formed with the section, shown in schematic top view ( Fig. 5B) and two schematic sectional views along the in Fig. 5B shown lines AA' and BB' in the Fig. 5C or 5D; The Fig. 6A to 6F an embodiment of a semiconductor device in top view ( Fig. 6A) and associated sectional views ( Fig. 6B and Fig. 6C), wherein Fig. 6D a substructure according to a target grid and the Fig. 6E and Fig. Figure 6F shows two embodiments of a substructure that deviates from the target grid.

[0039] Identical, similar, or similarly effective elements in the figures are provided with the same reference symbols.

[0040] The figures are schematic representations and therefore not necessarily to scale. Rather, comparatively small elements and especially layer thicknesses may be exaggerated for clarity.

[0041] In the Fig. Figures 1A to 1C show a method for manufacturing optoelectronic semiconductor devices.

[0042] A composite 3 with a semiconductor layer sequence 2 is provided ( Fig. 1A). For simplified representation, a section of the composite is shown, from which two semiconductor devices 1 result during subsequent separation.

[0043] The semiconductor layer sequence 2 has an active region 20 designed for generating or receiving radiation. The active region 20 is located between a first semiconductor layer 21 of a first conduction type and a second semiconductor layer 22 of a second conduction type different from the first. For example, the first semiconductor layer 21 is p-type and the second semiconductor layer 22 is n-type, or vice versa.

[0044] The semiconductor layer sequence 2 is arranged on a support 25. The support 25 can be a growth substrate for the deposition of the semiconductor layer sequence 2, particularly by epitaxial deposition, or a support different from the growth substrate.

[0045] As in Fig. As shown in Figure 1B, the position of defect regions 4 is determined. This is done, for example, by means of optical excitation, represented by arrow 81, which causes emission radiation from the active region 20, represented by arrow 82. This emission radiation is detected by means of a detector 8. Areas of the composite 3 where no emission radiation or at least only a greatly reduced emission radiation is emitted are identified as defect regions. The position of the defect regions 4 is stored. For determining the position of the defect regions, the optical excitation can be applied over a large area or only locally. In the case of large-area excitation, for example, a camera with a lens can serve as a detector 8, so that the emission radiation is detected with spatial resolution and the positions of the defect regions are thus determined.For local excitation, a detector 8, which itself does not provide spatially resolved information about the emission radiation, is sufficient in conjunction with information about the position of the optical excitation.

[0046] Subsequently, a plurality of electrically contactable functional areas 5 are formed from the semiconductor layer sequence 2. The formation of the functional areas 5 is based on the determined positions of the defect areas 4, such that the functional areas 5 are formed without overlap with the defect areas 4 ( Fig. 1C). The functional areas 5 are therefore each free of a defect region. The determination of a suitable geometry and / or size of the functional areas 5, i.e., a lateral structuring of the semiconductor layer sequence, can be carried out using an automated procedure.

[0047] The determined lateral structuring can, for example, be introduced into a photoresist layer applied to the semiconductor layer sequence 2 using a laser (in Fig. (1C not explicitly shown). For example, a so-called LDI (Laser Direct Imaging) method is suitable. The structure of the photoresist layer can subsequently be transferred to the semiconductor layer sequence 2 using a chemical process, such as a wet or dry chemical etching process. Alternatively, instead of exposing a photoresist layer, the material of the semiconductor layer sequence can be directly ablated for lateral structuring using laser ablation.

[0048] The lateral structuring transferred to the semiconductor layer sequence 2 can therefore be individually adapted for each laterally structured assembly 3, given the known position of the defect regions 4. This allows defect regions to be bypassed during the fabrication of the functional regions 5, thus increasing the manufacturing yield. In contrast, a conventional fabrication method for lateral structuring typically uses a photomask for exposing the photoresist layer, with the same photomask being used sequentially for several assemblies 3. Functional regions that overlap with a defect region in such a conventional method are non-functional and typically lead to the failure of the entire semiconductor device.

[0049] As in Fig. As shown in Figure 1C, the active region 20 of the defect region 4 is spatially separated from the active region of the adjacent functional region 5 by means of a recess 27. The recess 27 at least cuts through the active region 20 and can also completely cut through the semiconductor layer sequence 2. During subsequent electrical contact of the semiconductor device 1, a current flows within the semiconductor device, in particular within the semiconductor layer sequence 2, bypassing the defect region 4, so that even a semiconductor device 1 with a defect region 4 is functional.

[0050] The formation of the recesses 27 can be combined with the formation of an outer border 200 of the active area 20 in a single manufacturing step. Therefore, no additional process step, in particular no additional etching process, is required for the spatial separation of the defect areas 4.

[0051] Subsequently, the assembly 3 can be isolated into a plurality of optoelectronic semiconductor devices 1, such that each semiconductor device has at least one of the functional areas 5. This is in Fig. 1C indicated by separation lines 85.

[0052] The method is suitable for the fabrication of various optoelectronic semiconductor devices, such as those described in connection with the following figures. In particular, an optoelectronic semiconductor device 1 can also have more than one functional area 5. For example, the semiconductor device can have a plurality of pixels, where a pixel or a part of a pixel can represent a functional area.

[0053] An example embodiment of a semiconductor device is described in the Fig. 2B to 2D shown, where the Fig. Figure 2A shows a corresponding section of a composite 3 from which the semiconductor device 1 is produced during manufacturing. For the sake of simplicity, the composite 3 shows exactly one defect region 4. During the fabrication of the optoelectronic semiconductor device 1, the semiconductor layer sequence 2 is laterally structured such that a recess 27 spatially separates the active region 20 of the defect region 4 from the active region 20 of the adjacent functional region 5. The recess 27 encloses the active region 20 in a ring-like manner.

[0054] The optoelectronic semiconductor device 1 comprises a semiconductor body 29 with a sequence of semiconductor layers 2. The sequence of semiconductor layers is attached to a substrate 25, which is different from a growth substrate for the semiconductor layer sequence 2, by means of a bonding layer 35. For example, the bonding layer is a solder layer or an adhesive layer. A second semiconductor layer 22, arranged on the side of the active area 20 facing the substrate 25, is electrically connected to a second contact layer 32 for electrical contact. This second contact layer can preferably also function as a mirror layer. External electrical contact of the second contact layer 32 is achieved via a contact surface 6. This contact surface is arranged on the side of the substrate 25 facing the semiconductor body 29.To avoid shadowing, the contact surface is arranged laterally to the side of the semiconductor body 29.

[0055] Electrical contact of a first semiconductor layer 21 arranged on the side of the active area 20 facing away from the support 25 is effected in the functional area 5 via vias 28 which extend through the second semiconductor layer 22 and the active area 20 into the first semiconductor layer 21 ( Fig. 2C). A first connection layer 31 extends through the vias 28 for electrical contacting the first semiconductor layer 21. In the vertical direction, i.e., perpendicular to a principal extension plane of the semiconductor layers of the semiconductor layer sequence 2, the second connection layer 32 is arranged in certain areas between the semiconductor body 29 and the first connection layer 31. To prevent an electrical short circuit, an insulating layer 33 is arranged in the vias 28, which electrically isolates the first connection layer 31 from the active area 20 and from the second semiconductor layer 22.

[0056] In contrast to functional area 5, defect area 4 is free of a via 28. Therefore, during operation of the optoelectronic semiconductor device 1, no charge carriers can be injected into the active area 20 via the first semiconductor layer 21. Even if the second connection layer 32 extends continuously across the second semiconductor layer 22 of the defect area, defect area 4 remains electrically inactive during operation of the optoelectronic semiconductor device 1. During the fabrication of the semiconductor device, the spatial arrangement of the vias is therefore individually adapted to the determined position of the defect areas 4.

[0057] Alternatively, a via 28 can also be provided in the defect area 4. In this case, the second connection layer 32 can be omitted in the defect area, so that no charge carriers are injected into the active areas 20 via the second semiconductor layer 22 and the defect area 4 is electrically inactive during operation of the optoelectronic semiconductor device 1. With this alternative, the second connection layer 32 is thus designed, with knowledge of the position of the defect areas 4, such that the defect areas are electrically inactive.

[0058] The in the Fig. 3A and Fig. The embodiment shown in Figure 3B for an optoelectronic semiconductor device 1 and an underlying composite 3 corresponds essentially to that described in connection with the Fig. 2A and Fig. 2B described embodiment.

[0059] In contrast, the defect area 4 is located in an edge region of the semiconductor body 29. In this case, the recess 27 extends only partially around the defect area 4 and runs laterally to the outer perimeter 200 of the active region 20, for example in the form of a semicircle. Of course, a defect area can also be located in a corner of the semiconductor body, so that the recess can, for example, have the shape of a quarter ring.

[0060] The in the Fig. 4A and Fig. The embodiment shown in Figure 4B for an optoelectronic semiconductor device 1 and an underlying composite 3 corresponds essentially to that described in connection with the Fig. 3A and Fig. Example described in 3B.

[0061] In contrast, the contact surface 6 is arranged such that it overlaps the defect area 4. Thus, the contact surface is located in an area of ​​the semiconductor device 1 that, due to the existing defect area 4, would not be suitable for generating or receiving radiation anyway. The usable area of ​​the active region 20 of the semiconductor device 1 can therefore be increased while maintaining the same dimensions of the semiconductor device. In this case, the positioning of the contact surface is determined based on the position of the defect area as determined during manufacturing. The individually adapted arrangement of the contact surface can be achieved, for example, using an LDI (Liquid Dielectric Strengthening) process.Further processing of such a semiconductor component with such a displaced contact surface, for example for electrical contacting in a housing, can also be carried out, for example, by means of wiring that uses an LDI process.

[0062] Another embodiment of an optoelectronic semiconductor device 1 and an underlying composite 3 is described in the Fig. 5A to 5D are shown. This embodiment essentially corresponds to the one described in connection with the Fig. The embodiment described in Figures 2A to 2D differs in that the electrical contact of the first semiconductor layer 21, located on the side of the active region 20 facing away from the support 25, is made via a contact surface 6 arranged on the first semiconductor layer. To improve the homogeneity of the charge carrier injection in the lateral direction, contact bridges 61 are connected to the contact surface. However, in the region of the defect area 4, the first semiconductor layer 21 is not electrically connected to the contact surface 6, so that the defect area 4 is electrically inactive.

[0063] During the manufacturing of the optoelectronic semiconductor device, the defect area 4 can be described as in connection with Fig. 1C is spatially separated from the functional area 5. This can be achieved, in particular, by defining the outer boundary 200 of the active area 20 in a single manufacturing step. This can be carried out, in particular, after transferring the semiconductor layer sequence 2 from an original growth substrate to the support 25, for example, by rebonding at the wafer level.

[0064] If necessary, the design of the contact bridges 61 can be further selected such that the contact bridges are formed without overlap with the defect area 4, so that the latter is not electrically contacted. This is in the Fig. Figure 5B shows a contact bridge 61 which runs along the recess 27 in certain areas, thus preventing electrical contact with the defect area. Based on the Fig. Sections 6A to 6E describe exemplary embodiments of semiconductor devices 1 that have a plurality of functional areas 5 in the form of pixels 7. Fig. Figure 6A shows a schematic top view of a basic arrangement according to a target grid, in which each column of pixels 7 is assigned two top-side contacts 62 and each row of pixels 7 is assigned one back-side contact 63. Fig. 6B and Fig. Figure 6C shows corresponding side views. Each pixel 7 has a substructure 70 with a plurality of sub-areas. A sub-area 7R is intended for generating radiation in the red spectral range. This sub-area has a first radiation conversion element 71, which converts primary radiation from the active area in the blue spectral range of the semiconductor device 1 into secondary radiation in the red spectral range. Similarly, a sub-area 7G is intended for generating radiation in the green spectral range. This sub-area has a second radiation conversion element 72, which converts primary radiation from the active area into secondary radiation in the green spectral range. A sub-area 7B is intended for generating radiation in the blue spectral range. A radiation conversion element is not required for this.Each pixel has one or more sub-areas 7R, one or more sub-areas 7G and one or more sub-areas 7B.

[0065] In contrast to the described embodiment, it is also conceivable that the radiation conversion for generating red or green radiation is not located directly on the respective emission region. Furthermore, radiation in the blue spectral range can also be generated, for example, by means of another radiation conversion element, such as in the case of primary radiation from the active region in the ultraviolet spectral range. During the fabrication of the semiconductor device 1, the sub-regions of the pixels are formed from a common sequence of semiconductor layers.

[0066] In Fig. Figure 6D shows an example in which a defect area 4 in an embodiment of the substructure 70 according to a target grid 75 would cause at least one sub-area, in the illustrated embodiments a sub-area 7G and a sub-area 7B, to be non-functional due to the defect area 4, which would also render the entire semiconductor device 1 with a plurality of pixels 7 unusable.

[0067] The Fig. 6E and Fig. Figure 6F shows two different variants of the substructure 70 that deviate from the target grid 75, wherein the substructure is configured such that the individual sub-areas 7R, 7G, 7B of the pixels 7 are arranged without overlap with the defect area 4. During manufacturing, as in connection with the Fig. 1A to 1C, as described, determine the positions of the defect areas 4. Knowing these positions, the sub-areas 7R, 7G, 7B adjacent to a defect area can be individually designed to deviate from the target grid 75. The original area ratio of the target grid can be maintained. However, the sub-areas can also be designed to be slightly smaller or larger than according to the original target grid. This can be done using an automated process that automatically creates an individual substructure 70 of pixels for each group based on the known positions of the defect areas.

[0068] Preferably, this is done in such a way that the perceived brightness of each pixel remains as stable and unchanged as possible. This can be achieved by varying the basic shape and / or the size of the sub-areas 7R, 7G, 7B.

[0069] Fig. Figure 6E shows an embodiment in which the basic geometric shape of the sub-areas 7R, 7G, 7B is varied. Each sub-area has a polygonal structure, with at least some interior angles having a value other than 90°. In particular, at least some interior angles are acute angles.

[0070] At the in Fig. In the embodiment shown in 6F, the interior angles are, in contrast, either 90° or 270°.

[0071] In contrast to the described embodiments, the shape of the individual sub-areas 7R, 7G, 7B can be varied within wide limits. For example, the border of a sub-area can also be partially curved.

[0072] In each pixel, a portion of the sub-areas 7R, 7G, 7B is designated for generating radiation in the red, green, and blue spectral ranges, respectively. When determining the substructure 70, the deviation from the target grid 75 is preferably achieved such that the area ratio of the individual portions across the pixels does not change or changes only slightly. This simplifies the process of achieving a homogeneous color impression. For example, the total area of ​​a first portion (i.e., sub-areas for generating radiation in the red, green, or blue spectral range) of a first pixel 7 and a corresponding total area of ​​the first portion of a second pixel 7 differ from each other by a maximum of 10%.

[0073] For the fabrication of the semiconductor devices 1, the target grid 75 can be selected such that low epitaxial area redundancies are maintained, so that a specified target brightness for each pixel 7 can be achieved even in the presence of a defect area 4. The area of ​​the active region lost due to the defect areas can then be taken over by adjacent functional regions. This allows a yield of almost 100% to be achieved.

[0074] Furthermore, the reduction of the failure rate in the system 3 to almost 0% in conjunction with a homogenization of the wavelength of the emitted radiation and the brightness of the individual sub-areas allows a parallel transfer of semiconductor components 1 in the form of semiconductor chips.

[0075] The described manufacturing process can increase the yield in the production of semiconductor devices 1, in particular by identifying defect regions 4 with spatial resolution at an early stage of the process, especially before the lateral structuring of the active region 20. At least one subsequent manufacturing step is individually adapted for each assembly 3, taking into account the position of the defect regions. In particular, the lateral structuring of the active region can be individually designed for each assembly, considering the position of the defect regions, such that the functional regions 5 are formed without overlapping with the defect regions 4. This ensures that the presence of a defect region does not impair the functionality of the semiconductor device, or at least not significantly so. Reference symbol list 1 optoelectronic semiconductor device 2 Semiconductor layer sequence 20 active area 200 outer border 21 first semiconductor layer 22 second semiconductor layer 25 carriers 27 Exclusion 28 Vias 29 Semiconductor bodies 3 network 31 first connection layer 32 second connection layer 33 Insulation layer 35 Compound layer 4 Defect area 5 Functional area 6 Contact area 61 Contact bridge 62 Top contact 63 Back contact 7 pixels 70 substructure 7R sub-area 7G sub-area 7B Sub-area 71 first radiation conversion element 72 second radiation conversion element 75 target grid 8 Detector 81 Arrow 82 Arrow 85 Singling line

Claims

[1] Method for the fabrication of optoelectronic semiconductor devices (1) comprising the steps: a) Providing a composite (3) comprising a sequence of semiconductor layers (2) having an active region (20) intended for generating or receiving radiation; b) Determining the position of at least one defect region (4) of the semiconductor layer sequence (2); c) Forming a plurality of electrically contactable functional areas (5), each comprising a portion of the semiconductor layer sequence (2) and free from a defect region (4); and d) Separating the assembly (3) into a plurality of optoelectronic semiconductor devices (1), each having at least one of the functional areas (5), wherein - at least two of the functional areas (5) formed in step c), each adjacent to the position of a defect area (4), differ from each other with regard to their geometric design; - the semiconductor devices (1) have a plurality of pixels (7) and at least one pixel (7) has a substructure (70) with a plurality of sub-regions (7R, 7G, 7B); and - in each pixel (7) a first part of the sub-areas (7R, 7G, 7B) for generating radiation of a first color and a second part of the sub-areas (7R, 7G, 7B) for generating radiation of a second color different from the first color are formed and the sub-structure (70) in each pixel (7) that overlaps with a defect area (4) is varied while maintaining an area ratio of the total area of ​​the first part to the total area of ​​the second part. [2] Method according to claim 1, wherein at least one of the isolated semiconductor devices (1) has one of the defect areas (4) and during operation of the semiconductor device (1) a current flow takes place within the semiconductor device (1) bypassing the position of the defect area (4). [3] Method according to one of the preceding claims, wherein the active area (20) in the at least one defect area (4) is removed or electrically isolated from the active area (20) of an adjacent functional area (5). [4] Method according to one of the preceding claims, wherein the active area (20) in step c) is structured laterally such that the active area (20) in the at least one defect area (4) is spatially separated from the active area (20) of an adjacent functional area (5). [5] Method according to claim 4, wherein the lateral structuring of the active area (20) is carried out depending on the position of the at least one defect area (4) determined in step b). [6] Method according to claim 4 or 5, wherein the spatial separation of the defect area (4) and the formation of an outer perimeter (200) of the active area (20) of the semiconductor device (1) are carried out in a common manufacturing step. [7] Method according to one of the preceding claims, wherein at least one electrical contact surface (6) is formed on each of the semiconductor devices (1), wherein the contact surface (6) is formed depending on the position of the at least one defect area (4) determined in step b) such that the contact surface (6) overlaps with the defect area (4). [8] Method according to one of the preceding claims, wherein the at least one defect area (4) is determined by measuring a radiation emission under optical excitation. [9] Method according to one of the preceding claims, wherein the substructure (70) is designed depending on the determination of the at least one defect area (4) such that the sub-areas (7R, 7G, 7B) are free of a defect area (4). [10] Method according to any of the preceding claims, wherein the substructure (70) differs from each other for at least two pixels (7). [11] Optoelectronic semiconductor device (1) comprising a semiconductor body (29) having a sequence of semiconductor layers (2) with an active region (20) for generating or receiving radiation, wherein - the semiconductor body (29) has a functional area (5) and a defect area (4); - the active area (20) of the defect area (4) is electrically isolated from the active area (20) of the functional area (5) on at least one side of the active area (20), - the semiconductor device (1) has a plurality of pixels (7); - at least one first pixel (7) and one second pixel (7) each have a substructure (70) with a plurality of sub-areas (7R, 7G, 7B); - the substructure (70) of a first pixel (7) differs from the substructure (70) of a second pixel (7); and - in each pixel (7) a first part of the sub-areas (7R, 7G, 7B) for generating radiation of a first color and a second part of the sub-areas (7R, 7G, 7B) for generating radiation of a second color different from the first color are formed and the sub-structure (70) of the first pixel (7) and the sub-structure (70) of the second pixel (7) are formed such that a total area of ​​the first part of the first pixel (7) and a total area of ​​the first part of the second pixel (7) differ from each other by at most 10%.

Citation Information

Patent Citations

  • Method for forming a contact structure for electrically contacting an optoelectronic semiconductor chip

    DE102004025684A1

  • Method and apparatus for repair of defects in materials with short laser pulses

    US20030111447A1

  • Optical integrated semiconductor light emitting device

    US20060192209A1

  • Single chip LED as compact color variable light source

    US20100109575A1