MTJ manufacturing process with pre-structured nucleation layer

DE112018001890B4Active Publication Date: 2026-07-02TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
Filing Date
2018-03-07
Publication Date
2026-07-02

AI Technical Summary

Technical Problem

The challenge in magnetic random access memory (MRAM) technology is patterning the magnetic tunnel junction (MTJ) stack without damaging the device during plasma etch processes, as the thin magnetic layers are easily damaged by etch plasma gases, leading to physical or chemical damage and redeposition of metal residues.

Method used

A method is introduced where the seed layer is deposited and patterned before the MTJ stack, allowing the MTJ stack to be etched with reduced exposure to etch plasma gases, minimizing etch damage and redeposition by combining the seed layer etch process with the bottom electrode etch.

Benefits of technology

This approach significantly reduces etch damage and sidewall redeposition, improving the electrical performance and reliability of MRAM devices by shortening etch time and minimizing conductive path formation.

✦ Generated by Eureka AI based on patent content.
Patent Text Reader

Abstract

A method for etching an MTJ structure comprising: providing a bottom electrode layer (12) on a substrate (10); applying a seed layer (16, 16a) to the bottom electrode layer (12); structuring the seed layer (16, 16a) and bottom electrode layer (12); applying a dielectric layer over the structured seed layer and the structured bottom electrode layer and planarizing the dielectric layer (14), exposing the structured seed layer (16, 16a), wherein the planarized dielectric layer (14) laterally surrounds the structured seed layer (16, 16a) and the structured bottom electrode layer (12), the dielectric layer (14) extending continuously along a side wall of the seed layer (16, 16a), a top surface of the bottom electrode layer (12), and a side wall of the bottom electrode layer (12);subsequently applying a stack (30) of MTJ layers comprising a defined layer (18), a tunnel barrier layer (20) and a free layer (22) onto the structured seed layer (16a), wherein the structured seed layer (16a) promotes the growth of large crystal grains in the stack (30) of MTJ layers; and structuring the stack (30) of MTJ layers to form an MTJ device, wherein the seed layer (16, 16a) is structured such that it has a width smaller than the width of the MTJ device.
Need to check novelty before this filing date? Find Prior Art

Description

TECHNICAL AREA

[0001] This application relates to the general field of magnetic tunnel junctions (MTJs) and in particular to etching methods for forming MTJ structures. GENERAL STATE OF THE ART

[0002] The fabrication of magnetic resistance devices typically involves a series of processing steps in which numerous metal and dielectric layers are deposited and then structured to form a magnetic resistance stack and electrodes for electrical connections. The magnetic resistance stack usually contains the device's free and pinned layers arranged around one or more dielectric layers that act as the tunnel contact for the magnetic tunnel contact (MTJ) device.

[0003] A critical challenge in magnetic random access memory (MRAM) technology is structuring the magnetic tunnel junction (MTJ) stack without damaging the device. The thin magnetic layers used in the MTJ stack are quickly damaged during plasma etching processes. Therefore, a processing plan for manufacturing the MTJ device is desired that can minimize the tunnel junction's contact with plasma processes.

[0004] US patents 6,849,465 (Park et al) and 9,373,782 (Li et al) teach structuring the ground electrode first, then applying and structuring the MTJ stack, but these methods differ from this disclosure. BRIEF SUMMARY OF THE INVENTION

[0005] One of the purposes of this revelation is to provide an improved method for forming MTJ structures.

[0006] Another objective of this disclosure is to provide a method for structuring MTJ devices that can minimize the etching damage to the device caused by prolonged contact with etching plasma gases.

[0007] According to the principles of this disclosure, a method for etching a magnetic tunnel contact (MTJ) structure is achieved. A bottom electrode layer is provided on a substrate. A seed layer is deposited on the bottom electrode layer. The seed layer and the bottom electrode layer are structured. A dielectric layer is deposited and planarized over the structured seed layer and the bottom electrode layer. Subsequently, a stack of MTJ layers is deposited on the structured seed layer, comprising a pinning layer, a tunnel barrier layer, and a free layer. The MTJ stack is then structured to form an MTJ device. Since the seed layer was structured prior to the MTJ structuring step, the contact time of the device with the etching plasma gases is shortened, and thus etching damage is minimized. List of characters

[0008] The accompanying drawings, which form an essential part of this description, show: Fig. Figure 1 is a flowchart of a state-of-the-art MTJ process sequence. Fig. 2 and Fig. 3 are cross-sectional representations of steps in a state-of-the-art process. Fig. Figure 4 is a flowchart of a first preferred embodiment of this disclosure. The Fig. 5 to Fig. 8A and Fig. Figure 8B presents in a cross-sectional view steps in a first preferred embodiment of this disclosure. The Fig. 8A and Fig. Figure 8B shows in a cross-sectional view two options for a germ layer width in a preferred embodiment of this disclosure. Fig. Figure 9 is a flowchart of a second preferred embodiment of this disclosure. Fig. 10 to Fig. Figure 13 presents in a cross-sectional view steps in a second preferred embodiment of this disclosure. DETAILED DESCRIPTION

[0009] A new integration plan for avoiding damage to MTJ layers due to excessively long contact with plasma processes is described. Fig. Figure 1 is a flowchart illustrating a standard procedure for forming a magnetic tunnel junction (MTJ) device as described in the Fig. 2 and Fig. 3 shown in cross-section.

[0010] As in Fig. 1 in a first step 101 As shown, a CMOS substrate with through-hole plating has been fabricated for connection to the MTJ device, which is subsequently formed. The substrate 10 will be in Fig. 2 shown. Next, in step 102 a ground electrode structured. Fig. 2 represents a ground electrode 12and subsequently an applied and planarized dielectric layer 14 Next, in step 103 the MTJ film layers including a nucleation layer 16 , a pinning layer 18 , a barrier layer 20 , a free shift 22 and a sealing layer 24 as in Fig. 2 shown, applied. These layers form the MTJ foil stack. 30 .

[0011] In step 104 A photoresist structure is produced to structure the MTJ device. Fig. 2 represents a structured hard mask 32 in step 105 The MTJ stack is etched. Fig. 3 represents the etching of the MTJ stack, which forms the germ layer 16The magnetic foil stack is etched using the hard mask. The MTJ layers are very thin and can be easily damaged during plasma etching. In the standard MRAM etching process, the etching plasmas can physically or chemically damage the layers or cause re-deposition of metal-containing residues. This may be due to the low etch selectivity and the non-volatility of byproducts formed during the etching process. Such residues can be removed as described in section 35. Fig. 3 shown being built up along the side wall of the structured foil stack and forming a guiding path.

[0012] This conductive path or the damaged layers can cause electrical short circuits within an MRAM device, e.g., between the magnetic layers separated by the tunnel layer, or can impair the performance of the MRAM device, or the MRAM device may not function at all.

[0013] The basic idea of ​​this disclosure is to create an integration plan for a new process to minimize physical or chemical damage to the magnetic layers and to reduce the re-deposition of metal-containing residues. The bottom layer of a magnetic storage device is the nucleation layer. The purpose of the nucleation layer is to promote the growth of large crystal grains and, in some cases, to provide proper crystallographic orientation. The nucleation layer must be thick enough to fulfill these purposes. It could be approximately 1 / 3 the thickness of the entire MTJ stack. Because of this thickness, etching the nucleation layer can be lengthy and requires a long etching time to confirm that no residue remains on the surface. This prolonged exposure to etching gases can affect other critical layers, such as...the pinning layer, the barrier layer and the free layer, cause physical or chemical damage and can be described as in . Fig. Figure 3 also shows a reapplication of metal-containing residues. 35 along the sidewall. If the etching time can be reduced, the physical or chemical damage and the need for re-etching along the sidewall can also be reduced.

[0014] A key feature of this discovery is the combination of the etching process of the seed layer with the etching of the bottom electrode. The seed layer is applied together with the application of the bottom electrode.

[0015] Fig. Figure 4 is a flowchart of a first preferred execution process of this disclosure. See also Fig. 5-8a and Fig. 8b. In step 401A CMOS substrate with vias is constructed to connect to the MTJ device, which is subsequently formed. The substrate 10 will be in Fig. 5 shown. Next, in step 402 a soil electrode and a germination layer are structured. Fig. 5 represents a ground electrode layer 12 , a germ layer 16 and a protective layer 17 , such as Ta or TiN, which can be used as a hard mask for etching the seed layer. The bottom electrode and the seed layer can be structured using the seed layer as a hard mask for etching the bottom electrodes, or separately using two photolithographic steps and then planarized. The photoresist structure 42 will be in Fig. 5 shown.

[0016] Fig. Figure 6 shows the structured ground electrode 12 and the germinal layer 16The dielectric layer 14 will be like in Fig. 7 shown applied and planarized. Also the protective layer. 17 is achieved by chemical mechanical polishing (CMP) or another planarization process either before or after the dielectric layer 14 is formed, removed. The protective layer 17 It can also be removed during cathode sputtering before applying the MTJ film. Before applying the MTJ film, the nucleation layer is exposed, for example, during the planarization step.

[0017] Now, in step 403 the MTJ foil layers including the pinning layer 18 , the barrier layer 20 , the free shift 22 and the sealing layer 24 , as in Fig. 7 shown, applied. The first layer of the stack will be the germination layer. 16 Contact directly. These layers form the MTJ foil stack.30 The hard mask layer 32 is applied on top of the MTJ layer stack.

[0018] In step 404 A photoresist structure is produced to structure the MTJ device, and the structure is applied to the hard mask. 32 transferred. In step 405 The MTJ stack is etched. Fig. Figure 8 represents the etching of the MTJ stack. Since the germ layer 16 Since the pre-structured layer is already present, the etching time of the tunnel contact is significantly reduced. This results in less etching damage and less re-application of the material to the sidewall. The pre-structured layer can be larger than, the same as, or slightly smaller than the MTJ device. Fig. Figure 8a shows a germ layer that is larger than the MTJ device and Fig. Figure 8b shows a nucleation layer that is smaller than the MTJ device. In the case of the same or smaller nucleation layer, the re-metal deposition on the side wall is reduced even further, since only the dielectric material is removed during etching. 14 is exposed.

[0019] Fig. Figure 9 is a flowchart of a second preferred execution process of this disclosure. See also Fig. 10 - Fig. 13. In step 901 A CMOS substrate with vias is constructed to connect to the MTJ device, which is subsequently formed. The substrate 10 will be in Fig. 10 shown. Next, in step 902 a soil electrode and a partial germ layer are structured. Fig. 10 represents a ground electrode layer 12 , a germ layer 16a and a protective layer 17, such as Ta or TiN, which act as a hard mask for etching the germinal layer 5 to be used.

[0020] The bottom electrode and the seed layer can be structured using the seed layer as a hard mask for etching the bottom electrode, or separately using two photolithography steps followed by planarization. Between approximately 60% and 80%, and preferably approximately 80%, of the desired seed layer thickness can be used as a layer. 16a 20% of the thickness is applied as a layer. 16b upset.

[0021] When a thin nucleation layer is applied together with an MTJ film, it can better act as a buffer layer for continuous crystal growth between the nucleation layer and the MTJ film.

[0022] Now, applying and structuring most of the nucleation layer will offer the advantage of reducing plasma contact time while simultaneously providing a thin buffer layer for continuous crystal growth as the MTJ layers are applied.

[0023] Fig. Figure 11 shows the structured ground electrode 12 and the germinal layer 16a . The dielectric layer 14 will be like in Fig. 12 shown applied and planarized. The protective layer 17 is achieved by chemical, mechanical polishing (CMP) or another leveling process either before or after the dielectric layer 14 is formed, removed. The protective layer 17 It can also be removed during cathode sputtering before applying the MTJ film. The nucleation layer 16a is exposed, for example by the leveling step.

[0024] Now, in step 903 the rest of the germ layer 16b , approximately 20% of the desired germination layer thickness, upon direct contact with the first germination layer 16a , followed by the remaining MTJ film layers, including the pinning layer 18 , the barrier layer 20 , the free shift 22 and the sealing layer 24 as in Fig. 12 layers were applied. These layers form the MTJ film stack. 30 The hard mask layer 32 is applied on top of the MTJ layer stack.

[0025] In step 904 A photoresist structure, designed to structure the MTJ device, is applied to the hard mask. 32 transferred. In step 905 The MTJ stack is etched. Fig. 13 represents the etching of the MTJ stack. Since only a thin germ layer 16bSince the pre-structured seed layer is etched together with the rest of the MTJ film layers, the etching time of the tunnel contact is significantly reduced. This results in less etching damage and less reapplication of the layer on the sidewall. As in the first embodiment, the pre-structured seed layer can be... 16a larger than, the same as, or slightly smaller than the MTJ device.

[0026] In this second embodiment, the tunnel contact layers will grow on top of a continuous seed layer; however, the etching time will be significantly reduced, since the majority of the seed layer materials will be etched along with the bottom electrode prior to MTJ etching. Therefore, there will be less etch damage and less re-application on the sidewall.

[0027] Applying the seed layer together with the bottom electrode layer and structuring them together will reduce the etching time of the MTJ device, thereby reducing etch damage and re-metal deposition along the MTJ sidewall. This should significantly improve the problem of electrical short circuits and also enhance the device's performance. The option to structure the seed layer at the same width as, or narrower than, the MTJ device further reduces re-metal deposition along the sidewall. Optionally, instead of applying the entire seed layer along the bottom electrode, the majority of the seed layer, approximately 80%, is applied along the bottom electrode layer, and the seed layer and bottom electrode layer are structured together.In this way, only a thin seed layer is applied along the other MTJ foil stack layers, reducing the etching time of the MTJ fixture and thus resulting in less etch damage and reduced re-metal deposition along the MTJ sidewall. The seed layer can be approximately 1 / 3 the thickness of the entire MTJ stack. Removing the seed layer before applying the MTJ layers can reduce the etching time of the MTJ stack by up to half.

[0028] Although the preferred embodiment of this disclosure has been presented and this form has been described in detail, it will be readily apparent to the person skilled in the art that various modifications can be made to it without deviating from the spirit of the disclosure or from the scope of the attached claims. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] US 6849465

[0004] US 9373782

[0004]

Claims

[1] Method for etching a magnetic tunnel contact (MTJ) structure comprising: Providing a layer of ground electrodes on a substrate; Application of a nucleation layer to the soil electrode layer; Structuring the germination layer and the soil electrode layer; Applying a dielectric layer that restructures the nucleation layer and the bottom electrode layer and planarizes the dielectric layer, exposing the nucleation layer; subsequently, a stack of MTJ layers is applied to the structured seed layer, comprising a pinning layer, a tunnel barrier layer, and a free layer; and Structuring the MTJ stack to form an MTJ device. [2] Method according to claim 1, wherein the germ layer is structured to have a width equal to the width of the MTJ device. [3] Method according to claim 1, wherein the germ layer is structured to have a greater width than the width of the MTJ device. [4] Method according to claim 1, wherein the germ layer is structured to have a narrower width than the width of the MTJ device. [5] The method of claim 1, wherein the germ layer is a first germ layer and further comprising: Applying a second germ layer that restructures the first germ layer, wherein the first thickness of the first germ layer is between approximately 60% and 80% of the combined thickness of the first and second germ layers; and Structuring the second germ layer as part of the MTJ stack. [6] Method according to claim 1, wherein the nucleation layer and the bottom electrode layer are structured separately. [7] Method according to claim 1, wherein the nucleation layer and the bottom electrode layer are structured together. [8] Method for etching a magnetic tunnel contact (MTJ) structure comprising Providing a layer of ground electrodes on a substrate; Application of a nucleation layer to the soil electrode layer; Structuring the germ layer and soil electrode layer; Applying a dielectric layer that restructures the nucleation layer and bottom electrode layer and planarizes the dielectric layer, exposing the nucleation layer; subsequently, a stack of MTJ layers is applied to the structured seed layer, comprising a pinning layer, a tunnel barrier layer, and a free layer; and Structuring the MTJ stack to form an MTJ stack, wherein the germ layer is structured to have a width equal to or less than the width of the MTJ device. [9] The method of claim 8, wherein the germ layer is a first germ layer and further comprising: Applying a second germ layer that restructures the first germ layer, wherein the first thickness of the first germ layer is between approximately 60% and 80% of the combined thickness of the first and second germ layers; and Structuring the second germ layer as part of the MTJ stack. [10] Method according to claim 8, wherein the nucleation layer and the bottom electrode layer are structured separately. [11] Method according to claim 8, wherein the seed layer and the bottom electrode layer are structured together. [12] Method for etching a magnetic tunnel contact (MTJ) structure comprising Providing a layer of ground electrodes on a substrate; Application of an initial germination layer to the soil electrode layer; Structuring the first germination layer and the soil electrode layer; Applying a dielectric layer that restructures the first nucleation layer and the bottom electrode layer and planarizes the dielectric layer, exposing the first nucleation layer; subsequently, a stack of MTJ layers is applied to the structured first seed layer, comprising a second seed layer, a pinning layer, a tunnel barrier layer, and a free layer; and Structuring the MTJ stack to form an MTJ device. [13] Method according to claim 12, wherein the first germ layer is structured to have the same width as the MTJ device. [14] Method according to claim 12, wherein the first germ layer is structured to have a wider width than the MTJ device. [15] Method according to claim 12, wherein the germ layer is structured to have a narrower width than the MTJ device. [16] Method according to claim 12, wherein a first thickness of the first germ layer is between approximately 60% and 80% of a second thickness of the first and second germ layers combined. [17] Method according to claim 12, wherein the first seed layer and the bottom electrode layer are structured separately. [18] Method according to claim 12, wherein the first seed layer and the bottom electrode layer are structured together.