CAN transmitter with fast CANL control loop

Abstract

Controller Area Network (CAN) transmitter comprising: an output stage circuit (306); a replication circuit (304) of the output stage circuit configured to generate a replication signal; and a control amplifier (328) configured to: control a CANL output signal of the CAN transmitter to maintain the replication signal at a desired level; wherein the output stage circuit (306) comprises gate discharge switches (334, 336) coupled to gates of transmitters of the output stage circuit (306) and the replication circuit (304).

Description

The present disclosure relates to controller area network (CAN) control, and more particularly to a CAN transmitter with a fast CANL control loop.CAN is defined in International Standards Organization (ISO) specification 11898. ISO 11898 is a family of specifications in which ISO11898-1 covers a data link layer, while ISO 118980-2 and ISO 118980-3 cover physical layers of CAN. CAN is a robust communication protocol. A CAN node on a bus may detect errors in a received message and force the message to be destroyed and retransmitted. Accordingly, the message a node receives includes valid data. A CAN frame requires each node to acknowledge the message before it can be processed by that node. This acknowledgement may only be made after various error state checks, e.g. after a 15 bit cyclical redundancy check (CRC) for the message. If a CAN node finds an error in the message, the message is destroyed and retransmitted.The CAN specification defines three different fault states for a CAN node, each fault state giving the CAN node different levels of bus accesses. The fault conditions prevent faulty nodes from shutting down the CAN bus.CAN involves serial communication in which all nodes on the CAN bus are connected to a common link at the same bit rate. CAN is message-based rather than address-based. Thus, messages are not transmitted from one node to another node based on the address of a CAN node. Instead, a CAN node sends its message to all nodes on the bus. The receiving node must determine whether to respond to this message. Single or multiple nodes may respond to the same data. Accordingly, it is possible to add new nodes to a CAN bus without having to update the existing nodes with addressing information.CAN enables distributed control over a network due to the reliability of the data. This allows developers of the network to establish consumer producer or peer-to-peer networks.CAN network transmission may be performed using a differential pair of transmission lines - CANH and CANL. CAN may indicate two logical states: recessive and dominant. During the review logic state, CANH and CANL may have approximately the same voltage or be within a certain voltage tolerance of each other. During the dominant logic state, CANH and CANL may be separated by a voltage difference VDiff. FIG. 1 shows an example differential bus using CAN, including CANH, CANL, and VDiff.In the recessive state (i.e. logic "1" at an input of a CAN transceiver or module), the differential voltage at CANH and CANL is less than the minimum threshold value (<0.5 V receiver input or <1.5 V transmitter output). In the dominant state (i.e., logic "0" at the input of a CAN transceiver or module), VDiffis greater than the minimum threshold. A dominant bit overrides a recessive bit on the bus to achieve non-destructive bitwise arbitration.A slope control circuit is known from U.S. Patent Application U.S. Pat. No. 2017 / 0 063 354 A1. From U.S. Patent Application US 2014 / 0 320 229 A1, a transmission line driver circuit is known. International patent application WO 2006 / 133 731 A1 discloses a communication system with twisted pairs for a CAN system.It is an object of the present invention to provide a CAN transmitter that provides a wide bandwidth and accurate adjustment of low-side and high-side current. These and other objects are achieved by the features of the independent claims.Embodiments of the present disclosure include a CAN transmitter. The CAN transmitter may include an output stage circuit, an output stage circuit replication circuit configured to generate a replication signal, and a control amplifier configured to control a CANL output signal of the CAN transmitter to maintain the replication signal at a desired level. In combination with any of the above embodiments, the control amplifier may be further configured to control a low side of the output stage circuit to generate the CANL output signal. In combination with any of the above embodiments, the control amplifier may be further configured to provide no control over a CANH output signal of the CAN transmitter. In combination with any of the above embodiments, the control amplifier may be further configured to bias transistors for the CANL output signal of the CAN transmitter during dominant states and during recessive states. In combination with any of the above embodiments, the output stage circuit may include a CANL driver including a lateral double diffused NMOS transistor and a free wheeling diode. In combination with any of the above embodiments, the replication circuit may include two resistors configured to model a CAN bus load. In combination with any of the above embodiments, a center node of the two resistors may be connected as an input to the control amplifier. In combination with any of the above embodiments, the control amplifier may be further configured to control a gate voltage of an NMOS transistor of a CANL driver of the output stage circuit to maintain the replication signal at a desired level. In combination with any of the above embodiments, the replication circuit may be less than 30% of the size of the output stage circuit. In combination with any of the above embodiments, the control amplifier may be further configured to perform active feedforward for compensating a common mode gain margin of the transmitter. In combination with any of the above embodiments, the CAN transmitter may further include gate discharge switches coupled to gate terminations of transmitters of the output stage circuit and the replication circuit.Embodiments of the present disclosure may include a system, a controller, an integrated circuit device, or a microcontroller having one of the CAN transmitters of the above embodiments.Embodiments of the present disclosure may include methods performed by any of the CAN transmitters, systems, controllers, integrated circuits, or microcontrollers of the above embodiments. FIG. 1 is an illustration of example CAN signaling. FIG. 2 is an illustration of an exemplary CAN network according to embodiments of the present disclosure. FIG. 3 is an illustration of an exemplary CAN transceiver according to embodiments of the present disclosure.FIG. 2 is an illustration of an example CAN network 100, in accordance with embodiments of the present disclosure. The network 100 may include any suitable number and type of CAN nodes 102. For example, the network 100 may include nodes 102A, 102B, 102C. The nodes 102 may be configured to communicate with each other via a CAN bus 116. The CAN bus 116 may be implemented with two lines. For example, the CAN bus 116 may include a CANH line 120 and a CANL line 118.The nodes 102 may be implemented in any suitable manner. FIG. 2 illustrates example variations of CAN node implementations. The CAN node 102A may be implemented with, for example, a microcontroller 104. Microcontroller 104 may be implemented, for example, by a Applicant's 8 bit, 16 bit, or 32 bit PIC microcontroller. The microcontroller 104 may not include an integrated CAN module. Accordingly, the CAN node 102A could include a separately implemented CAN module 110A.The CAN modules 110 in the network 100 may be configured to provide an interface between a CAN transceiver 112 and the rest of the CAN node 102. The CAN modules 110 may be implemented by any suitable mechanism, such as libraries, software stacks, functions, applications, drivers, or instructions for execution by a processor. The CAN transceivers 112 may be implemented in any suitable manner, such as by analog circuitry, digital circuitry, instructions for execution by a processor, or any suitable combination thereof. The CAN modules 110 may make function calls from CAN transceivers 112 to transmit and receive data, or otherwise execute the CAN protocol. Other elements of the CAN nodes 102 may in turn perform function calls of the CAN modules 110. For example, software executing on microcontroller 110A may communicate with other nodes by making function calls to CAN module 110A, which in turn may make function calls to CAN transceiver 112A. CAN transceiver 112A may read and write data to or from other CAN nodes 102 via CAN bus 116.The CAN node 102A may include a microcontroller 110A that does not have an integrated CAN module 110A. The CAN node 102B may include a microcontroller 110B that includes an integrated CAN module 110A. The CAN node 102C may be implemented as a CAN input / output (I / O) expander. CAN node 102C may provide an I / O extension to CAN network 100 without a microcontroller. CAN node 102C may include peripheral devices, such as general purpose I / O, A2D, pulse width modulation, or other interfaces to send periodic or event-based messages based on thresholds.A number of challenges may arise in implementing the CAN network 100. For example, electromagnetic compatibility (EMC) problems such as electromagnetic interference (EMI) or electromagnetic environments (EME) may occur during the development of the CAN system. In CAN, differential communication must be presumed to function despite EMI. Such digital communication may involve operations even over a wide range of common modes + / - 12V. Moreover, such digital communication may involve operating with injected radio frequency (RF) power of up to 36 dBm (40V peak). Moreover, CAN must operate in EMEs with common mode emissions of up to 55 dBμV (0.6 mV) up to 20 MHz, with up to 15 dBμV (6 μV) common mode emissions at 75 MHz and a differential signal amplitude of 2V. Moreover, CANL and CANH currents may need to match extremely accurately at both DC and transients.Referring to FIG. 1, a given CAN node may exercise slow or fast control to generate CANH or CANL signals at a transceiver. The "fast" or "slow" aspect may refer to the speed of a control loop to generate an appropriate dominant or recessive signal. In particular, the "fast" or "slow" aspect of the CANH or CANL control may refer to the slope of the change of the signals between the review and the dominant state or between the dominant and the review state. The slope may also be referred to as the rate of rise of the signal transition. Faster rise and fall times may support higher bus rates and longer bus lengths in network 100.FIG. 3 shows a more detailed view of a CAN transceiver 300 in accordance with embodiments of the present disclosure. Transceiver 300 may partially implement transceivers 112 of FIG. 2. The transceiver 300 may receive a signal 318 from other portions of the transceiver (not shown) or a CAN module 110. The signal 318 may be a dominant or recessive logic signal indicative of a bit pattern of values to be written to the CAN network 100. The output dominant or recessive signal may be written to the terminals of CANH 308 or CANL 310. The terminals of CANH 308 and CANL 310 may be connected to CANH line 118 and CANL line 120, respectively. Transceiver 300 may be configured to perform faster rise and fall times for writing re-intensive or dominant states to the ports of CANH 308 and CANL 310, as compared to other solutions.The transceiver 300 may include a current source 320 connected to the signal 318. The signal 318 may be configured to control the output of the current source 320 according to the received bit pattern. The current source 320 may be implemented in any suitable manner. In one embodiment, current source 320 may be a floating current source. The current source 320 may be a programmable or adjustable current source based on the injection of the signal 318. An injection bit pattern may be provided by current source 320 in current mirrors. The current mirrors may include a replication stage 304 and an output stage 306.In a first stage, an input stage, VCC 312 may be connected to transceiver 300. The ground 314 may be connected to the transceiver 300. The VCC 312 may be connected to the source of a transistor 316. Transistor 316 may be a p-type metal oxide semiconductor (PMOS) transistor. Current source 320 may be connected to the drain of transistor 316. The current source 320 may be connected to the source terminal of a further transistor 322. The transistor 322 may be an n-type metal oxide semiconductor (NMOS) transistor. Further, the current source 320 may be connected to the gate terminal of the transistor 322. The drain of transistor 322 may be connected to ground 314.The transceiver 300 may include a replication stage 304. Replication stage 304 may include transistor 330 connected to VCC 312. The transistor 330 may be a PMOS transistor. Transistor 330 may be connected at its source to VCC 312. The gate terminal of transistor 330 may be connected to the gate terminal of transistor 316. The drain terminal of transistor 330 may be connected to a diode 354. Diode 354 may be connected to a resistor 350, which may be connected to another resistor 352. Resistor 352 may be connected to diode 356. Diode 356 may be connected to the source of a transistor 332. The drain of transistor 332 may be connected to ground 314. The diodes 356, 354 may be free wheeling diodes. The gate terminal of transistor 332 may be connected to the gate terminal of transistor 322. The transistor 332 may be an NMOS transistor.The transceiver 300 may include an output stage 306. Output stage 306 may include a transistor 338 connected at its source to VCC 312. In an embodiment, transistor 338 may be a lateral double diffused PMOS (LDPMOS) transistor. In another embodiment, transistor 338 may be a PMOS transistor having an LDPMOS cascade. Transistor 338 may be connected at its gate terminal to the gate terminal of transistor 330 and the gate terminal of transistor 316. The transistor 338 may be connected at its drain terminal to a diode 340. The diode 340 may be connected to the CANH terminal 308. The CANL terminal 310 may be connected to a diode 342. Diode 342 may be connected to the source of a transistor 344. The gate terminal of transistor 344 may be connected to the gate terminal of transistor 332 and the gate terminal of transistor 322. The drain of transistor 344 may be connected to ground 314. In an embodiment, transistor 344 may be a lateral double diffused NMOS (LDNMOS) transistor. Such a transistor can be used when no cascade current mirror according to the CAN specification is used. In another embodiment, transistor 344 may be a PMOS transistor with an LDNMOS cascade. The diodes 340, 342 may be free wheeling diodes. The diodes 340, 342 may be used for ESD protection and polarity reversal protection.In one embodiment, transceiver 306 may include a control amplifier 328. The output of amplifier 328 may be connected to the gate of transistor 344. Moreover, the output of amplifier 328 may be connected to the gate terminals of transistors 322, 332. The amplifier 328 may be implemented by, for example, a 1-stage, 2-stage, or 3-stage operational amplifier. In another embodiment, amplifier 328 may receive feeds from reference divider 302 and replication stage 304. For example, amplifier 328 may receive a negated feed from reference divider 302 and a positive feed from replication stage 304, or vice versa.Reference divider 302 may be connected to VCC 312. The reference divider 302 may include two resistors 324, 326. Resistor 326 may be connected to ground 314. The values of the resistors 324, 326 may be the same. Reference divider 302 may provide a reference voltage to amplifier 328 from a node between resistors 324, 326.The injection of replication stage 304 to amplifier 328 may be provided from a node between resistors 350, 352. The value of the resistors 350, 352 may be the same. Any suitable resistance value may be used with resistors 324, 326, 350, 352. The reference divider 302 may be a total of 110 kOhm. For example, the resistors 350, 352 may be six times higher than an output CAN bus resistor. Such a CAN bus resistor can be 60 ohms, for example.In one embodiment, a switch 334 may be provided between VCC 312 and the gate terminals of transistors 338, 330, 316. Switch 334 may be optional. In another embodiment, a switch 336 may be provided between ground 314 and the gate terminals of transistors 344, 332, 322. The switch 336 may be optional because the control provided by the transistors in FIG. 3 may perform an equivalent function. Switches 334, 336 may be driven by bit pattern 318. Hard switching may use current sources. In contrast, switches 334, 336 may be driven with bit pattern 318.The replication stage 304 may be a fraction of the magnitude or current of the output stage 306. The fraction may be, for example, 1 / 10 to 1 / 3 of the current of the output stage 306. In one embodiment, 1 / 6 of the output stage current may be used. The replication stage 304 may be configured to generate a replication signal. The replicate signal can detect the difference in current changes of CANH and CANL. The replication signal may be an estimate of the common mode signal to be applied to the CAN bus via the CANH port 308 and the CANL port 310. The replication signal may be provided to the amplifier 328. In turn, amplifier 328 may be configured to maintain the replication signal at a desired level. The desired level may be expressed by a reference voltage provided by the reference divider 302. In particular, the amplifier 328 may be configured to maintain the replication signal by controlling the signal at the CANL port 310. The replication signal generated by replication stage 304 may be controlled by applying the output of amplifier 328 to the gate of transistor 332.The replication stage 304 may be implemented in a reduced size (such as 1-30%) of the output stage 306. The replication stage 304 may include a model of the bus load in the CAN network 100. Such a model may be implemented, for example, by the resistors 326, 330. The center tap of resistors 326, 330 may be used for feeding or feedback to amplifier 328. The amplifier 328 may control the gate voltage of the transistor 344. The transceiver 300 may thus use active feed-forward to compensate and stabilize the control loop to generate signals from the CANL port 310. The transceiver 300 may use a constant voltage, such as 2.5 V, as a target for the replication voltage. The transceiver 300 may use a certain ratio, such as 50%, as a target for the replication voltage. This may be implemented by the reference divider 302.Transceiver 300 may provide advantages over slower CANH and CANL control. The transceiver 300 may provide advantages over using control circuitry including the amplifier 328 and its connections shown in FIG. 3 over using hard switching to generate CANH and CANL signals. Without hard switching, high frequency emissions can be reduced. Other solutions may use a switch to switch between dominant and recessive generation of signals for CANH and CANL.During CANL control, the slow CANH control may be disabled. In one embodiment, only the CANL signals may be controlled (using NMOS transistor 344) as opposed to controlling both the NMOS and PMOS (transistor 338) by amplifier 328. This may result from the PMOS mirrors operating more slowly than the NMOS mirrors. Accordingly, the NMOS capacitance of transistor 344, which is three times lower than that of the PMOS (transistor 338), may provide faster control. In one embodiment, the control loop can be biased at any time. While the driver is active, the fast control may be enabled. This can be achieved by a separate supply current (not shown). In such a case, the control loop can be biased in both the dominant and the recessive state. This can provide a wide bandwidth and accurate adjustment of the low-side and high-side current.

Claims

A controller area network (CAN) transmitter, comprising: an output stage circuit (306); an output stage circuit replication circuit (304) configured to generate a replication signal; and a control amplifier (328) configured to: control a CANL output signal of the CAN transmitter to maintain the replication signal at a desired level; wherein the output stage circuit (306) comprises gate discharge switches (334, 336) coupled to gates of transmitters of the output stage circuit (306) and the replication circuit (304).The CAN transmitter of claim 1, wherein the control amplifier (328) is further configured to: control a low side of the output stage circuit to generate the CANL output signal; and provide no control over a CANH output signal of the CAN transmitter.The CAN transmitter of any of claims 1 to 2, wherein the control amplifier (328) is further configured to bias transistors (332, 344) for the CANL output signal of the CAN transmitter during dominant states and during recessive states.The CAN transmitter of any of claims 1 to 3, wherein the output stage circuit (306) includes a CANL driver including a lateral double diffused NMOS transistor (344) and a free wheeling diode (342).The CAN transmitter of any of claims 1 to 4, wherein the replication circuit (304) comprises two resistors (350, 352) configured to model a CAN bus load.The CAN transmitter of claim 5, wherein a connection node of the two resistors (350, 352) is connected to an input of the control amplifier (328).The CAN transmitter of any of claims 1 to 6, wherein the control amplifier (328) is further configured to control a gate voltage of an NMOS transistor (344) of a CANL driver of the output stage circuit (306) to maintain the replication signal at a desired level.The CAN transmitter of any of claims 1 to 7, wherein the replication circuit (304) is less than 30% of the size of the output stage circuit (306).The CAN transmitter of any of claims 1 to 8, wherein the control amplifier (328) is further configured to perform active feedforward for compensating for a common mode backlash of the transmitter.The CAN transmitter of any of claims 1 to 9, wherein the gate discharge switches (334, 336) are driven by a bit pattern.A method comprising: generating a replication signal from a replication circuit (304) of an output stage circuit (306) of a controller area network (CAN) transmitter; controlling a CANL output signal of the CAN transmitter with a control amplifier (328) to maintain the replication signal at a desired level; and operating gate discharge switches (334; 336) coupled to gates of transmitters of the output stage circuit (306) and the replication circuit (304) to generate an output.The method of claim 11, further comprising: controlling a low side of the output stage circuit (306) to generate the CANL output signal; and not providing control over a CANH output signal of the CAN transmitter.The method of any of claims 11 to 12, further comprising bias transistors (330; 332) for the CANL output signal of the CAN transmitter during dominant states and during recessive states.The method of any of claims 11 to 13, further comprising using a CANL driver to drive the output, wherein the CANL driver includes a lateral double diffused NMOS transistor (344) and a free wheeling diode (342).The method of any of claims 11 to 14, further comprising using two resistors (350; 352) configured to model a CAN bus load.The method of claim 15, further comprising connecting a connection node of the two resistors (350; 352) as an input to the control amplifier (328).The method of any of claims 11 to 16, further comprising controlling a gate voltage of an NMOS transistor (344) of a CANL driver of the output stage circuit to maintain the replication signal at a desired level.The method of any one of claims 11 to 17, wherein the replication circuit is less than 30% of the size of the output stage circuit.The method of any of claims 11 to 18, further comprising performing active feed-forward to compensate for a common mode backlash of the transmitter.Method according to one of Claims 11 to 19, wherein the gate discharge switches are driven by a bit pattern.A microcontroller comprising: a processor (104); and one of the controller area network (CAN) transmitters (112A) of claims 1 to 9.A system comprising: a plurality of controller area network (CAN) receivers (112B; 112C); and a plurality of CAN transmitters (112A; 112B) according to any of claims 1 to 9 communicatively coupled to the CAN receivers (112B; 112C).An arrangement comprising: a controller area network (CAN) receiver (112C); and a CAN transmitter (112A; 112B) according to any one of claims 1 to 9.

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