ENERGY CONVERSION DEVICE

Abstract

Energy conversion device (100) comprising: - a power conversion unit (1) comprising a plurality of strings each formed by connecting a pair of two branches on the upper and lower sides, each branch having a switching element, the current flowing through a path connected to a midpoint between the two branches in each string being defined as a phase current, both ends of each of the plurality of strings being connected to a common DC bus; - a current detector (5) for measuring current flowing through the common DC bus; - a PWM control unit (4) for generating ON / OFF switching signals for controlling the switching elements of the upper and lower branches in the strands; - a current estimation unit (2) for estimating the phase current; and - a current control unit (3) for controlling the phase current, wherein the PWM control unit (4) generates the ON / OFF switching signals for controlling the switching elements in the strings on the basis of the magnitude relationship between individual duty cycle commands for the respective strings and triangular wave carriers having different initial phases for the respective strings and having a common cycle, wherein the current estimation unit (2) acquires detected values ​​from the current detector (5) in a sampling cycle different from the carrier cycle of the triangular wave carriers and estimates the phase currents of the strands, and wherein the current control unit (3) sets the duty cycle commands so that the estimated phase currents match the setpoints for the phase currents, wherein the current estimation unit (2) acquires the detected values ​​from the current detector (5) with a sampling cycle different from the carrier cycle and synchronized with a timing that coincides with a maximum value and a minimum value of a plurality of the triangular wave carriers, and estimates the phase currents.

Description

Technical area

[0001] The present invention relates to a technology in which, in a power converter comprising an inverter or a converter having a plurality of strings provided on a common DC bus, the phase current for each string is estimated from the current generated in the common DC bus. State of the art

[0002] A multi-phase converter is used to reduce the size of the converter and allows for the input of different power supplies. Generally, a multi-phase converter requires the same number of current detectors as the number of phases to control the current for each phase.

[0003] As a technology for reproducing each phase current using sampling information of the pulse current generated in a common DC bus, a method using switching patterns of a three-phase inverter and the characteristics that the sum of the three-phase currents is zero is known (see, for example, Patent Document 1).

[0004] As a technology for reproducing each phase current using multiple pieces of sampling information of the pulse current generated in a common DC bus, a method using the difference of ON / OFF switching states at multiple sampling times in a multi-phase inverter is known (see, for example, Patent Document 2).

[0005] Patent Document 3 addresses the problem of preventing the efficiency of a motor from excessively decreasing due to the increase in the current ripple of each phase current estimated from the detected value of the current on the DC side of an inverter. As a solution, it is proposed that a PWM signal generator 24 calculates the current duration, which is the duration of each phase current Iu, Iv, and Iw at a DC link current IDC in a single carrier cycle fc, and obtains the minimum current duration from the current duration of each phase current Iu, Iv, and Iw. The phase difference of a three-phase carrier signal is set to a value obtained by subtracting the minimum current duration from the predetermined time according to the detection stability time required for the actual detection state by a current sensor 14b on the DC side to reach its predetermined stable state.

[0006] Patent Document 4 discloses a drive control device for a multi-winding motor, comprising: a modulation rate phase command generation unit that calculates currents of first and second inverters for driving a three-phase multi-winding motor and generates a modulation rate command and a phase command for balancing the currents; a pulse number determination unit that determines the pulse numbers per half period based on a frequency command; a pattern table for storing switching patterns;and gate signal generators that control the first and second inverters using an optimal switching pattern based on the pulse number, wherein the modulation rate phase command generation unit performs control for balancing currents of the first and second inverters, and wherein the phase or frequency at which the control is performed is changed according to any one of the pulse number, the modulation rate, the frequency command value, and the switching pattern; State of the artPatent documents Patent Document 1: JP 5 325 561 B2 (paras.

[0022] -

[0028] ,

[0051] -

[0057] and Fig. 1, Fig. 5, Fig. 6) Patent Document 2: JP 2017 - 28 950 A (paras.

[0009] ,

[0035] -

[0044] ,

[0046] -

[0053] and Fig. 1 to 3) Patent document 3: JP 2007 - 159 345 A Patent document 4: DE 11 2014 007 062 T5 Summary of the inventionProblems to be solved by the invention

[0007] In Patent Document 1, duty cycle commands for the respective three phases are compared with a common triangular wave carrier to generate ON / OFF switching signals, and each phase current is estimated using two pieces of sampling information for one carrier cycle and the characteristics that the sum of three-phase alternating currents is zero. However, in a state where the voltage for one phase of the three-phase alternating currents is at the maximum value or minimum value and the voltages for the other two phases cross, two pieces of sampling information cannot be acquired, and therefore a reproduction error occurs. Furthermore, there is a problem that two pieces of sampling information cannot be acquired in a fixed cycle.

[0008] In Patent Document 2, each phase current is estimated using a matrix expression in which the ON / OFF switching states of the respective strings at each sampling time for the DC bus current are represented by 0 and 1. Therefore, there is a problem that, if the matrix is ​​not a regular matrix, the estimation cannot be performed. Although a remedy for this problem is described, this causes a problem in that an estimation delay occurs due to power detection.

[0009] The present invention has been conceived to solve the above problems, and aims to provide ways of achieving an improvement over estimation errors and estimation delays with a fixed sampling cycle and estimating the respective phase current by selecting the same number of detected currents as phases from the detected currents sampled for no fewer number of phases within a constant cycle, based on the sampling cycle and the carrier cycle of triangular wave carriers. Solving the problems

[0010] The object underlying the invention is achieved by an energy conversion device having the features of independent patent claim 1 or by a respective energy conversion device having the features of independent patent claims 9 to 11. Advantageous developments of an energy conversion device according to the invention are specified in the dependent claims 2 to 8. Effect of the invention

[0011] In the power conversion device according to the present invention, the PWM control unit generates ON / OFF switching signals for controlling the switching elements in the strings based on the magnitude relationship between the individual duty cycle commands for the respective strings and the triangular wave carriers which have different initial phases for the respective strings and have a common cycle.

[0012] The current estimation unit acquires detected values ​​from the current detector at a sampling cycle different from the triangular wave carrier cycle and estimates the phase currents of the phases. The current control unit adjusts the duty cycle commands so that the estimated phase currents match the setpoints for the phase currents. Consequently, different power supplies can be connected to the respective phases, and a stable current estimation with a fixed cycle and current control based on it can be achieved.

[0013] In the power conversion device according to the present invention, the PWM control unit generates ON / OFF switching signals for controlling the switching elements in the strings based on the magnitude relationship between the individual phase shift commands for the respective strings and the triangular wave carriers which have different initial phases for the respective strings and have a common cycle.

[0014] The current estimation unit acquires detected values ​​from the current detector at a sampling cycle different from the carrier cycle of the triangular wave carriers and synchronized with a timing that matches a maximum and minimum value of a plurality of triangular wave carriers, and estimates the phase currents. The current control unit adjusts the phase shift commands so that the estimated phase currents match the target values ​​for the phase currents. Consequently, different power supplies can be connected to the respective phases, and stable current estimation with a fixed cycle and current control based on it can be achieved. Short description of the drawings Fig. 1 is a configuration diagram of a power conversion device according to Embodiment 1. Fig. 2 is a configuration diagram showing a developed version 1 of the power conversion device according to Embodiment 1. Fig. 3 is a configuration diagram showing a developed version 2 of the power conversion device according to Embodiment 1. Fig. 4 is a configuration diagram showing a representative configuration 1 (two-input, two-phase converter) of the power conversion device according to Embodiment 1. Fig. 5 illustrates a default example 1 for triangular wave carriers and current detection timings in the representative configuration 1 of the power conversion device according to Embodiment 1. Fig. 6A illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 1 of the power conversion device according to Embodiment 1. Fig. 6B illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 1 of the power conversion device according to Embodiment 1. Fig. 7 illustrates the default example 1 for a carrier cycle, a sampling cycle, phase current estimation, and a duty cycle command update cycle that enable estimation for each phase current in the representative configuration 1 of the power conversion device according to Embodiment 1. Fig. 8 illustrates a default example 2 for triangular wave carriers and current detection timings in the representative configuration 1 of the power conversion device according to Embodiment 1. Fig. 9A illustrates the default example 2 for triangular wave carriers and current detection timings in the representative configuration 1 of the power conversion device according to Embodiment 1. Fig. 9B illustrates the default example 2 for triangular wave carriers and current detection timings in the representative configuration 1 of the power conversion device according to Embodiment 1. Fig. 10 illustrates the default example 2 for a carrier cycle, a sampling cycle, phase current estimation, and a duty cycle command update cycle that enable estimation for each phase current in the representative configuration 1 of the power conversion device according to Embodiment 1. Fig. 11 illustrates a determinant calculation result and whether or not it is possible to derive an inverse matrix in the default example 2 for the representative configuration 1 of the power conversion device according to Embodiment 1. Fig. 12 is a configuration diagram showing a representative configuration 2 (three-input, three-phase converter) of the power conversion device according to Embodiment 1. Fig. 13A illustrates a default example 1 for triangular wave carriers and current detection timings in the representative configuration 2 of the power conversion device according to Embodiment 1. Fig. 13B illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 2 of the power conversion device according to Embodiment 1. Fig. 14A illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 2 of the power conversion device according to Embodiment 1. Fig. 14B illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 2 of the power conversion device according to Embodiment 1. Fig. 15 illustrates the default example 1 for a carrier cycle, a sampling cycle, phase current estimation, and a duty cycle command update cycle that enable estimation for each phase current in the representative configuration 2 of the power conversion device according to Embodiment 1. Fig. 16 illustrates a default example 2 of a carrier cycle, a sampling cycle, phase current estimation, and a duty command update cycle that enable estimation for each phase current in the representative configuration 2 of the power conversion device according to Embodiment 1. Fig. 17 is a configuration diagram showing a representative configuration 3 (four-input, four-phase converter) of the power conversion device according to Embodiment 1. Fig. 18A illustrates a default example 1 for triangular wave carriers and current detection timings in the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 18B illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 19A illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 19B illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 19C illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 20 illustrates the default example 1 for a carrier cycle, a sampling cycle, phase current estimation, and a duty cycle command update cycle that enable estimation for each phase current in the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 21A illustrates a default example 2 for triangular wave carriers and current detection timings in the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 21B illustrates the default example 2 for triangular wave carriers and current detection timings in the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 22A illustrates the default example 2 for triangular wave carriers and current detection timings in the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 22B illustrates the default example 2 for triangular wave carriers and current detection timings in the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 22C illustrates the default example 2 for triangular wave carriers and current detection timings in the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 23 illustrates the default example 2 for a carrier cycle, a sampling cycle, phase current estimation, and a duty cycle command update cycle that enable estimation for each phase current in the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 24 is a configuration diagram showing a derived example of the representative configuration 1 of the power conversion device according to Embodiment 1. Fig. 25 is a configuration diagram showing a derived example 1 of the representative configuration 2 of the power conversion device according to Embodiment 1. Fig. 26 is a configuration diagram showing a derived example 2 of the representative configuration 2 of the power conversion device according to Embodiment 1. Fig. 27 is a configuration diagram showing a derived example 1 of the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 28 is a configuration diagram showing a derived example 2 of the representative configuration 3 of the power conversion device according to Embodiment 1. Fig. 29 is a configuration diagram showing a representative configuration 4 (single-phase two-line inverter) of the power conversion device according to Embodiment 1. Fig. 30 illustrates a default example 1 for triangular wave carriers and current detection timings in the representative configuration 4 of the power conversion device according to Embodiment 1. Fig. 31A illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 4 of the power conversion device according to Embodiment 1. Fig. 31B illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 4 of the power conversion device according to Embodiment 1. Fig. 32 illustrates the default example 1 for a carrier cycle, a sampling cycle, phase current estimation, and a duty cycle command update cycle that enable estimation for each phase current in the representative configuration 4 of the power conversion device according to Embodiment 1. Fig. 33 is a configuration diagram showing a representative configuration 5 (single-phase three-line inverter) of the power conversion device according to Embodiment 1. Fig. 34A illustrates a default example 1 for triangular wave carriers and current detection timings in the representative configuration 5 of the power conversion device according to Embodiment 1. Fig. 34B illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 5 of the power conversion device according to Embodiment 1. Fig. 35A illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 5 of the power conversion device according to Embodiment 1. Fig. 35B illustrates the default example 1 for triangular wave carriers and current detection timings in the representative configuration 5 of the power conversion device according to Embodiment 1. Fig. 36 illustrates the default example 1 for a carrier cycle, a sampling cycle, phase current estimation, and a duty command update cycle that enable estimation for each phase current in the representative configuration 5 of the power conversion device according to Embodiment 1. Fig. 37 is a configuration diagram showing a representative configuration 6 (three-phase, three-wire inverter) of the power conversion device according to Embodiment 1. Fig. 38 is a configuration diagram showing a developed version of Representative Configuration 6 (three-phase, three-wire inverter) of the power conversion device according to Embodiment 1. Fig. 39 is a configuration diagram showing a derived example of the representative configurations 4 to 6 of the power conversion device according to Embodiment 1. Fig. 40 is a configuration diagram showing a combined configuration 1 (single-input, single-phase inverter and single-phase, two-line inverter) of the power conversion device according to Embodiment 1. Fig. 41 is a configuration diagram showing a combined configuration 2 (two-input two-phase inverter and single-phase two-line inverter) of the power conversion device according to Embodiment 1. Fig. 42 is a configuration diagram showing a combined configuration 3 (single-input, single-phase inverter and single-phase, three-line inverter) of the power conversion device according to Embodiment 1. Fig. 43 is a configuration diagram showing a combined configuration 4 (single-input, single-phase inverter and three-phase, three-line inverter) of the power conversion device according to Embodiment 1. Fig. 44 is a configuration diagram showing a basic configuration of the power conversion device according to Embodiment 2. Fig. 45 illustrates a default example 1 of current detection timings in the basic configuration of the power conversion device according to Embodiment 2. Fig. 46A illustrates Default Example 1 for current detection timings in the basic configuration of the power conversion device according to Embodiment 2. Fig. 46B illustrates Default Example 1 for current detection timings in the basic configuration of the power conversion device according to Embodiment 2. Fig. 47 illustrates the default example 1 for a carrier cycle, a sampling cycle, phase current estimation, and a phase shift command update cycle that enable estimation for each phase current in the basic configuration of the power conversion device according to Embodiment 2. Fig. 48 is a configuration diagram showing a combined configuration example (isolation converter and single-input single-phase inverter) with Embodiment 1 in the power conversion device according to Embodiment 2. Fig. 49A illustrates a default example 1 for current detection timings in the combined configuration with Embodiment 1, in the power conversion device according to Embodiment 2. Fig. 49B illustrates the default example 1 for current detection timings in the combined configuration example with Embodiment 1, in the power conversion device according to Embodiment 2. Fig. 50A illustrates the default example 1 for current detection timings in the combined configuration example with Embodiment 1, in the power conversion device according to Embodiment 2. Fig. 50B illustrates the default example 1 for current detection timings in the combined configuration example with Embodiment 1, in the power conversion device according to Embodiment 2. Fig. 51 illustrates the default example 1 for a carrier cycle, a sampling cycle, phase current estimation, and a phase shift command update cycle that enable estimation for each phase current in the combined configuration 1 with Embodiment 1 in the power conversion device according to Embodiment 2. Description of embodimentsEmbodiment 1

[0015] Embodiment 1 relates to a power conversion device comprising: a power conversion unit having a plurality of strings connected to a common DC bus; a current detector for detecting current of the common DC bus; a PWM control unit for generating ON / OFF switching signals for the strings; a current estimation unit for estimating phase currents;and a current control unit for setting duty cycle commands such that the phase currents agree with target values, wherein the PWM control unit generates the ON / OFF switching signals for controlling the power conversion unit based on the magnitude relationship between the duty cycle commands for the respective strings and triangular wave carriers that have different initial phases and a common cycle, the current estimation unit acquires detected currents from the current detector in a sampling cycle different from the carrier cycle and estimates each phase current, and the current control unit sets the duty cycle commands such that the estimated values ​​of the respective phase currents agree with the target values ​​for the phase currents at a cycle synchronized with a time equal to or greater than the lowest common multiple of the carrier cycle and the sampling cycle.

[0016] The configuration and operation of the energy conversion device according to Embodiment 1 will be described below with reference to the following drawings: Fig. 1, which is a configuration diagram of the energy conversion device, Fig. 2, which is a configuration diagram showing a developed version 1, Fig. 3, which is a configuration diagram showing a developed version 2, Fig. 4, which is a configuration diagram showing a representative configuration 1, Fig. 5, Fig. 6A and Fig. 6B, which illustrate a default example 1 for current detection timings in the representative configuration 1, Fig. 7, which illustrates the default example 1 for a duty cycle command update cycle that allows an estimation for each phase current in the representative configuration 1, Fig. 8, Fig. 9A and Fig. 9B, which illustrate a default example 2 for current detection timings in the representative configuration 1, Fig. 10, which shows the default example 2 for a duty cycle command update cycle in the representative configuration 1, Fig. 11, which shows a determinant calculation result and whether or not it is possible to derive an inverse matrix in the default example 2 for the representative configuration 1, Fig. 12, which is a configuration diagram showing a representative configuration 2, Fig. 13A, Fig. 13B, Fig. 14A and Fig. 14B, showing a default example 1 for current detection timings in the representative configuration 2, Fig. 15, which illustrates the default example 1 for a duty cycle command update cycle that allows an estimation for each phase current in the representative configuration 2, Fig. 16, which illustrates the default example 2 for a duty cycle command update cycle that allows an estimation for each phase current in the representative configuration 2, Fig. 17 which is a configuration diagram showing a representative configuration 3, Fig. 18A, Fig. 18B, Fig. 19A, Fig. 19B and Fig. 19C, showing a default example 1 for current detection timings in the representative configuration 3, Fig. 20, which illustrates the default example 1 for a duty cycle command update cycle in which a problem persists in estimating each phase current, in the representative configuration 3, Fig. 21A, Fig. 21B, Fig. 22A, Fig. 22B and Fig. 22C, showing a default example 2 for current detection timings in the representative configuration 3, Fig. 23, which illustrates the default example 2 for a duty cycle command update cycle that allows an estimation for each phase current in the representative configuration 3, Fig. 24, which is a configuration diagram showing a derived example of the representative configuration 1, Fig. 25, which is a configuration diagram showing a derived example 1 of the representative configuration 2, Fig. 26, which is a configuration diagram showing a derived example 2 of the representative configuration 2, Fig. 27, which is a configuration diagram showing a derived example 1 of the representative configuration 3, Fig. 28, which is a configuration diagram showing a derived example 2 of the representative configuration 3, Fig. 29, which is a configuration diagram showing a representative configuration 4 (single phase two wire inverter), Fig. 30, Fig. 31A and Fig. 31B, which illustrate an example 1 for current detection timings in the representative configuration 4, Fig. 32, which illustrates the default example 1 for a duty cycle command update cycle that allows an estimation for each phase current in the representative configuration 4, Fig. 33 which is a configuration diagram showing a representative configuration 5, Fig. 34A, Fig. 34B, Fig. 35A and Fig. 35B showing a default example 1 for current detection timings in the representative configuration 5, Fig. 36, which illustrates the default example 1 for a duty cycle command update cycle that allows an estimation for each phase current in the representative configuration 5, Fig. 37, which is a configuration diagram showing a representative configuration 6, Fig. 38, which is a configuration diagram showing a developed version of the representative configuration 6, Fig. 39, which is a configuration diagram showing a derived example of the representative configurations 4 to 6, Fig. 40, which is a configuration diagram showing a representative combined configuration 1, Fig. 41, which is a configuration diagram showing a representative combined configuration 2, Fig. 42, which is a configuration diagram of a representative combined configuration 3, and Fig. 43, which is a configuration diagram of a representative combined configuration 4.

[0017] The basic configuration and function of the energy conversion device according to Embodiment 1 will be described with reference to Fig. 1 described.

[0018] A power conversion device 100 includes a power conversion unit 1, a current estimation unit 2, current control units 3, PWM control units 4, and a current detector 5.

[0019] In the description of the specific configuration and operation of the energy conversion device 100 according to Embodiment 1 in Fig. 4 and later, the following is included: an input power supply unit 11 formed from various power supplies connected to the input side of the power conversion device 1, and a load 12 connected to the output side of the power conversion device 1. In the basic configuration of the power conversion device 100 in Fig. 1, the input power supply unit 11 and the load 12 are not shown.

[0020] The power conversion unit 1 is configured such that two branches, each with switching elements, are connected to the upper and lower sides as a pair, forming a branch. Current flowing through a path connected to the midpoint between the two branches is defined as phase current. Both ends of a plurality of branches are connected to common DC buses.

[0021] In Fig. 1, the upper branches containing the switching elements are denoted Ap1, Ap2, ..., ApN, and the lower branches containing the switching elements are denoted An1, An2, ..., AnN. Furthermore, the phase current for a phase 1 is denoted I1, the phase current for a phase 2 is denoted I2, ..., and the phase current for a phase N is denoted IN. In the following description, the kth upper branch is denoted Apk, the kth lower branch is denoted Ank, and the kth phase current is denoted Ik, where appropriate.

[0022] The current detector 5 measures the current Ibus in the common DC bus, which is the current flowing through a current path on the low-voltage side of the strings of the energy conversion unit 1. In Fig. 1, it is assumed that the current detector 5 is a current transformer (CT).

[0023] The current estimation unit 2 estimates the phase currents (RI1, RI2, ..., RIN) from the current Ibus in the common DC bus detected by the current detector 5 and the ON / OFF switching signals (Sp1, Sp2, Sp3, ..., SpN) generated by the PWM control unit 4 for driving the upper arms of the power conversion unit 1. The current estimation unit 2 outputs the generated estimated phase currents (RI1, RI2, ..., RIN) to the current control units 3.

[0024] The current control units 3 generate duty cycle commands (D1*, D2*, ..., DN*) for controlling the respective phase currents using the estimated phase currents (RI1, RI2, ..., RIN) and setpoints (I1*, I2*, ..., IN*) for the phase currents.

[0025] The PWM control units 4 generate ON / OFF switching signals (Sp1, Sp2, ..., SpN and Sn1, Sn2, ..., SnN) for controlling the upper and lower branches (Ap1, Ap2, ..., ApN and An1, An2, ..., AnN) of the strings of the energy conversion unit 1.

[0026] For example, in the following description, “ON / OFF switching signal for controlling the upper and lower branches” is referred to as “ON / OFF switching signals for the upper and lower branches” when appropriate.

[0027] In the drawings, each number (e.g., N) shown on a slanted line on a signal line represents the number of signals.

[0028] Next, the operation and components of the upper branches (Ap1, Ap2, ..., ApN) and the lower branches (An1, An2, ..., AnN) of the energy conversion unit 1 are described.

[0029] In the k-th strand, one of the upper branch Apk and the lower branch Ank is switched, and the other is constantly off.

[0030] In operation where mutually inverted ON / OFF switching signals are applied to the upper arm and the lower arm, the ON / OFF switching signals may be provided with a dead time to prevent the common DC buses from short-circuiting due to variations between the elements of the upper and lower arms and the element characteristics. Here, the dead time is a short-circuit-preventing period during which the upper arm and the lower arm are simultaneously turned off.

[0031] Self-off semiconductor switching elements, such as insulated-gate bipolar transistors (IGBTs) or metal-oxide-semiconductor field-effect transistors (MOSFETs), are used as switching elements for the upper branch Apk and the lower branch Ank, with free-running diodes connected in antiparallel. Parasitic diodes can also be used with MOSFETs.

[0032] In an application where the direction of each phase current is restricted to a single direction, the switching element of one of the upper branch Apk and the lower branch Ank can be replaced by a diode.

[0033] The current Ibus in the common DC bus can be expressed by expression (1), based on the relationship between the phase current I1 for the 1st phase and the phase current IN for the Nth phase, and the upper branch Ap1 for the 1st phase and the upper branch ApN for the Nth phase, or the lower branch An1 for the 1st phase and the lower branch AnN for the Nth phase. Here, the kth function Apk and Ank represent 1 for ON and 0 for OFF, and the overlined functions represent 0 for ON and 1 for OFF. [Mathematical Expression 1] Ibus=∑k=1NSpk×Ik=[Sp1 Sp2 ⋯ SpN][I1I2⋮IN] =∑k=1NSnk¯×Ik=[Sn1¯ Sn2¯ ⋯ SnN¯][I1I2⋮IN]

[0034] It can be considered that the ON / OFF state on the lower arm side utilizes the inverted operation of the upper arm side. Therefore, the following description describes the operation by focusing on the ON / OFF operation on the upper arm side. If one of the upper arm and the lower arm is a diode, it can be considered that the inverted operation of the ON / OFF state of the other switching element is utilized.

[0035] Values ​​obtained by detecting the current Ibus in the common DC bus N times are denoted by Isp1 to IspN. The detected currents Isp1 to IspN can be expressed using expression (2) using the phase currents I1 to IN.

[0036] Here, the function of the upper branch corresponding to the N times of detection is represented with a matrix Z, and the phase currents I1 to IN in expression (2) are treated as constant during a period in which the current Ibus in the common DC bus is detected N times. [Mathematical Expression 2] [Isp1Isp2⋮IspN]=[Sp11Sp21⋯SpN1Sp12Sp22⋯SpN2⋮⋮⋱⋮Sp1NSp2N⋯SpNN]=[I1I2⋮IN]=Z[I1I2⋮IN]

[0037] If the determinant of the matrix Z in expression (2) is not zero, the phase currents I1 to IN can be expressed by expression (3) using the inverse matrix of the matrix Z and the detected currents (Isp1 to IspN). [Mathematical Expression 3] [I1I2⋮IN]=Z−1[Isp1Isp2⋮IspN]

[0038] If the phase currents I1 to IN vary during the period in which the current Ibus in the common DC bus is detected N times, I1 to IN in expression (3) represent the average values ​​of the phase currents during the period. That is, using the relations of expressions (2) and (3), the average values ​​of the phase currents (I1 to IN) during the period in which the current Ibus in the common DC bus is detected N times can be estimated.

[0039] The current estimation unit 2 estimates each phase current (RI1, RI2, ..., RIN) from the current Ibus in the common DC bus using the properties of expression (3).

[0040] The current control units 3 compare the respective estimated phase currents (RI1, RI2, ..., RIN) estimated by the current estimation unit 2 with the command values ​​(I1*, I2*, ..., IN*) for the respective phase currents, and generate the duty cycle commands (D1*, D2*, ..., DN*) so that the deviations therebetween are reduced.

[0041] The PWM control units 4 compare the duty cycle commands (D1*, D2*, ..., DN*) with the triangular wave carriers for the respective branches and generate the ON / OFF switching signals (Sp1, Sp2, ..., SpN and Sn1, Sn2, ..., SnN) for the upper and lower branches. The following applies: If one of the upper branch and the lower branch is a diode, the PWM control unit 4 only generates the ON / OFF switching signal for the other branch.

[0042] Next, the configuration of a developed version 1 of the energy conversion device 100 in Fig. 1 with reference to Fig. 2, with the main focus being on the difference to the energy conversion device 100. To distinguish from the configuration in Fig. 1, the energy conversion device is designated 101.

[0043] The energy conversion device 101 in Fig. 2 utilizes characteristics such that the ON / OFF switching signals for the upper and lower arms in expression (2) can be estimated from the duty cycle commands input to the PWM control units 4. The ON / OFF switching signal for each arm at the detection timing for the current Ibus in the common DC bus can be estimated from the duty cycle command and the time difference of the detection timing with reference to the maximum value or the minimum value of the triangular wave carrier.

[0044] In the energy conversion device 101 in Fig. 2 Using the above characteristics, the current estimation unit 2 estimates the phase currents (RI1, RI2, ..., RIN) from the current Ibus in the common DC bus using the duty cycle commands (D1*, D2*, ..., DN*) output from the current control units 3 without using the ON / OFF switching signals for the branches output from the PWM control units 4.

[0045] The functions and operations of the current control units 3 and the PWM control units 4 are the same as those in the power conversion device 100 in Fig. 1, and therefore they are not described.

[0046] Next, the configuration of a developed version 2 of the energy conversion device 100 in Fig. 1 with reference to Fig. 3, with the main focus on the differences to the energy conversion device 101. To distinguish from the configurations in Fig. 1 and Fig. 2, the energy conversion device is designated 102.

[0047] The energy conversion device 102 is obtained by replacing the current detector 5 of the energy conversion device 101 with a resistor 5A and a calculator 5B. The current Ibus in the common DC bus is calculated by the calculator 5B, which divides the voltage Vr across the resistor 5A by the resistance r of the resistor 5A.

[0048] The current Ibus in the common DC bus has the characteristic that a pulse current is generated as a result of the ON / OFF switching of the branches. Therefore, to use a current transformer (CT) as the current detector 5, the current transformer must have broadband detection characteristics to reduce the error in expressions (2) and (3).

[0049] In the energy conversion device 102, the voltage generated across the resistor 5A is detected, and the detected value is divided by the calculator 5B, so that a broadband detection for the current Ibus in the common DC bus can be achieved at low cost.

[0050] This configuration can also be applied to the energy conversion device 100 in Fig. 1 can be applied in the same way, ie the current detector 5 can be replaced by the resistor 5A and the calculator 5B, so that a broadband detection for the current Ibus in the common DC bus can be achieved at low cost.

[0051] Next, six representative configuration examples corresponding to the configuration of the energy conversion device 101 in Fig. 2, focusing on the configurations of the input power supply unit 11 and the power conversion device 1 and the operation of the current estimation unit 2.

[0052] By managing the ON / OFF operation for each string and the detection timings for the current Ibus in the common DC bus, it is possible to realize a configuration in which the expression (3) can be generally applied while the determinant of the matrix Z from the expression (2) in the current estimation unit 2 does not become zero.

[0053] The following describes default examples of the carrier phase difference between the phases and the detection timings for the current Ibus in the common DC bus for realizing stable operation of the current estimation unit 2.

[0054] The configuration (two-input, two-phase inverter) and the function / operation in the representative configuration 1 of the power conversion device in the embodiment 1 will be described with reference to Fig. 4 to Fig. 9 described.

[0055] First, with reference to Fig. 4 describes the configuration in the representative configuration 1, focusing on the input power supply unit and the energy conversion unit. To distinguish it from the configurations in Fig. 1, etc., the power conversion device is designated 103. Furthermore, the power conversion unit is designated 1A, and the input power supply unit is designated 11A. A smoothing capacitor 6 is associated with the common DC buses connecting the power conversion unit 1A to the load 12. Here, the voltage of the capacitor 6 is defined as Vbus.

[0056] The input power supply unit 11A of the power conversion device 103 has coils L1, L2 and DC power supplies VDC1, VDC2, and forms a two-input, two-phase inverter together with the power conversion unit 1A.

[0057] The power conversion device 103 has a two-phase configuration, and therefore it has two current control units 3 and two PWM control units 4.

[0058] The current estimation unit 2 estimates phase currents (RI1, RI2) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1*, D2*) generated by the current control units 3, and outputs the estimated phase currents to the current control units 3.

[0059] The current control units 3 generate duty cycle commands (D1*, D2*) for controlling the respective phase currents using the estimated phase currents (RI1, RI2) and the setpoints (I1*, I2*) for the phase currents.

[0060] The PWM control units 4 generate ON / OFF switching signals (Sp1, Sp2 and Sn1, Sn2) for controlling the upper and lower branches (Ap1, Ap2 and An1, An2) of the respective strings of the power conversion unit 1A from the duty cycle commands (D1*, D2*) generated by the current control units 3.

[0061] Fig. 5 shows a default example 1 for the triangular wave carriers for the respective phases, the ON / OFF states of the upper arms Ap1 and Ap2 on the high-voltage side, the phase currents (I1, I2), and the detection timings for the current Ibus in the common DC bus in the representative configuration 1 (power conversion device 103).

[0062] More precisely: Fig. Figure 5 illustrates the relationship among the triangular wave carriers (fc1, fc2), the ON / OFF states of the upper branches Ap1, Ap2 on the high-voltage side, the phase currents (I1, I2), the current Ibus in the common DC bus, and the detected currents (Isp1, Isp2).

[0063] Fig. Figure 6A illustrates the ON / OFF state of the upper arm Ap1 and the detection timing for the current Ibus in the common DC bus (i.e., detection timing for Isp1, Isp2) using a phase. Note that K is the amplitude of the triangular wave carrier, and ωc is the angular frequency of the triangular wave carrier.

[0064] Here, the triangular wave carrier fc1 is represented by fc1 = (K / π) · |ωct|, in a region where the time function t is not smaller than -π / ωc and not larger than π / ωc.

[0065] Fig. Figure 6B illustrates the ON / OFF state for the upper arm Ap2 and the detection timings for the current Ibus in the common DC bus using one phase.

[0066] Here, the triangular wave carrier fc2 is represented by fc2 = (K / π)·|ωct + π|, in a range where the time function t is not smaller than -2π / ωc and not larger than 0.

[0067] Here, with a triangular wave carrier cycle (fc1, fc2) defined as 360°, the relationship between the ON / OFF states of the upper branches Ap1 and Ap2 on the high-voltage side can be extracted according to the duty cycle commands and the detection timing of the current Ibus on the common DC bus. Consequently, it is possible to find in advance a condition in which a sampling error is likely to occur due to an overlap between the ON / OFF switching timing in the branch and the detection timing of the current Ibus on the common DC bus.

[0068] For Fig. 5, Fig. 6A and Fig. 6B, it can be said that for both of the two phases, a sampling error is likely to occur when the duty cycle command is 0% and 100%. If Fig. 6A and Fig. 6B do not need to be distinguished from each other and are mentioned together, they are referred to below as Fig. 6, if appropriate.

[0069] Fig. Figure 7 shows the default example 1 for a duty cycle command update cycle that allows an estimation for each phase current, according to Fig. 5 and Fig. 6 in the representative configuration 1 (energy conversion device 103). More specifically: Fig. Figure 7 shows the default example 1 for the carrier cycle, sampling cycle, phase current estimation, and duty cycle command update cycle, which enable estimation for each phase current.

[0070] In Fig. 7, *A denotes the following: “Perform current detection (Isp1, Isp2) and estimate phase currents.” *B denotes “Current control”.

[0071] Here, the carrier phase differences between the phases are set to 180°, the detection timing cycle for the current Ibus in the common DC bus is set to 1.5 times the carrier cycle, and the current control and update cycle for the duty cycle command is set to 3.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the current detection timing cycle.

[0072] It should be noted that the current detection timing cycle is namely the cycle of the estimation timing for each phase current.

[0073] In a state where the duty cycle command is 0% and a state where the duty cycle command is 100%, the detection timing for the common DC bus current and the arm ON / OFF timing overlap, so a detection error is likely to occur in the detection of the common DC bus current Ibus. However, it is not generally possible to perform operations with a duty cycle command of 0% and a duty cycle command of 100%, and therefore, it is described that the phase currents can be estimated from the common DC bus current Ibus over almost the entire region.

[0074] In the default example in Fig. 5 to Fig. 7 In the representative configuration 1 (energy conversion device 103), the relation between the phase currents (I1, I2) and the detected currents (Isp1, Isp2) for the current Ibus in the common DC bus can be represented by the expression (4). [Mathematical Expression 4] [Isp1Isp2]=[Sp11Sp21Sp12Sp22]=[I1I2]=Z[I1I2]

[0075] If it is assumed that the operations with the duty cycle commands of 0% and 100% are prohibited operations, expression (4) can be replaced by expression (5). [Mathematical Expression 5] [Isp1Isp2]=

[1001] [I1I2]=Z[I1I2]

[0076] That is, under the constraint that the duty cycle command is greater than 0% and less than 100%, Expression (5) can be applied. Therefore, the phase currents (I1, I2) can be estimated from the detection value of the common DC bus current using the inverse matrix of the matrix Z shown in Expression (6). [Mathematical Expression 6] [I1I2]=Z−1[Isp1Isp2]=

[1001] [Isp1Isp2]

[0077] When the duty cycle command (D1*, D2*) changes at the detection timing for Isp1, Isp2, the state of the branch Ap1, Ap2 also changes at the detection timing. Therefore, if the cycle for detecting Isp1, Isp2 is 1.5 times the carrier cycle, the following applies: If the update cycles for the duty cycle commands (D1*, D2*) are set to be equal to or greater than 3.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the detection cycle for the current Ibus in the common DC bus, the estimation error for the phase currents (I1, I2) can be reduced.

[0078] In Fig. 7, the duty cycle commands (D1*, D2*) are updated for D1* after D2*. However, depending on the current control calculation speed, the duty cycle commands (D1*, D2*) can also be updated for D2* after D1*.

[0079] When it is clear in the description, the “common DC bus current detection cycle” is referred to as “current detection cycle” when appropriate.

[0080] Fig. 8 and Fig. 9 shows a default example 2 for the triangular wave carriers for the respective phases, the ON / OFF states for the upper arms Ap1 and Ap2 on the high-voltage side, the phase currents (I1, I2), and the detection timings for the current Ibus in the common DC bus in the representative configuration 1 (power conversion device 103).

[0081] More precisely: Fig. Figure 8 illustrates the relationship among the triangular wave carriers (fc1, fc2), the duty cycle commands (D1*, D2*), the ON / OFF states of the upper arms Ap1, Ap2 on the high voltage side, the phase currents (I1, I2), the current Ibus in the common DC bus, and the detected currents (Isp1, Isp2, Isp3, Isp4).

[0082] Fig. 9A illustrates the ON / OFF state of the upper arm Ap1 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1 to Isp4) using one phase.

[0083] Here, the triangular wave carrier fc1 is represented by fc1 = (K / π) · |ωct|, in a region where the time function t is not smaller than -π / ωc and not larger than π / ωc.

[0084] Fig. 9B illustrates the ON / OFF state of the upper arm Ap2 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1 to Isp4) using one phase.

[0085] Here, the triangular wave carrier fc2 is represented by fc2 = (K / π)·|ωct + (π / 2)|, in a region where the time function t is not smaller than -(3 / 2)π / ωc and not larger than (1 / 2)π / ωc.

[0086] For Fig. 8 and Fig. 9, it can be said that for both of the two phases, a sampling error is likely to occur when the duty cycle command is 0%, 50% and 100%.

[0087] Fig. Figure 10 shows the default example 2 for the carrier cycle, the sampling cycle, the phase current estimation and the duty cycle command update cycle, which allow an estimation for each phase current, according to Fig. 8 and Fig. 9 in the representative configuration 1 (energy conversion device 103).

[0088] In Fig. 10, *C denotes the following: "Perform current detection (Isp1 to Isp4) and estimate phase currents." *D denotes "Current control".

[0089] Here, the carrier phase difference between the phases is set to 90°, the detection timing cycle for the current Ibus in the common DC bus is set to 1.25 times the carrier cycle, and the current control and update cycle for the duty cycle command is set to 5.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the detection timing cycle.

[0090] In the default example 2 in Fig. 10: In addition to the state where the duty cycle command is 0% and the state where the duty cycle command is 100% as shown in Default Example 1, in a state where the duty cycle command is 50%, the detection timing and the ON / OFF timing overlap, so a detection error for Ibus is likely to occur. As described in Default Example 1, the phase currents can be estimated from the current Ibus in the common DC bus in the state where the duty cycle command is greater than 0% and less than 100% in Default Example 2.

[0091] In the default example in Fig. 8 to Fig. 10 In the representative configuration 1 (energy conversion device 103), the relation between the phase currents (I1, I2) and the detected currents (Isp1, Isp2, Isp3, Isp4) for the current Ibus in the common DC bus can be represented by six expressions including expression (4) and expressions (7) to (11). [Mathematical Expression 7] [Isp1Isp3]=[Sp11Sp21Sp13Sp23][I1I2]=Z[I1I2] [Mathematical Expression 8] [Isp1Isp4]=[Sp11Sp21Sp14Sp24][I1I2]=Z[I1I2] [Mathematical Expression 9] [Isp2Isp3]=[Sp12Sp22Sp13Sp23][I1I2]=Z[I1I2] [Mathematical Expression 10] [Isp2Isp4]=[Sp12Sp22Sp14Sp24][Isp1Isp2]Z=[Isp1Isp2] [Mathematical Expression 11] [Isp3Isp4]=[Sp13Sp23Sp14Sp24][I1I2]=Z[I1I2]

[0092] Here, if it is assumed that operations with duty cycle commands of 0% and 100% are prohibited operations, expressions (4) and (7) to (11) can be replaced by expressions (12) to (17). [Mathematical Expression 12] [Isp1Isp2]=[0Sp21Sp121][I1I2]=Z[I1I2] [Mathematical Expression 13] [Isp1Isp3]=[0Sp211Sp23][I1I2]=Z[I1I2] [Mathematical Expression 14] [Isp1Isp4]=[0Sp21Sp140][I1I2]=Z[I1I2] [Mathematical Expression 15] [Isp2Isp3]=[Sp1211Sp23][I1I2]=Z[I1I2] [Mathematical Expression 16] [Isp2Isp4]=[Sp121Sp140][I1I2]=Z[I1I2] [Mathematical Expression 17] [Isp3Isp4]=[1Sp23Sp140][I1I2]=Z[I1I2]

[0093] Fig. Figure 11 shows whether or not it is possible to derive the determinant and the inverse matrix of the matrix Z in expressions (12) to (17) in each case in which the duty cycle command (D1*, D2*) corresponding to the triangular wave carrier (fc1, fc2) is greater than 50% or less than 50%.

[0094] For example, in a state where the duty cycle command D1* is greater than 50% and the duty cycle command D2* is greater than 50%, in expression (12), the matrix Z is equal to -1. Therefore, it is possible to derive the inverse matrix, and the phase current estimation is enabled (◯).

[0095] Meanwhile, in a state where the duty command D1* is greater than 50% and the duty command D2* is less than 50%, in expression (12), the matrix Z is 0. Therefore, it is impossible to derive the inverse matrix, and the phase current estimation is disabled (×).

[0096] It should be noted that when the duty cycle command is 50%, an overlap with the sampling timing occurs, and therefore the question of whether it is possible or not to derive the inverse matrix must be considered indeterminate.

[0097] That is, under the conditions that the duty cycle commands (D1*, D2*) are greater than 0% and less than 100%, the expression (15) and the remaining expressions are selectively used depending on the duty cycle commands (D1*, D2*) on the basis of the Fig. 11. Except for the case where the duty cycle command is 50%, using the inverse matrix Z, the phase currents (I1, I2) can be estimated from the detected currents (Isp1 to Isp4) for the current Ibus in the common DC bus.

[0098] When the duty cycle command (D1*, D2*) changes at the detection timing for Isp1 to Isp4, the state of the upper arm Ap1, Ap2 also changes at the detection timing. Therefore, if the detection cycle for Isp1 to Isp4 is 1.25 times the carrier cycle, the following applies: If the update cycles for the duty cycle commands are set to be equal to or greater than 5.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the current detection cycle, the estimation error for the phase currents (I1, I2) can be reduced.

[0099] In Fig. 10, the duty cycle commands (D1*, D2*) are updated for D1* after D2*. However, depending on the current control calculation speed, the duty cycle commands (D1*, D2*) can also be updated for D2* after D1*.

[0100] A discrepancy of the current detection timing on the DC bus and the matrix Z that occurs in the state where the duty cycle command is 50% can be eliminated by discretization, where the duty cycle command of 50% is prohibited.

[0101] For example, duty cycle commands from 0% to 100% can be discretized into 0.0%, 0.5%, 1.5%, 2.5%, ..., 48.5%, 49.5%, 50.5%, 51.5%, ..., 97.5%, 98.5%, 99.5%, 100.0%, in 1% intervals. With this specification, the discretization interval is 0.5% only for the maximum value of 100% and the minimum value of 0.0%.

[0102] Regarding the power conversion device 103 using the two-input, two-phase inverter as the representative configuration 1 of the power conversion device in Embodiment 1, the method for estimating the phase currents (I1, I2) from the current Ibus in the common DC bus is described.

[0103] The configuration and function / operation in a representative configuration 2 (three-input, three-phase inverter) of the power conversion device in the embodiment 1 will be described with reference to Fig. 12 to Fig. 15 described.

[0104] In Fig. 12 the following applies: To distinguish from the configurations in Fig. 1, etc., the power conversion device is designated 104. Furthermore, the power conversion unit is designated 1B, and the input power supply unit is designated 11B. A smoothing capacitor 6 is associated with the common DC buses connecting the power conversion unit 1B to the load 12.

[0105] The input power supply unit 11B of the power conversion device 104 has coils L1, L2, L3 and DC power supplies VDC1, VDC2, VDC3, and forms a three-input, three-phase inverter together with the power conversion unit 1B.

[0106] The power conversion device 104 has a three-phase configuration, and therefore it has three current control units 3 and three PWM control units 4.

[0107] The current estimation unit 2 estimates phase currents (RI1, RI2, RI3) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1*, D2*, D3*) generated by the current control units 3, and outputs the estimated phase currents to the current control units 3.

[0108] The current control units 3 generate duty cycle commands (D1*, D2*, D3*) for controlling the respective phase currents using the estimated phase currents (RI1, RI2, RI3) and the setpoints (I1*, I2*, I3*) for the phase currents.

[0109] The PWM control units 4 generate ON / OFF switching signals (Sp1, Sp2, Sp3 and Sn1, Sn2, Sn3) for controlling the upper and lower branches (Ap1, Ap2, Ap3 and An1, An2, An3) of the respective strings of the power conversion unit 1B from the duty cycle commands (D1*, D2*, D3*) generated by the current control units 3.

[0110] Fig. 13 and Fig. 14 shows a default example 1 for the triangular wave carriers for the respective phases, the ON / OFF states of the upper arms Ap1, Ap2, Ap3 on the high-voltage side, the phase currents (I1, I2, I3), and the detection timings for the current Ibus in the common DC bus in the representative configuration 2 (power conversion device 104).

[0111] More precisely: Fig. Figure 13 illustrates the relationship among the triangular wave carriers (fc1, fc2, fc3), the ON / OFF states of the upper branches Ap1, Ap2, Ap3 on the high-voltage side, the phase currents (I1, I2, I3), the current Ibus in the common DC bus, and the detected currents (Isp1, Isp2, Isp3, Isp4, Isp5, Isp6).

[0112] Fig. 13B illustrates the ON / OFF state of the upper arm Ap1 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1 to Isp6) using one phase.

[0113] Here, the triangular wave carrier fc1 is represented by fc1 = (K / π) · |ωct|, in a region where the time function t is not smaller than -π / ωc and not larger than π / ωc.

[0114] Fig. 14A illustrates the ON / OFF state of the upper arm Ap2 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1 to Isp6) using one phase.

[0115] Here, the triangular wave carrier fc2 is represented by fc2 = (K / π)·|ωct - (2π / 3)|, in a range where the time function t is not smaller than -(1 / 3)π / ωc and not larger than (5 / 3)π / ωc.

[0116] Fig. 14B illustrates the ON / OFF state of the upper arm Ap3 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1 to Isp6) using one phase.

[0117] Here, the triangular wave carrier fc3 is represented by fc3 = (K / π)·|ωct + (2π / 3)|, in a range where the time function t is not smaller than -(5 / 3)π / ωc and not larger than (1 / 3)π / ωc.

[0118] Here, with a triangular wave carrier cycle (fc1, fc2, fc3) defined as 360°, the relationship between the ON / OFF states of the upper branches Ap1, Ap2, Ap3 on the high-voltage side according to the duty cycle commands and the detection timing of the current Ibus on the common DC bus can be extracted. Consequently, it is possible to find in advance a condition in which a sampling error is likely to occur due to an overlap between the ON / OFF switching timing in the branch and the detection timing of the current Ibus on the common DC bus.

[0119] For Fig. 13 and Fig. 14, it can be said that for all three phases, a sampling error is likely to occur when the duty cycle command is 0%, (100 / 3)%, (200 / 3)%, and 100%.

[0120] Fig. Figure 15 shows the default example 1 for a duty cycle command update cycle that allows an estimation for each phase current, corresponding to Fig. 13 and Fig. 14 in representative configuration 2 (energy conversion device 104). More specifically: Fig. 15 shows the default example 1 for the carrier cycle, sampling cycle, phase current estimation and duty cycle command update cycle, which enable estimation for each phase current.

[0121] In Fig. 15, *E denotes the following: "Perform current detection (Isp1 to Isp6) and estimate phase currents." *F denotes "Current control".

[0122] Here, the carrier phase difference among the phases is set to 120°, the detection timing cycle for the current Ibus in the common DC bus is set to 5 / 6 times the carrier cycle, and the current control and update cycle for the duty cycle command is set to 5.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the current detection timing cycle.

[0123] It should be noted that the current detection timing cycle is namely the cycle of the estimation timing for each phase current.

[0124] In states where the duty cycle command is 0%, 100 / 3%, 200 / 3%, and 100%, the detection timing for the common DC bus current and the branch ON / OFF timing overlap, so a detection error is likely to occur in the detection of the common DC bus current Ibus. However, it is not generally possible to perform operations with a duty cycle command of 0% and a duty cycle command of 100%, and therefore, it is described that the phase currents can be estimated from the common DC bus current Ibus over almost the entire region.

[0125] In the default example in Fig. 13 to Fig. 15, the relationship between the phase currents and the current Ibus in the common DC bus can be represented by expression (18). Here, the indices x, y, and z correspond to the indices for the detection timings for the detected currents Isp1 to Isp6. [Mathematical Expression 18] [IspxIspyIspz]=[Sp1xSp2xSp3xSp1ySp2ySp3ySp1zSp2zSp3z][I1I2I3]=Z[I1I2I3]

[0126] If it is assumed that operations with duty cycle commands of 0% and 100% are prohibited operations, expression (18) can be replaced by expression (19) to use Isp1, Isp3 and Isp5 detected at the maximum values ​​of the triangular wave carriers. [Mathematical Expression 19] [Isp1Isp3Isp5]=[0Sp21Sp31Sp130Sp33Sp15Sp250][I1I2I3]=Z[I1I2I3]

[0127] If it is assumed that operations with duty cycle commands of 0% and 100% are forbidden operations, expression (18) can be replaced by expression (20) to use Isp2, Isp4 and Isp6 detected at the minimum values ​​of the triangular wave carriers. [Mathematical Expression 20] [Isp2Isp4Isp6]=[Sp12Sp2211Sp24Sp34Sp161Sp36][I1I2I3]=Z[I1I2I3]

[0128] For example, in the operating state that Fig. 13 and Fig. 14, expression (19) and expression (20) can be represented by expression (21) and expression (22), respectively. [Mathematical Expression 21] [Isp1Isp3Isp5]=[011101110][I1I2I3]=Z[I1I2I3] [Mathematical Expression 22] [Isp2Isp4Isp6]=[101100110][I1I2I3]=Z[I1I2I3]

[0129] In expression (21) and expression (22), the determinant of the matrix Z is 2 and 1, respectively, and therefore the inverse matrix can be derived. Consequently, it is found that the phase currents can be reproduced from the current Ibus in the common DC bus using both expressions for the operating condition shown in Fig. 13 and Fig. 14 is shown.

[0130] The condition in which the phase currents cannot be reproduced from the current Ibus in the common DC bus using Expression (19) and Expression (20) is, for example, the case where the duty cycle command D1* is less than 100 / 3%, the duty cycle command D2* is greater than 200 / 3%, and the duty cycle command D3* is greater than 200 / 3%. In this case, Expression (19) and Expression (20) can be represented by Expression (23) and Expression (24), respectively. [Mathematical Expression 23] [Isp1Isp3Isp5]=[011111011][I1I2I3]=Z[I1I2I3] [Mathematical Expression 24] [Isp2Isp4Isp6]=[011001010][I1I2I3]=Z[I1I2I3]

[0131] In both expressions (23) and (24), the determinant of the matrix Z is zero, and therefore the inverse matrix cannot be derived. However, in expression (25), for example, which is obtained by replacing the row for Isp5 in expression (23) with the row for Isp6 in expression (24), the determinant of the matrix Z is 1, and therefore the inverse matrix can be derived. The matrix Z can be extracted in advance based on the relationship between the duty cycle commands for the respective phases. Therefore, if three values ​​such that the determinant does not become zero are extracted in advance from the six detected currents, a stable estimation of the phase currents can be obtained from the current in the common DC bus. [Mathematical Expression 25] [Isp1Isp3Isp6]=[011111010][I1I2I3]=Z[I1I2I3]

[0132] When the duty cycle command changes at the detection timing for Isp1 to Isp6, the state of the upper branch Ap1, Ap2, Ap3 also changes at the detection timing. Therefore, if the detection cycle for Isp1 to Isp6 is 5 / 6 times the carrier cycle, the following applies: If the update cycle for the duty cycle commands is set to be equal to or greater than 5.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the detection cycle, the estimation error for the phase currents I1, I2, and I3 can be reduced.

[0133] Fig. Figure 16 shows a default example 2 for the duty cycle command update cycle, which allows an estimation for each phase current, according to Fig. 13 and Fig. 14 in representative configuration 2 (energy conversion device 104). More specifically: Fig. 16 shows the default example 2 for the carrier cycle, sampling cycle, phase current estimation and duty cycle command update cycle, which enable estimation for each phase current.

[0134] In Fig. 16, *G denotes the following: "Perform current detection (Isp1 to Isp6) and estimate phase currents." *H denotes "current control."

[0135] Here, the carrier phase difference among the phases is set to 120°, the detection timing cycle for the current Ibus in the common DC bus is set to 7 / 6 times the carrier cycle, and the current control and update cycle for the duty cycle command is set to 7.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the current detection timing cycle.

[0136] In states where the duty cycle command is 0%, 100 / 3%, 200 / 3%, and 100%, the detection timing for the common DC bus current and the branch ON / OFF timing overlap, so a detection error is likely to occur in the detection of the common DC bus current Ibus. However, it is not generally possible to perform operations with a duty cycle command of 0% and a duty cycle command of 100%, and therefore, it is described that the phase currents can be estimated from the common DC bus current Ibus over almost the entire region.

[0137] In the default example 2 in Fig. 16, the relations of expressions (18) to (25) can be used, which in the default example 1 in Fig. 15 are described.

[0138] For Example 2, when the duty cycle command changes at the detection timing for Isp1 to Isp6, the state of the upper arm Ap1, Ap2, Ap3 also changes at the detection timing. Therefore, if the update cycle for the duty cycle commands is set to be equal to or greater than 7.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the current detection cycle, the estimation error for the phase currents I1, I2, and I3 can be reduced.

[0139] In Fig. 16, the duty cycle commands for D1* are updated to D2* and D3*. However, depending on the speed of the current control calculation, the duty cycle commands for D2* and D3* can also be updated to D1*.

[0140] Regarding the power conversion device 104 using a three-input, three-phase inverter as the representative configuration 2 of the power conversion device in Embodiment 1, the method for estimating the phase currents (I1, I2, I3) from the current Ibus in the common DC bus will be described.

[0141] The configuration and function / operation in a representative configuration 3 (four-input, four-phase inverter) of the power conversion device in the embodiment 1 will be described with reference to Fig. 17 to Fig. 23 described.

[0142] In Fig. 17 the following applies: To distinguish from the configurations in Fig. 1, etc., the energy conversion device is designated 105. Furthermore, the energy conversion unit is designated 1C, and the input power supply unit is designated 11C.

[0143] The input power supply unit 11C of the power conversion device 105 has coils L1, L2, L3, L4 and DC power supplies VDC1, VDC2, VDC3, VDC4, and forms a four-input, four-phase inverter together with the power conversion unit 1C.

[0144] The power conversion device 105 has a four-phase configuration, and therefore it has four current control units 3 and four PWM control units 4.

[0145] The current estimation unit 2 estimates phase currents (RI1, RI2, RI3, R4) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1*, D2*, D3*, D4*) generated by the current control units 3*, and outputs the estimated phase currents to the current control units 3.

[0146] The current control units 3 generate duty cycle commands (D1*, D2*, D3*, D4*) for controlling the respective phase currents using the estimated phase currents (RI1, RI2, RI3, RI4) and the setpoints (I1*, I2*, I3*, I4*) for the phase currents.

[0147] The PWM control units 4 generate ON / OFF switching signals (Sp1, Sp2, Sp3, Sp4 and Sn1, Sn2, Sn3, Sn4) for controlling the upper and lower branches (Ap1, Ap2, Ap3, Ap4 and An1, An2, An3, An4) of the respective strings of the power conversion unit 1B from the duty cycle commands (D1*, D2*, D3*, D4*) generated by the current control units 3.

[0148] Fig. 18 and Fig. 19 shows a default example 1 for the triangular wave carriers for the respective phases, the ON / OFF states of the upper arms Ap1, Ap2, Ap3, Ap4 on the high-voltage side, the phase currents (I1, I2, I3, I4), and the detection timings for the current Ibus in the common DC bus in the representative configuration 3 (power conversion device 105).

[0149] More precisely: Fig. Figure 18 illustrates the relationship among the triangular wave carriers (fc1, fc2, fc3, fc4), the ON / OFF states of the upper arms Ap1, Ap2, Ap3, Ap4 on the high-voltage side, the phase currents (I1, I2, I3, I4) of the current Ibus in the common DC bus, and the detected currents (Isp1, Isp2, Isp3, Isp4).

[0150] Fig. 18B illustrates the ON / OFF state of the upper arm Ap1 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1 to Isp4) using one phase.

[0151] Here, the triangular wave carrier fc1 is represented by fc1 = (K / π) · |ωct|, in a region where the time function t is not smaller than -π / ωc and not larger than π / ωc.

[0152] Fig. Figure 19A illustrates the ON / OFF state for the upper arm Ap2 and the detection timings for the current Ibus in the common DC bus using one phase.

[0153] Here, the triangular wave carrier fc2 is represented by fc2 = (K / π)·|ωct - (π / 2)|, in a region where the time function t is not smaller than -(1 / 2)π / ωc and not larger than (3 / 2)π / ωc.

[0154] Fig. Figure 19B illustrates the ON / OFF state for the upper arm Ap3 and the detection timings for the current Ibus in the common DC bus using one phase.

[0155] Here, the triangular wave carrier fc3 is represented by fc3 = (K / π)·|ωct + π|, in a region where the time function t is not smaller than -2π / ωc and not larger than 0.

[0156] Fig. Figure 19C illustrates the ON / OFF state for the upper arm Ap4 and the detection timings for the current Ibus in the common DC bus using one phase.

[0157] Here, the triangular wave carrier fc4 is represented by fc4 = (K / π)·|ωct + (π / 2)|, in a region where the time function t is not smaller than -(3 / 2)π / ωc and not larger than (1 / 2)π / ωc.

[0158] Here, with a triangular wave carrier cycle (fc1, fc2, fc3, fc4) defined as 360°, the relationship between the ON / OFF states of the upper branches Ap1, Ap2, Ap3, Ap4 on the high-voltage side according to the duty cycle commands, as well as the detection timing for the current Ibus on the common DC bus, can be extracted. Consequently, it is possible to find in advance a condition in which a sampling error is likely to occur due to an overlap between the ON / OFF switching timing in the branch and the detection timing for the current Ibus on the common DC bus.

[0159] For Fig. 18 and Fig. 19, it can be said that for all of the four phases, a sampling error is likely to occur when the duty cycle command is 0%, 50%, and 100%.

[0160] Fig. 20 shows the default example 1 for a duty cycle command update cycle that Fig. 18 and Fig. 19, and in which a problem remains in the estimation for each phase current, in representative configuration 3 (energy conversion device 105). More specifically: Fig. 20 shows the default example 1 for the carrier cycle, the sampling cycle, phase current estimation and the duty cycle command update cycle, leaving a problem in the estimation for each phase current.

[0161] In Fig. 20, *I denotes the following: "Perform current detection (Isp1 to Isp4) and estimate phase currents." *J denotes "Current control".

[0162] Here, the carrier phase difference among the phases is set to 90°, the detection timing cycle for the current Ibus in the common DC bus is set to 5 / 4 times the carrier cycle, and the current control and update cycle for the duty cycle command is set to 5.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the current detection timing cycle.

[0163] It should be noted that the current detection timing cycle is namely the cycle of the estimation timing for each phase current.

[0164] In states where the duty cycle command is 0%, 50%, and 100%, the detection timing of the common DC bus current and the branch ON / OFF timing overlap, so a detection error is likely to occur in the detection of the common DC bus current Ibus. However, it is not generally accepted that operations are performed with a duty cycle command of 0% and a duty cycle command of 100%, and therefore, it is described that the phase current can be restrictively estimated from the common DC bus current Ibus under the condition that the duty cycle command is greater than 0% and less than 100%.

[0165] In the default example 1 in Fig. 18 to Fig. 20, the relation between the phase currents and the current Ibus in the common DC bus can be represented by expression (26). [Mathematical Expression 26] [Isp1Isp2Isp3Isp4]=[Sp11Sp21Sp31Sp41Sp12Sp22Sp32Sp42Sp13Sp23Sp33Sp43Sp14Sp24Sp34Sp44][I1I2I3I4]=Z[I1I2I3I4]

[0166] For example, in the operating state that Fig. 18 and Fig. 19, the expression (26) can be represented by the expression (27). [Mathematical Expression 27] [Isp1Isp2Isp3Isp4]=[0110100111001100][I1I2I3I4]=Z[I1I2I3I4]

[0167] However, in expression (27), the third and fourth rows of matrix Z are equal, so the determinant becomes zero. Therefore, the phase currents cannot be reproduced from the current Ibus in the common DC bus. Furthermore, unlike representative configuration 2, in the default example 1, in the representative configuration 3, the number of phases and the number of detection points for the current Ibus in the common DC bus are the same. Therefore, this default example is a restrictive default example that includes a condition in which the phase currents cannot be estimated from the current Ibus in the common DC bus.

[0168] Fig. 21 and Fig. 22 shows a default example 2 for the triangular wave carriers for the respective phases, the ON / OFF states of the upper arms Ap1, Ap2, Ap3, Ap4 on the high-voltage side, the phase currents (I1, I2, I3, I4), and the detection timings for the current Ibus in the common DC bus in the representative configuration 3 (power conversion device 105).

[0169] More precisely: Fig. Figure 21 illustrates the relationship among the triangular wave carriers (fc1, fc2, fc3, fc4), the ON / OFF states of the upper arms Ap1, Ap2, Ap3, Ap4 on the high voltage side, the phase currents (I1, I2, I3, I4) of the current Ibus in the common DC bus, and the detected currents (Isp1, Isp2, Isp3, Isp4, Isp5, Isp6).

[0170] The triangular wave carriers fc1, fc2, and fc3 have phase differences of 120° from each other, and the triangular wave carrier fc4 has a phase difference of 180° from fc1. This means that the initial phase differences of the triangular wave carriers fc1, fc2, fc3, and fc4 are different.

[0171] Fig. 21B illustrates the ON / OFF state of the upper arm Ap1 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1 to Isp6) using one phase.

[0172] Here, the triangular wave carrier fc1 is represented by fc1 = (K / π) · |ωct|, in a region where the time function t is not smaller than -π / ωc and not larger than π / ωc.

[0173] Fig. 22A illustrates the ON / OFF state of the upper arm Ap2 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1 to Isp6) using one phase.

[0174] Here, the triangular wave carrier fc2 is represented by fc2 = (K / π)·|ωct - (2π / 3)|, in a range where the time function t is not smaller than -(1 / 3)π / ωc and not larger than (5 / 3)π / ωc.

[0175] Fig. 22B illustrates the ON / OFF state of the upper arm Ap3 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1 to Isp6) using one phase.

[0176] Here, the triangular wave carrier fc3 is represented by fc3 = (K / π)·|ωct + (2π / 3)|, in a range where the time function t is not smaller than -(5 / 3)π / ωc and not larger than (1 / 3)π / ωc.

[0177] Fig. 22C illustrates the ON / OFF state of the upper arm Ap4 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1 to Isp6) using one phase.

[0178] Here, the triangular wave carrier fc4 is represented by fc4 = (K / π)· |ωct + (π / 2) + π|, in a range where the time function t is not smaller than -2π / ωc and not larger than 0.

[0179] Here, with a triangular wave carrier cycle (fc1, fc2, fc3, fc4) defined as 360°, the relationship between the ON / OFF states of the upper branches Ap1, Ap2, Ap3, Ap4 on the high-voltage side according to the duty cycle commands, as well as the detection timing for the current Ibus on the common DC bus, can be extracted. Consequently, it is possible to find in advance a condition in which a sampling error is likely to occur due to an overlap between the ON / OFF switching timing in the branch and the detection timing for the current Ibus on the common DC bus.

[0180] For Fig. 21 and Fig. 22, it can be said that for all of the four phases, a sampling error is likely to occur when the duty cycle command is 0%, 100 / 3%, 200 / 3%, and 100%.

[0181] Fig. Figure 23 shows the default example 2 for a duty cycle command update cycle that allows an estimation for each phase current, corresponding to Fig. 21 and Fig. 22 in representative configuration 3 (energy conversion device 105). More specifically: Fig. 23 shows the default example 2 for the carrier cycle, sampling cycle, phase current estimation and duty cycle command update cycle, which enable estimation for each phase current.

[0182] In Fig. 23, *K denotes the following: "Perform current detection (Isp1 to Isp6) and estimate phase currents." *L denotes "current control".

[0183] Here, the carrier phase difference among the three phases (fc1, fc2, fc3) of the four phases is set to 120°, the carrier phase difference between one phase (fc1) of the three phases and the other one phase (fc4) is set to 180°, the detection timing cycle for the current Ibus in the common DC bus is set to 5 / 6 times the carrier cycle, and the current control and update cycle for the duty cycle command is set to 5.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the current detection timing cycle.

[0184] It should be noted that the current detection timing cycle is namely the cycle of the estimation timing for each phase current.

[0185] In states where the duty cycle command is 0%, 50%, and 100%, the detection timing for the common DC bus current and the branch ON / OFF timing overlap, so a detection error is likely to occur in the detection of the common DC bus current Ibus. It is described that in a state where the duty cycle command is greater than 0% and less than 100%, the phase currents (I1 to I4) can be estimated from the common DC bus current Ibus.

[0186] In the default example in Fig. 21 to Fig. 23, the relationship between the phase currents and the current Ibus in the common DC bus can be represented by expression (28). Here, the indices w, x, y, z correspond to the indices for the detection timings for the detected currents Isp1 to Isp6. [Mathematical Expression 28] [IspwIspxIspyIspz]=[Sp1wSp2wSp3wSp4wSp1xSp2xSp3xSp4xSp1ySp2ySp3ySp4ySp1zSp2zSp3zSp4z][I1I2I3I4]=Z[I1I2I3I4]

[0187] For example, in the operating state that Fig. 21 and Fig. 22, the expression (28) can be represented by the expression (29). [Mathematical Expression 29] [Isp1Isp2Isp4Isp6]=[0111101010001100][I1I2I3I4]=Z[I1I2I3I4]

[0188] Fig. 21 and Fig. 22 show an operating state in which the duty cycle command D1* is greater than 200 / 3%, the duty cycle commands D2* and D3* are greater than 100 / 3% and less than 200 / 3%, and the duty cycle command D4* is less than 100 / 3%, as shown in Fig. 18 and Fig. 19 shown above. Although the inverse matrix for the matrix Z in expression (27) is Fig. 18 and Fig. 19 cannot be derived, the determinant of the matrix Z in expression (29) has Fig. 21 and Fig. 22 has a value of -1, and therefore the inverse matrix can be derived.

[0189] It is therefore found that in the default example 2 in Fig. 21 to Fig. 23, by combining the specification for the two-phase configuration shown in the representative configuration 1 and the specification for the three-phase configuration shown in the representative configuration 2, it is possible to deal with the state in which the current estimation unit 2 cannot perform effective estimation in the specification example 1 in Fig. 18 to Fig. 20 could be carried out.

[0190] In Representative Configuration 3, Default Example 1 and Default Example 2 demonstrated the characteristic differences by changing the phase relationship between the carriers. The shape of the triangular wave carriers can be changed from a symmetrical triangular wave whose rising edge and falling edge have the same slope to a deformed triangular wave whose slopes are different, so that the ON / OFF state of the arm can be changed according to the duty cycle command for detection timing. For example, the deformed triangular wave can be configured so that in the triangular wave carriers fc1 to fc4 shown in Fig. 18, Fig. 19 and Fig. 21, Fig. 22, the positions of the maximum values ​​are fixed and the positions of the minimum values ​​are 120° ahead or behind.

[0191] Regarding the power conversion device 105 using the four-input, four-phase inverter as in the representative configuration 3 of the power conversion device in Embodiment 1, the method for estimating the phase currents (I1 to I4) from the current Ibus in the common DC bus will be described.

[0192] Next, derived examples of representative configurations 1 to 3 are described.

[0193] Fig. Figure 24 shows a single-input, two-phase inverter in a derived example of representative configuration 1.

[0194] To distinguish from the configurations in Fig. 1, etc., the energy conversion device is designated 106. Furthermore, the energy conversion unit is designated 1D, and the input power supply unit is designated 11D.

[0195] The input power supply unit 11D of the power conversion device 106 has coils L1, L2 and a DC power supply VDC1, and forms a single-input, two-phase inverter together with the power conversion unit 1D.

[0196] The power conversion device 106 has a two-phase configuration and therefore includes two current control units 3 and two PWM control units 4.

[0197] The current estimation unit 2 estimates phase currents (RI1, RI2) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1*, D2*) generated by the current control units 3, and outputs the estimated phase currents to the current control units 3.

[0198] The current control units 3 generate duty cycle commands (D1*, D2*) for controlling the respective phase currents using the estimated phase currents (RI1, RI2) and the setpoints (I1*, I2*) for the phase currents.

[0199] The PWM control units 4 generate ON / OFF switching signals (Sp1, Sp2 and Sn1, Sn2) for controlling the upper and lower branches (Ap1, Ap2 and An1, An2) of the respective strings of the power conversion unit 1D from the duty cycle commands (D1*, D2*) generated by the current control units 3.

[0200] Fig. Figure 25 shows a single-input, three-phase converter in a derived example 1 of representative configuration 2.

[0201] To distinguish from the configurations in Fig. 1, etc., the energy conversion device is designated 107. Furthermore, the energy conversion unit is designated 1E, and the input power supply unit is designated 11E.

[0202] The input power supply unit 11E of the power conversion device 107 has coils L1, L2, L3 and a DC power supply VDC1, and forms a single-input, three-phase inverter together with the power conversion unit 1E.

[0203] The power conversion device 107 has a three-phase configuration, and therefore it has three current control units 3 and three PWM control units 4.

[0204] The current estimation unit 2 estimates phase currents (RI1, RI2, RI3) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1*, D2*, D3*) generated by the current control units 3, and outputs the estimated phase currents to the current control units 3.

[0205] The current control units 3 generate duty cycle commands (D1*, D2*, D3*) for controlling the respective phase currents using the estimated phase currents (RI1, RI2, RI3) and the setpoints (I1*, I2*, I3*) for the phase currents.

[0206] The PWM control units 4 generate ON / OFF switching signals (Sp1, Sp2, Sp3 and Sn1, Sn2, Sn3) for controlling the upper and lower branches (Ap1, Ap2, Ap3 and An1, An2, An3) of the respective strings of the power conversion unit 1E from the duty cycle commands (D1*, D2*, D3*) generated by the current control units 3.

[0207] Fig. Figure 26 shows a two-input, three-phase inverter in a derived example 2 of representative configuration 2.

[0208] To distinguish from the configurations in Fig. 1, etc., the energy conversion device is designated 108. Furthermore, the energy conversion unit is designated 1F, and the input power supply unit is designated 11F.

[0209] The input power supply unit 11F of the power conversion device 108 has coils L1, L2, L3 and DC power supplies VDC1, VDC2, and forms a two-input, three-phase inverter together with the power conversion unit 1F.

[0210] The power conversion device 108 has a three-phase configuration, and therefore it has three current control units 3 and three PWM control units 4.

[0211] The current estimation units 2 estimate phase currents (RI1, RI2, RI3) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1*, D2*, D3*) generated by the current control units 3, and output the estimated phase currents to the current control units 3.

[0212] The current control units 3 generate duty cycle commands (D1*, D2*, D3*) for controlling the respective phase currents using the estimated phase currents (RI1, RI2, RI3) and the setpoints (I1*, I2*, I3*) for the phase currents.

[0213] The PWM control units 4 generate ON / OFF switching signals (Sp1, Sp2, Sp3 and Sn1, Sn2, Sn3) for controlling the upper and lower branches (Ap1, Ap2, Ap3 and An1, An2, An3) of the respective strings of the power conversion unit 1F from the duty cycle commands (D1*, D2*, D3*) generated by the current control units 3.

[0214] Fig. Figure 27 shows a single-input, four-phase inverter in a derived example 1 of representative configuration 3.

[0215] To distinguish from the configurations in Fig. 1, etc., the energy conversion device is designated 109. Furthermore, the energy conversion unit is designated 1G, and the input power supply unit is designated 11G.

[0216] The input power supply unit 11G of the power conversion device 109 has coils L1, L2, L3, L4 and a DC power supply VDC1, and forms a single-input, four-phase inverter together with the power conversion unit 1G.

[0217] The power conversion device 109 has a four-phase configuration, and therefore it has four current control units 3 and four PWM control units 4.

[0218] The current estimation unit 2 estimates phase currents (RI1, RI2, RI3, R4) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1*, D2*, D3*, D4*) generated by the current control units 3, and outputs the estimated phase currents to the current control units 3.

[0219] The current control units 3 generate duty cycle commands (D1*, D2*, D3*, D4*) for controlling the respective phase currents using the estimated phase currents (RI1, RI2, RI3, RI4) and the setpoints (I1*, I2*, I3*, I4*) for the phase currents.

[0220] The PWM control units 4 generate ON / OFF switching signals (Sp1, Sp2, Sp3, Sp4 and Sn1, Sn2, Sn3, Sn4) for controlling the upper and lower arms (Ap1, Ap2, Ap3, Ap4 and An1, An2, An3, An4) of the respective strings of the power conversion unit 1G from the duty cycle commands (D1*, D2*, D3*, D4*) generated by the current control units 3.

[0221] Fig. Figure 28 shows a three-input, four-phase converter in a derived example 2 of representative configuration 3.

[0222] To distinguish from the configurations in Fig. 1, etc., the energy conversion device is designated 110. Furthermore, the energy conversion unit is designated 1H, and the input power supply unit is designated 11H.

[0223] The input power supply unit 11H of the power conversion device 110 has coils L1, L2, L3, L4 and DC power supplies VDC1, VDC2, VDC3, and forms a three-input, four-phase converter together with the power conversion unit 1H.

[0224] The power conversion device 110 has a four-phase configuration, and therefore it has four current control units 3 and four PWM control units 4.

[0225] The current estimation unit 2 estimates phase currents (RI1, RI2, RI3, R4) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1*, D2*, D3*, D4*) generated by the current control units 3, and outputs the estimated phase currents to the current control units 3.

[0226] The current control units 3 generate duty cycle commands (D1*, D2*, D3*, D4*) for controlling the respective phase currents using the estimated phase currents (RI1, RI2, RI3, RI4) and the setpoints (I1*, I2*, I3*, I4*) for the phase currents.

[0227] The PWM control units 4 generate ON / OFF switching signals (Sp1, Sp2, Sp3, Sp4 and Sn1, Sn2, Sn3, Sn4) for controlling the upper and lower arms (Ap1, Ap2, Ap3, Ap4 and An1, An2, An3, An4) of the respective strings of the power conversion unit 1H from the duty cycle commands (D1*, D2*, D3*, D4*) generated by the current control unit 3.

[0228] Next, representative configurations 4 to 6 of Embodiment 1 will be described sequentially. Representative configurations 1 to 3 are directed to converters, whereas representative configurations 4 to 6 are directed to inverters. Here, the converter denotes a power conversion device in which the voltage of the common DC bus and the voltages associated with the respective phases are DC voltages, and the inverter denotes the power conversion device in which the voltage of the common DC bus is a DC voltage and the voltages associated with the respective phases are AC voltages.

[0229] The configuration and function / operation in representative configuration 4 (single-phase two-wire inverter) of the power conversion device in embodiment 1 will be described with reference to Fig. 29 to Fig. 32 described.

[0230] In Fig. 29 the following applies: To distinguish from the configurations in Fig. 1, etc., the power conversion device is designated 111. Furthermore, the power conversion unit is designated 1J, and the input power supply unit is designated 11J. A smoothing capacitor 6 is associated with the common DC buses connecting the power conversion unit 1J to the load 12.

[0231] The input power supply unit 11J of the power conversion device 111 has coils L1, L2 and an AC power supply VAC1, and forms a single-phase, two-line inverter together with the power conversion unit 1J.

[0232] The energy conversion device 111 has a current control unit 3 and two PWM control units 4.

[0233] Current flowing through coil L1 corresponds to phase current I1, and current flowing through coil L2 corresponds to phase current I2.

[0234] The current estimation unit 2 estimates the phase current (RIAC) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1*, D2*) generated by the current control unit 3, and outputs the estimated phase current to the current control unit 3.

[0235] The current control unit 3 generates the duty cycle commands (D1*, D2*) for controlling the respective phase currents using the estimated phase current (RIAC) and the setpoint (IAC*) for each phase current.

[0236] The PWM control units 4 generate ON / OFF switching signals (Sp1, Sp2 and Sn1, Sn2) for controlling the upper and lower arms (Ap1, Ap2 and An1, An2) of the respective strings of the power conversion unit 1A from the duty cycle commands (D1*, D2*) generated by the current control unit 3.

[0237] The number of PWM control units 4 can be reduced to one by using a configuration in which the ON / OFF state of the upper arm (e.g., Ap1) of one of the two strands and the ON / OFF state of the lower arm (An2) of the other strand coincide with each other, and similarly, the ON / OFF state of the lower arm (An1) of one strand and the ON / OFF state of the upper arm (Ap2) of the other strand coincide with each other. The following description describes the case in which a configuration including two PWM control units 4 is used.

[0238] Fig. 30 and Fig. 31 shows a default example 1 for the triangular wave carriers for the respective phases, the ON / OFF states of the upper arms Ap1 and Ap2 on the high-voltage side, the phase currents (I1, I2), and the detection timings for the current Ibus in the common DC bus in the representative configuration 4 (power conversion device 111).

[0239] More precisely: Fig. Figure 30 illustrates the relationship among the triangular wave carriers (fc1, fc2), the ON / OFF states of the upper arms Ap1, Ap2 on the high voltage side, the phase currents (I1, I2), the current Ibus in the common DC bus, and the detected currents (Isp1, Isp2).

[0240] Fig. 31A illustrates the ON / OFF state of the upper arm Ap1 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1, Isp2) using one phase.

[0241] Here, the triangular wave carrier fc1 is represented by fc1 = (K / π) · |ωct|, in a region where the time function t is not smaller than -π / ωc and not larger than π / ωc.

[0242] Fig. 31B illustrates the ON / OFF state of the upper arm Ap2 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1, Isp2) using one phase.

[0243] Here, the triangular wave carrier fc2 is represented by fc2 = (K / π)·|ωct + π|, in a range where the time function t is not smaller than -2π / ωc and not larger than 0.

[0244] Here, with a triangular wave carrier cycle (fc1, fc2) defined as 360°, the relationship between the ON / OFF states of the upper branches Ap1 and Ap2 on the high-voltage side according to the duty cycle commands, as well as the detection timing for the current Ibus on the common DC bus, can be extracted. Consequently, it is possible to find in advance a condition in which a sampling error is likely to occur due to an overlap between the ON / OFF switching timing in the branch and the detection timing for the current Ibus on the common DC bus.

[0245] For Fig. 30 and Fig. 31, it can be said that for both of the two phases, a sampling error is likely to occur when the duty cycle command is 0% and 100%.

[0246] Fig. Figure 32 shows the default example 1 for a duty cycle command update cycle that allows an estimation for each phase current, corresponding to Fig. 30 and Fig. 31 in the representative configuration 4 (energy conversion device 111). More specifically: Fig. 32 shows the default example 1 for the carrier cycle, sampling cycle, phase current estimation, and duty cycle command update cycle, which enable estimation for each phase current.

[0247] In Fig. 32, *M denotes the following: “Perform current detection (Isp1, Isp2) and estimate phase currents.” *N denotes “current control”.

[0248] Here, the carrier phase difference between the phases is set to 180°, the detection timing cycle for the current Ibus in the common DC bus is set to 1.5 times the carrier cycle, and the current control and update cycle for the duty cycle command is set to 3.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the current detection timing cycle.

[0249] In a state where the duty cycle command is 0% and a state where the duty cycle command is 100%, the detection timing for the common DC bus current and the arm ON / OFF timing overlap, so a detection error is likely to occur in the detection of the common DC bus current Ibus. However, it is not generally possible to perform operations with a duty cycle command of 0% and a duty cycle command of 100%, and therefore, it is described that the phase currents can be estimated from the common DC bus current Ibus over almost the entire region.

[0250] In the default example 1 in Fig. 30, Fig. 31 and Fig. 32, the relationship between the phase currents and the current Ibus in the common DC bus can be represented by expressions (4) to (6), as in the default example 1 for the two-input, two-phase inverter shown in the representative configuration 1.

[0251] Here, in Representative Configuration 4, unlike Representative Configuration 1, the reverse polarity current of phase current I1 is phase current I2, and therefore, current estimation unit 2 can select, as an estimated value for IAC, an estimated value of I1, -1 times an estimated value of I2, a value obtained by multiplying the difference between an estimated value of I1 and an estimated value of I2 by 0.5, or the like. Accordingly, Representative Configuration 4 can be treated in the same manner as Representative Configuration 1.

[0252] In the above description, a default example corresponding to the default example 1 in the representative configuration 1 is described. However, a default example corresponding to the default example 2 in the representative configuration 1 may also be configured in the same way.

[0253] Regarding the power conversion device 111 using the single-phase two-wire inverter as the representative configuration 4 of the power conversion device in Embodiment 1, the method for estimating the phase currents (I1, I2) from the current Ibus in the common DC bus will be described.

[0254] The configuration and function / operation in a representative configuration 5 (single-phase three-wire inverter) of the power conversion device in the embodiment 1 will be described with reference to Fig. 33 to Fig. 36 described.

[0255] In Fig. 33 the following applies: To distinguish from the configurations in Fig. 1, etc., the power conversion device is designated 112. Furthermore, the power conversion unit is designated 1K, and the input power supply unit is designated 11K. A smoothing capacitor 6 is associated with the common DC buses connecting the power conversion unit 1K to the load 12.

[0256] The input power supply unit 11K of the power conversion device 112 has coils L1, L3 and AC power supplies VAC1, VAC2, and forms a single-phase, three-line inverter together with the power conversion unit 1K.

[0257] The energy conversion device 112 has three current control units 3 and three PWM control units 4.

[0258] Alternating current (corresponding to phase current I1) flowing through coil L1 is denoted by IU. Alternating current (corresponding to phase current I3) flowing through coil L is denoted by IV. Alternating current (corresponding to phase current I2) flowing through the neutral conductor is denoted by IO.

[0259] The current estimation unit 2 estimates phase currents (RIU, RIV, RIO) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1*, D2*, D3*) generated by the current control units 3, and outputs the estimated phase currents to the current control units 3.

[0260] The current control units 3 generate duty cycle commands (D1*, D2*, D3*) for controlling the respective phase currents using the estimated phase currents (RIU, RIV, RIO) and the setpoints (IU*, IV*, IO*) for the phase currents.

[0261] The PWM control units 4 generate ON / OFF switching signals (Sp1, Sp2, Sp3 and Sn1, Sn2, Sn3) for controlling the upper and lower branches (Ap1, Ap2, Ap3 and An1, An2, An3) of the strings of the power conversion unit 1K from the duty cycle commands (D1*, D2*, D3*) generated by the current control units 3.

[0262] Fig. 34 and Fig. 35 show a default example 1 for the triangular wave carriers for the respective phases, the ON / OFF states of the upper arms Ap1, Ap2, Ap3 on the high-voltage side, the phase currents (I1, I2, I3), and the detection timings for the current Ibus in the common DC bus in the representative configuration 5 (power conversion device 112).

[0263] More precisely: Fig. 34A illustrates the relationship among the triangular wave carriers (fc1, fc2, fc3), the ON / OFF states of the upper arms Ap1, Ap2, Ap3 on the high-voltage side, the phase currents (I1, I2, I3), the current Ibus in the common DC bus, and the detected currents (Isp1, Isp2, Isp3, Isp4, Isp5, Isp6).

[0264] Fig. 34B illustrates the ON / OFF state of the upper arm Ap1 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1 to Isp6) using one phase.

[0265] Here, the triangular wave carrier fc1 is represented by fc1 = (K / π) · |ωct|, in a region where the time function t is not smaller than -π / ωc and not larger than π / ωc.

[0266] Fig. 35A illustrates the ON / OFF state of the upper arm Ap2 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1 to Isp6) using one phase.

[0267] Here, the triangular wave carrier fc2 is represented by fc2 = (K / π)·|ωct - (2π / 3)|, in a range where the time function t is not smaller than -(1 / 3)π / ωc and not larger than (5 / 3)π / ωc.

[0268] Fig. 35B illustrates the ON / OFF state of the upper arm Ap3 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1 to Isp6) using one phase.

[0269] Here, the triangular wave carrier fc3 is represented by fc3 = (K / π)·|ωct + (2π / 3)|, in a range where the time function t is not smaller than -(5 / 3)π / ωc and not larger than (1 / 3)π / ωc.

[0270] With a triangular wave carrier cycle (fc1, fc2, fc3) defined as 360°, the relationship between the ON / OFF states of the upper branches Ap1, Ap2, Ap3 on the high-voltage side according to the duty cycle commands and the detection timing of the current Ibus on the common DC bus can be extracted. Consequently, it is possible to find in advance a condition in which a sampling error is likely to occur due to an overlap between the ON / OFF switching timing in the branch and the detection timing of the current Ibus on the common DC bus.

[0271] For Fig. 34 and Fig. 35, it can be said that for all of the three phases, a sampling error is likely to occur when the duty cycle command is 0%, 100 / 3%, 200 / 3%, and 100%.

[0272] Fig. Figure 36 shows the default example 1 for a duty cycle command update cycle that allows an estimation for each phase current, according to Fig. 34 and Fig. 35, in the representative configuration 5 (energy conversion device 112). More specifically: Fig. 36 shows the default example 1 for the carrier cycle, sampling cycle, phase current estimation and duty cycle command update cycle, which enable estimation for each phase current.

[0273] In Fig. 36, *O denotes the following: "Perform current detection (Isp1 to Isp6) and estimate phase currents." *P denotes "Current control".

[0274] Here, the carrier phase difference among the phases is set to 120°, the detection timing cycle for the current Ibus in the common DC bus is set to 5 / 6 times the carrier cycle, and the current control and update cycle for the duty cycle command is set to 5.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the current detection timing cycle.

[0275] In states where the duty cycle command is 0%, 100 / 3%, 200 / 3%, and 100%, the detection timing for the common DC bus current and the branch ON / OFF timing overlap, so a detection error is likely to occur in the detection of the common DC bus current Ibus. However, it is described that the phase currents can be estimated from the common DC bus current Ibus in a state where the duty cycle command is greater than 0% and less than 100%.

[0276] In the default example 1 in Fig. 34, Fig. 35 and Fig. 36, the relationship between the phase currents and the current Ibus in the common DC bus can be represented by Expression (18) to Expression (25), as in the default example 1 for the three-input, three-phase inverter shown in the representative configuration 2.

[0277] Consequently, representative configuration 5 can be treated in the same way as representative configuration 2.

[0278] In the above description, a default example corresponding to the default example 1 in the representative configuration 2 is described. However, a default example corresponding to the default example 2 in the representative configuration 2 may also be configured in the same way.

[0279] Regarding the power conversion device 112 using the single-phase three-wire converter as the representative configuration 5 of the power conversion device in Embodiment 1, the method for estimating the alternating currents (IU, IV, IO), ie, the phase currents (I1, I2, I3), from the current Ibus in the common DC bus will be described.

[0280] The configuration and function / operation in the representative configuration 6 (three-phase three-wire inverter) of the power conversion device in the embodiment 1 will be described with reference to Fig. 37 and Fig. 38. First, the configuration in Fig. 37 described.

[0281] To distinguish from the configurations in Fig. 1, etc., the power conversion device is designated 113. Furthermore, the power conversion unit is designated 1L, and the input power supply unit is designated 11L. A smoothing capacitor 6 is associated with the common DC buses connecting the power conversion unit 1L to the load 12.

[0282] The input power supply unit 11L of the power conversion device 113 has coils L1, L2, L3 and AC power supplies VAC1, VAC2, VAC3, and forms a three-phase, three-wire inverter together with the power conversion unit 1L.

[0283] The energy conversion device 113 has three current control units 3 and three PWM control units 4.

[0284] Alternating current (corresponding to phase current I1) flowing through coil L1 is denoted by IU. Alternating current (corresponding to phase current I2) flowing through coil L2 is denoted by IV. Alternating current (corresponding to phase current I3) flowing through coil L3 is denoted by IW.

[0285] The current estimation unit 2 estimates phase currents (RIU, RIV, RIO) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1*, D2*, D3*) generated by the current control units 3, and outputs the estimated phase currents to the current control units 3.

[0286] The current control units 3 generate duty cycle commands (D1*, D2*, D3*) for controlling the respective phase currents using the estimated phase currents (RIU, RIV, RIW) and the setpoints (IU*, IV*, IW*) for the phase currents.

[0287] The PWM control units 4 generate ON / OFF switching signals (Sp1, Sp2, Sp3 and Sn1, Sn2, Sn3) for controlling the upper and lower branches (Ap1, Ap2, Ap3 and An1, An2, An3) of the respective strings of the power conversion unit 1L from the duty cycle commands (D1*, D2*, D3*) generated by the current control units 3.

[0288] Next, the configuration in Fig. 38 described.

[0289] To distinguish from the configurations in Fig. 1, etc., the energy conversion device is designated 114. Furthermore, the energy conversion unit is designated 1M, and the input power supply unit is designated 11M.

[0290] The configuration in Fig. 38 is the three-phase, three-wire inverter, which is the same as in Fig. 37, but it differs from the energy conversion device 113 in Fig. 37 in that a three-phase / two-phase converter 7A and a two-phase / three-phase converter 7B are used.

[0291] In Fig. 38, setpoint values ​​(Iγ*, Iδ*) and estimated currents (RIγ, RIδ) converted into a two-phase coordinate system are input to the current control units 3, and thus a phase θ is required for three-phase / two-phase conversion and two-phase / three-phase conversion. Here, Iγ and Iδ are orthogonal-axis currents after rotational coordinate transformation.

[0292] The energy conversion device 114 in Fig. 38 adopts a configuration for converting three-phase alternating currents from a stationary coordinate system to a rotating coordinate system, and it does not control the zero-phase component. Therefore, two current control units 3 and three PWM control units 4 are used.

[0293] A method for converting the three-phase alternating currents from a stationary coordinate system to a rotating coordinate system is well known, and therefore its description is omitted.

[0294] Representative configuration 6 is the same as representative configuration 5 except for the AC power supply. Therefore, the default example shown in Fig. 34 to Fig. 36 in the representative configuration 5.

[0295] Regarding the power conversion devices 113, 114 using the three-phase, three-wire converter as the representative configuration 6 of the power conversion device in Embodiment 1, the method for estimating the alternating currents (IU, IV, IW), ie, the phase currents (I1, I2, I3) from the current Ibus in the common DC bus will be described.

[0296] Next, a derived example of the representative configurations 4 to 6 in Embodiment 1 will be described focusing on their configuration.

[0297] Fig. Figure 39 shows a three-phase, three-wire inverter and a single-phase, two-wire inverter in the derived example of representative configurations 4 to 6.

[0298] To distinguish from the configurations in Fig. 1, etc., the energy conversion device is designated 115. Furthermore, the energy conversion unit is designated 1N, and the input power supply unit is designated 11N.

[0299] The energy conversion device 1N comprises an energy conversion unit 1NA and an energy conversion unit 1NB. The input power supply unit 11N comprises an input power supply unit 11NA and an input power supply unit 11NB.

[0300] Here, the input power supply unit 11NA has coils L1, L2, L3 and AC power supplies VAC1, VAC2, VAC3, and it forms a three-phase, three-wire inverter together with the power conversion unit 1NA.

[0301] The input power supply unit 11NB comprises coils L4, L5 and an AC power supply VAC4, and forms a single-phase, two-wire inverter together with the power conversion unit 1NB.

[0302] The energy conversion device 115 has a total five-phase configuration and therefore has five current control units 3 and five PWM control units 4.

[0303] The current estimation unit 2 estimates phase currents (RIU, RIV, RIW, RIAC) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1* to D5*) generated by the current control units 3, and outputs the estimated phase currents to the current control units 3. Note that the duty cycle command D5* has a value of -D4*.

[0304] The current control units 3 generate duty cycle commands (D1* to D5*) for controlling the respective phase currents using the estimated phase currents (RIU, RIV, RIW, RIAC) and the setpoints (IU*, IV*, IW*, IAC*) for the phase currents.

[0305] The PWM control units 4 generate ON / OFF switching signals (Sp1 to Sp5 and Sn1 to Sn5) for controlling the upper and lower arms (Ap1 to Ap5 and An1 to An5) of the respective strings of the power conversion units 1NA, 1NB from the duty cycle commands (D1* to D5*) generated by the current control units 3.

[0306] Next, combined configurations 1 to 4 will be described, which are configuration examples in which a converter and an inverter are combined in the power conversion device according to Embodiment 1.

[0307] Fig. Figure 40 shows a representative combined configuration 1 of a single-phase converter and a single-phase, two-wire inverter.

[0308] To distinguish from the configurations in Fig. 1, etc., the energy conversion device is designated 116. Furthermore, the energy conversion unit is designated 1P, and the input power supply unit is designated 11P.

[0309] The input power supply unit 11P of the power conversion device 116 includes coils L1, L2 and an AC power supply VAC1, and further includes a coil L3 and a DC power supply VDC1.

[0310] The power conversion device 116 has a three-phase configuration overall, and therefore it has three current control units 3 and three PWM control units 4.

[0311] The current estimation unit 2 estimates phase currents (RIAC, RI3) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1* to D3*) generated by the current control units 3, and outputs the estimated phase currents to the current control unit 3. Note that the duty cycle command D2* has the value -D1*.

[0312] The current control units 3 generate duty cycle commands (D1* to D3*) for controlling the respective phase currents using the estimated phase currents (RIAC, RI3) and the setpoints (IAC*, I3*) for the phase currents.

[0313] The PWM control units 4 generate ON / OFF switching signals (Sp1 to Sp3 and Sn1 to Sn3) for controlling the upper and lower arms (Ap1 to Ap3 and An1 to An3) of the respective strings of the power conversion unit 1P from the duty cycle commands (D1* to D3*) generated by the current control units 3.

[0314] The default example of the carrier cycle, sampling cycle, phase current estimation, and duty command update cycle that allow estimation for each phase current in the representative combined configuration 1 is the same as in the three-phase configuration shown in the embodiment 1.

[0315] Fig. Figure 41 shows a representative combined configuration 2 of a two-input, two-phase converter and a single-phase, two-wire inverter.

[0316] To distinguish from the configurations in Fig. 1, etc., the energy conversion device is designated 117. Furthermore, the energy conversion unit is designated 1Q, and the input power supply unit is designated 11Q.

[0317] The input power supply unit 11Q of the power conversion device 117 has coils L1, L2 and an AC power supply VAC1, and it further has coils L3, L4 and DC power supplies VDC1, VDC2.

[0318] The power conversion device 117 has a four-phase configuration as a whole, and therefore it has four current control units 3 and four PWM control units 4.

[0319] The current estimation unit 2 estimates phase currents (RIAC, RI3, RI4) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1* to D4*) generated by the current control units 3, and outputs the estimated phase currents to the current control units 3. Note that the duty cycle command D2* has a value of -D1*.

[0320] The current control units 3 generate duty cycle commands (D1* to D4*) for controlling the respective phase currents using the estimated phase currents (RIAC, RI3, RI4) and the setpoints (IAC*, I3*, I4*) for the phase currents.

[0321] The PWM control units 4 generate ON / OFF switching signals (Sp1 to Sp4 and Sn1 to Sn4) for controlling the upper and lower arms (Ap1 to Ap4 and An1 to An4) of the respective strings of the power conversion unit 1Q from the duty cycle commands (D1* to D4*) generated by the current control units 3.

[0322] A default example of the carrier cycle, sampling cycle, phase current estimation, and duty command update cycle that allow estimation for each phase current in the representative combined configuration 2 is the same as that in the four-phase configuration shown in the embodiment 1.

[0323] Fig. Figure 42 shows a representative combined configuration 3 of a single-phase converter and a single-phase three-wire inverter.

[0324] To distinguish from the configurations in Fig. 1, etc., the energy conversion device is designated 118. Furthermore, the energy conversion unit is designated 1R, and the input power supply unit is designated 11R.

[0325] The input power supply unit 11R of the power conversion device 118 has coils L1, L3 and AC power supplies VAC1, VAC2, and it further has a coil L4 and a DC power supply VDC1.

[0326] The power conversion device 118 has a four-phase configuration overall, and therefore has four current control units 3 and four PWM control units 4.

[0327] The current estimation unit 2 estimates phase currents (RIU, RIV, RIO RI4) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1* to D4*) generated by the current control units 3, and outputs the estimated phase currents to the current control units 3.

[0328] The current control units 3 generate duty cycle commands (D1* to D4*) for controlling the respective phase currents using the estimated phase currents (RIU, RIV, RIO, RI4) and the setpoints (IU*, IV*, IO*, I4*) for the phase currents.

[0329] The PWM control units 4 generate ON / OFF switching signals (Sp1 to Sp4 and Sn1 to Sn4) for controlling the upper and lower arms (Ap1 to Ap4 and An1 to An4) of the respective strings of the power conversion unit 1R from the duty cycle commands (D1* to D4*) generated by the current control units 3.

[0330] A default example of the carrier cycle, sampling cycle, phase current estimation, and duty command update cycle that allow estimation for each phase current in the representative combined configuration 3 is the same as that in the four-phase configuration shown in Embodiment 1.

[0331] Fig. Figure 43 shows a representative combined configuration 4 of a single-phase converter and a three-phase, three-wire inverter.

[0332] To distinguish from the configurations in Fig. 1, etc., the energy conversion device is designated 119. Furthermore, the energy conversion unit is designated 1S, and the input power supply unit is designated 11S.

[0333] The input power supply unit 11S of the power conversion device 119 has coils L1, L2, L3 and AC power supplies VAC1, VAC2, VAC3, and it further has a coil L4 and a DC power supply VDC1.

[0334] The power conversion device 119 has a four-phase configuration as a whole, and therefore it has four current control units 3 and four PWM control units 4.

[0335] The current estimation unit 2 estimates phase currents (RIU, RIV, RIW, RI4) from the current Ibus in the common DC bus detected by the current detector 5 and duty cycle commands (D1* to D4*) generated by the current control units 3, and outputs the estimated phase currents to the current control unit 3.

[0336] The current control units 3 generate duty cycle commands (D1* to D4*) for controlling the respective phase currents using the estimated phase currents (RIU, RIV, RIW, RI4) and the setpoints (IU*, IV*, IW*, I4*) for the phase currents.

[0337] The PWM control units 4 generate ON / OFF switching signals (Sp1 to Sp4 and Sn1 to Sn4) for controlling the upper and lower arms (Ap1 to Ap4 and An1 to An4) of the respective strings of the power conversion unit 1S from the duty cycle commands (D1* to D4*) generated by the current control units 3.

[0338] A default example of the carrier cycle, sampling cycle, phase current estimation, and duty command update cycle that allow estimation for each phase current in the representative combined configuration 4 is the same as that in the four-phase configuration shown in Embodiment 1.

[0339] As described above, the function of the current estimation unit 2 is also applicable in a configuration in which different initial phase differences for the triangular wave carriers are set for the respective strings, a plurality of different power supplies are connected to the respective phases, and the plurality of strings are connected to the common DC buses.

[0340] As described above, in Embodiment 1, it is explained that, using six representative configurations, the duty cycle command update cycle is set based on the triangular wave carriers and the sampling cycle of the current in the DC bus, so that the ON / OFF states of the branches can be prevented from changing at a predetermined number of detection timings for the current Ibus in the common DC bus. Furthermore, it is described that since the matrices to be used in the current estimation unit 2 can be managed in advance, stable estimation for the phase currents can be achieved.

[0341] It should be noted that specifying the duty cycle update cycle based on the carrier cycle and the DC bus current sampling cycle is intended to simplify the management of string ON / OFF states associated with changes in the duty cycle commands, with a specified number of detection timings for the common DC bus current Ibus per current estimation. However, such changes in the ON / OFF states do not occur unless, for example, in a three-phase configuration, the duty cycle command varies by 100 / 3% or 200 / 3%.

[0342] Therefore, the duty cycle update cycle can exceptionally be specified only for a condition in which changes in the ON / OFF states of the branches are expected, while the duty cycle commands can be updated with a faster cycle in the condition in which changes in the ON / OFF states of the branches are not expected.

[0343] In the description of Embodiment 1, the ON / OFF states of the high-voltage-side branches are used in the expressions to reproduce the phase currents. However, the same can also be achieved by using the logically inverted values ​​of the ON / OFF operations of the low-voltage-side branches.

[0344] If one of the high-voltage side branch and the low-voltage side branch is a diode, reproduction for the phase currents can be achieved in the same way, using the switching element branch as a reference. In the drawings, a ripple component due to switching in each phase current is ignored, but the above configurations can also be applied when a ripple component is present in the phase currents.

[0345] As described above, the power conversion device according to Embodiment 1 includes: a power conversion unit having a plurality of strings connected to a common DC bus; a current detector for detecting current of the common DC bus; a PWM control unit for generating ON / OFF switching signals for the strings; a current estimation unit for estimating phase currents;and a current control unit for setting duty cycle commands such that the phase currents agree with target values, wherein the PWM control unit generates the ON / OFF switching signals for controlling the power conversion unit based on the magnitude relationship between the duty cycle commands for the respective strings and triangular wave carriers that have different initial phases and a common cycle, the current estimation unit acquires detected currents from the current detector in a sampling cycle different from the carrier cycle and estimates each phase current, and the current control unit sets the duty cycle commands so that the estimated values ​​of the respective phase currents agree with the target values ​​at a cycle synchronized with a time equal to or greater than the lowest common multiple of the carrier cycle and the sampling cycle;

[0346] Therefore, the power conversion device according to Embodiment 1 enables different power supplies to be connected to the respective phases, and stable current estimation with a fixed cycle and current control based thereon can be achieved. Embodiment 2

[0347] A power conversion device according to Embodiment 2 has a configuration including an isolation converter operating with a phase shift, wherein a PWM control unit generates ON / OFF switching signals for branches having the same pulse waveform with different initial phases based on individual phase shift command values ​​for the respective branches, a current estimation unit acquires detected currents from a current detector with a sampling cycle different from the cycle of the ON / OFF switching signal for the branches and estimates the phase currents, and a current control unit adjusts the phase shift command values ​​so that the estimated phase currents coincide with target values ​​with a cycle synchronized with a time equal to or greater than a lowest common multiple of the sampling cycle and the cycle of the ON / OFF switching signals for the branches.

[0348] The energy conversion device according to Embodiment 2 will be described focusing on the differences from Embodiment 1 with reference to the following drawings: Fig. 44, which is a configuration diagram showing a basic configuration, Fig. 45, Fig. 46A and Fig. 46B, which illustrate a default example 1 for current detection timings in the basic configuration, Fig. 47, which illustrates the default example 1 for a phase shift command update cycle that allows an estimation for each phase current in the basic configuration, Fig. 48, which is a configuration diagram showing a combined configuration example with Embodiment 1, Fig. 49A, Fig. 49B, Fig. 50A and Fig. 50B, which illustrate the default example 1 for current detection timings in the combined configuration example with Embodiment 1, and Fig. 51, which illustrates the default example 1 for a phase shift command update cycle that enables estimation for each phase current in the combined configuration 1 with embodiment 1.

[0349] In the configuration diagram ( Fig. 44, etc.) according to Embodiment 2, components that are the same as or corresponding to those in Embodiment 1 are denoted by the same reference numerals.

[0350] The configuration and function / operation in a basic configuration of the energy conversion device in Embodiment 2 will be described with reference to Fig. 44 to Fig. 47 described.

[0351] First, with reference to Fig. 44 describes the function / operation in the basic configuration including an isolating converter, focusing on an input power supply unit and an energy conversion unit.

[0352] In Fig. 44, to distinguish it from the configuration in Embodiment 1, the power conversion device is designated by 200, the power conversion unit is designated by 21, and the input power supply unit is designated by 211. A smoothing capacitor 6 is associated with the common DC buses connecting the power conversion unit 21 to the load 12.

[0353] The power conversion unit 21 includes a power conversion unit 21A with upper and lower branches (Ap1, Ap2, An1, An2), an isolation transformer 21B, and a power conversion unit 21C with upper and lower branches (Ap3, Ap4, An3, An4). In the isolation transformer 21B, the voltage on the primary side (low-voltage side) is designated V12, and the voltage on the secondary side (high-voltage side) is designated V34. Furthermore, currents on the secondary side of the isolation transformer 21B are designated I3, I4.

[0354] The input power supply unit 211 has a DC power supply VDC1. The voltage of the DC power supply VDC1 is denoted by VDC.

[0355] The isolation converter, which carries out the energy transfer with a phase shift, is configured to exchange the duty cycle commands between the current control units 3 and the PWM control units 4 included in the energy conversion device 101 ( Fig. 2) shown in Embodiment 1 are replaced by a phase shift command, and it comprises a current control unit 3 and two PWM control units 4.

[0356] In the following description, the operation is assumed such that, in each of two pairs of strings provided on the primary side and the secondary side of the isolation transformer 21B, the ON / OFF state of the upper arm of one of the two strings and the ON / OFF state of the lower arm of the other string coincide with each other, and similarly, the ON / OFF state of the lower arm of one string and the ON / OFF state of the upper arm of the other string coincide with each other.

[0357] The current estimation unit 2 estimates the phase current (RIbusav) from the current Ibus in the common DC bus detected by the current detector 5 and a phase shift command (φ*) generated by the current control unit 3, and outputs the estimated phase current to the current control unit 3. Note that Ibusav is the average value of the current Ibus in the common DC bus.

[0358] The current control unit 3 generates a phase shift command (φ*) for controlling each phase current using the estimated phase current (RIbusav) and a setpoint value (Ibusav*) for the phase current.

[0359] The PWM control units 4 generate ON / OFF switching signals (Sp1 to Sp4 and Sn1 to Sn4) for controlling the upper and lower arms (Ap1 to Ap4 and An1 to An4) of the respective strings of the power conversion unit 1A from the phase shift command (φ*) generated by the current control unit 3.

[0360] Fig. 45 and Fig. 46 shows a default example 1 for the ON / OFF states of the upper arms Ap1 and Ap3 on the high-voltage side, voltages on the primary side and the secondary side of the isolation transformer 21B, phase currents (I3, I4), and the detection timings for the current Ibus in the common DC bus in the power conversion device 200.

[0361] More precisely: Fig. 45 illustrates the relationship between the ON / OFF states of the upper arms Ap1, Ap3 on the high voltage side, the voltage V12 on the primary side and the voltage V34 on the secondary side of the isolation transformer 21B, the phase currents (I3, I4), the current Ibus in the common DC bus and the detected currents (Isp1, Isp2).

[0362] It should be noted that the phase current I4 has the value -I3.

[0363] Fig. 46A illustrates the ON / OFF state of the upper arm Ap1 and the detection timing for the current Ibus in the common DC bus (ie, detection timings for Isp1, Isp2) using one phase.

[0364] Fig. 46B illustrates the ON / OFF state of the upper arm Ap3 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1, Isp2) using one phase.

[0365] Here, with a cycle of the triangular wave carriers (fc1, fc3) defined as 360°, the relation between the ON / OFF states of the upper arms Ap1 and Ap3 on the high-voltage side according to the phase shift command and the detection timings for the current Ibus in the common DC bus can be extracted.

[0366] Note that An2 performs the ON / OFF operation synchronized with Ap1, and An1 and Ap2 perform the ON / OFF operation synchronized with the inverted value of Ap1. Similarly, An4 performs the ON / OFF operation synchronized with Ap3, and An3 and Ap4 perform the ON / OFF operation synchronized with the inverted value of Ap3.

[0367] Consequently, it is possible to find in advance a condition in which a sampling error is likely to occur due to an overlap between the ON / OFF switching timing in the branch and the detection timing for the current Ibus in the common DC bus.

[0368] For Fig. 45 and Fig. 46, it can be said that for both of the two phases, a sampling error is likely to occur when the phase shift command is 0° and 180°.

[0369] Fig. Figure 47 shows the default example 1 for a phase shift command update cycle that allows an estimation for each phase current, according to Fig. 45 and Fig. 46, in the energy conversion device 200. More precisely: Fig. 47 shows the default example 1 for the carrier cycle, sampling cycle, phase current estimation and phase shift command update cycle, which enable estimation for each phase current.

[0370] In Fig. 47, *Q denotes the following: "Perform current detection (Isp1, Isp2) and estimate phase currents." *R denotes "current control." Furthermore, φ is the phase shift.

[0371] Here, the carrier phase difference between the phases is set to 180°, the detection timing cycle for the current Ibus in the common DC bus is set to 1.5 times the carrier cycle, and the current control and update cycle for the phase shift command is 3.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the current detection timing cycle.

[0372] Since the polarity of the current generated in the isolation transformer 21B is switched with the carrier cycle, an estimation for each phase current as shown in Embodiment 1 cannot be performed. If there is a difference between the detected currents Isp1 and Isp2 shown in Fig. 45, this means that an offset for a DC component is generated in the isolation transformer 21B, and therefore this configuration can be used for control to cancel the DC component.

[0373] In addition, the average value of the current Ibus in the common DC bus can be estimated by taking into account the input voltage VDC, the voltage Vbus on the common DC bus and the phase shift command (φ*) with respect to the detected currents Isp1 and Isp2.

[0374] Next, a method of applying the embodiment of the present invention will be described in the combined configuration of the power converter in which the average current per carrier cycle is constant as described in Embodiment 1 and the power converter that performs power transfer while the average current per carrier cycle is zero as in the isolation converter.

[0375] This power converter corresponds, for example, conceptually to a combination of the input power supply unit 11A and the energy conversion unit 1A in Fig. 4 in embodiment 1.

[0376] The function / operation in the combined configuration example of the power conversion device 200 including the isolation converter and the power converter in which the average current per carrier cycle is constant as described in Embodiment 1 will be described with reference to Fig. 48 to Fig. 51 described.

[0377] First, the input power supply unit and the power conversion unit are mainly described with reference to Fig. 48. To distinguish it from the power conversion device 200 in Embodiment 2, the power conversion device is designated by 201. Furthermore, the power conversion unit is designated by 22, and the input power supply unit is designated by 221. A smoothing capacitor 6 is associated with the common DC buses connecting the power conversion unit 22 to the load 12.

[0378] The power conversion unit 22 includes: a power conversion unit 22A with upper and lower branches (Ap1, Ap2, An1, An2), an isolation transformer 22B, a power conversion unit 22C with upper and lower branches (Ap3, Ap4, An3, An4), and a power conversion unit 22D with upper and lower branches (Ap5, An5). In the isolation transformer 22B, the voltage on the primary side (low-voltage side) is designated V12, and the voltage on the secondary side (high-voltage side) is designated V34. In addition, currents on the secondary side of the isolation transformer 22B are designated I3, I4.

[0379] The input power supply unit 221 includes an input power supply unit 221A with a DC power supply VDC1 and an input power supply unit 221B with a coil L1 and a DC power supply VDC2. The voltage of the DC power supply VDC1 is denoted by VDC.

[0380] The current estimation unit 2 estimates phase currents (RIbusav, I5) from the current Ibus in the common DC bus detected by the current detector 5 and a phase shift command and a duty cycle command (φ*, D5*) generated by the current control units 3, and outputs the estimated phase currents to the current control units 3.

[0381] The current control units 3 generate a phase shift command and a duty cycle command (φ*, D5*) for controlling the respective phase currents using the estimated phase currents (RIbusav, I5) and the set values ​​(Ibusav*, I5*) for the phase currents.

[0382] The PWM control units 4 generate ON / OFF switching signals (Sp1 to Sp5 and Sn1 to Sn5) for controlling the upper and lower arms (Ap1 to Ap5 and An1 to An5) of the respective strings of the power conversion unit 22 from the phase shift command and the duty cycle command (φ*, D5*) generated by the current control units 3.

[0383] Fig. 49 and Fig. 50 shows a default example 1 for the triangular wave carrier, the ON / OFF states of the upper arms Ap1 and Ap3 on the high-voltage side, the voltages on the primary side and the secondary side of the isolation transformer 22B, the phase currents (I3, I4, I5), and the detection timings for the current Ibus in the common DC bus in the power conversion device 201.

[0384] More precisely: Fig. Figure 49 illustrates the relationship among the triangular wave carriers (fc5), the ON / OFF states of the upper arms Ap1, Ap3, Ap5 on the high-voltage side, the voltage V12 on the primary side and the voltage V34 on the secondary side of the isolation transformer 22B, the phase currents (I3, I4, I5) of the current Ibus in the common DC bus, and the detected currents (Isp1, Isp2).

[0385] It should be noted that the phase current I4 has the value -I3.

[0386] Fig. 49B illustrates the ON / OFF state for the upper arm Ap1 and the detection timings for the current Ibus in the common DC bus using one phase.

[0387] Fig. 50B illustrates the ON / OFF state for the upper arm Ap3 and the detection timings for the current Ibus in the common DC bus using one phase.

[0388] Fig. 50B illustrates the ON / OFF state of the upper arm Ap5 and the detection timings for the current Ibus in the common DC bus (ie, detection timings for Isp1, Isp2) using one phase.

[0389] Here, with a cycle of the triangular wave carriers (fc1, fc3, fc5) defined as 360°, the relation between the ON / OFF states of the upper arms Ap1, Ap3, Ap5 on the high-voltage side according to the phase shift command and the detection timings for the current Ibus in the common DC bus can be extracted.

[0390] Consequently, it is possible to find in advance a condition in which a sampling error is likely to occur due to an overlap between the ON / OFF switching timing in the branch and the detection timing for the current Ibus in the common DC bus.

[0391] For Fig. 49 and Fig. 50 It can be said that for both of the two phases, a sampling error is likely to occur when the phase shift command is 0° and 180°.

[0392] Fig. Figure 51 shows the default example 1 for a phase shift command update cycle that allows an estimation for each phase current, corresponding to Fig. 49 and Fig. 50, in the energy conversion device 201. More precisely: Fig. 51 shows the default example 1 for the carrier cycles, sampling cycle, phase current estimation and phase shift command update cycle, which enable estimation for each phase current.

[0393] In Fig. 51, *S denotes the following: "Perform current detection (Isp1, Isp2) and estimate phase currents." *T denotes "current control." Furthermore, φ is the phase shift.

[0394] Here, the carrier phase difference between the phases is specified as 180°, the detection timing cycle for the current Ibus in the common DC bus is 1.5 times the carrier cycle, and the cycle of current control and update for the phase shift command is 3.0 times the carrier cycle, which is the lowest common multiple of the carrier cycle and the current detection timing cycle.

[0395] In the default example in Fig. 51, while expression (5) is introduced to have two non-isolating converters in the representative configuration 1 in the embodiment 1, the relation introduced in this configuration having one isolating converter and one non-isolating converter is represented by expression (30).

[0396] Here, in expression (30), the non-isolation converter 1 corresponding to index 1 in the representative configuration 1 in the embodiment 1 is replaced by the isolation converter, and the non-isolation converter 2 corresponding to index 2 is replaced by the non-isolation converter 5. Regarding the currents generated in the transformer of the isolation converter at the timings for Isp1 and Isp2, it is assumed that the DC deviation per carrier cycle is a small value not greater than 1 / 10 of the current amplitude, and the currents generated at the two detection timings are defined as the same value IDAB. [Mathematical Expression 30] [Isp1Isp2]=

[1011] [IDAB15]=Z[IDAB15]

[0397] The determinant of the matrix Z in expression (30) is 1. Therefore, it is found that the estimation can be performed using expression (6). Note that since the average current of the isolation converter is different from IDAB, the estimation can be performed while correcting the current IDAB in the common DC bus using the input voltage VDC, the common DC bus voltage Vbus, and the phase shift command (φ*), as described above.

[0398] Expression (31) is a commonly introduced expression obtained by reflecting the characteristics of the power converter in Expression (2), where the average current per carrier cycle is zero, as represented by Expression (30). In Expression (31), the power converter corresponding to index 1 in Expression (2) is replaced by one or more power converters that output a nearly constant instantaneous current at all times at the detection timings for the current Ibus in the common DC bus. [Mathematical Expression 31] [Isp1Isp2⋮IspN]=[1Sp21⋯SpN11Sp22⋯SpN2⋮⋮⋱⋮1Sp2N⋯SpNN][IDABI2⋮IN]=Z[IDABI2⋮IN]

[0399] As described above, according to Embodiment 2, in the configuration obtained by including one or more power converters such as an isolation converter where the average current per carrier cycle is zero in the configuration according to Embodiment 1, a stable estimation for each phase current can be achieved by the same means as in Embodiment 1. Although a single isolation converter is used in the above description, the same effects can be achieved with any configuration that outputs a nearly constant current at the sampling timings for the current Ibus in the common DC bus, for example, a configuration including a plurality of isolation converters.

[0400] As described above, the power conversion device according to Embodiment 2 has a configuration including: an isolation converter.An isolation transformer operating with a phase shift, wherein a PWM control unit generates on / off switching signals for branches having the same pulse waveform with different initial phases based on individual phase shift command values ​​for the respective branches, a current estimation unit acquires detected currents from a current detector with a sampling cycle different from the cycle of the on / off switching signal for the branches and estimates the phase currents, and a current control unit adjusts the phase shift command values ​​so that the estimated phase currents agree with command values ​​with a cycle synchronized with a time equal to or greater than a lowest common multiple of the sampling cycle and the cycle of the on / off switching signals for the branches.

[0401] Therefore, even in the configuration including an isolation converter, the power conversion device according to Embodiment 2 allows different power supplies to be connected to the respective phases, and can achieve stable current estimation with a fixed cycle and current control based thereon.

[0402] Although the disclosure above has been made with reference to various exemplary embodiments and implementations, it should be understood that the various features, aspects, and functionalities described in one or more of the individual embodiments are not limited in their applicability to the particular embodiment in which they are described, but rather may be applied, alone or in various combinations, to one or more of the embodiments of the invention.

[0403] It is therefore understood that numerous modifications not described by way of example may be implemented without departing from the scope of the present invention. For example, at least one of the components may be modified, added, or omitted. At least one of the components discussed in at least one of the preferred embodiments may be selected and combined with the components mentioned in another preferred embodiment. Industrial applicability

[0404] The present invention allows different power supplies to be connected to the respective phases and can achieve stable current estimation with a fixed cycle and current control based thereon. Therefore, it is applicable to a wide variety of power conversion devices. List of reference symbols 100 to 119, 200, 201 Energy conversion device 1, 1A to 1H, 1J to 1N energy conversion unit 1P to 1S, 21, 21A, 21C energy conversion unit 22, 22A, 22C, 22D Energy conversion unit 2 Power estimation unit 3 Power control unit 4 PWM control unit 5 Current detector 5A resistor 5B calculator 6 smoothing capacitor 11, 11A to 11H, input power supply unit 11J to 11N, input power supply unit 11P to 11S, input power supply unit 211, 221, input power supply unit 221A, 221B Input power supply unit 12 Last 21B, 22B isolation transformer Ap1, Ap2, ..., ApN upper branch An1, An2, ..., AnN lower branch I1, I2, ..., IN phase current Ibus power in the common DC bus Isp1 to Isp6 detected current RI1, RI2, ..., RIN estimated phase current RIU, RIV, RIW estimated phase current RIO, RIAC, RIbusav estimated phase current I1*, I2*, ..., IN* Phase current setpoint IU*, IV*, IW* Phase current setpoint IO*, IAC*, Ibusav* Phase current setpoint D1*, D2*, ..., DN* Duty cycle command Sp1, Sp2, ..., SpN ON / OFF switching signal for the upper branch Sn1 Sn2, ..., SnN ON / OFF switching signal for the upper branch fc1 to fc5 triangular wave carriers φ* Phase shift command φ phase shift L1 to L5 coil VDC1 to VDC4 DC power supply VAC1 to VAC4 AC power supply

Claims

[1] Energy conversion device (100) comprising: - a power conversion unit (1) comprising a plurality of strings each formed by connecting a pair of two branches on the upper and lower sides, each branch having a switching element, the current flowing through a path connected to a midpoint between the two branches in each string being defined as a phase current, both ends of each of the plurality of strings being connected to a common DC bus; - a current detector (5) for measuring current flowing through the common DC bus; - a PWM control unit (4) for generating ON / OFF switching signals for controlling the switching elements of the upper and lower branches in the strands; - a current estimation unit (2) for estimating the phase current; and - a current control unit (3) for controlling the phase current, wherein the PWM control unit (4) generates the ON / OFF switching signals for controlling the switching elements in the strings on the basis of the magnitude relationship between individual duty cycle commands for the respective strings and triangular wave carriers having different initial phases for the respective strings and having a common cycle, wherein the current estimation unit (2) acquires detected values ​​from the current detector (5) in a sampling cycle different from the carrier cycle of the triangular wave carriers and estimates the phase currents of the strands, and wherein the current control unit (3) sets the duty cycle commands so that the estimated phase currents match the setpoints for the phase currents, wherein the current estimation unit (2) acquires the detected values ​​from the current detector (5) with a sampling cycle different from the carrier cycle and synchronized with a timing that coincides with a maximum value and a minimum value of a plurality of the triangular wave carriers, and estimates the phase currents. [2] The energy conversion device (100) according to claim 1, wherein the sampling cycle is set such that the detected value is detected only once or twice in one cycle of the triangular wave carriers. [3] The power conversion device (100) according to any one of claims 1 to 2, wherein the current estimation unit (2) estimates the phase currents of the strings using the detected values ​​from the current detector (5), the number of which is equal to the number of the phase currents. [4] The power conversion device (100) according to any one of claims 1 to 3, wherein a plurality of the triangular wave carriers in the PWM control unit (4) have different initial phase differences. [5] Energy conversion device (100) according to one of claims 1 to 4, wherein different DC power supplies (VDC) or a common DC power supply (VDC) are connected to a plurality of the paths for the phase currents of the energy conversion unit (1). [6] The power conversion device (100) according to any one of claims 1 to 4, wherein a single-phase AC power supply (VAC) or a multi-phase AC power supply (VAC) is connected to a plurality of the paths for the phase currents of the power conversion unit (1). [7] The energy conversion device (100) according to any one of claims 1 to 4, wherein a DC power supply (VDC) and an AC power supply (VAC) are connected to a plurality of the paths for the phase currents of the energy conversion unit (1). [8] The power conversion device (100) according to any one of claims 1 to 4, wherein a plurality of the paths for the phase currents of the power conversion unit (1) are connected to a transformer path (21B) on the primary side or the secondary side of an isolation converter operating with a phase shift. [9] Energy conversion device (100) comprising: - a power conversion unit comprising a plurality of strings each formed by connecting a pair of two branches on the upper and lower sides, each branch having a switching element, wherein the current flowing through a path connected to a midpoint between the two branches in each string is defined as a phase current, both ends of each of the plurality of strings being connected to a common DC bus; - a current detector (5) for measuring current flowing through the common DC bus; - a PWM control unit (4) for generating ON / OFF switching signals for controlling the switching elements of the upper and lower branches in the strands; - a current estimation unit (2) for estimating the phase current; and - a current control unit (3) for controlling the phase current, wherein - a transformer path (21B) on the primary side or the secondary side of an isolation converter operating with a phase shift is connected to a plurality of the paths for the phase currents of the energy conversion unit (1), wherein the PWM control unit (4) generates the ON / OFF switching signals for controlling the switching elements in the strings based on the magnitude relationship between individual phase shift commands for the respective strings and triangular wave carriers having different initial phases for the respective strings and having a common cycle, wherein the current estimation unit (2) acquires detected values ​​from the current detector in a sampling cycle different from the carrier cycle of the triangular wave carriers and synchronized with a timing corresponding to a maximum value and a minimum value of a plurality of the triangular wave carriers, and estimates the phase currents, and wherein the current control unit (3) sets the phase shift commands so that the estimated phase currents match target values ​​for the phase currents. [10] Energy conversion device (100) comprising: - a power conversion unit (1) comprising a plurality of strings each formed by connecting a pair of two branches on the upper and lower sides, each branch having a switching element, the current flowing through a path connected to a midpoint between the two branches in each string being defined as a phase current, both ends of each of the plurality of strings being connected to a common DC bus; - a current detector (5) for measuring current flowing through the common DC bus; - a PWM control unit (4) for generating ON / OFF switching signals for controlling the switching elements of the upper and lower branches in the strands; - a current estimation unit (2) for estimating the phase current; and - a current control unit (3) for controlling the phase current, wherein the PWM control unit (4) generates the ON / OFF switching signals for controlling the switching elements in the strings on the basis of the magnitude relationship between individual duty cycle commands for the respective strings and triangular wave carriers having different initial phases for the respective strings and having a common cycle, wherein the current estimation unit (2) acquires detected values ​​from the current detector (5) in a sampling cycle different from the carrier cycle of the triangular wave carriers and estimates the phase currents of the strands, and wherein the current control unit (3) sets the duty cycle commands so that the estimated phase currents match target values ​​for the phase currents, and wherein the current control unit (3) adjusts the duty cycle commands so that the estimated phase currents match the target values ​​at a cycle synchronized with a time equal to or greater than the lowest common multiple of the carrier cycle and the sampling cycle. [11] Energy conversion device (100) comprising: - a power conversion unit (1) comprising a plurality of strings each formed by connecting a pair of two branches on the upper and lower sides, each branch having a switching element, the current flowing through a path connected to a midpoint between the two branches in each string being defined as a phase current, both ends of each of the plurality of strings being connected to a common DC bus; - a current detector (5) for measuring current flowing through the common DC bus; - a PWM control unit (4) for generating ON / OFF switching signals for controlling the switching elements of the upper and lower branches in the strands; - a current estimation unit (2) for estimating the phase current; and - a current control unit (3) for controlling the phase current, wherein the PWM control unit (4) generates the ON / OFF switching signals for controlling the switching elements in the strings on the basis of the magnitude relationship between individual duty cycle commands for the respective strings and triangular wave carriers having different initial phases for the respective strings and having a common cycle, wherein the current estimation unit (2) acquires detected values ​​from the current detector (5) in a sampling cycle different from the carrier cycle of the triangular wave carriers and estimates the phase currents of the strands, and wherein the current control unit (3) sets the duty cycle commands so that the estimated phase currents match the setpoints for the phase currents, wherein a DC power supply (VDC) and an AC power supply (VAC) are connected to a plurality of the paths for the phase currents of the energy conversion unit (1), and wherein the PWM control unit (4) generates the ON / OFF switching signals for controlling the switching elements in the strings, so that the ON / OFF switching signals have the same pulse waveform with different initial phases for the respective strings, based on individual phase shift commands for the respective strings, wherein the current estimation unit (2) acquires the detected values ​​from the current detector (5) with a sampling cycle different from the carrier cycle, and estimates the phase currents for the respective strands with a cycle synchronized with a time equal to or greater than the lowest common multiple of the sampling cycle and the cycle of the ON / OFF switching signal, and wherein the current control unit (3) sets the phase shift commands so that the estimated phase currents match target values ​​for the phase currents.

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