Semiconductor device and power converter

Abstract

comprising a semiconductor device: • a base plate (16); • comprising an insulating substrate (14), a ceramic plate (13) and a circuit pattern (12), wherein the ceramic plate (13) is integrally connected to an upper surface of the base plate (16) without a solder layer in between, wherein the circuit pattern (12) is arranged on an upper surface of the ceramic plate (13); • a semiconductor element (10) mounted on an upper surface of the circuit pattern (12); • a housing (17) which surrounds the insulating substrate (14) and the semiconductor element (10) above the base plate (16); • an adhesive (23) for adhering a lower section of the housing (17) to an outer peripheral section of the ceramic plate (13); and • a sealing agent (19) for sealing the housing (17), wherein • the adhesive (23) is in contact with an outer peripheral end of the ceramic plate (13) up to an outer peripheral end of the circuit pattern (12).

Description

Technical area

[0001] The present invention relates to semiconductor devices used, for example, for controlling motors, railway equipment and automotive devices. State of the art

[0002] Conventionally, a semiconductor element is bonded to an insulating substrate using solder, Ag, etc., and the insulating substrate is bonded to a base plate for heat dissipation using solder, etc. The insulating substrate includes a ceramic plate formed of AlN, Al2O3, or SiN and a metal such as Al and Cu, which is bonded to opposite surfaces of the ceramic plate. The metal bonded to the surfaces is a circuit pattern.

[0003] In addition to the semiconductor element, an electrode for externally outputting a current is connected to the circuit pattern by soldering, ultrasonic bonding, and the like. A semiconductor chip and the electrode are connected by a wire. A package formed of polyphenylene sulfide resin (PPS) or polybutylene terephthalate (PBT) is bonded to the base plate by an adhesive to cover the insulating substrate and the semiconductor element. A sealant such as a silicone gel and an epoxy-based resin is injected into the package to ensure insulation and prevent contamination. A silicone-based or polyimide-based insulating film is applied to cover an outer peripheral end of the circuit pattern of the insulating substrate to further improve insulation in the package.

[0004] For example, Patent Document 1 discloses a semiconductor device in which a base plate and an insulating substrate are integrated with each other by direct bonding, in which a case is bonded to the base plate by an adhesive, and in which an insulating coating is applied to cover an outer peripheral end of a circuit pattern.

[0005] Patent Document 2 discloses a semiconductor device in which a base plate and an insulating substrate are bonded to each other by means of a solder, and in which a package is bonded to a ceramic plate of the insulating substrate by means of an adhesive. State of the art documentsPatent documents Patent Document 1: Japanese Patent Application JP 2000- 091 472 A Patent Document 2: Japanese Patent Application JP 2000-133 769 A SummaryProblem to be solved by the invention

[0006] However, the technology disclosed in Patent Document 1 requires a step of applying the adhesive to adhere the package and a step of applying the insulating coating to improve the insulation, and has a problem that it is difficult to improve a productivity of the semiconductor device.

[0007] Patent Document 2 is silent on the application of the insulating coating, but requires the step of applying the insulating coating in the housing, and has a similar problem to Patent Document 1.

[0008] Here, the step of applying the adhesive or the insulating coating corresponds to a series of steps including a step of applying the adhesive or the insulating coating to a base plate or a ceramic plate using a dispenser, a decompression step of performing degassing, and a heat treatment step of curing the adhesive or the insulating coating.

[0009] DE 11 2018 003 419 T5 relates to a semiconductor component that can be miniaturized and has high reliability. The semiconductor component includes an insulating substrate with a main surface, a semiconductor element, a housing part, and a sealing resin as a sealing material. The semiconductor element is arranged on the main surface of the insulating substrate. The housing part encloses the semiconductor element and is connected to the insulating substrate. The sealing resin is arranged in an inner region surrounded by the housing part and the insulating substrate and encloses the semiconductor element. The housing part has a recess that is continuous with a connection region of the housing part connected to the insulating substrate and faces the inner region. The recess has a counter surface as an inner wall region opposite the main surface of the insulating substrate.The distance from the main surface of the insulating substrate to the counter surface as an inner wall region is greater than the distance from the main surface to an upper surface of the semiconductor element.

[0010] DE 11 2017 004 739 T5 shows a semiconductor device comprising: an insulating substrate having a conductor layer formed on each of a top surface and a bottom surface of the insulating substrate, wherein a semiconductor element is mounted on the conductor layer on the top surface, a base plate bonded to the conductor layer on the bottom surface, a housing member surrounding the insulating substrate and adhering to a surface of the base plate to which the conductor layer on the bottom surface is bonded, a first filler material, which is a silicone composition, injected into a region surrounded by the base plate and the housing member, and a second filler material, which is a silicone composition harder than the first filler material, wherein the second filler material surrounds a peripheral edge region of the insulating substrate below the first filler material in the region,wherein the second filler material is injected into a region where a height from the base plate is higher than the top surface and lower than a bonding surface between the semiconductor element and the conductor layer at the top surface.,

[0011] JP 2006-318980 A describes a semiconductor device that at least delays crack formation through a simplified structure, and also provides a manufacturing method therefor. The semiconductor device is manufactured by arranging a heat sink made of copper composite material in a package, placing an insulating ceramic substrate on the heat sink made of copper composite material and bonding it at locations corresponding to a portion of the substrate's edge using an epoxy resin or adhesive, mounting a semiconductor chip on a wiring layer on the insulating ceramic substrate, establishing specific connections between the semiconductor chip and the insulating ceramic substrate, and sealing the inside of the package with a silicone gel.Thus, the semiconductor component is bonded at locations corresponding to a part of the edge of the insulating ceramic substrate, so that a simplified structure at least delays crack formation.

[0012] JP 2018-190894 A discloses a semiconductor module that can prevent adhesive from protruding into a frame-like resin package. The semiconductor module includes a substrate on which a conductor pattern is formed and a semiconductor element is mounted, a resin package having a frame-like shape and bonded to an upper surface of the substrate, and a sealing resin disposed in the resin package on the upper surface of the substrate. The resin package includes, at a portion bonded to the substrate, a surface contact portion formed on an inner side of the resin package and a groove formed closer to an outer side than the surface contact portion. The propagation of cracks is at least delayed by a simplified structure.

[0013] JP 2000-133769 A relates to a package structure in which a ceramic plate of an insulating substrate is prevented from breaking under an external force applied in the assembled state, while ensuring high assembly precision in a bonding process for incorporating a main circuit assembly into a package. A power main circuit assembly, in which a power semiconductor element is mounted on an insulating substrate having a ceramic plate as a base material, is inserted from below into a substrate fitting hole opened on the underside of a package, and a bonding agent is used to ensure a tight fit between its edge and a stepped seating surface formed on the edge on the back side of the substrate fitting hole.When the back surface of the insulating substrate and the back surface of the package are on the same board, the thickness of the bonding agent layer filled between the stepped seating surface, the substrate fitting hole, and the edge of the insulating substrate is adjusted to 0.5 ± 0.3 mm, and a protruding spacer with rubber-like elasticity is dispersedly inserted in the edge of the upper surface of the ceramic board while facing the stepped seating surface to ensure a prescribed bonding agent layer thickness in a bonding process.

[0014] JP 2000-091472 A discloses a semiconductor device configured to prevent dielectric breakdown, achieve a high breakdown voltage, and improve reliability. The semiconductor device includes a radiating plate, an aluminum nitride substrate mounted on the radiating plate, a copper foil selectively formed on the substrate so that the peripheral portion of the substrate is exposed, a semiconductor element disposed on the copper foil, a container main body disposed on the radiating plate and surrounding the substrate, lead wires for external connections penetrating the container main body and electrically connected to the semiconductor element, and silicone gel loaded into the container main body.In this case, solidified resin is applied on the outer peripheral part of the copper foil and the peripheral part of the substrate, and then the outer peripheral part of the copper foil and the peripheral part of the AIN substrate are brought into contact with each other, since resin is present on the interface between both, the electric field on the interface between both is reduced and creeping discharge hardly occurs.

[0015] US 7,723,244 B2 discloses a method for the internal electrical insulation of a substrate of a power semiconductor module, comprising a frame-like insulating housing with a cover and an insulating substrate. The substrate has conductor tracks and power semiconductor components arranged thereon. The power semiconductor components are connected to connection elements, further conductor tracks, or power semiconductor components by means of bonding connections. The method is characterized by the following steps: a) forming the substrate, b) coating the substrate with a viscous dielectric insulating compound using a casting or dipping process, c) initiating crosslinking of the insulating compound, d) allowing excess insulating compound to drip off while the substrate is suspended, and securely encasing the bonding connections with insulating compound, e) arranging the substrate in the housing of the power semiconductor module.

[0016] It is therefore an object of the present invention to provide a technology which enables improvement of productivity of the semiconductor device. Means to solve the problem

[0017] The object underlying the invention is achieved in a semiconductor device according to the invention with the features of claim 1 and in a power converter according to the invention with the features of claim 7. Advantageous further developments are the subject of the respective dependent claims.

[0018] A semiconductor device according to the present invention comprises: a base plate; an insulating substrate including a ceramic plate integrally bonded to an upper surface of the base plate without solder therebetween and a circuit pattern disposed on an upper surface of the ceramic plate; a semiconductor element mounted on an upper surface of the circuit pattern; a case surrounding the insulating substrate and the semiconductor element over the base plate; an adhesive for adhering a lower portion of the case to an outer peripheral portion of the ceramic plate; and a sealing means for sealing an interior space of the case, wherein the adhesive is in contact with an outer peripheral end of the ceramic plate to an outer peripheral end of the circuit pattern. Effects of the invention

[0019] According to the present invention, the adhesive is in contact with the outer peripheral end of the ceramic plate to the outer peripheral end of the circuit pattern, and can therefore perform a function of adhering the lower portion of the package to the outer peripheral portion of the ceramic plate and a function of insulatingly coating the outer peripheral end of the circuit pattern. This eliminates the need for an insulating coating application step, and consequently, the productivity of the semiconductor device can be improved.

[0020] The objects, features, aspects, and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawings. Short description of the characters Fig. 1 is a cross-sectional view of a semiconductor device according to Embodiment 1. Fig. 2 is a cross-sectional view of a semiconductor device according to a modification 1 of Embodiment 1. Fig. 3 is a cross-sectional view of a semiconductor device according to a modification 2 of Embodiment 1. Fig. 4 is a side view of a semiconductor device according to a modification 3 of Embodiment 1. Fig. 5 is a block diagram showing a configuration of a power converter system to which a power converter according to Embodiment 2 was applied. Description of the embodiments<Ausführungsform 1>

[0021] Embodiment 1 of the present invention will be described below with reference to the figures. Fig. 1 is a cross-sectional view of a semiconductor device 202 according to Embodiment 1.

[0022] As in Fig. 1, the semiconductor device 202 includes a base plate 16, an insulating substrate 14, a semiconductor element 10, a housing 17, an adhesive 23, and a sealing agent 19.

[0023] The base plate 16 is formed rectangular in plan view using a metal such as copper to ensure heat dissipation.

[0024] The insulating substrate 14 includes a ceramic plate 13 and a circuit pattern 12. The ceramic plate 13 is formed using AlN, Al2O3, or SiN and is rectangular in plan view.

[0025] A plan view outline of the ceramic plate 13 is smaller than that of the base plate 16, and the ceramic plate 13 is integrally bonded to a portion of an upper surface of the base plate 16 except for a peripheral edge portion thereof without a solder layer therebetween. Specifically, the base plate 16 and the ceramic plate 13 are bonded to each other without solder by direct bonding, brazing bonding using a brazing alloy, and the like, or diffusion bonding using metal.

[0026] The circuit pattern 12 is formed using Al or Cu. The circuit pattern 12 is divided into at least two sections, and the sections are spaced apart from each other on a portion of an upper surface of the ceramic plate 13 except for a peripheral edge portion thereof. The semiconductor element 10 comprises a wide band-gap semiconductor and is mounted on an upper surface of one of the divided sections of the circuit pattern 12. An electrode 18 for externally outputting a current is connected to an upper surface of another of the divided sections of the circuit pattern 12.

[0027] The casing 17 is formed using PPS or PBT, and has a side portion 17a in the shape of a rectangular frame in a plan view and an upper portion 17b. The side portion 17a surrounds the insulating substrate 14 and the semiconductor element 10 above the base plate 16. A lower portion of the side portion 17a and an outer peripheral portion of the ceramic plate 13 are adhered to each other by the adhesive 23. The upper portion 17b forms an upper surface of the semiconductor device 202, and an end portion of the electrode 18 protrudes externally from a hole formed in the upper portion 17b.

[0028] The sealant 19 is a silicone gel or an epoxy-based resin, and it seals the interior of the housing 17.

[0029] The adhesive 23 is applied to the entire outer peripheral end of the ceramic plate 13 to the entire outer peripheral end of the circuit pattern 12. The adhesive 23 is in contact with the outer peripheral end of the ceramic plate 13 to the outer peripheral end of the circuit pattern 12, and is required to have not only a function of adhering a lower portion of the casing 17 to the outer peripheral portion of the ceramic plate 13 but also a function of insulatingly coating the outer peripheral end of the circuit pattern 12. The adhesive 23 therefore has a larger breakdown voltage than the sealant 19. Specifically, the adhesive 23 preferably has a breakdown voltage of 15 kV / mm or more. Furthermore, the adhesive 23 preferably has a viscosity of 20 Ps to suppress dripping of the adhesive 23.The adhesive 23 is preferably a silicone-based adhesive and more preferably a thermosetting silicone-based adhesive.

[0030] As described above, the semiconductor device 202 according to Embodiment 1 includes: the base plate 16; the insulating substrate 14 including the ceramic plate 13 integrally bonded to the upper surface of the base plate 16 without solder therebetween and the circuit pattern 12 disposed on the upper surface of the ceramic plate 13; the semiconductor element 10 mounted on the upper surface of the circuit pattern 12; the case 17 surrounding the insulating substrate 14 and the semiconductor element 10 above the base plate 16; the adhesive 23 for adhering the lower portion of the case 17 to the outer peripheral portion of the ceramic plate 13; and the sealing agent 19 for sealing the interior of the case 17, the adhesive 23 being in contact with the outer peripheral end of the ceramic plate 13 to the outer peripheral end of the circuit pattern 12.

[0031] The adhesive 23 is in contact with the outer peripheral end of the ceramic plate 13 to the outer peripheral end of the circuit pattern 12, and thus can perform the function of adhering the lower portion of the casing 17 to the outer peripheral portion of the ceramic plate 13 and the function of insulatingly coating the outer peripheral end of the circuit pattern 12. This eliminates the need for an insulating coating application step, and thus the productivity of the semiconductor device 202 can be improved.

[0032] The adhesive 23 is not applied to the base plate 16, so that the base plate 16 is not required to have a region on which the adhesive 23 is applied, and consequently the base plate 16 and furthermore the semiconductor device 202 can be reduced in size.

[0033] In a case where the ceramic plate 13 is connected to the base plate 16 by solder, cracking of the ceramic plate 13 may occur because the ceramic plate 13 receives screwing stress when the semiconductor device is connected to a cooler by a screw. However, in Embodiment 1, the ceramic plate 13 is connected to the upper surface of the base plate 16 without solder in between, and thus the base plate 16 and the ceramic plate 13 can absorb screwing stress. The probability of cracking of the ceramic plate 13 is thereby reduced.

[0034] The semiconductor element 10 comprises a wide bandgap semiconductor, and thus, high-temperature operation and high-speed operation of the semiconductor device 202 can be achieved. Furthermore, the size of the cooler and a control circuit to be connected to the semiconductor device 202 can also be reduced.

[0035] Reducing the size of the semiconductor device compatible with the performance of the wide bandgap semiconductor has been difficult due to limitations on a packaging side such as an insulation distance and internal wiring, but the present invention enables size reduction on the packaging side, and it allows size reduction utilizing the performance of the wide bandgap semiconductor.

[0036] The lower portion of the housing 17 adheres to the outer peripheral portion of the ceramic plate 13, and thus, the housing 17 can prevent dripping of the adhesive 23. A layer thickness of the adhesive 23, which acts as a coating and is in contact with the outer peripheral end of the circuit pattern 12, is thereby stabilized, thus improving insulation reliability in the housing 17.

[0037] The adhesive 23 has a higher breakdown voltage than the sealing agent 19, so that the insulation in the housing 17 is improved. <Weitere Modifikationen>

[0038] Next, modifications of Embodiment 1 will be described. Fig. 2 is a cross-sectional view of a semiconductor device 202A according to a modification 1 of Embodiment 1. Fig. 3 is a cross-sectional view of a semiconductor device 202B according to a modification 2 of Embodiment 1. Fig. 4 is a side view of a semiconductor device 202C according to a modification 3 of Embodiment 1.

[0039] How Fig. As illustrated in Fig. 2, the casing 17 can not only prevent dripping of the adhesive 23 but also compress the adhesive 23 so that the adhesive 23 slides along the outer edge portion of the upper circuit pattern 12. A sliding portion of the adhesive 23 is formed over the entire peripheral edge portion of the upper surface of the circuit pattern 12. Furthermore, the adhesive 23 is in contact with the peripheral edge portion of the upper surface of the circuit pattern 12, so that insulation in the casing 17 is further improved by suppressing discharge occurring at an edge of the upper surface of the circuit pattern 12.

[0040] As in Fig. As illustrated in Figure 3, a lower end of the side portion 17a of the housing 17 may be in contact with the upper surface of the base plate 16. Direct contact of the side portion 17a of the housing 17 with the upper surface of the ceramic plate 13 is thereby prevented, and stress acting on the ceramic plate 13 can be relieved. The probability of breakage of the ceramic plate 13 can be reduced, and thus, the reliability of a product can be improved.

[0041] As in Fig. 4, the lower end of the side portion 17a of the housing 17 may be in partial contact with the upper surface of the base plate 16. Specifically, the lower end of the side portion 17a has been roughened to have successive recesses 17c and projections 17d, and the adhesive 23 has entered the recesses 17c. This makes it more likely that the adhesive 23 is exposed to air, and curing of the adhesive 23 is accelerated, so that the effects of improving productivity while ensuring reliability are obtained in addition to the effects obtained in a Fig. 3 illustrated case of the semiconductor device 202B. <Ausführungsform 2>

[0042] In the present embodiment, the semiconductor device 202 according to Embodiment 1 described above is applied to a power converter. The semiconductor device 202 according to Embodiment 1 is not limited to a specific power converter, but a case where the semiconductor device 202 according to Embodiment 1 is applied to a three-phase inverter will be described below in Embodiment 2.

[0043] Fig. 5 is a block diagram showing a configuration of a power converter system to which the power converter according to Embodiment 2 was applied.

[0044] The Fig. The power converter system shown in Figure 5 comprises a power supply 100, a power converter 200, and a load 300. The power supply 100 is a DC power supply and provides DC power to the power converter 200. The power supply 100 can be configured in various ways, for example, as a DC system, a solar cell, or a storage battery, and can be configured by a rectifier circuit or an AC / DC converter connected to an AC system. The power supply 100 can be configured by a DC / DC converter to convert DC power output from the DC system into a predefined power.

[0045] The power converter 200 is a three-phase inverter connected between the power supply 100 and the load 300, and converts the DC power provided by the power supply 100 into AC power and provides the AC power to the load 300. As shown in Fig. 5, the power converter 200 includes a main converter circuit 201 for converting the DC power into the AC power for output and a control circuit 203 for outputting a control signal to the main converter circuit 201 for controlling the main converter circuit 201.

[0046] Load 300 is a three-phase motor driven by the AC power provided by power converter 200. Load 300 is not limited to a specific application; it is a motor mounted on various types of electrical equipment, such as hybrid vehicles, electric vehicles, rail vehicles, elevators, and air conditioning units.

[0047] The power converter 200 will be described in detail below. The main converter circuit 201 includes switching elements and freewheeling diodes (not shown), and converts the DC power supplied from the power supply 100 into AC power and supplies the AC power to the load 300 by switching the switching elements. The main converter circuit 201 can have various specific configurations, and the main converter circuit 201 according to the present embodiment is a two-stage three-phase full-bridge circuit, and it can include six switching elements and six freewheeling diodes connected in anti-parallel with respect to the respective switching elements. The switching elements and the freewheeling diodes of the main converter circuit 201 are each configured by the semiconductor device corresponding to any one of Embodiment 1 and Modifications 1 to 3 of Embodiment 1 described above.A case where the switching elements and the freewheeling diodes are each configured by the semiconductor device 202 according to Embodiment 1 will be described here. Each two switching elements among the six switching elements are connected in series to form pairs of upper and lower arms, and the pairs of upper and lower arms form respective phases (a U phase, a V phase, and a W phase) of the full-bridge circuit. Output terminals of the respective pairs of upper and lower arms, that is, three output terminals of the main converter circuit 201, are connected to the load 300.

[0048] The main converter circuit 201 includes a driver circuit (not illustrated) for driving the respective switching elements. The driver circuit may be integrated into the semiconductor device 202 or may be provided separately from the semiconductor device 202. The driver circuit generates a driver signal for driving the respective switching elements of the main converter circuit 201 and provides the driver signal to a control electrode of the respective switching elements of the main converter circuit 201. Specifically, the driver circuit outputs a driver signal for switching the switching elements to an on state and a driver signal for switching the switching elements to an off state to the control electrode of the respective switching elements in accordance with the control signal from the control circuit 203, which will be described below.The drive signal is a voltage signal (an on signal) which is equal to or greater than a threshold voltage of the switching element when the switching element is kept in the on state, and it is a voltage signal (an off signal) which is equal to or less than the threshold voltage of the switching element when the switching element is kept in the off state.

[0049] The control circuit 203 controls the switching elements of the main converter circuit 201 such that a desired power is supplied to the load 300. Specifically, a period of time (on-period) in which the respective switching elements of the main converter circuit 201 should be in an on state is calculated based on a power to be supplied to the load 300. For example, the main converter circuit 201 can be controlled by PWM control to modulate the on-period of the respective switching elements in accordance with a voltage to be output. A control command (the control signal) is output to the driver circuit of the main converter circuit 201 so that, at any given time, the on signal is output to a switching element that should be in the on state and the off signal is output to a switching element that should be in the off state.The driving circuit outputs, as the driving signal, the on signal or the off signal to the control electrode of the respective switching elements in accordance with the control signal.

[0050] In the power converter according to the present embodiment, the semiconductor device 202 according to Embodiment 1 is applied as each of the switching elements and the freewheeling diodes of the main converter circuit 201, and thus reliability can be improved.

[0051] An example in which the semiconductor device 202 according to Embodiment 1 is applied to the two-stage three-phase inverter has been described in the present embodiment, but the semiconductor device 202 according to Embodiment 1 is not limited to this example and can be applied to various power converters. Although the power converter in the present invention is a two-stage power converter, the power converter may be a three-stage or multi-stage power converter, and the semiconductor device 202 according to Embodiment 1 can be applied to a single-stage inverter when supplying power to a single-phase load. The semiconductor device 202 according to Embodiment 1 is applicable to a DC / DC converter or an AC / DC converter when supplying power to a DC load, and the like.

[0052] The power converter to which the semiconductor device 202 according to Embodiment 1 is applied is not limited to the above-mentioned case where the load is a motor, and it can be used, for example, as a power supply device of an electric discharge machine, laser machine, induction cooker, and contactless power supply system, and furthermore, it can be used as a power regulator of a photovoltaic system, storage system, and the like. List of reference symbols

[0053] 10 semiconductor element, 12 circuit pattern, 13 ceramic plate, 14 insulating substrate, 16 base plate, 17 package, 19 sealant, 23 adhesive, 200 power converter, 201 main converter circuit, 202, 202A, 202B, 202C semiconductor device, 203 control circuit.

Claims

[1] Semiconductor device comprising: • a base plate (16); • an insulating substrate (14) comprising a ceramic plate (13) and a circuit pattern (12), wherein the ceramic plate (13) is integrally connected to an upper surface of the base plate (16) without a solder layer therebetween, wherein the circuit pattern (12) is arranged on an upper surface of the ceramic plate (13); • a semiconductor element (10) mounted on an upper surface of the circuit pattern (12); • a housing (17) which surrounds the insulating substrate (14) and the semiconductor element (10) above the base plate (16); • an adhesive (23) for adhering a lower portion of the housing (17) to an outer peripheral portion of the ceramic plate (13); and • a sealing means (19) for sealing the housing (17), wherein • the adhesive (23) is in contact with an outer peripheral end of the ceramic plate (13) to an outer peripheral end of the circuit pattern (12). [2] A semiconductor device according to claim 1, wherein the adhesive (23) has a higher breakdown voltage than the sealing agent (19). [3] A semiconductor device according to claim 1 or 2, wherein the adhesive (23) is further in contact with a peripheral edge portion of the upper surface of the circuit pattern (12). [4] A semiconductor device according to any one of claims 1 to 3, wherein the lower end of the housing (17) is in contact with the upper surface of the base plate (16). [5] A semiconductor device according to claim 4, wherein the lower end of the housing (17) is partially in contact with the upper surface of the base plate (16). [6] A semiconductor device according to any one of claims 1 to 5, wherein the semiconductor element (10) comprises a wide bandgap semiconductor. [7] Power converters comprising: • a main converter circuit (201) for converting an input power for an output, the main converter circuit (201) comprising the semiconductor device according to any one of claims 1 to 6; and • a control circuit (203) for outputting a control signal for controlling the main converter circuit (201) to the main converter circuit (201).

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