Semiconductor devices and semiconductor modules

Abstract

Semiconductor device (1, 1A, 1B), comprising: - a semiconductor substrate (2) having a semiconductor element on a front surface thereof and a back electrode (4) on a rear surface thereof which controls the operation of the semiconductor element; - a first electrode (10) and a second electrode (20) provided in a terminal region (8), which is the terminal region (8) in an outer peripheral portion of the semiconductor substrate (2) and which is the terminal region (8) outside an active region in which the semiconductor element is formed; and - an insulating layer (5A) provided between the first electrode (10) and the second electrode (20), wherein: - the second electrode (20) is provided on an insulating intermediate layer (7) which is provided on the front surface of the semiconductor substrate (2), - the first electrode (10) - is in contact with the front surface of the semiconductor substrate (2), - is provided on the semiconductor substrate (2) closer to an end portion thereof than the second electrode (20) and - is electrically connected to the back electrode (4) and - the insulating layer (5A) contains CaF2, Al2O3 or Si3N4.

Description

Technical FieldThe present invention relates to semiconductor devices and a semiconductor module.Prior ArtA semiconductor device to which a high voltage is applied requires a high withstand voltage leakage characteristic. The withstand voltage leakage characteristic may decrease due to the influence of humidity (humidity). However, malfunctions caused by moisture influence are not detected until the main withstand voltage decreases, and they are frequently detected as system errors. In the worst case, the decrease in the withstand voltage causes the destruction of the power semiconductor device and the system thereof.Patent Document 1 proposes a semiconductor chip for detecting moisture absorbed in a low-k material or peeling of the low-k material due to moisture. The semiconductor chip includes a plurality of capacitance electrodes between a guard ring and a device, or outside the guard ring. The semiconductor chip ensures that the damaged part of the guard ring due to moisture or peeling is detected by detecting the change in capacitance between the capacitance electrodes.Prior Art DocumentsPatent Documents[Patent Document 1] Japanese Patent Application JP 2005-228 854 AThe document DE 11 2013 007 220 T5 describes a semiconductor device in which an n-type semiconductor substrate is formed with an active region and with a connection region arranged outside the active region. A p +- anode layer is formed in a part of an upper surface of the n-type semiconductor substrate in the active region. A plurality of p +- guard ring layers are formed in a part of the upper surface of the n-type semiconductor substrate in the terminal region. An n +- cathode layer is formed in a lower surface of the n-type semiconductor substrate. An anode electrode is connected to the p +- anode layer. A metallic cathode electrode is connected to the n +- cathode layer. A depression is formed by notching the n +- cathode layer in the connection region. The cathode electrode is also formed in the recess.SummaryProblem to be Solved by the InventionWhen a capacitance is formed in the terminal region, it is necessary to form two or more openings as a region for wiring the two electrodes forming the capacitance. Particularly, when a wire is connected to the electrodes, the openings are required to have an area corresponding to the wire diameter. As a result, the size of the semiconductor device increases, resulting in an increase in cost.The present invention has been made to solve the above-described problems, and an object is to provide semiconductor devices and a semiconductor module that realize cost reduction and detection of withstand voltage characteristics.Means for Solving the ProblemThe object on which the invention is based is achieved in the case of a semiconductor device according to the invention having the features of claim 1, alternatively in the case of a semiconductor device according to the invention having the features of claim 2 and in the case of a semiconductor module according to the invention having the features of claim 7. Advantageous refinements are the subject matter of the respective dependent claims.The semiconductor devices of the present invention include a semiconductor substrate, a first electrode, a second electrode, and an insulating layer. The semiconductor substrate has a semiconductor element on the front surface thereof and a back surface electrode on the back surface thereof which controls the operation of the semiconductor element. The first electrode and the second electrode are provided in a terminal region which is the terminal region provided in the outer peripheral portion of the semiconductor substrate and which is the terminal region provided outside an active region in which the semiconductor element is formed. The insulating layer is provided between the first electrode and the second electrode. The second electrode is provided on an insulating interlayer on the front surface of the semiconductor substrate. The first electrode is in contact with the front surface of the semiconductor substrate and is provided on the semiconductor substrate closer to an end portion thereof than the second electrode, and is electrically connected to the back surface electrode.According to an aspect of the present invention, the insulating layer includes CaF 2, Al 2 O S or Si 3 N 4.According to an alternative aspect of the present invention, a protective layer having an insulation property and partially covering the front surface of the semiconductor substrate is formed, wherein the first electrode is covered by the protective layer and a part of the second electrode is exposed from an opening of the protective layer.Effects of the InventionAccording to the present invention, semiconductor devices implementing cost reduction and withstand voltage characteristic determination are provided.The objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawings.Brief Description of the Figures[FIG. 1 ] A cross-sectional view illustrating a configuration of a semiconductor device according to the first embodiment.[FIG. 2 ] A plan view illustrating the configuration of the semiconductor device according to the first embodiment.[FIG. 3 ] A plan view illustrating an example of the configuration of a packaged semiconductor device.[FIG. 4 ] A diagram illustrating a cross section of the configuration illustrated in FIG. 3 and an electric circuit.[FIG. 5 ] A block diagram illustrating a configuration of a semiconductor module according to the first embodiment.[FIG. 6 ] A diagram illustrating an example of a relationship between the capacitance and the withstand voltage of the semiconductor device with respect to humidity.[FIG. 7 ] A flowchart illustrating a measurement method of the withstand voltage characteristic of the semiconductor device according to the first embodiment.[FIG. 8 ] A cross-sectional view illustrating a configuration of a semiconductor device according to the modification of the first embodiment.[FIG. 9 ] A plan view illustrating the configuration of the semiconductor device according to the modification of the first embodiment.[FIG. 10 ] A plan view illustrating a configuration of a semiconductor device according to the second embodiment.[FIG. 11 ] A plan view illustrating a configuration of a semiconductor device according to the modification of the second embodiment.Description of Embodiment(s)< Embodiment>FIGS. 1 and 2 are a cross-sectional view and a plan view each showing a configuration of a semiconductor device according to the first embodiment. Fig. 1 illustrates a cross section at A-A' illustrated in Fig. 2. FIG. 3 is a plan view illustrating an example of the configuration of a packaged semiconductor device 1.The semiconductor device 1 includes a semiconductor substrate 2, a semiconductor element (not illustrated), a front-side electrode 3, a back-side electrode 4, a first electrode 10, a second electrode 20, an insulating layer 5, a protection layer 6, a sealing material 11, and electrode terminals 12.The semiconductor element is provided on the front surface of the semiconductor substrate 2, which is a surface below the front side electrode 3. The semiconductor element is formed of, for example, a semiconductor such as Si or a so-called wide band gap semiconductor such as SiC or GaN. The semiconductor element is, for example, an insulated gate bipolar transistor (IGBT), a metal oxide semiconductor field effect transistor (MOSFET), a diode, or the like. The semiconductor element is, for example, a power semiconductor element. The semiconductor substrate 2 and the semiconductor element in the first embodiment are formed of a wide band gap semiconductor.The surface electrode 3 is provided on the front surface of the semiconductor substrate 2 corresponding to the active region in which the semiconductor element is formed. The surface electrode 3 controls the operation of the semiconductor element. The operation is, for example, a switching operation of an IGBT, a MOSFET, or the like.The back surface electrode 4 is provided on the back surface of the semiconductor substrate 2. The back surface electrode 4 controls the operation of the semiconductor element. When the semiconductor device is an IGBT, the front side electrode 3 includes two electrode pads (not illustrated) connected to a gate electrode and an emitter electrode, respectively, and the back side electrode 4 corresponds to an electrode pad connected to a collector electrode. When the semiconductor element is a MOSFET, the front-side electrode 3 includes two electrode pads (not illustrated) connected to a gate electrode and a source electrode, respectively, and the back-side electrode 4 corresponds to an electrode pad connected to a drain electrode. When the semiconductor element is a diode, the front-side electrode 3 is an electrode pad connected to an anode, and the back-side electrode 4 is an electrode pad connected to a cathode.A first electrode 10 and a second electrode 20 are provided in a terminal region 8 outside an active region in which the semiconductor element is formed. The terminal region 8 is formed on the outer side of the front side electrode 3, that is, on the outer peripheral portion of the semiconductor substrate 2, and the second electrode 20 is provided on an insulating intermediate layer 7 provided on the front surface of the semiconductor substrate 2. The first electrode 10 is in contact with the front surface of the semiconductor substrate 2 and is provided on the semiconductor substrate 2 closer to an end portion thereof than the second electrode 20 The first electrode 10 may be provided on the front surface of the semiconductor substrate 2 via a contact electrode (not illustrated) provided on the front surface of the semiconductor substrate 2. The first electrode 10 is preferably provided in the vicinity of the end portion (end surface) of the semiconductor substrate 2. The first electrode 10 and the second electrode 20 are separated from the surface electrode 3 and the semiconductor element to such an extent that they do not affect the operation of the semiconductor element. That is, the first electrode 10 and the second electrode 20 are independent. The first electrode 10 is electrically connected to the back surface electrode 4 via a minute resistance at the end surface of the semiconductor substrate 2. Further, in the first embodiment, the first electrode 10 and the second electrode 20 are formed of the same material as that of the front side electrode 3. the first electrode 10, the second electrode 20, and the front side electrode 3 are formed of, for example, Al, AlSi, or the like.As illustrated in FIG. 3, the first electrode 10 and the second electrode 20 are provided in a region of the outer peripheral portion of the semiconductor substrate 2 in which the electrode terminals 12 are arranged in a direction protruding toward the outside. In other words, the first electrode 10 and the second electrode 20 are provided on the base end portions 12A side of the electrode terminals 12 in the outer peripheral portion of the semiconductor substrate 2.The insulating layer 5 is provided between the first electrode 10 and the second electrode 20. The first electrode 10, the second electrode 20, and the insulating layer 5 form a capacitive structure in the terminal region 8. The capacitance varies depending on a degree of moisture absorption of the insulating layer 5.The insulating layer 6 has an insulating property and covers the front surface of the semiconductor substrate 2. A part 20A of the second electrode 20 and the front-side electrode 3 are exposed from the two openings, respectively. On the other hand, the first electrode 10 is covered with the protective layer 6, and the first electrode 10 is not exposed. The insulating layer 5 and the protective layer 6 in the first embodiment are formed of the same material. For example, the insulating layer 5 and the protective layer 6 are formed of polyimide.The sealing material 11 seals the structure illustrated in FIG. 1, that is, the structure including the semiconductor substrate 2, the first electrode 10, the second electrode 20, the insulating layer 5, and the like. The semiconductor device 1 in the first embodiment is packaged by the sealing material 11, and the package is a resin-sealed molded package. However, the package is not limited to this configuration, and a configuration may be adopted in which the semiconductor substrate 2 or the like accommodated in the package is sealed.The electrode terminals 12 are connected to any one of the second electrode 20, the front-side electrode 3, and the back-side electrode 4 inside the sealing material 11. Although the detailed structure of the internal wiring 13 within the sealing material 11 is not illustrated in FIG. 3, for example, an end of the electrode terminal 12 located at the center in FIG. 3 is connected to the part 20A of the second electrode 20 via the internal wiring 13 such as a wire. Similarly, an end of the electrode terminal 12 located at the lower side in FIG. 3 is connected to the back surface electrode 4 via the internal wiring 13. The other end of each electrode terminal 12 protrudes to the outside of the sealing material 11. The other ends are connectable to an external circuit, and are connected to, for example, a control unit 16 described later. FIG. 4 is a diagram illustrating a cross section of the configuration illustrated in FIG. 3 and an electric circuit. The first electrode 10 is connected to the back surface electrode 4 via a minute resistor at the end surface of the semiconductor substrate 2.FIG. 5 is a block diagram illustrating a configuration of a semiconductor module 15 according to the first embodiment. The semiconductor module 15 includes the above-mentioned semiconductor device 1 and the control unit 16.The control unit 16 stores in advance the relationship of the capacitance between the first electrode 10 and the second electrode 20 with respect to humidity and the relationship of the withstand voltage of the semiconductor device 1 with respect to humidity in a memory or the like, respectively. FIG. 6 is a diagram illustrating an example of the relationship between the capacitance and the withstand voltage of the semiconductor device 1 with respect to humidity. The control unit 16 determines the humidity at which the withstand voltage function of the semiconductor device 1 is lost, based on the relationship of the withstand voltage of the semiconductor device 1 with respect to humidity. Subsequently, the control unit 16 sets the capacitance at the humidity at which the withstand voltage function is lost as a threshold value based on the relationship of the capacitance between the first electrode 10 and the second electrode 20 with respect to the humidity. Based on the threshold value and the detection capacitance between the first electrode 10 and the second electrode 20 obtained by applying a voltage between the second electrode 20 and the back surface electrode 4, the control unit 16 determines the withstand voltage function of the semiconductor device 1. for example, the control unit 16 outputs an error before the detection capacitance exceeds the threshold value, that is, when the detection capacitance indicates a value within a predefined range from the threshold value.The function of the control unit 16 is implemented by a processing circuit (not shown). The processing circuit includes, for example, a processor and a memory. The function of the control unit 16 is implemented by the processor executing the program stored in the memory.Next, a measurement method of the withstand voltage characteristic of the semiconductor device 1 by the control unit 16 of the semiconductor module 15 will be described. FIG. 7 is a flowchart illustrating a measurement method of the withstand voltage characteristic of the semiconductor device 1 according to the first embodiment.In a step S 1, the control unit 16 applies a voltage between the second electrode 20 and the back surface electrode 4. The voltage is applied through, for example, the electrode terminal 12 connected to the second electrode 20 and the electrode terminal 12 connected to the back surface electrode 4. The first electrode 10 is electrically connected to the back surface electrode 4 via a minute resistance at the end surface of the semiconductor substrate 2; therefore, the first electrode 10 and the back surface electrode 4 are short-circuited when the voltage drop due to the minute resistance is not taken into account. That is, the potentials of both may be considered to be identical (common potential). The control unit 16 takes into account that the first electrode 10 and the back electrode 4 have the same potential, and obtains the capacitance (detection capacitance) between the first electrode 10 and the second electrode 20.The capacitance measurement is performed in a state where the semiconductor device 1 is not operating. Although the capacitance measurement can be performed even when the semiconductor device 1 is not packaged, the semiconductor device 1 is preferably in a packaged state when the capacitance measurement is performed because the direction of penetration and the degree of penetration of moisture are essential parameters regarding the withstand voltage characteristics.In a step S 2, the control unit 16 determines the withstand voltage function of the semiconductor device 1 based on the relationship of the capacitance between the first electrode 10 and the second electrode 20 and the withstand voltage of the semiconductor device 1 with respect to humidity (FIG. 6 ) and the detection capacitance between the first electrode 10 and the second electrode 20. The error indicates a state in which moisture has penetrated into the package and the withstand voltage function of the semiconductor device 1 cannot be ensured. The error is outputted before the detection capacitance exceeds the threshold value; thereby, the semiconductor device 1 is prevented from being destroyed.Summarizing the above, the semiconductor device 1 in the first embodiment includes the semiconductor substrate 2, the first electrode 10, the second electrode 20, and the insulating layer 5. The semiconductor substrate 2 has a semiconductor element on its front surface and a back surface electrode 4 on its back surface, which controls the operation of the semiconductor element. The first electrode 10 and the second electrode 20 are formed in the terminal region 8 formed on the peripheral portion of the semiconductor substrate 2. The terminal region 8 is located outside the active region in which the semiconductor element is formed. The insulating layer 5 is provided between the first electrode 10 and the second electrode 20. The second electrode 20 is provided on the interlayer insulating film 7 provided on the front surface of the semiconductor substrate 2. The first electrode 10 is in contact with the front surface of the semiconductor substrate 2 and is provided on the semiconductor substrate 2 closer to an end portion thereof than the second electrode 20 The first electrode 10 is electrically connected to the back surface electrode 4.Further, in the first embodiment, the semiconductor device 1 includes the protective insulating layer 6 covering the front surface of the semiconductor substrate 2. The part 20A of the second electrode 20 is exposed from the opening of the protective layer 6. The first electrode 10 is covered with the protective layer 6.By such a configuration, the capacitance between the first electrode 10 and the second electrode 20 is detected by applying a voltage between the second electrode 20 and the back electrode 4. The capacity is suitably monitored, and the penetration status of moisture is determined based on the variation in the capacity. When it is determined that the invasion of moisture is excessive, preventive measures such as stopping the semiconductor device 1 or the system in which the semiconductor device 1 is used are taken, for example. The semiconductor device 1 is prevented from being destroyed, resulting in improvement in reliability. Further, the voltage for capacitance measurement is applied between the second electrode 20 and the back electrode 4. Therefore, the semiconductor device 1 is not required to have an opening for connecting the internal wiring to the first electrode 10. Further, the wiring for connecting the first electrode 10 and the back electrode 4 is also not required. As a result, the size of the semiconductor device 1 is reduced and the cost is reduced. As described above, the semiconductor device 1 in the first embodiment realizes cost reduction as well as determination of the withstand voltage characteristic.Further, the first electrode 10, the second electrode 20, and the front side electrode 3 of the semiconductor device 1 in the first embodiment are formed of the same material. Further, the insulating layer 5 and the protective layer 6 are formed of the same material.By such a configuration, the first electrode 10, the second electrode 20, and the front-side electrode 3 are manufactured by the same process. Similarly, the insulating layer 5 and the protective layer 6 are formed by the same process. Therefore, the production thereof can be reduced.The semiconductor device 1 in the first embodiment includes the sealing material 11 and the electrode terminals 12. the sealing material 11 seals the semiconductor substrate 2, the first electrode 10, the second electrode 20, and the insulating layer 5. one end of the electrode terminal 12 is connected to any one of the second electrode 20, the back electrode 4, and the front electrode 3 inside the sealing material 11, and the other end thereof protrudes to the outside of the sealing material 11. The first electrode 10 and the second electrode 20 are provided on the side of the base end portions 12A, which is the side on which the electrode terminals 12 protrude from the sealing material, in the outer peripheral portion of the semiconductor substrate 2.Moisture easily enters the inside of the sealing material 11 from the base end portions 12A of the electrode terminals 12. By providing the first electrode 10 and the second electrode 20 forming the capacitance in the direction of the base end portions 12A of the electrode terminals 12, the sensitivity to moisture detection is improved.The semiconductor substrate 2 in the first embodiment is formed of a wide band gap semiconductor.The first electrode 10 and the second electrode 20 are formed of metal, therefore, it is required that the electric field strength be carefully designed when the first electrode 10 and the second electrode 20 are provided in the terminal region 8. Depending on the structure of the first electrode 10 and the second electrode 20, the function of the semiconductor device 1 may deteriorate, resulting in deterioration of quality. When manufacturing variations are taken into consideration, it is necessary to design a terminal structure having an edge secured in advance. In the first embodiment, when the semiconductor substrate 2 is formed of a wide bandgap semiconductor (SiC, GaN, etc.), even if the electric field strength inside the semiconductor substrate 2 is increased by the second electrode 20, the influence is small. This simplifies a design, resulting in a cost reduction.The semiconductor module 15 in the first embodiment includes the above-mentioned semiconductor device 1 and the control unit 16. Based on the relationship of the capacitance between the first electrode 10 and the second electrode 20 and the withstand voltage of the semiconductor device 1 with respect to moisture and the detection capacitance between the first electrode 10 and the second electrode 20 obtained by applying a voltage between the second electrode 20 and the back electrode 4, the control unit 16 determines the withstand voltage function of the semiconductor device 1.Such a semiconductor module 15 outputs an error based on a predefined criterion set in advance for the detection capacitance. An error is issued before the withstand voltage function of the semiconductor device 1 cannot be ensured, and the reliability of the semiconductor device 1 is improved.(Modification of First Embodiment)FIGS. 8 and 9 are a cross-sectional view and a plan view each showing a configuration of a semiconductor device according to the modification of the first embodiment. FIG. 8 illustrates a cross section at B-B' illustrated in FIG. 9.An insulating layer 5A and the protection layer 6 are formed of the same material in the modification of the first embodiment. The insulating layer 5A is formed of a material including, for example, any one of CaF 2, Al 2 O 3 and Si 3 N 4. The protective layer 6 is formed of polyimide.The normal capacitance is adjusted by selecting the material of the insulating layer 5A. In other words, the detection sensitivity of the capacitance change due to moisture is adjusted by the material selection. As a result, malfunctions such as excessive detection are prevented.< Embodiment>A semiconductor device and a semiconductor module according to the second embodiment will be described. The second embodiment is a subordinate concept of the first embodiment, and the semiconductor device in the second embodiment has each configuration of the semiconductor device 1 in the first embodiment. The description of the same configuration and operation as in the first embodiment is omitted.FIG. 10 is a plan view illustrating the configuration of the semiconductor device 1B according to the second embodiment. The first electrode 10 and the second electrode 20 are provided in a ring shape along the outer peripheral portion of the semiconductor substrate 2. In other words, the first electrode 10 and the second electrode 20 are disposed on the entire outer peripheral portion.By such a configuration, the cross-sectional area that determines the capacitance between the first electrode 10 and the second electrode 20 increases. The cross-sectional area is determined by the product of the layer thickness of the first electrode 10 or the second electrode 20 and the length of the first electrode 10 or the second electrode 20. the capacitance C is represented by C=ε×S / d, wherein the dielectric constant of the insulating layer 5 corresponds to ε, the cross-sectional area S corresponds, and the distance between the first electrode 10 and the second electrode 20 corresponds to d. By disposing the first electrode 10 and the second electrode 20 in the entire outer peripheral portion of the semiconductor substrate 2, the cross-sectional area S increases and the capacitance C increases. As a result, the detection sensitivity increases.Depending on the cross-sectional area S and the distance d, the semiconductor device 1B having the detection sensitivity in accordance with the application can be designed. The detection sensitivity is adjusted as needed; thereby, malfunctions such as excessive detection are prevented. For example, the film thicknesses of the first electrode 10 and the second electrode 20 preferably take values satisfying ±50% of the film thickness of the surface electrode 3. The distance between the first electrode 10 and the second electrode 20 is preferably one third or less of the width of the terminal region 8.(Modification of Second Embodiment)FIG. 11 is a plan view illustrating the configuration of the semiconductor device 1C according to the modification of the second embodiment. The part 20A of the second electrode 20 connected to the electrode terminal 12 does not need to be provided on the base end portion 12A side of the electrode terminal 12. The size of the area is arbitrarily set. Even in this case, the same effect as described above is obtained.List of reference characters1 Semiconductor device, 1A Semiconductor device, 1B Semiconductor device, 1C Semiconductor device, 2 Semiconductor substrate, 3 Front-side electrode, 4 Back-side electrode, 5 Insulating layer, 5A Insulating layer, 6 Protective layer, 7 Intermediate layer, 8 Terminal region, 10 First electrode, 11 Sealing material, 12 Electrode terminal, 12A Base end portion, 13 Internal wiring, 15 Semiconductor module, 16 Control unit, 20 Second terminal, 20A Part of the second electrode.

Claims

A semiconductor device (1, 1A, 1B) comprising: a semiconductor substrate (2) having a semiconductor element on a front surface thereof and a back surface electrode (4) on a back surface thereof, which controls the operation of the semiconductor element; a first electrode (10) and a second electrode (20) provided in a terminal region (8) which is the terminal region (8) in an outer peripheral portion of the semiconductor substrate (2) and which is the terminal region (8) outside an active region in which the semiconductor element is formed; and an insulating layer (5A) provided between the first electrode (10) and the second electrode (20), wherein: the second electrode (20) is provided on an interlayer insulating layer (7) provided on the front surface of the semiconductor substrate (2), the first electrode (10) is in contact with the front surface of the semiconductor substrate (2), is provided on the semiconductor substrate (2) closer to an end portion thereof than the second electrode (20), and is electrically connected to the back surface electrode (4), and the insulating layer (5A) includes CaF 2, Al 2 O 3 or Si 3 N 4.A semiconductor device (1, 1A, 1B) comprising: a semiconductor substrate (2) having a semiconductor element on a front surface thereof and a back surface electrode (4) on a back surface thereof, which controls the operation of the semiconductor element; a first electrode (10) and a second electrode (20) provided in a terminal region (8) which is the terminal region (8) in an outer peripheral portion of the semiconductor substrate (2) and which is the terminal region (8) outside an active region in which the semiconductor element is formed; and an insulating layer (5) provided between the first electrode (10) and the second electrode (20), wherein: the second electrode (20) is provided on an interlayer insulating layer (7) provided on the front surface of the semiconductor substrate (2), the first electrode (10) is in contact with the front surface of the semiconductor substrate (2), provided on the semiconductor substrate (2) closer to an end portion thereof than the second electrode (20), and electrically connected to the back surface electrode (4), a protection layer (6) having an insulation property and partially covering the front surface of the semiconductor substrate (2) is formed, the first electrode (10) is covered by the protection layer (6), and a part of the second electrode (20) is exposed from an opening of the protection layer (6).The semiconductor device (1, 1A, 1B) according to claim 2, wherein: - the first electrode (10), the second electrode (20), and a front side electrode (3) that controls the operation of the semiconductor element provided on the front surface of the semiconductor substrate (2) are formed of the same material, and - the insulating layer (5) and the protection layer (6) are formed of the same material.The semiconductor device (1, 1A, 1B) according to any one of the preceding claims, further comprising: - a sealing material (11) sealing the semiconductor substrate (2), the first electrode (10), the second electrode (20), and the insulating layer (5, 5A); and an electrode terminal (12), - having one end connected to any one of the second electrode (20), the back surface electrode (4), and the front surface electrode (3) that controls the operation of the semiconductor element provided on the front surface of the semiconductor substrate (2) inside the sealing material (11), and - the other end thereof protruding to the outside of the sealing material (11), wherein the first electrode (10) and the second electrode (20) are provided on a base end portion side, which is a side on which the electrode terminal (12) protrudes from the sealing material (11), in the outer peripheral portion of the semiconductor substrate (2).The semiconductor device (1, 1A, 1B) according to any one of the preceding claims, wherein the first electrode (10) and the second electrode (20) are provided in a ring shape along the outer peripheral portion of the semiconductor substrate (2).The semiconductor device (1, 1A, 1B) according to any one of the preceding claims, wherein the semiconductor substrate (2) is formed of a wide band gap semiconductor.A semiconductor module (15) comprising: a semiconductor device (1, 1A, 1B); and a control unit (16) configured to determine a withstand voltage function of the semiconductor device (1, 1A, 1B) based on a relationship of a capacitance between the first electrode (10) and the second electrode (20) and a withstand voltage of the semiconductor device (1, 1A, 1B) with respect to humidity and a detection capacitance between the first electrode (10) and the second electrode (20) obtained by applying a voltage between the second electrode (20) and the back electrode (4), wherein: the semiconductor device (1, 1A, 1B) comprises: a semiconductor substrate (2) having a semiconductor element on a front surface thereof and a back electrode (4) on a back surface thereof, which controls the operation of the semiconductor element; a first electrode (10) and a second electrode (20) which are provided in a terminal region (8), which is the terminal region (8) in an outer peripheral portion of the semiconductor substrate (2), and which is the terminal region (8) outside an active region in which the semiconductor element is formed; and an insulating layer (5, 5A) provided between the first electrode (10) and the second electrode (20), the second electrode (20) is provided on an interlayer insulating layer (7) provided on the front surface of the semiconductor substrate (2), and the first electrode (10) is in contact with the front surface of the semiconductor substrate (2), provided on the semiconductor substrate (2) closer to an end portion thereof than the second electrode (20), and electrically connected to the back surface electrode (4).

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