Display panel and display device

DE112023000097T5Pending Publication Date: 2025-03-06WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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Patent Information

Application Number
DE112023000097
Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-03-28
Filing Date
2023-03-31
Publication Date
2025-03-06

AI Technical Summary

Technical Problem

In the display panel, the end edge delay of the scanning signal is large and uneven, which affects the uniformity and resolution of the display effect.

Method used

By arranging multiple waveform adjustment modules in the display panel and constructing more densely distributed waveform adjustment modules in an area far away from the gate drive circuit, the end edge delay of the scanning signal is reduced and similar delays are achieved at different locations.

Benefits of technology

It improves the delay problem of scanning signals in the display panel, improves the uniformity and resolution of the display, and supports high-frequency and high-resolution displays.

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Abstract

The present application discloses a display panel and a display device. By designing the waveform adjustment modules with a higher distribution density in a display area further away from the gate driver circuit, not only can the technical problem of a large delay of the sampling signals within the display panel be mitigated, but it can also be achieved that the sampling signals at different positions in the display area exhibit the same or similar delays, which contributes to an improvement in the uniformity of the display.
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Description

Display panel and display device Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the rapid development of display technology, higher resolution is an important development direction of display panels in order to provide customers with a more perfect life experience. However, as the resolution continues to increase, the delay of the scanning signal in the display panel is also increasing. Technical issues

[0003] The present application provides a display panel and a display device to alleviate the technical problem of large and uneven delay of the end edge of a scan signal in a display area. Technical Solutions

[0004] In a first aspect, the present application provides a display panel, which includes multiple waveform adjustment modules in a display area, and at least one gate drive circuit is arranged on both sides of the display area. The distribution density of the waveform adjustment modules in an area far away from the gate drive circuit is greater than the distribution density of the waveform adjustment modules in an area close to the gate drive circuit.

[0005] In some embodiments, the display area includes a first display partition and a second display partition, the effective display width of the first display partition is greater than the effective display width of the second display partition; the first display partition includes multiple first sub-areas; and the second display partition includes multiple second sub-areas.

[0006] In some embodiments, gate driving circuits are respectively provided on both sides of the display area, and the width of the first display partition from left to right is consistent with the width of the second display partition from left to right; the distribution density of the waveform adjustment module in the first sub-area farthest from the gate driving circuit is greater than the distribution density of the waveform adjustment module in the second sub-area farthest from the gate driving circuit.

[0007] In some embodiments, gate driving circuits are respectively provided on both sides of the first display partition, and a gate driving circuit is provided on one of the two sides of the second display partition; the distribution density of the waveform adjustment module in the first sub-region farthest from the gate driving circuit is less than the distribution density of the waveform adjustment module in the second sub-region farthest from the gate driving circuit.

[0008] In some embodiments, the difference between the distribution density of the waveform adjustment module in a first sub-area away from the gate driving circuit and the distribution density in a first sub-area close to the gate driving circuit is a first difference, the difference between the distribution density of the waveform adjustment module in a second sub-area away from the gate driving circuit and the distribution density in a second sub-area close to the gate driving circuit is a second difference, and the first difference is greater than the second difference.

[0009] In some embodiments, the display panel further includes a scan line, a forward scan control line, a reverse scan control line, and a potential transmission line electrically connected to the waveform adjustment module, the scan line extending from the gate drive circuit to the display area, and at least one of the forward scan control line, the reverse scan control line, and the potential transmission line extending from a non-display area on a different side of the gate drive circuit to the display area.

[0010] In some embodiments, within the same width range, the distribution density of the waveform adjustment module in the first sub-area is greater than the distribution density of the waveform adjustment module in the second sub-area; the display panel also includes a forward scan control supplementary line, a reverse scan control supplementary line, and a potential transmission supplementary line electrically connected to the waveform adjustment module, and at least one of the forward scan control supplementary line, the reverse scan control supplementary line, and the potential transmission supplementary line extends from a non-display area on a different side from the gate drive circuit and close to the first display partition to the corresponding first sub-area.

[0011] In some embodiments, within the same width range, the distribution density of the waveform adjustment module in the first sub-area is less than the distribution density of the waveform adjustment module in the second sub-area; the display panel also includes a forward scan control supplementary line, a reverse scan control supplementary line, and a potential transmission supplementary line electrically connected to the waveform adjustment module, and at least one of the forward scan control supplementary line, the reverse scan control supplementary line, and the potential transmission supplementary line extends from a non-display area on a different side from the gate drive circuit and close to the second display partition to the corresponding first sub-area.

[0012] In some embodiments, the second display partition is located between two first display partitions; in the same width range, the distribution density of the waveform adjustment module in the first sub-region is less than the distribution density of the waveform adjustment module in the second sub-region; the display panel also includes a forward scan control supplementary line, a reverse scan control supplementary line and a potential transmission supplementary line electrically connected to the waveform adjustment module, and at least one of the forward scan control supplementary line, the reverse scan control supplementary line and the potential transmission supplementary line extends from a non-display area on a different side from the gate drive circuit and close to the first display partition through the first display partition to the corresponding second sub-region; wherein, the number of branches of at least one of the forward scan control supplementary line, the reverse scan control supplementary line and the potential transmission supplementary line in the first display partition is less than the number of branches in the second display partition.

[0013] In a second aspect, the present application provides a display device, which includes the display panel of at least one of the above-mentioned embodiments, and the waveform adjustment module is used to improve the verticality of the end edge of the scanning signal during forward scanning or reverse scanning. Beneficial effects

[0014] The display panel and display device provided in the present application, by constructing a waveform adjustment module with a higher distribution density in a display area farther away from the gate drive circuit, can not only improve the technical problem of large delay of the scanning signal in the display panel, but also enable the scanning signal to have the same or similar delay at different positions in the display area, which is conducive to improving the uniformity of the display. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIG1 is a schematic diagram of a first structure of a display panel provided in an embodiment of the present application.

[0016] FIG2 is a circuit diagram of the waveform adjustment module in FIG1 .

[0017] FIG3 is a schematic diagram of a second structure of a display panel provided in an embodiment of the present application.

[0018] FIG4 is a circuit diagram of the waveform adjustment module in FIG3 .

[0019] FIG. 5 is a schematic diagram showing the comparison of the non-irregular-shaped display panel before and after improvement according to an embodiment of the present application.

[0020] FIG6 is a schematic diagram of a first structure of a special-shaped display panel provided in an embodiment of the present application.

[0021] FIG. 7 is a schematic diagram of a second structure of a special-shaped display panel provided in an embodiment of the present application.

[0022] FIG8 is a schematic diagram of a third structure of a special-shaped display panel provided in an embodiment of the present application.

[0023] FIG9 is a schematic diagram of a fourth structure of a special-shaped display panel provided in an embodiment of the present application.

[0024] FIG. 10 is a schematic diagram of a first distribution of waveform adjustment modules in a special-shaped display panel provided by an embodiment of the present application.

[0025] FIG11 is a schematic diagram showing the specific distribution of the waveform adjustment module shown in FIG10 .

[0026] FIG. 12 is a schematic diagram of a second distribution of waveform adjustment modules in a special-shaped display panel provided in an embodiment of the present application.

[0027] FIG13 is a schematic diagram showing the specific distribution of the waveform adjustment module shown in FIG12 .

[0028] FIG. 14 is a schematic diagram of a third distribution of waveform adjustment modules in a special-shaped display panel provided in an embodiment of the present application.

[0029] FIG15 is a schematic diagram showing the specific distribution of the waveform adjustment module shown in FIG14 .

[0030] FIG16 is a schematic diagram of a third structure of a display panel provided in an embodiment of the present application.

[0031] FIG17 is a schematic diagram of a fourth structure of a display panel provided in an embodiment of the present application.

[0032] FIG18 is a fifth structural schematic diagram of a display panel provided in an embodiment of the present application. Modes for Carrying Out the Invention

[0033] To make the purpose, technical solutions and effects of this application clearer and more specific, the following further describes this application in detail with reference to the accompanying drawings and examples. It should be understood that the specific examples described herein are only used to explain this application and are not intended to limit this application.

[0034] To address the technical issue of significant delay in the ending edge of a scan signal during forward or reverse scanning, this embodiment provides a display panel. Referring to Figures 1 to 15 , as shown in Figures 1 and 3 , the display panel includes a plurality of scan lines arranged sequentially along a first direction DR1, a waveform adjustment module 100, a potential transmission line VL, a forward scan control line U2D, and a reverse scan control line D2U. The plurality of scan lines include the N-1th scan line G(N-1), the Nth scan line G(N), and the N+1th scan line G(N+1), where N is an integer greater than or equal to 2. The output terminal of the waveform adjustment module 100 is electrically connected to the N+1th scan line G(N+1), the first control terminal of the waveform adjustment module 100 is electrically connected to the N-1th scan line G(N-1), and the second control terminal of the waveform adjustment module 100 is electrically connected to the N+1th scan line G(N+1). The waveform adjustment module 100 is located in the display area AA of the display panel. The potential transmission line VL is electrically connected to the first input terminal of the waveform adjustment module 100. The forward scan control line U2D is electrically connected to the second input terminal of the waveform adjustment module 100 or the third control terminal of the waveform adjustment module 100. The reverse scan control line D2U is electrically connected to the third input terminal of the waveform adjustment module 100 or the fourth control terminal of the waveform adjustment module 100.

[0035] It can be understood that the display panel provided in this embodiment can reduce the duration of the end edge of the scanning signal during the forward scan or reverse scan process through the control of the waveform adjustment module 100 by the N-1th scanning line G(N-1), the N+1th scanning line G(N+1), the potential transmission line VL, the forward scanning control line U2D and the reverse scanning control line D2U, thereby improving the technical problem of the large delay of the scanning signal in the display panel; this is conducive to increasing the charging time of each pixel in the display panel or increasing the refresh frequency of the display panel, and thus is conducive to promoting the development of high-frequency display and / or high resolution of the display panel.

[0036] Furthermore, the display panel and the display device can improve the delay problem of the scanning signal during forward scanning, and can also improve the delay problem of the scanning signal during reverse scanning, thereby providing greater freedom for the assembly of the display panel.

[0037] It should be noted that the first direction DR1 may be an arrangement direction of a plurality of scan lines, and the second direction DR2 may be an extension direction of each scan line.

[0038] Among them, the reverse scan control line D2U, the potential transmission line VL and the forward scan control line U2D electrically connected to the same waveform adjustment module 100 can be arranged in sequence along the second direction DR2, which is beneficial to reducing the transmission distance between the reverse scan control line D2U, the potential transmission line VL and the forward scan control line U2D and the waveform adjustment module 100.

[0039] The display panel may further include a plurality of data lines arranged sequentially along a second direction DR2, such as a first data line datar, a second data line datag, and a third data line datab. Each scan line intersects with each data line to form an array of sub-pixels 200. The first data line datar may be electrically connected to a column of red sub-pixels 200 (R). The second data line datag may be electrically connected to a column of green sub-pixels 200 (G). The third data line datab may be electrically connected to a column of blue sub-pixels 200 (B).

[0040] Specifically, the reverse scan control line D2U is adjacent to and parallel to the first data line datar, and the reverse scan control line D2U is located on the left side of the first data line datar. The potential transmission line VL is adjacent to and parallel to the second data line datag, and the potential transmission line VL is located on the left side of the second data line datag. The forward scan control line U2D is adjacent to and parallel to the third data line datab, and the forward scan control line U2D is located on the left side of the third data line datab. This can reduce the loss of the pixel aperture ratio. As shown in Figure 3, when there is no adjacent and parallel reverse scan control line D2U, potential transmission line VL and forward scan control line U2D on the left side of the corresponding data line, the display panel will also configure a virtual line Dummy adjacent to and parallel to the corresponding data line to balance the consistent coupling effect on each data line.

[0041] Among them, each sub-pixel 200 can be a sub-pixel of passive display, such as a sub-pixel using liquid crystal display. In this case, each sub-pixel 200 can include a thin film transistor, one of the drain or source of the thin film transistor is connected to the corresponding data line, the other of the drain or source of the thin film transistor is connected to the common voltage line con, and the gate of the thin film transistor is connected to the corresponding scan line.

[0042] In one embodiment, as shown in Figure 2, the waveform adjustment module 100 includes a first transistor NTA, a second transistor NTB and a third transistor NTC. The first electrode of the first transistor NTA is electrically connected to the reverse scan control line D2U, and the gate of the first transistor NTA is electrically connected to the N-1th scan line G(N-1); the first electrode of the second transistor NTB is electrically connected to the forward scan control line U2D, and the gate of the second transistor NTB is electrically connected to the N+1th scan line G(N+1); the gate of the third transistor NTC is electrically connected to the second electrode of the first transistor NTA and the second electrode of the second transistor NTB, the first electrode of the third transistor NTC is electrically connected to the potential transmission line VL, and the second electrode of the third transistor NTC is electrically connected to the Nth scan line G(N).

[0043] It should be noted that the first electrode can be either a source or a drain, and the second electrode can be the other of the source or the drain. For example, when the first electrode is a source, the second electrode is a drain; or when the first electrode is a drain, the second electrode is a source.

[0044] During the forward scan process, when the N+1th scan line G(N+1) controls the second transistor NTB to turn on, the forward scan control line U2D also controls the third transistor NTC to turn on. At this time, the potential in the Nth scan line G(N) is adjusted to the potential of the potential transmission line VL.

[0045] During the reverse scan process, when the N-1th scan line G(N-1) controls the first transistor NTA to turn on, the reverse scan control line D2U also controls the third transistor NTC to turn on. At this time, the potential in the Nth scan line G(N) is also adjusted to the potential of the potential transmission line VL.

[0046] In this way, the verticality of the ending edge of the N-th level scanning signal in the N-th scanning line G(N) can be improved during the forward scanning process, and the verticality of the ending edge of the N-th level scanning signal in the N-th scanning line G(N) can be improved during the reverse scanning process. The ending edge of a positive pulse refers to the falling edge of the pulse, and the ending edge of a negative pulse refers to the rising edge of the pulse.

[0047] In one embodiment, the first transistor NTA, the second transistor NTB and the third transistor NTC are all N-channel thin film transistors; the potential transmission line VL is used to transmit a low potential signal, which is used to control the N-channel thin film transistors to be in a cut-off state.

[0048] It should be noted that when the scanning signals transmitted in each scanning line have positive pulses, this embodiment can make the positive pulses of each scanning signal have a steeper or vertical falling edge to be closer to the ideal waveform of the pulse.

[0049] In one embodiment, the first transistor NTA and the second transistor NTB are both P-channel thin film transistors, and the third transistor NTC is an N-channel thin film transistor; the potential transmission line VL is used to transmit a high potential signal, and the high potential signal is used to control the P-channel thin film transistor to be in a cut-off state.

[0050] It should be noted that when the scanning signals transmitted in each scanning line have a negative pulse, this embodiment can make the negative pulse of each scanning signal have a steeper or vertical rising edge to be closer to the ideal waveform of the pulse.

[0051] In one embodiment, as shown in FIG4 , the waveform adjustment module 100 includes a fourth transistor T1, a fifth transistor T2, a sixth transistor T3, and a seventh transistor T4. A first electrode of the fourth transistor T1 is electrically connected to the potential transmission line VL, and a gate of the fourth transistor T1 is electrically connected to the forward scan control line U2D; a first electrode of the fifth transistor T2 is electrically connected to the second electrode of the fourth transistor T1, a gate of the fifth transistor T2 is electrically connected to the N+1th scan line G(N+1), and a second electrode of the fifth transistor T2 is electrically connected to the Nth scan line G(N); a first electrode of the sixth transistor T3 is electrically connected to the first electrode of the fourth transistor T1, and a gate of the sixth transistor T3 is electrically connected to the reverse scan control line D2U; a first electrode of the seventh transistor T4 is electrically connected to the second electrode of the sixth transistor T3, a gate of the seventh transistor T4 is electrically connected to the N-1th scan line G(N-1), and a second electrode of the seventh transistor T4 is electrically connected to the Nth scan line G(N).

[0052] It should be noted that, during the forward scanning process, the forward scanning line controls the fourth transistor T1 to be in the on state. When the N+1th scanning line G(N+1) controls the fifth transistor T2 to be turned on, the potential in the Nth scanning line G(N) is adjusted to the potential of the potential transmission line VL.

[0053] During the reverse scanning process, the reverse scanning line controls the sixth transistor T3 to be in the on state. When the N-1th scanning line G(N-1) controls the seventh transistor T4 to be turned on, the potential in the Nth scanning line G(N) is adjusted to the potential of the potential transmission line VL.

[0054] It can be understood that this can improve the verticality of the ending edge of the N-th level scanning signal in the N-th scanning line G (N) during the forward scanning process, and can also improve the verticality of the ending edge of the N-th level scanning signal in the N-th scanning line G (N) during the reverse scanning process.

[0055] In one embodiment, the fourth transistor T1, the fifth transistor T2, the sixth transistor T3 and the seventh transistor T4 are all N-channel thin film transistors; the potential transmission line VL is used to transmit a low potential signal, which is used to control the N-channel thin film transistors to be in an off state.

[0056] It should be noted that when the scanning signals transmitted in each scanning line have positive pulses, this embodiment can make the positive pulses of each scanning signal have a steeper or vertical falling edge to be closer to the ideal waveform of the pulse.

[0057] In one embodiment, the fourth transistor T1 and the sixth transistor T3 are both N-channel thin film transistors, and the fifth transistor T2 and the seventh transistor T4 are both P-channel thin film transistors; the potential transmission line VL is used to transmit a high potential signal, and the high potential signal is used to control the P-channel thin film transistor to be in an off state.

[0058] It should be noted that when the scanning signals transmitted in each scanning line have a negative pulse, this embodiment can make the negative pulse of each scanning signal have a steeper or vertical rising edge to be closer to the ideal waveform of the pulse.

[0059] Figure 5 is a schematic comparison of the improved non-irregular display panel provided by an embodiment of the present application before and after improvement. The non-irregular display panel may include, but is not limited to, a display panel having a rectangular display area AA. Specifically, the display area AA can be divided into four regions: Region A, Region B, Region C, and Region D. Regions A and B are located near the first gate driver circuit GOA1 and the second gate driver circuit GOA2 and are symmetrical about the center of the display area AA. Regions C and D are located away from the first gate driver circuit GOA1 and the second gate driver circuit GOA2 and are symmetrical about the center of the display area AA. To improve the delay of the trailing edge of the scan signal in the display area AA, a corresponding number of waveform adjustment modules 100 are placed in Regions A, B, C, and D, respectively. In Regions A and B, one waveform adjustment module 100 is configured for every M sub-pixels 200, and in Regions C and D, one waveform adjustment module 100 is configured for every N sub-pixels 200, where M and N are integers, and M is less than or equal to N.

[0060] Before the waveform adjustment module 100 is configured in the display area AA, the falling edges of the corresponding scanning signals in areas A, B, C, and D are shown in a row of waveforms corresponding to "ultra-wide screen" in FIG5 . It can be seen that the delay of each falling edge is relatively large.

[0061] After the waveform adjustment module 100 is configured in the display area AA, the falling edges of the corresponding scanning signals in areas A, B, C, and D are shown in a row of waveforms corresponding to the "ultra-wide screen + waveform adjustment module" in Figure 5. It can be seen that the delay of each falling edge is small, and each falling edge is also steeper or vertical.

[0062] The IC is a data driver or a data driver chip, which can provide corresponding data signals for each data line.

[0063] 6 , 7 , 8 and 9 respectively show a form of a special-shaped display panel. Compared with FIG. 5 , the display areas AA shown in FIG. 6 to FIG. 9 are all non-rectangular areas.

[0064] For example, the display area AA shown in Figure 6 has its lower left corner hollowed out. In this case, the first gate drive circuit GOA1 provides corresponding scan signals for each scan line from the right side, the second gate drive circuit GOA2 provides corresponding scan signals for each scan line in the normal display area AA domain from the left side, and the third gate drive circuit GOA3 provides corresponding scan signals for each scan line in the special-shaped display area AA domain from the left side.

[0065] The bottom edge area of ​​the display area AA shown in FIG7 is hollowed out. In this case, the first gate driving circuit GOA1 provides corresponding scanning signals to each scanning line from the right side, and the second gate driving circuit GOA2 provides corresponding scanning signals to each scanning line from the left side.

[0066] The display area AA shown in FIG8 has its center area hollowed out. In this case, the first gate driving circuit GOA1 provides corresponding scanning signals to each scanning line from the right side, and the second gate driving circuit GOA2 provides corresponding scanning signals to each scanning line from the left side.

[0067] The display area AA shown in Figure 9 has its left edge area hollowed out. In this case, the first gate drive circuit GOA1 provides corresponding scan signals to each scan line from the right side, the second gate drive circuit GOA2 provides corresponding scan signals to each scan line in the upper part from the left side, the third gate drive circuit GOA3 provides corresponding scan signals to each scan line in the middle part from the left side, and the fourth gate drive circuit GOA4 provides corresponding scan signals to each scan line in the lower part from the left side.

[0068] In one embodiment, as shown in Figures 8 to 15, the display panel includes a waveform adjustment module 100 configured to improve the ending edge of the scanning signal in the display area AA, the display area AA includes a first display partition AA1 and a second display partition AA2 arranged in a first direction DR1, the second display partition AA2 is located within the projection of the first display partition AA1 in the first direction DR1, and the second display partition AA2 covers the portion of the projection of the first display partition AA1 in the first direction DR1.

[0069] A first gate driving circuit GOA1 and a second gate driving circuit GOA2 are respectively provided on both sides of the first display area AA1 . Each scan line in the first display area AA1 is electrically connected to the first gate driving circuit GOA1 and the second gate driving circuit GOA2 .

[0070] One or two of the first gate drive circuit GOA1, the second gate drive circuit GOA2, the third gate drive circuit GOA3 and the fourth gate drive circuit GOA4 are provided on both sides of the second display partition AA2, and each scan line in the second display partition AA2 is electrically connected to one or two of the first gate drive circuit GOA1, the second gate drive circuit GOA2, the third gate drive circuit GOA3 and the fourth gate drive circuit GOA4.

[0071] The first display area AA1 includes a plurality of first display sub-areas sequentially arranged along the second direction DR2 . The density of the waveform adjustment module 100 in each first display sub-area increases as the distance from the first gate driving circuit GOA1 and the second gate driving circuit GOA2 increases.

[0072] The second display area AA2 includes multiple second display sub-areas arranged in sequence along the second direction DR2, and the density of the waveform adjustment module 100 in each second display sub-area increases as the distance from one or two of the first gate drive circuit GOA1, the second gate drive circuit GOA2, the third gate drive circuit GOA3 and the fourth gate drive circuit GOA4 increases.

[0073] It can be understood that the display panel provided in this embodiment, by constructing differentiated densities of the waveform adjustment module 100 in each display partition with different gate drive circuit configurations, can not only improve the technical problem of large delay of the scanning signal in the display panel, but also enable the scanning signal to have the same or similar delay at different positions in the display area AA, which is beneficial to improving the uniformity of the display.

[0074] It should be noted that the density of the waveform adjustment module 100 in each first display sub-area increases as the distance from the first gate drive circuit GOA1 and the second gate drive circuit GOA2 increases, and the density of the waveform adjustment module 100 in each second display sub-area increases as the distance from one or two of the first gate drive circuit GOA1, the second gate drive circuit GOA2, the third gate drive circuit GOA3 and the fourth gate drive circuit GOA4 increases. Such a density arrangement of the waveform adjustment module 100 is conducive to achieving the same end edge delay of the scanning signal at different positions in the display area AA, and thus is conducive to achieving a uniform display effect in the display area AA.

[0075] In one embodiment, as shown in Figures 10 and 11, the first side of the first display partition AA1 is aligned with the first side of the second display partition AA2 in the first direction DR1, the second side of the first display partition AA1 is not aligned with the second side of the second display partition AA2 in the first direction DR1, and the first side and the second side are respectively located on both sides of the display area AA in the second direction DR2.

[0076] The first gate driving circuit GOA1 is located at the second side of the first display partition AA1 , the second gate driving circuit GOA2 is located at the first side of the first display partition AA1 , and the third gate driving circuit GOA3 is located at the first side of the second display partition AA2 .

[0077] The first density change rate of the waveform adjustment module 100 in the plurality of second display sub-areas is greater than the second density change rate, and the second density change rate is the density change rate of the waveform adjustment module 100 in the plurality of first display sub-areas.

[0078] It should be noted that the multiple first display sub-areas may be display sub-area A AA11, display sub-area B AA12, display sub-area C AA13, display sub-area D AA14, display sub-area C AA15, etc. The multiple second display sub-areas may be display sub-area B AA21, display sub-area D AA22, display sub-area D AA23, display sub-area C AA24, etc.

[0079] In particular, display sub-area AA11, display sub-area AA15, and display sub-area AA21 each have one waveform adjustment module 100 configured for H sub-pixels 200. Display sub-area AA12, display sub-area AA14, and display sub-area AA22 each have one waveform adjustment module 100 configured for J sub-pixels 200. Display sub-area AA13 has one waveform adjustment module 100 configured for K sub-pixels 200, where H, J, and K are integers and decrease in magnitude. Display sub-area AA23 has one waveform adjustment module 100 configured for K1 sub-pixels 200, and display sub-area AA24 has one waveform adjustment module 100 configured for J1 sub-pixels 200, where J1 and K1 are integers and J1 is greater than K1.

[0080] It is understandable that such a configuration can achieve the same end edge delay of the scanning signal at different positions in the display area AA, thereby facilitating uniform display effects in the display area AA.

[0081] In other embodiments, K1 may be greater than K, and J1 may be greater than J. Such a configuration can further achieve the same end edge delay of the scanning signal at different positions in the display area AA, thereby further facilitating the uniformity of the display effect in the display area AA.

[0082] In one embodiment, the plurality of first display sub-areas include display sub-area A AA11, display sub-area B AA12, display sub-area C AA13, display sub-area D AA14, and display sub-area U AA15, which are sequentially arranged in the second direction DR2; the width of display sub-area A AA11 in the second direction DR2 is equal to the width of display sub-area U AA15 in the second direction DR2, and the density of waveform adjustment modules 100 in display sub-area A AA11 is equal to the density of waveform adjustment modules 100 in display sub-area U AA15; the width of display sub-area B AA12 in the second direction DR2 is equal to the width of display sub-area D AA14 in the second direction DR2, and the density of waveform adjustment modules 100 in display sub-area B AA12 is equal to the density of waveform adjustment modules 100 in display sub-area D AA14; and the density of waveform adjustment modules 100 in display sub-area A AA11, the density of waveform adjustment modules 100 in display sub-area B AA12, and the density of waveform adjustment modules 100 in display sub-area C AA13 increase sequentially.

[0083] In one embodiment, the multiple second display sub-areas include an upper display sub-area AA24, a trunk display sub-area AA23, a ground display sub-area AA22, and a branch display sub-area AA21 arranged in sequence in the second direction DR2; the density of the waveform adjustment module 100 in the upper display sub-area AA24, the density of the waveform adjustment module 100 in the trunk display sub-area AA23, the density of the waveform adjustment module 100 in the ground display sub-area AA22, and the density of the waveform adjustment module 100 in the branch display sub-area AA21 decrease in sequence.

[0084] In one embodiment, the width of the support display sub-area AA21 in the second direction DR2 is equal to the width of the lower display sub-area AA15 in the second direction DR2, and the density of the waveform adjustment modules 100 in the support display sub-area AA21 is equal to the density of the waveform adjustment modules 100 in the lower display sub-area AA15; the width of the ground display sub-area AA22 in the second direction DR2 is equal to the width of the lower display sub-area AA14 in the second direction DR2, and the density of the waveform adjustment modules 100 in the ground display sub-area AA22 is equal to the density of the waveform adjustment modules 100 in the lower display sub-area AA14; the width of the upper display sub-area AA23 in the second direction DR2 is smaller than the width of the lower display sub-area AA13 in the second direction DR2, and the density of the waveform adjustment modules 100 in the upper display sub-area AA23 is greater than the density of the waveform adjustment modules 100 in the lower display sub-area AA13; and the density of the waveform adjustment modules 100 in the upper display sub-area AA23 is smaller than the density of the waveform adjustment modules 100 in the upper display sub-area AA24.

[0085] In one embodiment, as shown in Figures 12 and 13, the first side of the first display partition AA1 is aligned with the first side of the second display partition AA2 in the first direction DR1, the second side of the first display partition AA1 is not aligned with the second side of the second display partition AA2 in the first direction DR1, and the first side and the second side are respectively located on both sides of the display area AA in the second direction DR2.

[0086] The first gate driving circuit GOA1 is located on the second side of the first display partition AA1, the second gate driving circuit GOA2 is located on the first side of the first display partition AA1, the third gate driving circuit GOA3 is located on the first side of the second display partition AA2, and the fourth gate driving circuit GOA4 is located on the second side of the second display partition AA2.

[0087] The first density change rate of the waveform adjustment module 100 in the plurality of second display sub-areas is equal to the second density change rate, and the second density change rate is the density change rate of the waveform adjustment module 100 in the plurality of first display sub-areas.

[0088] It should be noted that, compared to Figures 10 and 11 , this embodiment includes a fourth gate drive circuit GOA4 on the left side of the second display subarea AA2. In this case, each of the A display subarea AA11, B display subarea AA15, and D display subarea AA21 is configured with one waveform adjustment module 100 for H sub-pixels 200; each of the B display subarea AA12, D display subarea AA14, and D display subarea AA22 is configured with one waveform adjustment module 100 for J sub-pixels 200; and each of the C display subarea AA13 is configured with one waveform adjustment module 100 for K sub-pixels 200, where H, J, and K are integers and decrease in magnitude. Each of the D display subarea AA23 is configured with one waveform adjustment module 100 for K1 sub-pixels 200, and each of the D display subarea AA24 is configured with one waveform adjustment module 100 for J1 sub-pixels 200, where J1 and K1 are integers and J1 is less than K1. J1 may be greater than or equal to J, or J1 may be less than J. K1 may be greater than or equal to K, or K1 may be less than K.

[0089] It is understandable that such a configuration can achieve the same end edge delay of the scanning signal at different positions in the display area AA, thereby facilitating uniform display effects in the display area AA.

[0090] In one embodiment, the plurality of first display sub-areas include display sub-area A AA11, display sub-area B AA12, display sub-area C AA13, display sub-area D AA14, and display sub-area U AA15, which are sequentially arranged in the second direction DR2; the width of display sub-area A AA11 in the second direction DR2 is equal to the width of display sub-area U AA15 in the second direction DR2, and the density of waveform adjustment modules 100 in display sub-area A AA11 is equal to the density of waveform adjustment modules 100 in display sub-area U AA15; the width of display sub-area B AA12 in the second direction DR2 is equal to the width of display sub-area D AA14 in the second direction DR2, and the density of waveform adjustment modules 100 in display sub-area B AA12 is equal to the density of waveform adjustment modules 100 in display sub-area D AA14; and the density of waveform adjustment modules 100 in display sub-area A AA11, the density of waveform adjustment modules 100 in display sub-area B AA12, and the density of waveform adjustment modules 100 in display sub-area A AA11 are equal to the density of waveform adjustment modules 100 in display sub-area B AA12. The density of the entire module 100 in the C display sub-area AA13 increases sequentially; the multiple second display sub-areas include a top display sub-area AA24, a trunk display sub-area AA23, a ground display sub-area AA22, and a branch display sub-area AA21 arranged sequentially in the second direction DR2; the width of the top display sub-area AA24 in the second direction DR2 is equal to the width of the branch display sub-area AA21 in the second direction DR2, and the density of the waveform adjustment module 100 in the top display sub-area AA24 is equal to the density of the waveform adjustment module 100 in the branch display sub-area AA21; the width of the trunk display sub-area AA23 in the second direction DR2 is equal to the width of the ground display sub-area AA22 in the second direction DR2, and the density of the waveform adjustment module 100 in the trunk display sub-area AA23 is equal to the density of the waveform adjustment module 100 in the ground display sub-area AA22; and the density of the waveform adjustment module 100 in the top display sub-area AA24 is less than the density of the waveform adjustment module 100 in the trunk display sub-area AA23.

[0091] In one embodiment, the width of the support display sub-area AA21 in the second direction DR2 is equal to the width of the lower display sub-area AA15 in the second direction DR2, and the density of the waveform adjustment modules 100 in the support display sub-area AA21 is equal to the density of the waveform adjustment modules 100 in the lower display sub-area AA15; the width of the ground display sub-area AA22 in the second direction DR2 is equal to the width of the lower display sub-area AA14 in the second direction DR2, and the density of the waveform adjustment modules 100 in the ground display sub-area AA22 is equal to the density of the waveform adjustment modules 100 in the lower display sub-area AA14; The width of the display sub-area AA23 in the second direction DR2 is smaller than the width of the display sub-area AA13 in the second direction DR2, and the density of the waveform adjustment module 100 in the display sub-area AA23 is smaller than or equal to the density of the waveform adjustment module 100 in the display sub-area AA13; and the density of the waveform adjustment module 100 in the display sub-area AA24 is greater than or equal to the density of the waveform adjustment module 100 in the display sub-area AA11, or, the density of the waveform adjustment module 100 in the display sub-area AA24 is smaller than the density of the waveform adjustment module 100 in the display sub-area AA11.

[0092] In one embodiment, as shown in Figures 8, 14, and 15, the first side of the first display partition AA1 is aligned with the first side of the second display partition AA2 in the first direction DR1, and the second side of the first display partition AA1 is aligned with the second side of the second display partition AA2 in the first direction DR1. The first side and the second side are respectively located on opposite sides of the display area AA in the second direction DR2. The second display partition AA2 is located on one side of all the first display partitions AA1 in the first direction DR1, or the second display partition AA2 is located between two first display partitions AA1 in the first direction DR1.

[0093] The first gate drive circuit GOA1 is located on the second side of the display area AA, and the second gate drive circuit GOA2 is located on the first side of the display area AA. Each scan line in the first display subarea AA1 is electrically connected to the first gate drive circuit GOA1 and the second gate drive circuit GOA2. Furthermore, each scan line in the second display subarea AA2 is electrically connected to the first gate drive circuit GOA1 and the second gate drive circuit GOA2.

[0094] The first density change rate of the waveform adjustment module 100 in the plurality of second display sub-areas is equal to the second density change rate, and the second density change rate is the density change rate of the waveform adjustment module 100 in the plurality of first display sub-areas.

[0095] It should be noted that, in this embodiment, each of the A display sub-area AA11, the B display sub-area AA15, the C display sub-area AA21, and the D display sub-area AA24 is configured with a waveform adjustment module 100 for H sub-pixels 200, each of the B display sub-area AA12, the D display sub-area AA14, the D display sub-area AA22, and the D display sub-area AA23 is configured with a waveform adjustment module 100 for J sub-pixels 200, and each of the C display sub-area AA13 is configured with a waveform adjustment module 100 for K sub-pixels 200, wherein H, J, and K are all integers, and the sizes of H, J, and K decrease in sequence.

[0096] It is understandable that such a configuration can achieve the same end edge delay of the scanning signal at different positions in the display area AA, thereby facilitating uniform display effects in the display area AA.

[0097] Among them, the first density change rate can be the ratio of the density of the waveform adjustment module 100 in the second display sub-area AA12 to the density of the waveform adjustment module 100 in the first display sub-area AA11, or the ratio of the density of the waveform adjustment module 100 in the third display sub-area AA13 to the density of the waveform adjustment module 100 in the second display sub-area AA12, or the ratio of the density of the waveform adjustment module 100 in the third display sub-area AA13 to the density of the waveform adjustment module 100 in the first display sub-area AA11. The second density change rate may be the ratio of the density of the waveform adjustment modules 100 in the ground display sub-area AA22 to the density of the waveform adjustment modules 100 in the branch display sub-area AA21, or the ratio of the density of the waveform adjustment modules 100 in the trunk display sub-area AA23 to the density of the waveform adjustment modules 100 in the ground display sub-area AA22, or the ratio of the density of the waveform adjustment modules 100 in the sky display sub-area AA24 to the density of the waveform adjustment modules 100 in the trunk display sub-area AA23, or the ratio of the density of the waveform adjustment modules 100 in the sky display sub-area AA24 to the density of the waveform adjustment modules 100 in the branch display sub-area AA21.

[0098] It should be noted that the forward scan control line U2D is used to transmit a forward scan control signal, which is used to control the display panel to perform a forward scan drive mode. Specifically, the present application implements the forward scan drive mode when the forward scan control signal has a positive pulse. The reverse scan control line D2U is used to transmit a reverse scan control signal, which is used to control the display panel to perform a reverse scan drive mode. Specifically, the present application implements the reverse scan drive mode when the reverse scan control signal has a positive pulse.

[0099] In one embodiment, the second display area AA2 is located on one side of all the first display areas AA1 in the first direction DR1; the plurality of first display sub-areas include an A display sub-area AA11, a B display sub-area AA12, a C display sub-area AA13, a D display sub-area AA14, and a U display sub-area AA15 arranged in sequence in the second direction DR2; wherein, in the second display area AA2, a non-display area is provided between the upper display sub-area AA23 and the lower display sub-area AA22; the width of the A display sub-area AA11 in the second direction DR2 is equal to the width of the U display sub-area AA15 in the second direction DR2. The widths of the waveform adjustment modules 100 in the first display sub-area AA11 and the density of the waveform adjustment modules 100 in the second display sub-area AA15 are equal; the width of the second display sub-area AA12 in the second direction DR2 is equal to the width of the third display sub-area AA14 in the second direction DR2, the density of the waveform adjustment modules 100 in the second display sub-area AA12 is equal to the density of the waveform adjustment modules 100 in the third display sub-area AA14; and the density of the waveform adjustment modules 100 in the first display sub-area AA11 and the density of the waveform adjustment modules 100 in the third display sub-area AA15 are equal. The density of the waveform adjustment module 100 in the sub-area AA12 and the density of the waveform adjustment module 100 in the C display sub-area AA13 increase sequentially; the plurality of second display sub-areas include a sky display sub-area AA24, a trunk display sub-area AA23, a ground display sub-area AA22 and a branch display sub-area AA21 arranged sequentially in the second direction DR2; the width of the sky display sub-area AA24 in the second direction DR2 is equal to the width of the A display sub-area AA11 in the second direction DR2 and the width of the branch display sub-area AA21 in the second direction DR2, and the density of the waveform adjustment module 100 in the sky display sub-area AA24 is equal to the density of the waveform adjustment module 100 in the sky display sub-area AA24. The width of the main display sub-area AA23 in the second direction DR2 is equal to the width of the second display sub-area AA12 in the second direction DR2 and the width of the ground display sub-area AA22 in the second direction DR2. The density of the waveform adjustment module 100 in the main display sub-area AA23 is equal to the density of the waveform adjustment module 100 in the second display sub-area AA12 and the density of the waveform adjustment module 100 in the ground display sub-area AA22.

[0100] It should be noted that the non-display area in this embodiment is the hollowed-out area.

[0101] In one embodiment, the second display subarea AA2 is located between the two first display subareas AA1 in the first direction DR1; each first display subarea includes a display subarea A AA11, a display subarea B AA12, a display subarea C AA13, a display subarea D AA14, and a display subarea U AA15 arranged in sequence in the second direction DR2; the width of the display subarea A AA11 in the second direction DR2 is equal to the width of the display subarea U AA15 in the second direction DR2, and the density of the waveform adjustment module 100 in the display subarea A AA11 is equal to the density of the waveform adjustment module 100 in the waveform adjustment module The density of the waveform adjustment modules 100 in the U display sub-area AA15 is equal; the width of the B display sub-area AA12 in the second direction DR2 is equal to the width of the D display sub-area AA14 in the second direction DR2, and the density of the waveform adjustment modules 100 in the B display sub-area AA12 is equal to the density of the waveform adjustment modules 100 in the D display sub-area AA14; and the density of the waveform adjustment modules 100 in the A display sub-area AA11, the density of the waveform adjustment modules 100 in the B display sub-area AA12, and the density of the waveform adjustment modules 100 in the C display sub-area AA13 increase in sequence; multiple The second display sub-area includes a top display sub-area AA24, a trunk display sub-area AA23, a ground display sub-area AA22, and a branch display sub-area AA21 arranged in sequence in the second direction DR2; wherein, in the second display sub-area AA2, there is a non-display area between the trunk display sub-area AA23 and the ground display sub-area AA22; the width of the top display sub-area AA24 in the second direction DR2 is equal to the width of the first display sub-area AA11 in the second direction DR2, and the width of the branch display sub-area AA21 in the second direction DR2, and the waveform adjustment module 100 is densely packed in the top display sub-area AA24. The width of the main display sub-area AA23 in the second direction DR2 is equal to the width of the second display sub-area AA12 in the second direction DR2 and the width of the ground display sub-area AA22 in the second direction DR2. The density of the waveform adjustment module 100 in the main display sub-area AA23 is equal to the density of the waveform adjustment module 100 in the second display sub-area AA12 and the density of the waveform adjustment module 100 in the ground display sub-area AA22.

[0102] In one embodiment, the second display partition AA2 is located between the two first display partitions AA1 in the first direction DR1; the first side of each first display partition AA1 is aligned with the first side of the second display partition AA2 in the first direction DR1, the second side of the first display partition AA1 is not aligned with the second side of the second display partition AA2 in the first direction DR1, and the first side and the second side are respectively located on both sides of the display area AA in the second direction DR2; the first gate driving circuit GOA1 is located on the second side of the display area AA, the second gate driving circuit GOA2 is located on the first side of the first display partition AA1, the third gate driving circuit GOA3 is located on the first side of the second display partition AA2, and the fourth gate driving circuit GOA4 is located on the first side of the second display partition AA2. OA4 is located on a first side of another first display partition AA1; each scan line in a first display partition AA1 is electrically connected to the first gate drive circuit GOA1 and the second gate drive circuit GOA2, each scan line in the second display partition AA2 is electrically connected to the first gate drive circuit GOA1 and the third gate drive circuit GOA3, and each scan line in another first display partition AA1 is electrically connected to the first gate drive circuit GOA1 and the fourth gate drive circuit GOA4; wherein, the distance from the second gate drive circuit GOA2 to the first gate drive circuit GOA1 in the second direction DR2 is equal to the distance from the fourth gate drive circuit GOA4 to the first gate drive circuit GOA1 in the second direction DR2 , and the distance between the second gate driving circuit GOA2 and the first gate driving circuit GOA1 in the second direction DR2 is greater than the distance between the third gate driving circuit GOA3 and the first gate driving circuit GOA1 in the second direction DR2; each first display sub-area includes a display sub-area A AA11, a display sub-area B AA12, a display sub-area C AA13, a display sub-area D AA14 and a display sub-area U AA15 arranged in sequence in the second direction DR2; the width of the display sub-area A AA11 in the second direction DR2 is equal to the width of the display sub-area U AA15 in the second direction DR2, and the density of the waveform adjustment module 100 in the display sub-area A AA11 is equal to the density of the waveform adjustment module 100 in the display sub-area U AA15 the density of the waveform adjustment modules 100 in the display sub-area AA11, the density of the waveform adjustment modules 100 in the display sub-area AA12, and the density of the waveform adjustment modules 100 in the display sub-area AA13 increase in sequence; the plurality of second display sub-areas include an upper display sub-area AA24, a main display sub-area AA23, a ground display sub-area AA22, and a branch display sub-area AA21, which are sequentially arranged in the second direction DR2;The width of the upper display sub-area AA24 in the second direction DR2 is equal to the width of the branch display sub-area AA21 in the second direction DR2, and the density of the waveform adjustment modules 100 in the upper display sub-area AA24 is equal to the density of the waveform adjustment modules 100 in the branch display sub-area AA21. The width of the trunk display sub-area AA23 in the second direction DR2 is equal to the width of the ground display sub-area AA22 in the second direction DR2, and the density of the waveform adjustment modules 100 in the trunk display sub-area AA23 is equal to the density of the waveform adjustment modules 100 in the ground display sub-area AA22.

[0103] In one embodiment, the width of the support display sub-area AA21 in the second direction DR2 is greater than the width of the lower display sub-area AA15 in the second direction DR2, and the density of the waveform adjustment module 100 in the support display sub-area AA21 is greater than the density of the waveform adjustment module 100 in the lower display sub-area AA15; the width of the ground display sub-area AA22 in the second direction DR2 is greater than the width of the lower display sub-area AA14 in the second direction DR2, and the density of the waveform adjustment module 100 in the ground display sub-area AA22 is greater than the density of the waveform adjustment module 100 in the lower display sub-area AA14.

[0104] In one embodiment, this embodiment provides a display device, which includes a display panel in at least one embodiment, each scanning line is used to transmit a corresponding scanning signal, and the waveform adjustment module 100 is used to improve the verticality of the end edge of the scanning signal during forward scanning or reverse scanning.

[0105] It can be understood that the display device provided in this embodiment, by constructing differentiated densities of the waveform adjustment module 100 in each display partition with different gate drive circuit configurations, can not only improve the technical problem of large delay of the scanning signal in the display panel, but also enable the scanning signal to have the same or similar delay at different positions in the display area AA, which is beneficial to improving the uniformity of the display.

[0106] It can be understood that since the display device provided in this embodiment includes the display panel of at least one of the above-mentioned embodiments, it can also control the waveform adjustment module 100 through the N-1th scan line G (N-1), the N+1th scan line G (N+1), the potential transmission line VL, the forward scan control line U2D and the reverse scan control line D2U, and can reduce the duration of the end edge of the scan signal during the forward scan or reverse scan process, thereby improving the technical problem of the large delay of the scan signal in the display panel; this is conducive to increasing the charging time of each pixel in the display panel or increasing the refresh frequency of the display panel, and thus is conducive to promoting the development of high-frequency display and / or high resolution of the display panel.

[0107] Furthermore, the display panel and the display device can improve the delay problem of the scanning signal during forward scanning, and can also improve the delay problem of the scanning signal during reverse scanning, thereby providing greater freedom for the assembly of the display panel.

[0108] It should be noted that the above-mentioned display panel can be a liquid crystal display panel or a self-luminous display panel, for example, an organic light emitting diode display panel, a mini light emitting diode display panel, a micro light emitting diode display panel or a quantum dot light emitting diode display panel.

[0109] Based on the above analysis, this embodiment further provides a display panel, please refer to Figures 1 to 18, the display panel includes multiple waveform adjustment modules 100 in the display area AA, and at least one gate drive circuit is arranged on both sides of the display area AA. The distribution density of the waveform adjustment module 100 in the area away from the gate drive circuit is greater than the distribution density of the waveform adjustment module 100 in the area close to the gate drive circuit.

[0110] It can be understood that the display panel provided in this embodiment, by constructing a waveform adjustment module 100 with a higher distribution density in the display area AA which is farther away from the gate driving circuit, can not only improve the technical problem of large delay of the scanning signal in the display panel, but also enable the scanning signal to have the same or similar delay at different positions in the display area AA, which is beneficial to improving the uniformity of the display.

[0111] It should be noted that the distribution density refers to the ratio of the number of waveform adjustment modules 100 in a certain area to the area of ​​the area.

[0112] In one embodiment, the display area AA includes a first display partition AA1 and a second display partition AA2, the effective display width of the first display partition AA1 is greater than the effective display width of the second display partition AA2; the first display partition AA1 includes multiple first sub-areas AA19; the second display partition AA2 includes multiple second sub-areas AA29.

[0113] It should be noted that the effective display width refers to the width of the area of ​​the display panel that can be used for display. Each first sub-area AA19 can be used for display and is arranged continuously in the direction of the effective display width. Multiple second sub-areas AA29 can be arranged continuously or discontinuously in the direction of the effective display width.

[0114] The waveform adjustment modules 100 have the same distribution density in different areas of the same first sub-area AA19 or the second sub-area AA29 , that is, the waveform adjustment modules 100 are evenly distributed in the same first sub-area AA19 or the second sub-area AA29 .

[0115] In one embodiment, as shown in FIG8 , gate drive circuits are respectively provided on both sides of the display area AA, and the width of the first display partition AA1 from left to right is consistent with the width of the second display partition AA2 from left to right; the distribution density of the waveform adjustment module 100 in the first sub-area AA19 farthest from the gate drive circuit is greater than the distribution density of the waveform adjustment module 100 in the second sub-area AA29 farthest from the gate drive circuit.

[0116] It should be noted that the hollowed-out area in FIG. 8 may also serve as a second sub-area AA29 . In this case, the distribution density of the waveform adjustment module 100 in the hollowed-out area may be zero.

[0117] In one embodiment, as shown in Figures 10 and 11, gate driving circuits are respectively provided on both sides of the first display area AA1, and a gate driving circuit is provided on one of the two sides of the second display area AA2; the distribution density of the waveform adjustment module 100 in the first sub-area AA19 farthest from the gate driving circuit is less than the distribution density of the waveform adjustment module 100 in the second sub-area AA29 farthest from the gate driving circuit.

[0118] It should be noted that the farther the area is from the gate drive circuit, the more serious the delay of the scanning signal is. Therefore, configuring a waveform adjustment module 100 with a larger distribution density can better correct the delay of the scanning signal and better adjust the waveform of the scanning signal in the display area AA to be consistent.

[0119] In one embodiment, the difference between the distribution density of the waveform adjustment module 100 in the first sub-area AA19 away from the gate driving circuit and the distribution density in the first sub-area AA19 close to the gate driving circuit is a first difference, and the difference between the distribution density of the waveform adjustment module 100 in the second sub-area AA29 away from the gate driving circuit and the distribution density in the second sub-area AA29 close to the gate driving circuit is a second difference, and the first difference is greater than the second difference.

[0120] It should be noted that, since the effective display widths of the first display partition AA1 and the second display partition AA2 are inconsistent, this embodiment can make the delay of the scan signal in the first display partition AA1 and the second display partition AA2 more consistent, which is beneficial to improving display uniformity.

[0121] In one embodiment, as shown in Figures 16 to 18, the display panel further includes a scan line, a forward scan control line U2D, a reverse scan control line D2U, and a potential transmission line VL electrically connected to the waveform adjustment module 100, the scan line extends from the gate drive circuit to the display area AA, and at least one of the forward scan control line U2D, the reverse scan control line D2U, and the potential transmission line VL extends from a non-display area on a different side from the gate drive circuit to the display area AA.

[0122] It should be noted that the non-display area may include at least one of the left frame area NA1, the right frame area NA2, the upper frame area NA3, and the lower frame area NA4. Each gate drive circuit may be located in the left frame area NA1 and / or the frame area. In this embodiment, at least one of the forward scan control line U2D, the reverse scan control line D2U, and the potential transmission line VL extends from the upper frame area NA3 and / or the lower frame area NA4 to the display area AA, which can avoid affecting the original distribution of the scan lines. Among them, at least one of the forward scan control line U2D, the reverse scan control line D2U, and the potential transmission line VL can extend at least partially around the display area AA in the non-display area.

[0123] In one embodiment, as shown in Figure 16, in the same width range WF, the distribution density of the waveform adjustment module 100 in the first sub-area AA19 is greater than the distribution density of the waveform adjustment module 100 in the second sub-area AA29; the display panel also includes a forward scan control supplementary line 41, a reverse scan control supplementary line 43 and a potential transmission supplementary line 42 electrically connected to the waveform adjustment module 100, and at least one of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 extends from a non-display area on a different side from the gate drive circuit and close to the first display partition AA1 to the corresponding first sub-area AA19.

[0124] It should be noted that when the distribution density of the waveform adjustment module 100 in the first sub-area AA19 is large enough, the number of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL fixedly configured in the display panel will not be able to meet the demand, which requires the addition of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 to respectively make up for the insufficient number of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL.

[0125] In this embodiment, the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 can extend from the upper frame area NA3 to the corresponding first sub-area AA19, which not only reduces the transmission path of the corresponding signal, but also does not affect the second display area AA2.

[0126] In one embodiment, as shown in Figure 17, in the same width range WF, the distribution density of the waveform adjustment module 100 in the first sub-area AA19 is less than the distribution density of the waveform adjustment module 100 in the second sub-area AA29; the display panel also includes a forward scan control supplementary line 41, a reverse scan control supplementary line 43 and a potential transmission supplementary line 42 electrically connected to the waveform adjustment module 100, and at least one of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 extends from a non-display area on a different side from the gate drive circuit and close to the second display partition AA2 to the corresponding first sub-area AA19.

[0127] It should be noted that when the distribution density of the waveform adjustment module 100 in the second sub-area AA29 is large enough, the number of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL fixed in the display panel will not be able to meet the demand, which requires the addition of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 to respectively make up for the insufficient number of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL.

[0128] In this embodiment, the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 can extend from the lower frame area NA4 to the corresponding second sub-area AA29, which not only reduces the transmission path of the corresponding signal, but also does not affect the first display area AA1.

[0129] In one embodiment, as shown in Figures 9 and 18, the second display partition AA2 is located between the two first display partitions AA1; in the same width range WF, the distribution density of the waveform adjustment module 100 in the first sub-area AA19 is less than the distribution density of the waveform adjustment module 100 in the second sub-area AA29; the display panel also includes a forward scan control supplementary line 41, a reverse scan control supplementary line 43 and a potential transmission supplementary line 42 electrically connected to the waveform adjustment module 100, and at least one of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 extends from a non-display area on a different side from the gate drive circuit and close to the first display partition AA1 through the first display partition AA1 to the corresponding second sub-area AA29; wherein, the number of branches of at least one of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 in the first display partition AA1 is less than the number of branches in the second display partition AA2.

[0130] It should be noted that when the distribution density of the waveform adjustment module 100 in the second sub-area AA29 is large enough, the number of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL fixed in the display panel will not be able to meet the demand, which requires the addition of the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 to respectively make up for the insufficient number of the forward scan control line U2D, the reverse scan control line D2U and the potential transmission line VL.

[0131] However, since the forward scan control supplementary line 41, the reverse scan control supplementary line 43 and the potential transmission supplementary line 42 are not convenient to extend from the left border area NA1 and / or the right border area NA2 to the second display partition AA2, in this case, they can only extend from the upper border area NA3 and / or the lower border area NA4 through the first display partition AA1 to the corresponding second sub-area AA29. In this embodiment, the forward scan control supplementary line 41 / reverse scan control supplementary line 43 / potential transmission supplementary line 42 is divided from a branch in the first display partition AA1 into multiple branches in the second display partition AA2, which can minimize the impact on the first display partition AA1 and meet the requirements of the corresponding second sub-area AA29.

[0132] In another embodiment, different waveform adjustment modules 100 in the second sub-area AA29 may share at least one of the forward scan control line U2D, the reverse scan control line D2U, and the potential transmission line VL, which can also meet the needs of more waveform adjustment modules 100.

[0133] It should be noted that the display panels shown in FIG. 16 to FIG. 18 can be either rectangular display screens or various special-shaped screens, for example, the display screens with hollowed-out areas or missing corners as described above.

[0134] It is understandable that those skilled in the art can make equivalent substitutions or changes based on the technical solution and inventive concept of this application, and all these changes or substitutions should fall within the scope of protection of the claims attached to this application.

Claims

1. A display panel, comprising a plurality of waveform adjustment modules in a display area, at least one gate drive circuit being arranged on both sides of the display area, wherein a distribution density of the waveform adjustment modules in an area away from the gate drive circuit is greater than a distribution density of the waveform adjustment modules in an area close to the gate drive circuit.

2. The display panel according to claim 1, in, The display area includes a first display partition and a second display partition, the effective display width of the first display partition is greater than the effective display width of the second display partition; the first display partition includes a plurality of first sub-regions; and the second display partition includes a plurality of second sub-regions.

3. The display panel according to claim 2, in, Gate driving circuits are respectively arranged on both sides of the display area, and the width of the first display subarea from left to right is consistent with the width of the second display subarea from left to right; The distribution density of the waveform adjustment modules in the first sub-area farthest from the gate driving circuit is greater than the distribution density of the waveform adjustment modules in the second sub-area farthest from the gate driving circuit.

4. The display panel according to claim 2, in, The gate driving circuits are respectively arranged on both sides of the first display subarea, and the gate driving circuit is arranged on one of the two sides of the second display subarea; The distribution density of the waveform adjustment modules in the first sub-area farthest from the gate driving circuit is smaller than the distribution density of the waveform adjustment modules in the second sub-area farthest from the gate driving circuit.

5. The display panel according to claim 2, in, The difference between the distribution density of the waveform adjustment module in the first sub-area away from the gate driving circuit and the distribution density in the first sub-area close to the gate driving circuit is a first difference, and the difference between the distribution density of the waveform adjustment module in the second sub-area away from the gate driving circuit and the distribution density in the second sub-area close to the gate driving circuit is a second difference, and the first difference is greater than the second difference.

6. The display panel according to claim 2, in, The display panel also includes a scan line, a forward scan control line, a reverse scan control line and a potential transmission line electrically connected to the waveform adjustment module, the scan line extends from the gate drive circuit to the display area, and at least one of the forward scan control line, the reverse scan control line and the potential transmission line extends from a non-display area on a different side from the gate drive circuit to the display area.

7. The display panel according to claim 6, in, In the same width range, the distribution density of the waveform adjustment modules in the first sub-area is greater than the distribution density of the waveform adjustment modules in the second sub-area; The display panel also includes a forward scan control supplementary line, a reverse scan control supplementary line and a potential transmission supplementary line electrically connected to the waveform adjustment module, and at least one of the forward scan control supplementary line, the reverse scan control supplementary line and the potential transmission supplementary line extends from a non-display area on a different side from the gate drive circuit and close to the first display partition to a corresponding first sub-area.

8. The display panel according to claim 6, in, In the same width range, the distribution density of the waveform adjustment modules in the first sub-area is less than the distribution density of the waveform adjustment modules in the second sub-area; The display panel also includes a forward scan control supplementary line, a reverse scan control supplementary line and a potential transmission supplementary line electrically connected to the waveform adjustment module, and at least one of the forward scan control supplementary line, the reverse scan control supplementary line and the potential transmission supplementary line extends from a non-display area on a different side from the gate drive circuit and close to the second display partition to the corresponding first sub-area.

9. The display panel according to claim 6, in, The second display subarea is located between the two first display subareas; in the same width range, the distribution density of the waveform adjustment modules in the first subarea is less than the distribution density of the waveform adjustment modules in the second subarea; The display panel further comprises a forward scanning control supplementary line, a reverse scanning control supplementary line and a potential transmission supplementary line electrically connected to the waveform adjustment module, at least one of the forward scanning control supplementary line, the reverse scanning control supplementary line and the potential transmission supplementary line extending from a non-display area on a different side from the gate driving circuit and close to the first display sub-area through the first display sub-area to a corresponding second sub-area; The number of branches of at least one of the forward scanning control supplementary line, the reverse scanning control supplementary line and the potential transmission supplementary line in the first display partition is less than the number of branches in the second display partition.

10. A display device, comprising the display panel according to claim 1, wherein the waveform adjustment module is used to improve the verticality of the end edge of the scanning signal during forward scanning or reverse scanning.

11. The display device according to claim 10, in, The display area includes a first display partition and a second display partition, the effective display width of the first display partition is greater than the effective display width of the second display partition; the first display partition includes a plurality of first sub-regions; and the second display partition includes a plurality of second sub-regions.

12. The display device according to claim 11, in, Gate driving circuits are respectively arranged on both sides of the display area, and the width of the first display subarea from left to right is consistent with the width of the second display subarea from left to right; The distribution density of the waveform adjustment modules in the first sub-area farthest from the gate driving circuit is greater than the distribution density of the waveform adjustment modules in the second sub-area farthest from the gate driving circuit.

13. The display device according to claim 11, in, The gate driving circuits are respectively arranged on both sides of the first display subarea, and the gate driving circuit is arranged on one of the two sides of the second display subarea; The distribution density of the waveform adjustment modules in the first sub-area farthest from the gate driving circuit is smaller than the distribution density of the waveform adjustment modules in the second sub-area farthest from the gate driving circuit.

14. The display device according to claim 11, in, The difference between the distribution density of the waveform adjustment module in the first sub-area away from the gate driving circuit and the distribution density in the first sub-area close to the gate driving circuit is a first difference, and the difference between the distribution density of the waveform adjustment module in the second sub-area away from the gate driving circuit and the distribution density in the second sub-area close to the gate driving circuit is a second difference, and the first difference is greater than the second difference.

15. The display device according to claim 11, in, The display panel also includes a scan line, a forward scan control line, a reverse scan control line and a potential transmission line electrically connected to the waveform adjustment module, the scan line extends from the gate drive circuit to the display area, and at least one of the forward scan control line, the reverse scan control line and the potential transmission line extends from a non-display area on a different side from the gate drive circuit to the display area.

16. The display device according to claim 15, in, In the same width range, the distribution density of the waveform adjustment modules in the first sub-area is greater than the distribution density of the waveform adjustment modules in the second sub-area; The display panel also includes a forward scan control supplementary line, a reverse scan control supplementary line and a potential transmission supplementary line electrically connected to the waveform adjustment module, and at least one of the forward scan control supplementary line, the reverse scan control supplementary line and the potential transmission supplementary line extends from a non-display area on a different side from the gate drive circuit and close to the first display partition to a corresponding first sub-area.

17. The display device according to claim 15, in, In the same width range, the distribution density of the waveform adjustment modules in the first sub-area is less than the distribution density of the waveform adjustment modules in the second sub-area; The display panel also includes a forward scan control supplementary line, a reverse scan control supplementary line and a potential transmission supplementary line electrically connected to the waveform adjustment module, and at least one of the forward scan control supplementary line, the reverse scan control supplementary line and the potential transmission supplementary line extends from a non-display area on a different side from the gate drive circuit and close to the second display partition to the corresponding first sub-area.

18. The display device according to claim 15, in, The second display subarea is located between the two first display subareas; in the same width range, the distribution density of the waveform adjustment modules in the first subarea is less than the distribution density of the waveform adjustment modules in the second subarea; The display panel further comprises a forward scanning control supplementary line, a reverse scanning control supplementary line and a potential transmission supplementary line electrically connected to the waveform adjustment module, at least one of the forward scanning control supplementary line, the reverse scanning control supplementary line and the potential transmission supplementary line extending from a non-display area on a different side from the gate driving circuit and close to the first display sub-area through the first display sub-area to a corresponding second sub-area; The number of branches of at least one of the forward scanning control supplementary line, the reverse scanning control supplementary line and the potential transmission supplementary line in the first display partition is less than the number of branches in the second display partition.

19. The display device according to claim 10, in, The waveform adjustment module includes a first transistor, a second transistor and a third transistor, wherein the first electrode of the first transistor is electrically connected to a reverse scan control line, and the gate of the first transistor is electrically connected to the N-1th scan line; the first electrode of the second transistor is electrically connected to a forward scan control line, and the gate of the second transistor is electrically connected to the N+1th scan line; the gate of the third transistor is electrically connected to the second electrode of the first transistor and the second electrode of the second transistor, the first electrode of the third transistor is electrically connected to a potential transmission line, and the second electrode of the third transistor is electrically connected to the Nth scan line.

20. The display device according to claim 10, in, The waveform adjustment module includes a fourth transistor, a fifth transistor, a sixth transistor and a seventh transistor, the first electrode of the fourth transistor is electrically connected to the potential transmission line, and the gate of the fourth transistor is electrically connected to the forward scanning control line; the first electrode of the fifth transistor is electrically connected to the second electrode of the fourth transistor, the gate of the fifth transistor is electrically connected to the N+1th scanning line, and the second electrode of the fifth transistor is electrically connected to the Nth scanning line; the first electrode of the sixth transistor is electrically connected to the first electrode of the fourth transistor, and the gate of the sixth transistor is electrically connected to the reverse scanning control line; the first electrode of the seventh transistor is electrically connected to the second electrode of the sixth transistor, the gate of the seventh transistor is electrically connected to the N-1th scanning line, and the second electrode of the seventh transistor is electrically connected to the Nth scanning line.