METHOD FOR DETERMINING THE PHASOR OF A CURRENT OR VOLTAGE SIGNAL

Description

[0001] The invention relates to a method for determining the phasor of a current or voltage signal, wherein the current or voltage signal is sampled and the temporally discrete sample values ​​are fed to a multi-stage filter cascade, after which the parameters of the phasor are determined and output from the filtered sample values ​​transformed into the frequency domain.

[0002] Methods for determining the phasor of a current or voltage signal are known from the prior art. In these methods, the sampled, discrete-time signal of a capacitive voltage transformer (CVT) is prefiltered using a numerical algorithm before being subjected to a Fourier transformation. The finite impulse response filter used consists of two cascaded filter stages, with one filter stage filtering out decaying DC and AC components that are lower than the defined mains frequency of 50 or 60 Hz. The second filter stage forms a dynamic memory that stores specific samples, calculates an average value from them, and uses this average value to compile the filter's output value.

[0003] ANDREW J ROSCOE ET AL: "P-Class Phasor Measurement Unit algorithms using adaptive filtering to enhance accuracy at off-nominal frequencies", SMART MEASUREMENTS FOR FUTURE GRIDS (SMFG), 2011 IEEE INTERNATIONAL CONFERENCE ON, IEEE, November 14, 2011 (2011-11-14), pages 51-58, DOI: 10.1109 / SMFG.2011.6125761 ISBN: 978-1-4577-1313-2 discloses a method for determining the phasor of a current or voltage signal, wherein the current or voltage signal is sampled and the temporally discrete sample values ​​are fed to a multi-stage filter cascade, after which the parameters of the phasor are determined and output from the filtered sample values ​​transformed into the frequency domain.

[0004] A disadvantage of the current technology, however, is that the filtering can only filter out unwanted signal components below a static, predefined frequency, regardless of how much the corresponding signal components interfere with the phasor determination. Furthermore, especially when the line frequency drops, signal components required for correct phasor determination may be lost, thereby degrading the quality of the output value.

[0005] The invention is therefore based on the object of enabling a reliable and rapid determination of the phasor even in the event of a frequency change of the current or voltage signal.

[0006] The invention achieves this objective by providing a filter cascade comprising multiple filter stages. In each filter stage, a signal component with a predetermined multiple of a fundamental frequency stored in a frequency memory is filtered out of the sampled values. For this purpose, successive input values ​​are buffered to determine an output value. The invention is based on the idea that, for a given power grid, signal components that interfere with phasor determination are always located at the same frequencies, corresponding to multiples of the fundamental frequency. The harmonics of the fundamental frequency can be determined by multiplying the fundamental frequency by a natural number.By filtering out these signal components, the phasor determination can be significantly improved without filtering out entire frequency ranges, which has the disadvantage that possible signal changes, particularly with regard to the signal frequency, cannot be followed or can only be followed slowly. By filtering out multiples of the fundamental frequency, the filtered-out frequency range is fixed relative to the fundamental frequency and can therefore change when the frequency of the fundamental frequency changes. Furthermore, there is no absolute limit below which signal components are filtered out, since this could lead to the filter cascade removing the very signal components from which the phasor is subsequently to be determined if the fundamental frequency is lowered. In an optional further method step, for example, the fundamental frequency and preferably the multiples thereof can be determined before the start of and / or during the method, and the filters can be adapted to these.The fundamental frequency is always the lowest frequency; multiples of this fundamental frequency are calculated by multiplying the fundamental frequency by a positive, real number. To determine the phasor components, the following model can be used, for example:

[0007] The input values ​​can be described mathematically in the following form: x n = A sin nΔ + B cos nΔ + Cα n

[0008] This is Δ = 2 πf f s , f is the frequency of the current or voltage signal, fs is the frequency at which the current or voltage signal is sampled, and n is the index of the respective input value. The first two terms of xn describe the fundamental oscillation, and the last term is an exponential noise term. To determine the unknown components A, B, C, and α, which are necessary for phasor determination, the following cosine transformation is first applied: r n = x n − 2 cos Δ x n − 1 + x n − 2

[0009] Into which the corresponding input values ​​xn, xn-1, and xn-2 are inserted. Using the sine and cosine addition theorems, expressions for α and C can be determined from rn and rn-1. Then, using the original equation for xn, expressions for determining A are obtained, and from the equation for xn and xn-1, expressions for determining B are obtained. To obtain sufficient input values ​​to determine A, B, C, and α, the input values ​​of successive time steps can be used to determine the components. For example, α, A, B, and C can be determined from r1 and r0. This results in the following expressions: r 0 = x 0 − 2 cos Δ x − 1 + x − 2 r 1 = x 1 − 2 cos Δ x 0 + x − 1 α = r 1 r 0 C = r 1 α α 2 − 2 α cos Δ + 1 B = x 0 − C A = x 1 − B cos Δ − Cα sin Δ

[0010] By determining the exponential noise term, this can be precisely compensated. A and B are the phasor components to be determined and can preferably be repeatedly measured, stored, and averaged.

[0011] The determination of the phasor can be accelerated by correctly selecting the filter stages. This is done by arranging the filter stages in the filter cascade so that the expected signal strength of the filtered-out signal component decreases along the filter cascade. The phasor determination becomes more precise with each addition of a filter stage, as this removes more and more interfering signal components of the corresponding multiple of the signal. In order to perform the process quickly, however, it is not possible to add an unlimited number of filter stages. However, this interfering signal component varies in size depending on the multiple, so that some multiples make phasor determination more difficult than others. If, before starting the phasor determination, the multiples whose signal components most interfere with the output value are identified and these are also filtered out first, a reliable phasor determination can be carried out with just a few filter stages.To determine these multiples and their interfering signal components, and thus optimize the filter sequence, the levels can be assumed according to DIN IEC 61000-3-6, for example, ignoring the total harmonic distortion (THD) and assuming a noise level of 1%. Then, for a series of predetermined harmonics of the fundamental frequency, the influence of filtering out the respective harmonics on the original signal can be examined, as well as the magnitude of the error of the resulting signal compared to the original signal.In this process, the predetermined harmonic with the least influence on the resulting signal can be determined first. This harmonic is then stored, and the test for the remaining predetermined harmonics is continued iteratively, using the resulting signal as the original signal, until a ranked list of the predetermined harmonics is obtained according to their influence on the resulting signal. This ranked list can then be used to arrange the filter stages.

[0012] To be able to continue phasor determination even if the mains frequency changes without having to abort the process due to corrupted values, it is proposed that the fundamental frequency of the current or voltage signal be determined, preferably automatically, in predefined time steps and stored in the frequency memory for adjusting the filter stages of the filter cascade. In addition to the fundamental frequency, the frequencies of the multiples can also be stored in the frequency memory, whereupon the filter stages are adjusted to the corresponding multiples of the determined fundamental frequency, also preferably automatically. If the fundamental frequency changes during the phasor determination, this change can be recorded and the respective filter stage can be easily adjusted to the new frequency.As a result of these measures, correct phasor determination can be continued, especially when the mains frequency changes, without a termination condition occurring or the specific phasor signal having to be checked for correctness. Although several chronologically consecutive output values ​​from one filter stage are further processed in the subsequent filter stage in the filter cascade, tests have shown that, despite a change in the fundamental frequency, the temporarily stored output values ​​do not have to be discarded, but rather a step-by-step adjustment of the filter cascade is possible. As a result, even a change in the frequency of the current or voltage signal does not lead to an interruption in phasor determination. Instead, the changed fundamental frequency is quickly mapped by the phasor because, in a preferred embodiment, the first filter stage already filters out the largest expected signal component.

[0013] The drawing shows an example of the subject matter of the invention. Fig. 1 is a schematic representation of a device for carrying out the method according to the invention, Fig. 2 is the amplitude response of a filter cascade according to the invention with 7 filter stages at a fundamental frequency of 50 Hz and a sampling rate of 1000 Hz, Fig. 3 is the current profile in an example short circuit case, where the solid line represents the time course of the measured values ​​and the dashed line the time course of the phasor values ​​over time, and Fig. 4 is the time course of the root-mean-square value (RMS) of the phasor in the Fig. 3 shown short circuit case.

[0014] In a device for carrying out the method according to the invention, the current or voltage signal is first sampled in an analog-to-digital converter 1, and temporally discrete sample values ​​are formed from the current or voltage signal, which, in the embodiment shown, are fed to a frequency measuring device 2 in order to determine the fundamental frequency. This frequency measurement can be carried out once at the beginning of the method. In order to be able to carry out the method according to the invention even when the fundamental frequency changes, the frequency can preferably be determined repeatedly in order to be able to take this change in the fundamental frequency into account in the signal processing. The fundamental frequency determined with the frequency measuring device 2 can then be stored in a frequency memory 3. In this frequency memory 3, the multiples of the fundamental frequency can also be determined and passed on to the filter cascade 4 along with the fundamental frequency.If the fundamental frequency is not determined using a frequency measuring device 2, it can be stored directly in the frequency memory 3. The sample values ​​are transferred to a filter cascade 4, which in the example shown consists of seven filter stages 5. Each of the filter stages 5 filters out the signal component of a multiple of the fundamental frequency, whereby these multiples are preferably positive integer multiples of the fundamental frequency, i.e. harmonics. In a preferred embodiment, before carrying out the method, the signal strength to be expected at the resulting frequency is determined for several multiples of the fundamental frequency, and the various filter stages 5 are arranged such that the expected signal strength of the filtered-out signal component decreases along the filter cascade 4. This allows the signal components that most impair the determination of the phasor to be filtered out first.The at least partially filtered samples can be buffered in a signal buffer 6 after passing through one or more filter stages 5 and retrieved by subsequent filter stages 5. Optionally, the buffered samples can also be averaged before further processing. The filtered samples are then transferred from the filter cascade 4, either directly from the filter stages 5 or from the signal buffer 6, to a computing unit 7, which determines the phasor and outputs it in a subsequent step via an output device 8.

[0015] The mode of operation and sequence of the filter stages 5 can be adapted to the frequency-dependent amplitude response of the Fig. 2 for a filter cascade 4 consisting of seven filters. The individual amplitude responses of the Fig. 2 correspond to the resulting amplitude response of the filter cascade 4 with a different number of filter stages 5. The multiples of the fundamental frequency are plotted on the x-axis 9. The sequence of the filter stages 5 is based on the previously performed determination, described above, of those signal components of a multiple of the fundamental frequency that most interfere with the output value. Accordingly, the first filter stage filters the signal component of the seventh harmonic, the second filter stage filters the ninth harmonic, and so on.

[0016] Fig. 3 shows the measured current signal 10 and the phasor 11 determined by the phasor components A and B described above, with the time in milliseconds plotted on the x-axis 12 and the current in amperes on the y-axis 13. At time 0, a short circuit triggers a transient transient response. Immediately after time 0, a step detector detects a strong signal change, and the filter cascade 4 according to the invention is then reset. Since the individual filter stages 5 depend not only on the instantaneous values ​​but also on previous input values, the first filter stages 5 are initially undetermined, so that a valid phasor determination is not yet possible. If all required input values ​​for the first filter stage are available and sufficient output values ​​from the first filter stage are available for phasor determination, these output values ​​can be used for phasor determination.Thus, a specific phasor is already present a few milliseconds after time 0. With an increasing number of active filter stages 5, the phasor determination improves, as can be seen in particular in the . Fig. 4 The DC component of the signal decays following an exponential function, as can be seen from the oscillation of the measured current signal 10 and the phasor 11 of the Fig. 3 This DC component or offset depends on the reactances in the network. The phasor follows this oscillation of the measured values, whereby the shift between the phasor and the measured values ​​along the y-axis 13 is due to the decaying DC component. In contrast to methods known from the state of the art for determining the phasor, the RMS of the phasor, whose value is shown on the y-axis 14 of the Fig. 4is constant despite the decaying direct current component after the activation of all filter stages 5 and the determined phasor is subject to an extremely small error after just a few milliseconds due to the inventive ordering of the filter stages 5.

Claims

1. Method for determining the phasor of a current or voltage signal, wherein the current or voltage signal is sampled and the time-discrete samples are supplied to a multi-stage filter cascade (4), after which from the filtered samples transformed into the frequency domain the parameters of the phasor are determined and output, wherein the filter cascade (4) comprises a plurality of filter stages (5), wherein in each filter stage (5) a signal component having a predetermined multiple of a fundamental frequency stored in a frequency memory (3) is filtered out of the samples and successive input values are stored intermediately to determine an output value.

2. Method according to claim 1, characterised in that the filter stages (5) of the filter cascade (4) are arranged in such a way that the expected signal strength of the filtered signal component decreases along the filter cascade (4).

3. Method according to claim 1 or 2, characterised in that the fundamental frequency of the current or voltage signal is determined in predetermined time steps and stored in the frequency memory (3) for the purpose of adjusting the filter stages (5) of the filter cascade (4).