POSITION MEASURING SYSTEM AND METHOD FOR BIT-SERIAL AVERAGE OF POSITION VALUES

Description

FIELD OF TECHNOLOGY

[0001] The present invention relates to a device and a method for averaging position values ​​according to claims 1 and 6, respectively. It is applicable in the field of position determination in automation technology, in particular where errors in position measurement due to mechanical deficiencies are to be eliminated by redundant measurements at different measuring points and subsequent averaging of the position values. STATE OF THE ART

[0002] Absolute position measuring devices are known in the prior art that feature a serial data interface for communication with a control unit. These devices measure an absolute position upon receipt of a position request command at the data interface and then output the measured value in the form of a data packet serially via the data interface to the control unit. Due to the principle behind this, from the control unit's perspective, such a system exhibits a delay between the transmission of the position request command and the receipt of the measured value. This delay is largely determined by the transmission time of the data packet. Since these measured values ​​are frequently used as actual position values ​​for drive control, it is a constant requirement that this delay be as short as possible.If, in a position measuring system, several measured values ​​from different measuring points are to be averaged before the measured value is transmitted and serial transmission cannot be dispensed with, the delay time increases significantly again.

[0003] EP 2 551 645 A2 describes a position measuring system designed as an angle measuring device, in which several angle values ​​are measured at various measuring points distributed over the circumference of a graduation carrier and transmitted serially to a control unit. A corrected angle value is determined there, which is then output, also serially, to subsequent electronics. To reduce the delay time, it is proposed to calculate the corrected angle value from measured values ​​that were already measured before the arrival of a position request command. However, there are applications in which only currently measured values ​​should be used to generate the corrected measured value.

[0004] DE 10 2017 216666 A1 discloses a position encoder with serially controlled position data request and averaging. SUMMARY OF THE INVENTION

[0005] It is an object of the present invention to provide a position measuring system with improved averaging.

[0006] This object is achieved by a position measuring system according to claim 1.

[0007] A position measuring system is proposed, comprising a number of 2^x position sensors, where x is a positive integer, and a position computer, wherein the position computer comprises a system interface, a serial arithmetic unit and a computer interface for each position sensor, wherein the computer interfaces are connected via data transmission channels to corresponding device interfaces of the position sensors for the purpose of data transmission, the system interface is connectable to a control unit via an external data transmission channel and is designed to forward external position request commands received from the control unit to the computer interfaces and to serially output averaged position values ​​to the control unit, the computer interfaces are designed to send position request commands to the position sensors as a result of an arrival of an external position request command, the position sensors are designed to generate a position value with a word length of n bits as a result of a arrival of a position request command and to serially output it to the position computer via the device interface, the computer interfaces are further designed,to receive the position value and output it serially to the serial arithmetic unit, and the serial arithmetic unit is designed to serially calculate the average position value from the position values ​​and output it serially to the system interface for output to the control unit.

[0008] It is a further object of the present invention to provide an improved method for averaging.

[0009] This object is achieved by a method according to claim 6.

[0010] A method for averaging in a position measuring system is proposed, comprising a number of 2^x position sensors, where x is a positive integer, and a position computer, wherein the position computer comprises a system interface, a serial arithmetic unit and a computer interface for each position sensor, where the computer interfaces are connected via data transmission channels to corresponding device interfaces of the position sensors for the purpose of data transmission, the system interface is connected to a control unit via an external data transmission channel and external position request commands received from the control unit are forwarded from the system interface to the computer interfaces and averaged position values ​​are serially output to the control unit, position request commands are in turn sent from the computer interfaces to the position sensors as a result of an arrival of an external position request command, a position value with a word length of n bits is generated in the position sensors as a result of the arrival of a position request command and is serially output to the position computer via the device interface,the position value is received from the respective computer interface and serially output to the serial arithmetic unit, and in the serial arithmetic unit the average position value is serially calculated from the position values ​​and serially output to the system interface for output to the control unit.

[0011] Advantageous embodiments emerge from the claims dependent on claims 1 and 6, as well as from the following description of advantageous embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] It shows Figure 1 shows a block diagram of a position measuring system according to the invention in conjunction with a control unit, Figure 2 shows a block diagram of an embodiment of a serial arithmetic unit, Figure 3 shows a signal diagram for averaging in the serial arithmetic unit 25 according to Figure 2, Figure 4 shows a block diagram of a position measuring system according to the invention in conjunction with a control unit, Figure 5 shows a block diagram of a further embodiment of a serial arithmetic unit, Figure 6 shows a signal diagram for averaging in the serial arithmetic unit 125 according to Figure 5 and Figure 7 shows a signal diagram for averaging in the serial arithmetic unit 125 according to Figure 5 in case of exceeding the value range. DESCRIPTION OF THE EMBODIMENTS

[0013] Figure 1 shows a block diagram of a position measuring system 1 according to the invention in conjunction with a control unit 50. The position measuring system 1 comprises two position sensors 10.1, 10.2, and a position computer 20, wherein the position sensors 10.1, 10.2 are each connected to the position computer 20 via a data transmission channel 14.1, 14.2 for the purpose of communication.

[0014] The position sensors 10.1, 10.2 each have a device interface 12.1, 12.2, which are each connected via a data transmission channel 14.1, 14.2 to corresponding computer interfaces 22.1, 22.2 of the position computer 20. Thus, the first computer interface 22.1, the first data transmission channel 14.1, and the first device interface 12.1 form a first interface connection 15.1 between the position computer 20 and the first position sensor 10.1. Likewise, the second computer interface 22.2, the second data transmission channel 14.2, and the second device interface 12.2 form a second interface connection 15.2 between the position computer 20 and the second position sensor 10.2. The interface connections 15.1, 15.2 are advantageously designed identically.

[0015] The interface connections 15.1, 15.2 are each designed to transmit position request commands RA, RB from the position computer 20 to the associated position sensors 10.1, 10.2 and to transmit position values ​​A, B measured as a result of the arrival of a position request command from the position sensors 10.1, 10.2 to the position computer 20. The transmission of the position values ​​A, B via the respective interface connections 15.1, 15.2 takes place at the same transmission rate.

[0016] Depending on the design of the interface connections 15.1, 15.2, a position request command RA, RB can be represented by any signal or any signal sequence, for example by a defined signal edge, preferably at the beginning of a data transmission, or by a bit or a bit sequence as part of a serial data packet.

[0017] The measured position values ​​A, B are transmitted bit-serially in the form of binary-coded data words with a word length of n bits, where n is in practice greater than or equal to 12. The transmission of the position values ​​A, B begins with the least significant bit (LSB) and ends with the most significant bit (MSB).

[0018] Each of the position sensors 10.1, 10.2 is designed to perform a position measurement and to provide and output a position value A, B. Thus, a position sensor 10.1, 10.2 can be a rotary encoder, angle encoder, or linear encoder. A position sensor can also contain a plurality of position sensors, which determine the position values ​​A, B by scanning a common measuring scale.

[0019] The position computer 20 has a system interface 24, via which the position measuring system 1 can be connected to a control interface 52 of the control unit 50 via an external data transmission channel 51. The system interface 24 thus terminates the position measuring system 1; the external data transmission channel 2 and the control unit 50 are not included in the position measuring system 1. In the case that a control unit 50 is connected to the position measuring system 1, the system interface 24, the external data transmission channel 51, and the control interface 52 form an external interface connection 5.

[0020] The system interface 24 is configured to receive external position request commands XR, which are transmitted from the control unit 50 via the external interface connection 5 to the position computer 20. Furthermore, the system interface 24 is configured to output the averaged position value M generated in the position computer 20 as a result of the arrival of an external position request command to the control unit 50 via the external interface connection 5. The system interface 24 advantageously has the same data transmission rate as the device interfaces 12.1, 12.2.

[0021] Depending on the design of the external interface connection 5, an external position request command XR can be represented by any signal or any signal sequence, for example by a defined signal edge, preferably at the beginning of a data transmission, or by a bit or a bit sequence as part of a serial data packet.

[0022] The external position request command XR is forwarded directly to the device interfaces 12.1, 12.2 in the position computer 20. These are each configured to transmit position request commands RA, RB from the position computer 20 to the associated position sensors 10.1, 10.2 as a result of the arrival of an external position request command XR.

[0023] The generated averaged position values ​​M are transmitted bit-serially in the form of binary-coded data words. The transmission of the averaged position values ​​M begins with the least significant bit (LSB) and ends with the most significant bit (MSB).

[0024] According to the invention, the position computer 20 comprises a serial arithmetic unit 25. Position values ​​A, B received from the position sensors 10.1, 10.2 are fed to the serial arithmetic unit 25. The serial arithmetic unit 25 is configured to process the position values ​​A, B serially to form the averaged position value M and, in turn, to forward the averaged position value M serially to the system interface 24 for output to the control unit 50. In this way, both the calculation of the averaged position value M and its output begin at a time when the position values ​​A, B have not yet been completely received.

[0025] Figure 2 shows a block diagram of an embodiment of a serial arithmetic unit 25. It comprises an input stage 26, an adder 27 and an output stage 28.

[0026] The position values ​​A, B arriving from the position sensors 10.1, 10.2 are fed to the input stage 26. The input stage 26 is designed to synchronize the serially arriving position values ​​A, B in time and to output the resulting synchronized position values ​​AS, BS bit-synchronously to the adder 27. This is necessary if it cannot be guaranteed that the position values ​​A, B arrive at the position computer 20 at exactly the same time, i.e. one of the position values ​​A, B has a time delay compared to the other. The input stage 26 delays the first arriving position value A, B until the second of the position values ​​A, B arrives and outputs them, again serially, synchronously as synchronized position values ​​AS, BS to the adder 27. For the delay, the position values ​​A, B to be delayed can be buffered in first-in-first-out memory modules (FIFO).

[0027] The adder 27 adds the respective current bit of the synchronized position values ​​AS, BS taking into account a carry bit Z of the previous addition process and outputs the resulting bit as a result bit of a sum value S to the output stage 28, as well as an updated carry bit Z to a corresponding input of the adder 27.

[0028] The output stage 28 finally forms the averaged position value M of the serially arriving sum value S. The required division by 2 is simply performed by not outputting the first arriving bit of the sum value S, i.e., the LSB. Since it is not necessary for the sum value S to be completely present in the output stage 28 until the averaged position value M can be formed, the output of the averaged position value M can begin while the higher-order bits of the synchronized position values ​​AS, BS are being added.

[0029] The serial arithmetic unit 25 is advantageously designed as a digital state machine. A clock signal CLK required for this purpose can be supplied to the serial arithmetic unit 25 from outside. In a preferred embodiment, the serial arithmetic unit 25 comprises a clock generator 29, which provides the clock signal CLK to the input stage 26, the adder 27, and the output stage 28. Furthermore, the various interfaces (computer interface 22.1, 22.2, system interface 24) can also be supplied with the clock signal CLK, so that all process steps in the various components run synchronously with the clock signal CLK or a clock signal derived from the clock signal CLK.

[0030] Figure 3 shows a signal diagram for averaging in the serial arithmetic unit 25 according to Figure 2 .

[0031] At a time t0, an external position request command XR arrives at the system interface 24. This command is forwarded to the computer interfaces 12.1, 12.2, which then issue position request commands RA, RB to the computer interfaces 22.1, 22.2 at a time t1.

[0032] Starting at a time t2, the least significant bit A0 of the first position value A arrives at the input stage 26 of the serial arithmetic unit 25. This delays the output to the adder 27 until the least significant bit B0 of the second position value B arrives at a time t3.

[0033] Starting at a time t4, the simultaneous, synchronous output of the two synchronized position values ​​AS, BS to adder 27 begins. The output is bit-serial with increasing significance of the bits, starting with the least significant bit AS0 or BS0, up to the most significant bit AS(n-1) or BS(n-1). The letter n denotes the number of bits of the position values ​​A, B, or the synchronized position values ​​AS, BS (width of the respective data words). The adder 27 forms a sum value S by bit-serially adding the incoming bits of the position values ​​AS, BS, taking into account a carry bit Z, whereby the carry bit Z of the last arithmetic operation forms a most significant bit Sn. The sum value S is output bit-serially to output stage 28 starting at time t5.Since the required result is the averaged position value M of the position values ​​A, B, a division by the number of position values ​​A, B, i.e., 2, occurs in the output stage 28, simply by not outputting the least significant bit S0 of the sum value S. Thus, the averaged position value M is formed by bits S1 to Sn, which, starting at a time t6, are output bit-serially to the system interface 24 as bits M0 to M(n-1) of the averaged position value M. The word length of the averaged position value M thus corresponds to the word length of the original position values ​​A, B.

[0034] The averaged position value M is advantageously output via the system interface 24 within a data packet. In order to be able to output parts of the data packet that precede the averaged position value M as early as possible, it is advantageous if the serial arithmetic unit 25, in particular the input stage 26, sends a signal to the system interface 24 at a suitable time, for example at time t3, when both position values ​​A, B have arrived at the input stage, and thus announces the arrival of the averaged position value M. In this way, a start sequence (e.g. start bit) of the data packet can already be output before the least significant bit M0 of the averaged position value M arrives. In order to achieve a seamless transition from the start sequence to the averaged position value M, it is advantageous if, as already mentioned above, the system interface 24 also operates synchronously in the time grid of the clock signal CLK.

[0035] After outputting the averaged position value M, the system interface 24 may transmit further information if necessary and finally terminate the data packet with an end sequence.

[0036] It should also be noted at this point that in practice, the position values ​​A, B also usually arrive at the computer interfaces 22.1, 22.2 as part of a data packet. Within the scope of the present invention, only the processing of the position values ​​A, B will be discussed; the treatment of the remaining parts of the data packets, such as the start sequence, additional information, and end sequence, will not be further discussed.

[0037] The Figures 1 to 3The described embodiment is suitable for position measuring systems with a number of 2^x position sensors, where x is a positive integer. This ensures that the final division operation can be performed by not outputting a number of x least significant bits. This, in turn, enables the bit-serial output of the averaged position value M to begin with the least significant bit M0 (LSB) even before the addition of the position values ​​A and B is completed.

[0038] Figure 4 shows a block diagram of a further embodiment of a position measuring system 11 according to the invention in conjunction with a control unit 50. The position measuring system 11 is designed here as an angle measuring device and comprises four position sensors 100.1, 100.2, 100.3, 100.4, each of which scans a graduation track 132 arranged on a graduation carrier 130, as well as a position computer 120.

[0039] The embodiment described below is applicable to position measuring systems whose position sensors 100.1, 100.2, 100.3, 100.4 generate position values ​​A, B, C, D with a word length of n bits and a value range from 0 to (2^n)-1, where n is a positive integer. In practice, typical values ​​for the value range are obtained when n is greater than or equal to 12.

[0040] The graduation carrier 130 is designed as a circular disk that can be connected in a known manner to a shaft (not shown) in a rotationally fixed manner and rotates together with the shaft about its center of rotation 134. The graduation track 132 is arranged radially around the center of rotation 134 of the graduation carrier 130.

[0041] The position sensors 100.1, 100.2, 100.3, 100.4 are arranged at equal intervals around the circumference of the graduation carrier 130. Their angular distance from one another is therefore 90°. Each of the position sensors 100.1, 100.2, 100.3, 100.4 is designed to perform a position measurement and to provide and output a position value A, B, C, D. A position measurement is triggered by the arrival of a position request command RA, RB, RC, RD and is performed by scanning the graduation track 132 and processing the resulting scanning signals into a position value. For the present invention, it is advantageous if the position sensors 100.1, 100.2, 100.3, 100.4 are initialized such that they measure the same position value (angle value) in an ideal arrangement.

[0042] Each of the position sensors 100.1, 100.2, 100.3, 100.4 is connected to the position computer 120 via an interface connection 115.1, 115.2, 115.3, 115.4. The interface connections 115.1, 115.2, 115.3, 115.4 comprise, analogously to Figure 1 , one device interface 112.1, 112.2, 112.3, 112.4 on the side of the position sensors 100.1, 100.2, 100.3, 100.4, which is connected via a data transmission channel 114.1, 114.2, 114.3, 114.4 to a corresponding computer interface 122.1, 122.2, 122.3, 122.4 on the side of the position computer 120. In Figure 4 The device interface 112.1, the data transmission channel 114.1 and the computer interface 122.1 are thus summarized under the reference number 115.1, etc.

[0043] The interface connections 115.1, 115.2, 115.3, 115.4 are in turn suitably designed for transmitting position request commands RA, RB, RC, RD from the position computer 120 to the position sensors 100.1, 100.2, 100.3, 100.4 and for transmitting position values ​​A, B, C, D from the position sensors 100.1, 100.2, 100.3, 100.4 to the position computer 120. The position values ​​A, B, C, D are transmitted bit-serially in the form of binary-coded data words with the same word width. The transmission of the position values ​​A, B, C, D begins with the least significant bit (LSB) and ends with the most significant bit (MSB). It is carried out via the respective interface connections 115.1, 115.2, 115.3, 115.4 with the same transmission rate.

[0044] It is known from EP 2 551 645 A2 that deviations from the ideal arrangement can result in the position sensors 100.1, 100.2, 100.3, 100.4 measuring different position values, and that a corrected position value can be determined by averaging, which in turn corresponds to the position of an ideal arrangement. A serial arithmetic unit 125 is provided in the position computer 120 to calculate the mean value from the position values ​​received from the position sensors 100.1, 100.2, 100.3, 100.4.

[0045] Position values ​​A, B, C, D received from position sensors 100.1, 100.2, 100.3, 100.4 are fed to serial arithmetic unit 125. Serial arithmetic unit 125 is configured to serially process position values ​​A, B, C, D to form the averaged position value M and, in turn, to forward the averaged position value M serially to a system interface 124 for output to control unit 50. Thus, in this exemplary embodiment, both the calculation of the averaged position value M and its output begin at a time when the position values ​​A, B, C, D have not yet been completely received.

[0046] The position computer 120 can be connected to the control interface 52 of the control unit 50 via the system interface 124 and the external data transmission channel 51. The system interface 124 thus corresponds in its function to the corresponding system interface 24 of Figure 1. External position request commands XR are also forwarded directly to the computer interfaces 122.1, 122.2, 122.3, 122.4.

[0047] Figure 5 shows an embodiment of a serial arithmetic unit 125. It comprises an input stage 126, three serial adders 127.1, 127.2, 127.3 and an output stage 128.

[0048] Input stage 126 is suitably designed to synchronize the serially arriving position values ​​A, B, C, and D and output the resulting synchronized position values ​​AS, BS, CS, and DS bit-synchronously to adders 127.1 and 127.2. First-in-first-out (FIFO) memory chips can be used as buffers for this purpose.

[0049] The synchronized position values ​​AS, BS, CS, DS are added in a cascaded manner in two stages. In a first stage, two of the position values ​​are added in each of the adders 127.1, 127.2. In the example shown, a first synchronized position value AS and a second synchronized position value BS are added in adder 127.1 to form a first partial sum E, and a third synchronized position value CS and a fourth synchronized position value DS are added in adder 127.2 to form a second partial sum F. The partial sums E, F are fed to the third adder 127.3 and are added to the sum value S in this second stage. The division by four required to form the averaged position value M is performed in the output stage 128 by not outputting the two least significant bits of the sum value S.

[0050] Multi-stage, cascaded addition is particularly easy to implement because the required adders 127.1, 127.2, and 127.3 only require a computational width of two bits and are therefore very simple in design. This solution is therefore considered particularly advantageous. Alternatively, adders 127.1, 127.2, and 127.3 can also be replaced by a single adder designed to simultaneously add the current bits of the incoming synchronized position values ​​AS, BS, CS, and DS.

[0051] Because the value range of an angle encoder is inherently limited, a jump occurs in the course of the position values ​​A, B, C, and D after completing a full rotation. In other words, the angle encoder has a periodically repeating value range. This means that, depending on the direction of rotation, the position values ​​A, B, C, and D return from a maximum value in the value range to the starting value "0" or jump from the starting value "0" to the maximum value. Thus, there is a jump point in the value curve between the maximum value and the starting value "0". In non-ideal operating conditions, it can therefore occur that a position measurement takes place at a time at which the measured position value of at least one of the position sensors 100.1, 100.2, 100.3, and 100.4 lies before the jump point and the measured position value of at least one of the remaining position sensors 100.1, 100.2, 100.3, and 100.4 lies after the jump point.In such a case, the serial averaging described above leads to an incorrect result.

[0052] To achieve a correct result here, the input stage 126 is designed to monitor the position values ​​A, B, C, D supplied to it for a jump in the value progression and, if at least one of the position values ​​A, B, C, D lies before the jump point and at least one of the remaining position values ​​A, B, C, D lies after the jump point, to perform a virtual value range extension. In practice, this is achieved by extending the value range of the position values ​​A, B, C, D by one binary place, which is assigned a logical "0" for position values ​​that lie before the jump point (near the maximum value of the value range) and a logical "1" for position values ​​that lie after the jump point (near the start value "0"). This increases the word width of the synchronized position values ​​AS, BS, or CS, DS, which are sent to the adders 127.1, 127.2 of the first stage are output to a binary digit.

[0053] The additional binary digits of the sum value S resulting from the virtual value range extension are discarded in the output stage 128. This is achieved quite simply by outputting only n binary digits of the sum value S (corresponding to the word width of the position values ​​A, B, C, D) to the system interface 124 as the averaged position value M after division by four.

[0054] The principle of virtual value range extension is applicable not only to angle encoders, but to all position measuring systems that have periodically repeating value ranges and thus exhibit a jump point. This applies, for example, to linear encoders with scales where the coding repeats periodically.

[0055] The serial arithmetic unit 125 is also advantageously designed as a digital state machine. A clock signal CLK required for this purpose can be supplied to the serial arithmetic unit 125 from outside. In a preferred embodiment, the serial arithmetic unit 125 comprises a clock generator 29, which provides the clock signal CLK to the input stage 126, the adders 127.1, 127.2, 127.3, and the output stage 128. Furthermore, the various interfaces (computer interface 122.1, 122.2, 122.3, 122.4, system interface 124) can also be supplied with the clock signal CLK, so that all process steps in the various components run synchronously with the clock signal CLK or a clock signal derived from the clock signal CLK.

[0056] Figure 6 shows a signal diagram to illustrate the processes in the serial arithmetic unit 125 according to Figure 5, where it is assumed that no jump occurs in the value progression, or the case that at least one of the position values ​​lies before and at least one of the position values ​​lies after a jump point cannot occur.

[0057] At a time t0, an external position request command XR arrives at the sequence controller 129, which then outputs position request commands RA, RB, RC, RD to the position sensors 100.1, 100.2, 100.3, 100.4 at a time t1 via the interface connections 115.1, 115.2, 115.3, 115.4.

[0058] Starting at a time t2, the least significant bit A0 of the first position value A arrives at the input stage 126 of the serial arithmetic unit 125. This delays the output to the adders 127.1, 127.2 of the first stage until the least significant bit C0 of the third and, in this example, last position value C arrives at a time t3.

[0059] Subsequently, at a time t4, the synchronous output of the synchronized position values ​​AS, BS to adder 127.1 and the synchronized position values ​​CS, DS to adder 127.2 begins. Adders 127.1, 127.2 perform a bit-serial addition and output the partial sums E and F, respectively, in bit-serial form to adder 127.3 of the second stage starting at a time t5.

[0060] The adder 127.3 in turn performs a bit-serial addition of the partial sums E, F and outputs the result as sum value S to the output stage 128 from time t6.

[0061] The output stage 128 now calculates the mean value M of the position values ​​A, B, C, and D by not outputting the two least significant bits S0 and S1, corresponding to a division by four. Thus, the output of the averaged position value M starts with bit S2 of the sum value S, which thereby becomes the least significant bit M0 of the averaged position value M. The output ends with the output of the most significant bit S(n+1) of the sum value S as the most significant bit M(n-1) of the averaged position value M, which thus again has a word length of n bits.

[0062] In this exemplary embodiment, the averaged position value M is also advantageously output via the system interface 124 within a data packet. In order to be able to output parts of the data packet that precede the averaged position value M as early as possible, it is advantageous if the serial arithmetic unit 125, in particular the input stage 126, sends a signal to the system interface 124 at a suitable time, for example at time t3, when all position values ​​A, B, C, D have arrived at the input stage 126, and thus announces the arrival of the averaged position value M. In this way, a start sequence (e.g., start bit) of the data packet can possibly already be output before the least significant bit M0 of the averaged position value M arrives.In order to achieve a seamless transition from the start sequence to the averaged position value M, it is advantageous if, as already mentioned above, the system interface 124 also operates synchronously with the time grid of the clock signal CLK.

[0063] After outputting the averaged position value M, the system interface 124 may transmit further information if necessary and finally terminate the data packet with an end sequence.

[0064] It should also be noted at this point that in practice, the position values ​​A, B, C, and D also usually arrive at the computer interfaces 122.1, 122.2, 122.3, and 122.4 as part of a data packet. Within the scope of the present invention, only the processing of the position values ​​A, B, C, and D will be discussed; the treatment of the remaining parts of the data packets, such as the start sequence, additional information, and end sequence, will not be further discussed.

[0065] Figure 7shows a signal diagram to illustrate the processes in the serial arithmetic unit 125 according to Figure 5 in the case of a value range violation, where at least one of the position values ​​A, B, C, D lies before the jump point and at least one of the remaining position values ​​A, B, C, D lies after the jump point. In this example, the position value B lies before or after the jump point (near the start value of the value range) and the remaining position values ​​A, C, D lie before the jump point (near the maximum value of the value range).

[0066] It should be explicitly noted that the expression "near the starting value" includes the starting value "0" and the expression "near the maximum value" includes the maximum value of the value range.

[0067] If the input stage 126 now detects that the value range has been exceeded, it adds a binary position to the synchronized position values ​​AS, BS, CS, DS after outputting the most significant bits AS(n-1), BS(n-1), CS(n-1), DS(n-1) and assigns this to a logical "1" for the synchronized position value BS and a logical "0" for the remaining synchronized position values ​​AS, CS, DS.

[0068] This has the effect of a virtual range extension. It results in both the partial sums E and F having an additional binary digit E(n+1), F(n+1), and the sum value S having an additional bit S(n+2).

[0069] When forming and outputting the mean value M, these additional binary digits are ignored; even in the case of a value range being exceeded and the resulting virtual value range extension, only one data word with n bits width is output, the most significant bit of which is the bit S(n+1) of the sum value S.

[0070] The Figures 4 to 7 The embodiment described is suitable for position measuring systems with a number of 2^x position sensors, where x is a positive integer, and where value range violations occur, as described above. If the circuit for the addition in the serial arithmetic unit, as in Figure 5 If the circuit is implemented as shown in the figure, it is multi-stage (cascaded), then x stages are required. In this case, it can only comprise adders with a two-bit calculation width.

[0071] This embodiment also ensures that the final division operation can be performed by not outputting a number of x least significant bits. This, in turn, allows the bit-serial output of the averaged position value M to begin with the least significant bit M0 (LSB) even before the complete addition of the synchronized position values ​​AS, BS, CS, DS is completed.

[0072] The present invention is not limited to the described embodiments, but can be carried out alternatively by a person skilled in the art within the scope of the claims.

Claims

1. Position measurement system comprising a number of 2^χ position sensors (10.1, 10.2, 100.1, 100.2, 100.3, 100.4), where x is a positive integer, and a position computer (20, 120), wherein the position computer (20, 120) comprises a system interface (24, 124), a serial arithmetic unit (25, 125) and a computer interface (22.1, 22.2, 122.1, 122.2, 122.3, 122.4) for each position sensor (10.1, 10.2, 100.1, 100.2, 100.3, 100.4), wherein • the computer interfaces (22.1, 22.2, 122.1, 122.2, 122.3, 122.4) are connected, via data transmission channels (14.1, 14.2, 114.1, 114.2, 114.3, 114.4), to corresponding device interfaces (12.1, 12.2, 112.1, 112.2, 112.3, 112.4) of the position sensors (10.1, 10.2, 100.1, 100.2, 100.3, 100.4) for the purpose of transmitting data, • the system interface (24, 124) can be connected to a control device (50) via an external data transmission channel (51) and is configured to forward external position request commands (XR), which arrive from the control device (50), to the computer interfaces (22.1, 22.2, 122.1, 122.2, 122.3, 122.4) and to serially output averaged position values (M) to the control device (50), • the computer interfaces (22.1, 22.2, 122.1, 122.2, 122.3, 122.4) are configured, as a result of an external position request command (XR) arriving, to in turn send position request commands (RA, RB, RC, RD) to the position sensors (10.1, 10.2, 100.1, 100.2, 100.3, 100.4), • the position sensors (10.1, 10.2, 100.1, 100.2, 100.3, 100.4) are configured, as a result of a position request command (RA, RB, RC, RD) arriving, to generate a position value (A, B, C, D) with a word length of n bits and to serially output it to the position computer (20, 120) via the device interface (12.1, 12.2, 112.1, 112.2, 112.3, 112.4), • the computer interfaces (22.1, 22.2, 122.1, 122.2, 122.3, 122.4) are further configured to receive the position value (A, B, C, D) and to serially output it to the serial arithmetic unit (25, 125), and • the serial arithmetic unit (25, 125) is configured to serially calculate the averaged position value (M) from the position values (A, B, C, D) and to serially output it to the system interface (24, 124) for output to the control device (50).

2. Position measurement system according to Claim 1, wherein the serial arithmetic unit (25, 125) comprises an input stage (26, 126), at least one adder (27, 127.1, 127.2, 127.3) and an output stage (28, 128), wherein • the input stage (26, 126) is suitably configured to temporally synchronize position values (A, B, C, D) arriving from the computer interfaces (22.1, 22.2, 122.1, 122.2, 122.3, 122.4) and to serially output them as synchronized position values (AS, BS, CS, DS) to the at least one adder (27, 127.1, 127.2, 127.3), • the at least one adder (27, 127.1, 127.2, 127.3) is suitably configured to add the synchronized position values (AS, BS, CS, DS) bit-serially and to serially output a sum value (S) to the output stage (28, 128), and • the output stage (28, 128) is suitably configured to divide the sum value (S) by the number of position values and to serially output the result as an averaged position value (M) with a word length of n bits to the system interface (24, 124).

3. Position measurement system according to one of the preceding claims, wherein the position values (A, B, C, D) of the position measurement system have a word length of n bits and a periodically repeating value range of 0 to 2^(n-1), and the input stage (26, 126) is configured, in the event of at least one of the position values (A, B, C, D) supplied to it lying in front of a discontinuity in the value curve and at least one of the remaining position values (A, B, C, D) lying behind a discontinuity in the value curve, to carry out a virtual value range extension by a binary digit and to assign a logic "0" to this in the case of position values (A, B, C, D) lying in front of the discontinuity in the value curve and to assign a logic "1" to this in the case of position values (A, B, C, D) lying behind the discontinuity in the value curve.

4. Position measurement system according to Claim 2 or 3, wherein the circuit for the bit-serial addition in the serial arithmetic unit (25, 125) has x stages and comprises exclusively adders (27, 127.1, 127.2, 127.3) with a computing width of two bits.

5. Position measurement system according to one of Claims 2 to 4, wherein the serial arithmetic unit (25, 125) further comprises a clock generator (29, 129) which supplies the input stage (26, 126) and / or the at least one adder (27, 127.1, 127.2, 127.3) and / or the output stage (28, 128) with a clock signal (CLK).

6. Method for averaging position values in a position measurement system comprising a number of 2^χ position sensors (10.1, 10.2, 100.1, 100.2, 100.3, 100.4), where x is a positive integer, and a position computer (20, 120), wherein the position computer (20, 120) comprises a system interface (24, 124), a serial arithmetic unit (25, 125) and a computer interface (22.1, 22.2, 122.1, 122.2, 122.3, 122.4) for each position sensor (10.1, 10.2, 100.1, 100.2, 100.3, 100.4), wherein • the computer interfaces (22.1, 22.2, 122.1, 122.2, 122.3, 122.4) are connected, via data transmission channels (14.1, 14.2, 114.1, 114.2, 114.3, 114.4), to corresponding device interfaces (12.1, 12.2, 112.1, 112.2, 112.3, 112.4) of the position sensors (10.1, 10.2, 100.1, 100.2, 100.3, 100.4) for the purpose of transmitting data, • the system interface (24, 124) is connected to a control device (50) via an external data transmission channel (51), and the system interface (24, 124) forwards external position request commands (XR), which arrive from the control device (50), to the computer interfaces (22.1, 22.2, 122.1, 122.2, 122.3, 122.4) and serially outputs averaged position values (M) to the control device (50), • as a result of an external position request command (XR) arriving, the computer interfaces (22.1, 22.2, 122.1, 122.2, 122.3, 122.4) in turn send position request commands (RA, RB, RC, RD), to the position sensors (10.1, 10.2, 100.1, 100.2, 100.3, 100.4), • as a result of a position request command (RA, RB, RC, RD) arriving, a position value (A, B, C, D) with a word length of n bits is generated in each case in the position sensors (10.1, 10.2, 100.1, 100.2, 100.3, 100.4) and is serially output to the position computer (20, 120) via the device interface (12.1, 12.2, 112.1, 112.2, 112.3, 112.4), • the computer interfaces (22.1, 22.2, 122.1, 122.2, 122.3, 122.4)receive the respective position value (A, B, C, D) and serially output it to the serial arithmetic unit (25, 125), and • the averaged position value (M) is serially calculated from the position values (A, B, C, D) in the serial arithmetic unit (25, 125) and is serially output to the system interface (24, 124) for output to the control device (50).

7. Method according to Claim 6, wherein the serial arithmetic unit (25, 125) comprises an input stage (26, 126), at least one adder (27, 127.1, 127.2, 127.3) and an output stage (28, 128), wherein • the input stage (26, 126) temporally synchronizes position values (A, B, C, D) arriving from the computer interfaces (22.1, 22.2, 122.1, 122.2, 122.3, 122.4) and serially outputs them as synchronized position values (AS, BS, CS, DS) to the at least one adder (27, 127.1, 127.2, 127.3), • the at least one adder (27, 127.1, 127.2, 127.3) bit-serially adds the synchronized position values (AS, BS, CS, DS) and serially outputs a sum value (S) to the output stage (28, 128), and • the output stage (28, 128) divides the sum value (S) by the number of position values and serially outputs the result as an averaged position value (M) with a word length of n bits to the system interface (24, 124).

8. Method according to Claim 7, wherein the position values (A, B, C, D) of the position measurement system have a word length of n bits and a periodically repeating value range of 0 to 2^(n-1), and the input stage (26, 126), in the event of at least one of the position values (A, B, C, D) supplied to it lying in front of a discontinuity in the value curve and at least one of the remaining position values (A, B, C, D) lying behind a discontinuity in the value curve, carries out a virtual value range extension by a binary digit and assigns a logic "0" to this in the case of position values (A, B, C, D) lying in front of the discontinuity in the value curve and assigns a logic "1" to this in the case of position values (A, B, C, D) lying behind the discontinuity in the value curve.

9. Method according to either of Claims 7 and 8, wherein the serial arithmetic unit (25, 125) further comprises a clock generator (29, 129) which supplies the input stage (26, 126) and / or the at least one adder (27, 127.1, 127.2, 127.3) and / or the output stage (28, 128) with a clock signal (CLK).