METHOD FOR PRODUCING A TEXTURED ALUMINUM NITRIDE LAYER

Abstract

A method for manufacturing a textured AIN thin film (30) comprising the following successive steps: a) supplying a substrate (10) having an amorphous surface, b) forming a polycrystalline nucleation layer (20) of MS2 with M=Mo, W or one of their alloys, on the amorphous surface of the substrate (10), the polycrystalline nucleation layer (20) being composed of crystalline domains whose base planes (002) are parallel to the amorphous surface of the substrate (10), the crystalline domains being randomly oriented in a plane (a, b) formed by the amorphous surface of the substrate (10), c) deposition of aluminum nitride on the nucleation layer (20), leading to the formation of a textured AIN thin film (30)

Description

TECHNICAL FIELD

[0001] The present invention relates to the general field of textured AIN thin films.

[0002] The invention relates to a method for manufacturing such a layer.

[0003] The invention also relates to a stacking that can be obtained by the process.

[0004] The invention is particularly interesting because it allows the manufacture of a highly textured AIN layer without the need to use a monocrystalline substrate.

[0005] The invention has applications in many industrial fields, particularly in the fields of microelectronics and electronics. PREVIOUS STATE OF THE ART

[0006] Materials based on nitrides from group 13 of the periodic table (notably NiTin, GaN, InN, and their ternary compounds) exhibit particularly interesting properties (especially good piezoelectric properties). In recent years, they have been the subject of much research and are finding applications in various fields such as power electronics, radio frequency (RF) devices, and light-emitting diodes.

[0007] In the field of RF devices, a piezoelectric thin film of aluminum nitride (AIN) is used to convert acoustic waves into an electrical signal. To achieve high performance, this AIN layer must be crystallized in its wurtzite form (hexagonal lattice), oriented (002), and highly textured (i.e., composed of crystals precisely oriented in the same direction). It must therefore be deposited at high temperature using epitaxial substrates such as single-crystal sapphire (α-Al₂O₃) or hexagonal silicon carbide (6H-SiC).

[0008] However, the implementation of such processes and / or the use of such substrates poses compatibility problems with current processes and standards of the silicon industry.

[0009] Furthermore, the use of single-crystal substrates leads to complicated and costly integration steps, which may require a lift-off step and transfer of the AIN thin film, or even a step of etching the single-crystal substrate followed by the integration of the electrodes from the back side.

[0010] Another method involves directly depositing the thin layer of AIN onto an electrode that can induce a preferential orientation of the AIN crystals in the 002 plane. Such electrodes can be made, for example, of (110)-oriented polycrystalline molybdenum or (111)-oriented platinum.

[0011] However, the size and orientation of the crystals must be carefully controlled to ensure reproducibility, and the texture of the thin films obtained on these polycrystalline electrodes is not as good as that obtained on single-crystal sapphire or SiC substrates. Furthermore, the texture of the AIN thin film near the electrode is degraded, and it is necessary to form a thick AIN layer (typically greater than 500 nm) to obtain a satisfactory texture for RF applications. Yet, some applications, such as 5G, require higher frequencies, necessitating a reduction in the thickness of the AIN layers.

[0012] Recently, attention has turned to 2D materials, such as graphene, hexagonal boron nitride (h-BN), and transition metal dichalcogenides (TMDs), as nucleation layers for nitride growth. In particular, TMDs such as MoS₂ or WS₂ are especially promising materials for GaN and AIN growth since they exhibit a lattice parameter close to that of these materials (1–3%).

[0013] However, it is accepted that, in order to form highly crystalline GaN or AIN on transition metal dichalcogenides, the nucleation layer of MoS2 or WS2 must also be highly crystalline.

[0014] For example, in the article by Gupta et al. ("Layered transition metal dichalcogenides: promising nearlattice-matched substrates for GaN growth", Scientific Reports | 6:23708 | DOI: 10.1038 / srep23708), the nucleation layer is obtained by micromechanical exfoliation from single crystals of WS 2 or MoS 2 followed by a step of transferring the exfoliated layer onto the growth substrate.

[0015] In the article by Hsu et al. ("Monolayer MoS2 Enabled Single-Crystalline Growth of AIN on Si(100) Using Low-Temperature Helicon Sputtering", ACS Appl. Nano Mater. 2019, 2, 1964-1969), the MoS2 layer is first grown on sapphire by CVD, and then transferred to a silicon substrate via poly(methyl methacrylate) (PMMA). It is reported that, after transfer, the highly oriented hexagonal lattice of the MoS2 layer is preserved, which is essential for the subsequent growth of the nitride film.

[0016] In Ohunchi's document ("Fabrication of self-supporting AIN Film Substrates by Van Der Waals Lift-Off," Final Report to Air Force Office of Scientific Research, 1998), the WS 2 layer is fabricated by metal-organic vapor deposition (MOCVD) using precursors on a single-crystal silicon substrate. Just before the WS 2 layer is deposited, the substrate is etched with hydrofluoric acid to remove the native oxide layer and allow the epitaxial growth of WS 2 on the silicon (this strategy also limits the thermal budget applicable to the process due to the formation of tungsten silicide above 500°C).

[0017] However, such processes cannot be directly used in a device integration process without going through costly steps of transferring or integrating electrodes from the back side of the substrate, or are even incompatible with large-scale production. DESCRIPTION OF THE INVENTION

[0018] One of the aims of the present invention is to remedy the disadvantages of the prior art and, in particular, to propose a method for manufacturing a thin layer of textured AIN, of good quality, even for small thicknesses, the method being simple to implement and inexpensive.

[0019] To this end, the present invention proposes a method for manufacturing a thin layer of textured AIN comprising the following successive steps: a) provision of a substrate having an amorphous surface, b) formation of a polycrystalline nucleation layer of MS 2 with M=Mo, W or one of their alloys, on the amorphous surface of the substrate, the polycrystalline nucleation layer being made up of crystalline domains of MS 2 whose base planes (002) are parallel to the amorphous surface of the substrate, the crystalline domains being randomly oriented in a plane (a, b) formed by the amorphous surface of the substrate, c) deposition of aluminium nitride on the nucleation layer of MS 2, leading to the formation of a thin layer of textured AIN.

[0020] By random, we mean that the crystalline domains are not oriented in the same way in the (a, b) plane. The crystalline domains do not exhibit a preferred orientation.

[0021] The AIN layer thus obtained exhibits a wurtzite-type hexagonal structure and grows along the crystallographic orientation of the nucleation layer to form AIN crystals whose 002 planes are rigorously parallel to those of the nucleation layer.

[0022] Textured (or crystallographically oriented) means that the thin layer of AIN is formed of a multitude of crystals, all oriented in the same direction, at least at the scale of the active area for the intended device, and possibly over the entire surface of the substrate.

[0023] Texture is typically assessed by X-ray diffraction using a rocking curve measurement obtained by varying the angular position omega around the Bragg position of the 002 plane of the AIN. The full width at half maximum (FWHM) of the resulting peak allows for the quantification of the AIN layer's texture.

[0024] The lower the value of this full width at half maximum, the narrower the grain orientation distribution and the more the crystalline quality is improved: the film is said to be textured.

[0025] Highly textured means that the full width at half maximum of the rocking curve of the 002 plane of the AIN is less than 2°, preferably less than 1° and even more preferably less than 0.5° for layers with a thickness greater than 50 nm.

[0026] The invention is fundamentally distinguished from the prior art by the growth of the aluminum nitride layer on a nanocrystalline MS 2 layer whose crystalline domains are randomly oriented in the plane (a, b) formed by the surface of the substrate.

[0027] Against all expectations, the presence of this nanocrystalline nucleation layer, randomly oriented in the (a, b) plane formed by the surface of the substrate, allows the growth of an AIN layer with better texture than that obtained on molybdenum 110 electrodes, and as well textured as that obtained on ideally formed micrometric MoS2 crystals on single-crystal sapphire, all oriented in the same direction.

[0028] Counterintuitively, it therefore seems that the size of the crystalline domains constituting the MS 2 layer does not play an essential role in the texture of the AIN film, and consequently that AIN nucleation does not take place at the grain boundaries of the MS 2 layer, the random nature of the configuration of the grain boundaries not allowing a priori to induce a preferential orientation of the AIN crystals necessary to obtain a textured AIN film.

[0029] Moreover, such an MS 2 layer can be directly formed on an amorphous substrate and serve both as a nucleation layer for AIN and as a barrier to etching, thus offering more possibilities in the integration strategy.

[0030] Advantageously, the M alloy of the MS 2 nucleation layer contains up to 50 atomic percent of one or more additional elements selected from the transition metals. The additional element(s) are added in sufficiently small quantities so as not to critically impact the lattice parameter of the MS 2 nucleation layer. By critically, we mean, here and thereafter, that the crystal lattice parameter will not vary by more than 0.05 nm along the a and b axes so as not to alter the lattice parameter of the layer.

[0031] Advantageously, the nucleation layer of MS 2 has a thickness ranging from 0.6 nm to 50 nm, and preferably from 0.6 nm to 8 nm.

[0032] According to a first advantageous embodiment, step b) is carried out at a temperature allowing the formation of a polycrystalline nucleation layer of MS 2 in a single step.

[0033] According to a second advantageous embodiment, step b) is carried out in the following steps: deposition of a layer of MS x with x greater than or equal to 2, annealing of the layer of MS x under an inert atmosphere at a temperature ranging from 450°C to 1200°C and preferably from 750°C to 950°C, so as to form a polycrystalline layer of MS 2.

[0034] According to a third advantageous embodiment, step b), to form a layer of MS 2, is carried out according to the following successive steps: deposition of a thin layer containing the metal or alloy M in elemental (pure) form, or associated with one or more heteroatoms (for example in the form of an oxide, a nitride, a selenide or an oxysulfide), reactive thermal annealing in the presence of a volatile compound containing sulfur at a temperature ranging from 150°C to 1200°C and preferably from 350°C to 750°C, optionally annealing under an inert atmosphere at a temperature ranging from 450°C to 1200°C and preferably from 750°C to 950°C, so as to form a polycrystalline nucleation layer of MS 2.

[0035] According to these three advantageous embodiment variants, the thin films of MS 2, of MS x or that containing the metal or alloy M can be deposited, preferably, by chemical vapor deposition (“Chemical Vapor Deposition” or CVD), by atomic layer deposition (“Atomic Layer Deposition” or ALD), by physical vapor deposition (PVD for “Physical Vapor Deposition”) or by RF sputtering (“RF sputtering”).

[0036] Advantageously, the polycrystalline nucleation layer of MS 2 contains a dopant element such as nitrogen, phosphorus, arsenic, or antimony. The dopant element is added in proportions that do not induce an alteration of the lattice parameters of the MS 2 compound greater than ±0.05 nm along the a and b axes.

[0037] Advantageously, step c) of depositing the textured AIN thin film is carried out by physical vapor deposition or sputtering.

[0038] Advantageously, the textured AIN thin film has a thickness ranging from 1 nm to 1 µm.

[0039] Advantageously, the textured AIN thin film contains dopant elements such as chromium, molybdenum, tungsten, scandium, yttrium, or a lanthanide element. The dopant elements are introduced in proportions that do not induce an alteration of the AIN lattice parameters greater than ±0.05 nm along the a and b axes.

[0040] Advantageously, the amorphous surface of the substrate is slightly rough. By slightly, we mean a roughness of less than 5 nm, preferably less than 1 nm, and even more preferably less than 0.3 nm.

[0041] According to a particular embodiment, steps b) and c) can be repeated cyclically so as to obtain a stack comprising an alternation of MS 2 nucleation layers and textured AIN thin layers.

[0042] According to a first embodiment, the process includes an additional step, subsequent to step c), in which a stack comprising the MS 2 polycrystalline nucleation layer and the textured AIN thin layer is removed from the substrate. This step can be carried out, for example, by separating the stack from the substrate by mechanical lift-off using a transfer layer.

[0043] According to another embodiment, the process includes an additional step, subsequent to step c), in which the textured AIN thin layer is separated from the substrate and the MS 2 nucleation layer.

[0044] These two embodiment variants can be achieved by cleavage either at the substrate / nucleation layer interface or at the nucleation layer / thin textured AIN layer interface if the nucleation layer adheres well to the substrate.

[0045] The process offers numerous advantages:be simple to implement, not require the use of single-crystal substrates, allow the formation of highly textured columnar AIN on amorphous substrate, any type of substrate that can easily be made amorphous on the surface or covered with a thin layer of an amorphous material, allow texturing of the AIN from the first nanometers deposited and therefore the obtaining of highly textured AIN layers with small thicknesses (typically having a thickness of less than 100 nm, or even less than 50 nm), be able to work with extremely thin MS 2 nucleation layers that will have very little impact on the operation of the final device, be based on the use of a nucleation layer stable in air and humidity for several months, and requiring no surface treatment before the growth of the AIN layer.Therefore, it is not necessary to perform the deposition of the nucleation layer and the AIN layer consecutively under vacuum.

[0046] The invention also relates to a stack that can be obtained by the process as defined above, comprising, and preferably consisting successively of: a textured AIN thin layer, a polycrystalline nucleation layer of MS 2 with M=Mo, W or one of their alloys, the polycrystalline nucleation layer being made up of crystalline domains whose (002) basis planes are parallel to the stacking, the orientation of the crystalline domains in a plane (a, b) formed by the stacking being random, optionally, a substrate having an amorphous surface, the polycrystalline nucleation layer of MS 2 being disposed between the substrate and the textured AIN thin layer.

[0047] The textured AIN thin layer is in direct contact with the MS 2 nucleation layer. In other words, there is no intermediate layer between the two layers.

[0048] The characteristics related to the process are also found in the stack formed at the end of the process.

[0049] The invention also relates to a microelectronic device, for example a radio frequency (RF) device, an LED, a power device or a piezoelectric membrane, for example a piezoelectric acoustic membrane, comprising a stack as defined above.

[0050] The invention also relates to a microelectronic device, for example a radio frequency (RF) device, an LED, a power device or a piezoelectric membrane comprising a thin layer of textured AIN.

[0051] Other features and advantages of the invention will become apparent from the supplementary description that follows.

[0052] It goes without saying that this additional description is given only as an illustration of the object of the invention and should in no way be interpreted as a limitation of this object. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] The present invention will be better understood upon reading the description of exemplary embodiments given by way of illustration only and in no way limiting, with reference to the attached drawings in which: THE Figures 1A, 1B And 1C schematically represent different stages of various manufacturing processes for a textured NAIN thin film according to different specific embodiments of the invention. figure 2 schematically represents, in cross-section, a stack formed of a polycrystalline nucleation layer of MS 2 and a thin layer of textured AIN, according to a particular embodiment of the invention. figure 3is a in-plane view obtained by transmission electron microscopy (TEM) of a 0.6 nm thick MoS₂ thin layer (a monolayer), obtained according to a particular embodiment of the process according to the invention, and transferred onto a TEM grid. The insert is an image obtained by electron diffraction with a map of the orientation of the crystalline domains. Figures 4A and 4B These are images obtained by transmission electron microscopy of a cross-section of a stack comprising an amorphous SiO2 substrate, a 2 nm thick polycrystalline MoS2 nucleation layer, and a 100 nm thick AIN layer, at different magnification factors. figure 4C schematically represents the stacking, obtained according to a particular embodiment of the invention, observed on the Figures 4A and 4B . There figure 5is a graph representing the rocking curves of the 002 plane of AIN, for a 100 nm thick AIN thin film deposited on a 2 nm thick MoS2 nucleation layer according to a particular embodiment of the process of the invention (denoted S1a), and for a 100 nm thick AIN thin film deposited on a reference sample comprising a 110-oriented molybdenum textured electrode (denoted Ref1). The figure 6 is a graph representing the evolution of the full width at half maximum (FWHM) of the rocking curve of the 002 plane of AIN measured by X-ray diffraction for AIN samples of different thicknesses (5 nm to 100 nm) obtained on a MoS2 nucleation layer according to a particular embodiment of the process of the invention.

[0054] To allow for better readability, the different parts represented in the figures are not necessarily at the same scale. DETAILED DESCRIPTION OF SPECIFIC IMPLEMENTATION METHODS

[0055] We refer first to Figures 1A, 1B , And 1C .

[0056] The manufacturing process for a textured AIN layer includes at least the following successive steps: a) provision of a substrate 10 having an amorphous surface, b) formation of a polycrystalline nucleation layer 20 of MS 2 with M=Mo, W or one of their alloys, on the amorphous surface of the substrate 10, the polycrystalline nucleation layer 20 comprising crystalline domains whose base planes (002) are parallel to the surface of the substrate 10, the crystalline domains being randomly oriented in the plane (a, b) formed by the amorphous surface of the substrate 10, c) deposition of AIN on the nucleation layer 20, allowing the obtaining of a textured AIN layer 30.

[0057] Preferably, substrate 10 meets one or more of the following criteria, taken alone or in combination: be amorphous, at least on the surface, be thermally stable up to the highest temperature of the process, without alteration of its surface roughness, be planar, be slightly rough, with an average roughness (Rq) advantageously less than 5nm, preferably less than 1 nm, and even more preferably less than 0.3 nm, have barrier properties against the diffusion of the elements constituting the nucleation layer 20 up to the highest temperature used during the different stages of the process.

[0058] According to a first embodiment, the substrate 10 is an amorphous material ( Figures 1A and 1B ).

[0059] According to a second embodiment, the substrate 10 comprises a support 11 which can be a polycrystalline material covered by a thin amorphous layer 12 ( figure 1C).

[0060] This is the case, for example, when the support 11 is a crystalline material that oxidizes spontaneously in air, and on the surface of which an oxide layer forms naturally.

[0061] For example, for an 11-AIN support, a surface layer of amorphous Al₂O₃ forms spontaneously under air. In the case of silicon, a layer of amorphous SiO₂ forms spontaneously.

[0062] For illustrative purposes, a silicon wafer or plate containing a thin surface layer 12 of SiO2 could be chosen as a substrate 10.

[0063] Alternatively, it is possible to deposit a thin amorphous layer 12 onto the support 11, preferably an oxide or nitride layer that remains amorphous at high temperature, such as SiO2, Al2O3 or SiNx. This embodiment is advantageous when the support 11 does not spontaneously oxidize under an oxidizing atmosphere (such as air) and / or when the support 11 does not exhibit satisfactory barrier properties against the diffusion of the elements constituting the nucleation layer 20. Such an amorphous layer can, for example, be deposited by PVD, CVD, or ALD, with or without plasma assistance, or formed by reactive thermal annealing of the substrate (i.e., under an oxidizing or nitriding atmosphere).

[0064] Alternatively, the surface of the polycrystalline support 11 can be made amorphous by plasma treatment.

[0065] If the substrate 10 is not thermally stable up to the highest temperature of the process (for example, if the substrate is likely to crystallize at high temperature or is already polycrystalline but presents a risk of change in the density and / or morphology of at least part of the crystalline domains of which it is made up during the process), a thermal annealing step can be applied to stabilize the substrate 10. Preferably, the temperature chosen will ideally be higher than the highest temperature used in the following steps of the process.

[0066] If the surface of the substrate 10 has too high a roughness, this can be reduced by polishing, for example chemical mechano-polishing (CMP).

[0067] Substrate 10 can be etched locally.

[0068] During step b), a thin nucleation layer 20 is formed. The nucleation layer 20 can also be called the seeding layer, germination layer or texturing layer.

[0069] The nucleation layer 20 is based on one or more transition metal dichalcogenides (also known by the acronym TMD or TMDC for "transition metal dichalcogenide") or on one of their alloys.

[0070] Preferably, the nucleation layer 20 has the general formula: MS x with M being tungsten, molybdenum, or one of their alloys, x ranging from 1.4 to 2.2 and, preferably, from 1.8 to 2.1 and, even more preferably, x being equal to 2.

[0071] It should be noted that these variations in x do not call into question the crystallographic nature of the MS 2 nucleation layer, and may simply be related to localized structural defects, the composition of the edges of crystal domains or grain boundaries, or the way in which the nucleation layer is linked with the surface of the substrate.

[0072] Even more preferentially, the nucleation layer 20 is in MoS x or in WS x .

[0073] The alloy may include, for example, up to 50 atomic percent of one or more additional elements. The additional element(s) will be chosen so that the lattice parameter is not critically altered along the a and b axes. These additional elements may include, but are not limited to, transition metals (such as those in columns 4, 5, and 6 of the periodic table), such as vanadium, niobium, tantalum, titanium, or chromium. For example, M could be a molybdenum-tungsten alloy that may contain inclusions of metals such as vanadium or niobium.

[0074] Impurities may also be present in the nucleation layer 20. These impurities can originate, for example, from the diffusion of metals or heteroatoms from the substrate 10. Impurities are particularly prevalent deep within the nucleation layer, notably at the interface between the substrate 10 and the nucleation layer 20. For example, a 2 nm MoS₂ layer formed on amorphous SiNₓ can be nitrided at the SiNₓ / MoS₂ interface. The surface of the nucleation layer 20, on which the AIN 30 layer will grow, remains unaffected.

[0075] Dopants such as nitrogen, phosphorus, arsenic or antimony can be introduced by implantation or reactive annealing of the nucleation layer 20. In the same way as for additional elements that can be associated with the metal M, the quantity of these dopant elements must not critically alter the lattice parameter of the nucleation layer 20 of MS 2 along the a and b axes.

[0076] The nucleation layer 20 is formed of crystalline domains whose (002) basis planes are parallel to the surface of the substrate 10, i.e., to the (a, b) plane. The crystalline domains have a random orientation in the (a, b) plane formed by the surface of the substrate ( figure 3 ).

[0077] Advantageously, the crystals in the MS 2 layer have a larger dimension between 1 and 100 nm, preferably between 5 and 50 nm.

[0078] The thickness of the nucleation layer 20 ranges from 0.6 nm (equivalent to a monolayer, i.e. a single sheet of MS 2) to 50 nm, and preferably from 0.6 to 12 nm, and even more preferably from 0.6 nm to 8 nm.

[0079] Beyond a few tens of nanometers, for example beyond 20 nm or 50 nm, or even beyond 80 nm for some substrates, the (002) basis planes of the crystals forming the MS 2 nucleation layer 20 tend to no longer be strictly parallel to the substrate surface and are therefore unsuitable for the growth of a highly textured AIN layer 30. The misorientation increases with thickness and depends on the substrate. Generally speaking, the thinner the MS 2 nucleation layer 20, the better the texturing of the AIN layer 30. The thickness of the MS 2 layer 20 will be chosen according to the nature of the substrate 10 and the intended application.

[0080] The nucleation layer can be deposited by chemical vapor deposition (CVD), atomic layer deposition (ALD), physical vapor deposition (PVD) or RF sputtering.

[0081] The growth of the nucleation layer 20 can be direct or indirect.

[0082] According to a first embodiment, the growth of the nucleation layer 20 is direct, that is to say that a single step is sufficient to obtain an MS layer x with x equal to 2 ( Figure 1A ).

[0083] For example, such growth can be achieved by implementing these deposition methods at temperatures high enough to allow crystallization of the MS 2 compound enabling the formation of the nucleation layer 20 (typically above 500 °C).

[0084] According to a second alternative embodiment, shown on the Figures 1B And 1C , the growth of the nucleation layer 20 is indirect, that is to say that the growth step is carried out in several steps (at least two).

[0085] Typically, these different steps consist successively of: deposit a thin layer 21 containing at least the transition metal or metals of the final nucleation layer 20, carry out one or more post-treatments leading to the formation of a nucleation layer 20 of formula MS 2 possessing satisfactory crystalline properties.

[0086] According to a first alternative indirect growth method, the deposited thin film 21 contains both the transition metal(s) and sulfur, with a sulfur / metal atomic ratio (denoted S / M) greater than or equal to 2 (i.e., x is greater than or equal to 2). Such a layer is obtained, for example, when the temperature at the time of deposition is not high enough to allow the crystallization of the MS 2 compound that enables the formation of the nucleation layer 20 (typically below 450°C), and in the presence of sulfur-rich compounds (e.g., elemental sulfur, polysulfides, or 1,2-ethanedithiol).

[0087] Post-treatment consists of carrying out thermal annealing under inert conditions (under ultra-high vacuum or inert gas for example) to simultaneously cause the crystallization of the MS 2 compound, and evaporate the excess sulfur.

[0088] Annealing temperatures advantageously range from 450°C to 1200°C, preferably from 750°C to 1000°C, and even more preferably from 750°C to 950°C. The duration of annealing at a temperature above 950°C will be sufficiently short to avoid damaging the nucleation layer. The annealing time will be chosen based not only on the temperature but also on the type of annealing (standard thermal annealing, rapid heat treatment (RHT), or laser beam annealing).

[0089] According to a second alternative indirect growth method, the deposited thin layer 21: does not contain sulfur (for example the deposited thin film 21 is an oxide, nitride, selenide or oxysulfide of the metal or metals M), or contains an insufficient amount of sulfur: the atomic ratio S / M being strictly less than 2.

[0090] According to this second indirect growth alternative, the post-treatment is a thermal annealing carried out in the presence of a sulfur-containing element to form a nucleation layer 20 with satisfactory crystalline properties. For example, this step is performed under a flow of hydrogen sulfide (H₂S) or an organosulfur compound, advantageously diluted in an inert gas, or in the presence of elemental sulfur.

[0091] According to a particular embodiment, hydrogen can be added in order to limit the formation of carbon (from the thermal decomposition of organosulfur compounds) or elemental sulfur (from the polymerization of hydrogen sulfide).

[0092] The organosulfur compound can be chosen from thiols, polysulfides or silathian-type derivatives (such as hexamethyldisilathiane).

[0093] According to a first advantageous variant, organosulfur compounds with short aliphatic chains (typically possessing 1 to 4 carbon atoms) will be chosen.

[0094] In a particular embodiment, the sulfur compound may be carbon-free. Advantageously, a volatile compound such as H₂S, H₂S₂, or S₂Cl₂ is chosen. The use of this type of sulfur compound helps to prevent carbon contamination of the nucleation layer.

[0095] The temperatures during sulfurization range, for example, from 150°C to 1200°C, preferably from 350°C to 750°C. This sulfurization step can be followed by a thermal annealing step under an inert atmosphere. The thermal annealing conditions are, for example, those described for the first alternative of indirect growth.

[0096] A slight variation in the stoichiometry of the nucleation layer 20 or of the layer 21 after sulfidation (i.e. MS x with x < 2) may be related to the interface states with the substrate or to the presence of structural defects, as mentioned previously, but also to the formation of a surface oxide layer, for example when exposed to ambient air if it has not been deposited, sulfided, or annealed at a temperature high enough to be stable in air (i.e. T° < 650°C). In the case where this MS x layer does not contain any metals other than molybdenum and tungsten, this problem of surface oxidation can be eliminated by a simple thermal annealing under an inert atmosphere at a temperature above 650°C, which allows the elimination of molybdenum and / or tungsten oxides by evaporation and the obtaining of a thin nucleation layer 20 of MS 2 devoid of oxygen and possessing satisfactory crystalline properties.

[0097] According to a particular embodiment, not shown, a thin encapsulating layer can be deposited on the thin layer 20 or 21 to preserve its integrity when the final thermal annealing is carried out at particularly high temperatures (above 950°C). Before depositing this encapsulating layer, it is necessary to ensure that the sulfur-to-molecular-weight ratio (S / M) within the thin layer 20 or 21 is as close as possible to 2 by applying a suitable sulfurization and / or annealing sequence. Too high a sulfur content can lead to delamination of the encapsulating layer, and too low a content can result in the formation of an MSx layer that does not have the expected structure.

[0098] The encapsulation layer is made of a material that is chemically inert to the nucleation layer 20 at the temperature used for annealing. By way of illustration and not limitation, the encapsulation layer can be a metal oxide (Al 2 O 3 , SiO 2 , TiO 2 , ZrO 2 , HfO 2 , VO 2 , Ta 2 O 5 ) or a metal nitride (AlN , SiN x , TiN x , ZrN x , HfN x , VN x , TaN x ).

[0099] This encapsulation layer is then selectively removed before the AIN layer is deposited, for example by a non-oxidizing wet etching process. The etching solution includes, for example, hydrofluoric acid, sodium hydroxide, potassium hydroxide, or ammonia.

[0100] In step c), the textured aluminum nitride layer 30 is formed.

[0101] The AIN 30 layer exhibits a wurtzite-type hexagonal structure and possesses a columnar structure composed of crystals rigorously oriented in the same direction along the c-axis orthogonal to the (a, b) plane formed by the substrate surface. The 002 crystal planes of the AIN crystals constituting layer 30 are rigorously parallel to the (a, b) plane, as well as to the 002 planes of the crystal domains constituting the nucleation layer 20 of MS 2.

[0102] The degree of texture can be estimated, for example, by X-ray diffraction using a rocking curve measurement obtained by varying the angular position omega around the Bragg position of the 002 plane of the AIN. The full width at half maximum (FWHM) of the resulting peak allows for the quantification of the texture (in other words, the degree of crystal misorientation) of the AIN layer.

[0103] By highly textured (i.e., exhibiting low crystal misorientation), we mean that the full width at half maximum of the rocking curve of the 002 plane of AIN is less than 2°, preferably less than 1° and even more preferably less than 0.5° for AIN layers with a thickness greater than 50 nm.

[0104] The deposition of the AIN layer is preferably carried out at a temperature between ambient temperature (typically 20°C) and 400°C, preferably between 300°C and 350°C, which avoids damaging the MS 2 layer and thus prevents generating defects in the AIN layer.

[0105] The deposition of the textured AIN layer 30 onto the nucleation layer 20 of MS 2 can be achieved using various techniques such as PVD, sputtering, pulsed laser deposition (PLD), CVD, or ALD. The deposition parameters and temperature will be chosen to form a crystalline AIN layer 30 in its hexagonal form (wurtzite).

[0106] Preferably, the AIN layer 30 is deposited by PVD. This embodiment is particularly advantageous for RF applications, as this deposition technique allows the formation of thick layers (generally thicker than 100 nm) in a short time.

[0107] Preferably, the thickness of the AIN 30 layer ranges from 1 nm to a few microns and even more preferably from 1 nm to 1 µm. Depending on the intended applications, a thin layer, for example from 1 nm to 100 nm, or a thick layer, for example from 100 nm to 1 µm, can be chosen.

[0108] In a particularly advantageous embodiment, the thickness of the AIN layer is between 1 nm and 300 nm. Preferably, the thickness is less than or equal to 200 nm, and even more preferably less than or equal to 100 nm. Such thicknesses prevent delamination of the AlN / MoS₂ stack of the substrate.

[0109] Intrinsic stress in the AIN 30 layer plays a critical role in its mechanical strength. High stress values ​​can not only cause delamination of the AIN 30 layer due to the absence of covalent bonds between each sheet constituting the nucleation layer 20 in MS 2, as well as at the interfaces between the nucleation layer 20 and the materials located on either side of this layer (i.e. the substrate / MS 2 interfaces on the one hand and MS 2 / AlN on the other), but can also have a negative impact on the texture of the AIN 30 layer due to the formation of dislocations.

[0110] In one particular embodiment, a bias can be applied to the substrate 10 during the deposition of the AIN layer 30, especially in the case of PVD deposition, in order to reduce the mechanical stress within the AIN layer 30 and consequently increase the critical thickness at which the AIN layer 30 will begin to delaminate. Advantageously, this bias can be applied after the deposition of a few nanometers of AIN to avoid damaging the surface of the nucleation layer 20.

[0111] According to another embodiment, prior to the deposition of the AIN layer 30, a localized etch is made in the MS 2 layer 20, so as to make certain areas of the substrate 10 locally accessible. These areas of the substrate 10 not covered by the MS 2 layer 20 serve as anchor points for the AIN layer 30. Delamination of the AIN layer 30 can thus be avoided by improving the adhesion between the AlN / MS 2 stack and the substrate 10. The localized etch can, for example, be carried out using standard lithography techniques.

[0112] The AIN 30 layer can contain dopants such as transition metals or rare earth elements to adjust the piezoelectric properties of the AIN and / or modify its lattice parameters, for example, to reduce the lattice mismatch between the AIN and the MS 2 nucleation layer. Such dopants can be chosen, for example, alone or in combination, from the group including chromium, molybdenum, tungsten, scandium, yttrium, and other lanthanides, in proportions that do not induce an alteration of the AIN lattice parameters greater than ±0.05 nm along the a and b axes.

[0113] According to a particular embodiment, steps b) and c) are repeated cyclically to obtain alternating nucleation layers 20 of MS 2 and layers 30 of textured AIN. This particular embodiment can, for example, relax the stresses within each AIN layer 30 and thus limit the formation of dislocations and / or delamination of the AIN layers 30.

[0114] The invention also relates to a stack that can be obtained by the process as defined above, comprising, and preferably consisting successively of ( figure 2 ): a thin layer (30) of textured AIN, a polycrystalline nucleation layer (20) of MS 2.

[0115] The stacking may also include substrate 10 as described previously.

[0116] The orientation of the crystalline domains is random in a plane (a, b) parallel to the stacking.

[0117] The textured AIN thin layer 30 alone or with the polycrystalline nucleation layer 20, in the form of a stack, is particularly interesting for the fabrication of microelectronic and / or electronic devices.

[0118] Although not limiting, the invention has applications in numerous fields, and in particular, it can be used in RF devices, especially RF filters, light-emitting diodes (LEDs), acoustic resonators, or any other device requiring the use of a piezoelectric membrane, particularly one with a thickness of less than 100 nm. It can also be used indirectly, either deposited or transferred onto another substrate. In the case of a transfer involving an inversion of the AlN / MS₂ stack, the MS₂ nucleation layer 20 can be either removed or retained. It can then serve as a passivation layer for the AlN₂O₅, or as a nucleation layer for the growth of another material. Illustrative and non-limiting examples of specific implementation methods:

[0119] In this example, the substrate 10 is a silicon wafer 11 coated with a 500 nm thick amorphous layer 12 of SiO₂ obtained by thermal oxidation. A thin layer 20 of MoS₂, 2 nm thick (approximately 3 monolayers), is obtained by ALD at 100°C by alternately injecting two precursors: Mo(NMe₂)₄ and 1,2-ethanedithiol. The parameters used are, for example, those described in document EP 2 899 295 A1. The resulting deposit is then sulfided at 450°C for 5 min under a nitrogen flow of 200 NmL / min containing 4% hydrogen and 0.5 torr of di-tert-butyl disulfide vapor, followed by rapid heat treatment at 950°C under an argon flow for 5 min.

[0120] A 100 nm thick layer 30 of AIN is finally deposited on the MoS2 layer 20 by sputtering (RF power: 2 KW, substrate temperature: 350°C).

[0121] A STEM observation of the cross-sectional sample confirms the presence of the three SiO2 / MoS2 / AlN layers and the columnar growth of the 30 AIN layer ( Figures 4A, 4B + diagram of the figure 4C ). Observation of the SiO2 / MoS2 / AlN interfaces at very high resolution confirms the epitaxial growth of AIN crystals on the MoS2 crystalline domains of the nucleation layer 20, as well as the absence of diffusion at the AlN / MoS2 interface. Slight diffusion of molybdenum is observed in the SiO2 substrate, but does not affect the quality of the MoS2 surface monolayer, which is what induces the AIN texturing.

[0122] The texture of AIN layer 30 is evaluated by X-ray diffraction using a rocking curve measurement obtained by varying the angular position omega around the Bragg position of the AIN plane 002. The resulting curve (omega scan) is shown on the figure 5 .

[0123] The full width at half maximum (FWHM) value of the oscillation curve for this 100 nm AIN layer on MoS2 is 0.43°, which is close to the best values ​​usually obtained with AIN layers whose growth has been carried out at very high temperature on single-crystal sapphire substrates.

[0124] For comparison, a layer of AIN of similar thickness (100 nm) was deposited, with the same parameters: directly on SiO2, which leads to a full width at half maximum (FWHM) of the oscillation curve of 4.18°, on a highly textured and oriented 110 molybdenum electrode (which is a reference for the manufacture of RF filters), which leads to a FWHM of the oscillation curve of 2.57° ( Fig. 5 ).

[0125] The influence of the thickness of the AIN layer 30 on its texturing was evaluated for thicknesses between 5 nm and 100 nm, all other parameters (substrate and nature of the MoS2 layer 20) being kept identical ( figure 6 ). The results obtained indicate full width at half height values ​​of the oscillation curve of less than 1° for AIN layers of only 25 nm thickness, and less than 0.5° for AIN layers of thickness greater than 50 nm, revealing a capacity of the process of the invention to texture extremely thin AIN layers (typically less than 100 nm) much greater than what has been reported so far in the literature.

Claims

1. A process for manufacturing a textured AIN thin film (30) comprising the following successive steps: a) supplying a substrate (10), having an amorphous surface, b) forming a polycrystalline nucleation layer (20) of MS2 with M=Mo, W or one of their alloys, on the amorphous surface of the substrate (10), the polycrystalline nucleation layer (20) being made up of crystalline domains whose base planes (002) are parallel to the amorphous surface of the substrate (10), the crystalline domains being randomly oriented in a plane (a, b) formed by the amorphous surface of the substrate (10), c) deposition of aluminum nitride on the nucleation layer (20), leading to the formation of a textured AIN thin film (30).

2. Method according to claim 1, characterized in that The M alloy of the nucleation layer (20) of MS2 contains up to 50 atomic percent of one or more additional elements selected from the transition metals.

3. A method according to any one of claims 1 and 2, characterized in that the nucleation layer (20) has a thickness ranging from 0.6 nm to 50 nm, and preferably from 0.6 nm to 8 nm.

4. A method according to any one of claims 1 to 3, characterized in that step b) is carried out at a temperature permitting the formation of a polycrystalline nucleation layer (20) of MS2 in a single step.

5. A method according to any one of claims 1 to 3, characterized in that Step b) is carried out according to the following successive steps: - deposition of an MS layer x with x greater than or equal to 2, - annealing of the MS layer x under an inert atmosphere at a temperature ranging from 450°C to 1200°C and preferably from 750°C to 950°C, so as to form a polycrystalline nucleation layer (20) of MS2.

6. A method according to any one of claims 1 to 3, characterized in thatstep b) is carried out according to the following successive steps: - deposition of a thin layer containing M in elemental form or associated with one or more heteroatoms, - reactive thermal annealing in the presence of a volatile compound containing sulfur at a temperature ranging from 150°C to 1200°C and, preferably, from 350°C to 750°C, - optionally, annealing under an inert atmosphere at a temperature ranging from 450°C to 1200°C and, preferably, from 750°C to 950°C, so as to form a polycrystalline nucleation layer (20) of MS2.

7. A method according to any one of the preceding claims, characterized in that the polycrystalline nucleation layer (20) of MS2 contains a dopant element such as nitrogen, phosphorus, arsenic or antimony.

8. A method according to any one of the preceding claims, characterized in that step c) of depositing the thin layer (30) of textured AIN is carried out by physical vapor deposition or cathodic sputtering.

9. A method according to any one of the preceding claims, characterized in that the thin film (30) of textured AIN has a thickness ranging from 1 nm to 1 µm, and preferably between 1 nm and 300 nm.

10. A method according to any one of the preceding claims, characterized in that the thin layer (30) of textured AIN contains dopant elements such as chromium, molybdenum, tungsten, scandium, yttrium or an element of the lanthanides.

11. A method according to any one of the preceding claims, characterized in that the amorphous surface of the substrate (10) has a roughness of less than 5nm, preferably less than 1nm and even more preferably less than 0.3nm.

12. A method according to any one of claims 1 to 11, characterized in thatit includes an additional step, subsequent to step c), in which a stack comprising the polycrystalline nucleation layer (20) MS2 and the thin layer (30) of textured AIN is removed from the substrate (10).

13. Stack comprising: - a thin layer (30) of textured AIN, obtained by the process according to any one of claims 1 to 12, - a polycrystalline nucleation layer (20) of MS2 with M=Mo, W or one of their alloys, the polycrystalline nucleation layer (20) being made up of crystalline domains whose base planes (002) are parallel to the stack, the orientation of the crystalline domains in a plane (a, b) formed by the stack being random.

14. Stack as defined in claim 13, further comprising a substrate (10) having an amorphous surface, the polycrystalline nucleation layer (20) of MS2 being disposed between the substrate (10) and the textured AIN thin layer (30).

15. Microelectronic device, for example a radio frequency device, an LED, a power device or a piezoelectric membrane comprising a thin layer (30) of textured AIN obtained by the process according to any one of claims 1 to 12 or a stacking as defined in any one of claims 13 and 14.