Device and method for testing semiconductor wafers
Patent Information
- Authority / Receiving Office
- EP · EP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-02-20
- Publication Date
- 2026-03-11
AI Technical Summary
Existing semiconductor wafer testing devices face challenges in controlling temperature uniformly and quickly across zones, leading to thermal resistance issues and potential electrical failures due to delayed heat dissipation and temperature differences between the wafer and the clamping device.
A temperature-controlled clamping device with a plate-shaped zone heating device featuring discrete heating zones and lateral thermal insulation areas, which allows for efficient heat dissipation and precise temperature control by maintaining heat in the vertical direction while inhibiting lateral heat spread, enabling rapid thermal response and stable chip temperature under dynamic loads.
This solution enables accurate and real-time temperature control, allowing for high-power test pulse sequences without measurement distortion, reducing the risk of electrical failure and improving the overall thermal response of the testing device.
Smart Images
Figure EP2024054294_05122024_PF_FP_ABST
Abstract
Description
[0001] Apparatus and method for testing semiconductor wafers
[0002] The present invention relates to a device and a method for testing semiconductor wafers by means of a temperature-controlled clamping device.
[0003] Although not limited thereto, the present invention and the problems underlying it are discussed using integrated circuits at the wafer level.
[0004] During the manufacturing process for integrated circuits, wafer tests are performed on wafers that have not yet been diced in order to detect and separate faulty integrated circuits at an early stage. For this purpose, a wafer to be tested is placed in a wafer prober and heated to a desired test temperature using a temperature-controlled chuck (device for tempering the wafer substrate). Once the wafer is at the desired test temperature, an electrical connection is created to the contact surfaces of the integrated circuit to be tested using a contact needle arrangement located on a needle head. The needle head with the contact needles is mounted on a so-called probe card, which forms an interface between a test system and the wafer via the contact needles of the needle head.
[0005] Wafer tests are typically carried out in the temperature range between -60 °C and 400 °C, in exceptional cases even at even more extreme temperatures above or below zero.
[0006] During test measurements with high chip power, the problem arises that the semiconductor wafer locally heats up on the front side in the area of current flow above the temperature of the back side in contact with the clamping device. This is because heat dissipation is delayed due to the finite heat transfer resistance between the semiconductor wafer and the clamping device. Typically, at electrical power levels above 100 W, a local temperature difference of approximately 40 K is obtained between the front side of the semiconductor wafer and the contact side of the clamping device. This temperature difference disrupts the test measurement, which is intended to indicate the isothermal electrical properties of the circuits integrated in the semiconductor wafer. At the same time, at higher power levels, the chips can be heated above a maximum permissible temperature, which carries the risk of electrical failure.
[0007] EP 1 844 342 B1 discloses a device and a method for testing semiconductor wafers by means of a temperature-controlled clamping device, the method comprising the following steps: temperature-controlling the clamping device by means of an electrical heating device with a predetermined heating power and a cooling device through which a fluid is passed for cooling, with a predetermined cooling power, to a predetermined measuring temperature, placing the rear side of a semiconductor wafer on a support side of the temperature-controlled clamping device, placing a probe card on the front side of the semiconductor wafer, testing the temperature-controlled semiconductor wafer by imprinting the test power from a test device into a chip region of the front side of the semiconductor wafer by means of probes of the placed probe card, and detecting a temperature increase of the fluid during testing that reflects the test power.
[0008] The heating power is greater than a specified test power, and the heating power is reduced by subtracting the test power during testing while maintaining a substantially constant cooling power, taking into account the temperature increase of the fluid detected during testing. The temperature increase of the fluid is detected by taking into account the signals of a respective temperature detection device, which detects the inlet temperature and the outlet temperature of the fluid supplied to the clamping device from the cooling device for cooling during testing.
[0009] Essentially, this involves dissipating a high, point-like power load through the chuck. It is essential that the chuck's temperature control behaves exactly the same at every position across the entire wafer (currently 300 mm in diameter). The system works well, but its thermal response is relatively slow.
[0010] EP 3 937 216 A1 discloses a method for adjusting the temperature of a substrate carrier on which a substrate is placed, in a testing apparatus for testing an inspection target device formed on the substrate, wherein a substrate placement surface of the substrate carrier is divided into a plurality of regions and a heater is arranged in each of the plurality of regions.The method comprises the steps of: performing feedback control of the heater in a main area corresponding to the test target device among the plurality of areas so that a temperature of the main area assumes a target temperature, controlling the heater in a sub-area adjacent to the main area among the plurality of areas, wherein in the control of the heater in the sub-area, when no overshoot has occurred in the temperature of the main area, the heater in the sub-area is controlled so that a temperature difference between the main area and the sub-area assumes a predetermined value, and wherein, when an overshoot of the temperature has occurred in the main area, the heater of the sub-area is controlled so that a temperature difference between the set target temperature and the temperature in the sub-area assumes the predetermined value.
[0011] US 2012 / 0396801 A1 discloses a test device comprising a test interface board including a plurality of socket interface boards, each socket interface board including a socket for receiving a DUT, a discrete active thermal interposer having thermal properties and for establishing thermal contact with the DUT, a superstructure operable to contain the discrete active thermal interposer, and an actuation mechanism operable to provide a contact force for bringing the discrete active thermal interposer into contact with the DUT.
[0012] All known test devices do not solve two problems in wafer testing:
[0013] 1) How can the temperature be controlled independently and quickly in zones so that the chip temperature remains constant under dynamic load? It has always been observed that the chuck itself remains thermally inert and cannot regulate the temperature zone-by-zone.
[0014] 2) How can the temperature of the temperature sensor (chuck) be controlled according to the temperature of the chip and thus eliminate the thermal resistance between the chuck top and the wafer back?
[0015] It is therefore an object of the present invention to provide a device and a method for testing semiconductor wafers by means of a temperature-controlled clamping device, which have an improved thermal response behavior.
[0016] To achieve this object, the present invention provides a device for testing semiconductor wafers by means of a temperature-controlled clamping device according to claim 1 and a method for testing semiconductor wafers by means of a temperature-controlled clamping device according to claim 17. Furthermore, a plate-shaped zone heating device according to claim 16 is provided.
[0017] Preferred developments are the subject of the respective dependent claims. The idea underlying the present invention is to provide a temperature-controlled clamping device comprising a chuck device and a plate-shaped zone heating device mountable on the chuck device, said device having a plurality of discrete heating zones. The heating zones are arranged in a surface matrix beneath a support surface of the zone heating device and are each enclosed by a lateral thermal insulation region. The lateral thermal insulation regions inhibit heat propagation in the lateral direction, while maintaining heat propagation in the vertical direction.
[0018] This allows the excess heat generated during testing to be dissipated more quickly via the cooling system of the chuck, significantly improving thermal response. This, in turn, makes it possible to perform test pulse sequences with rapidly varying test power without distorting the measurement results due to delayed heat dissipation.
[0019] According to a preferred development, the temperature detection device is designed to directly detect a chip temperature increase during testing that reflects the test performance and to transmit the chip temperature increase to the temperature control device, wherein the temperature control device is designed to reduce the heating power with constant cooling power based on the directly detected chip temperature increase during testing in order to stabilize the measurement temperature.
[0020] According to a further preferred development, the lateral thermal insulation regions have respective annular cavities in the plate-shaped zone heating device.
[0021] This creates effective lateral thermal insulation.
[0022] According to a further preferred embodiment, the annular cavities in the plate-shaped zone heating device are arranged in an overlapping manner. This allows for significant space savings.
[0023] According to a further preferred embodiment, the annular cavities in the plate-shaped zone heating device have a respective first vacuum connection on the rear side opposite the support surface for evacuating the cavities. This further increases the effectiveness of the thermal shielding.
[0024] According to a further preferred embodiment, the annular cavities in the plate-shaped zone heating device are exposed at the support surface. This also increases the effectiveness of the thermal shielding. According to a further preferred embodiment, the thermal insulation regions comprise a thermal insulation material embedded in the plate-shaped zone heating device. This increases the stability of the plate-shaped zone heating device.
[0025] According to a further preferred embodiment, the plate-shaped zone heating device is made of a ceramic, a glass ceramic, a glass, or a plastic. This simplifies and increases the flexibility of production.
[0026] According to a further preferred embodiment, the heating zones each have a heating resistor, which can be electrically controlled via respective electrical connections. This allows for precisely controllable zone heating.
[0027] According to a further preferred embodiment, the temperature detection device comprises a respective temperature sensor device, which is integrated into the chips to be tested and which can be contacted using temperature probes on the probe card. This enables highly accurate determination of the chip temperature increase in real time.
[0028] According to a further preferred embodiment, the temperature detection device comprises an infrared thermometer arranged on the probe card. This eliminates the need for additional probes and an additional temperature sensor device in the chip under test.
[0029] According to a further preferred embodiment, the chuck device has a single cooling circuit for the cooling fluid. This simplifies production.
[0030] According to a further preferred embodiment, the chuck device has a plurality of cooling circuits, whereby the individual heating zones can be selectively cooled individually by the cooling fluid. This further improves the response behavior.
[0031] According to a further preferred embodiment, a valve device controllable by the temperature control device is provided for selectively activating each individual cooling circuit.
[0032] According to a further preferred embodiment, the chuck device has second vacuum suction grooves, via which the plate-shaped zone heating device can be attached to the chuck device. This allows the plate-shaped zone heating device to be quickly attached or removed as needed. Exemplary embodiments of the invention are illustrated in the drawings and explained in more detail in the following description.
[0033] They show:
[0034] Fig. 1 is a schematic cross-sectional view of an apparatus for testing semiconductor wafers according to a first embodiment of the present invention,
[0035] Fig. 2 is a partially schematic cross-sectional view of the zone heating device of the apparatus for testing semiconductor wafers according to the first embodiment of the present invention,
[0036] Fig. 3 is a partially schematic cross-sectional view of a modified zone heating device for a device for testing semiconductor wafers according to a second embodiment of the present invention,
[0037] Fig. 4 is a schematic cross-sectional view of an apparatus for testing semiconductor wafers according to a third embodiment of the present invention,
[0038] Fig. 5 is a plan view of a modified zone heating device for a semiconductor wafer testing apparatus according to a fourth embodiment of the present invention,
[0039] Fig. 6 is a partially schematic cross-sectional view of the modified zone heating device of the apparatus for testing semiconductor wafers according to the fourth embodiment of the present invention,
[0040] Fig. 7 is a schematic cross-sectional view of an apparatus for testing semiconductor wafers according to a fifth embodiment of the present invention, and
[0041] Fig. 8 is a schematic cross-sectional view of an apparatus for testing semiconductor wafers according to a sixth embodiment of the present invention.
[0042] In the figures, the same reference symbols designate the same or functionally identical components.
[0043] Fig. 1 shows a schematic cross-sectional view of an apparatus for testing semiconductor wafers according to a first embodiment of the present invention. In Fig. 1, reference numerals 90, 100 designate a temperature-controlled clamping device 90, 100 for a semiconductor wafer 50, which clamping device has a metallic (e.g. Cu) chuck device 100 and a plate-shaped zone heating device 90, which can be attached or is attached to the chuck device 100 and has a plurality of discrete heating zones H1-H8. By means of a drive mechanism (not shown), the temperature-controlled clamping device 90, 100 can be moved in the vertical direction and within the support plane of the semiconductor wafer 50, which is defined by the support surface AF of the plate-shaped zone heating device 90. The support surface AF has first vacuum suction grooves 91 for clamping the semiconductor wafer 50.
[0044] The chuck device 100 has second vacuum suction grooves 81, via which the plate-shaped zone heating device 90 can be clamped onto the chuck device 100. This allows the plate-shaped zone heating device to be quickly attached or removed as needed. The chuck device 100 and the plate-shaped zone heating device 90 are typically round and have the same diameter, e.g., approximately 200 mm or 300 mm.
[0045] The heating zones H1-H8 (shown in Fig. 1 only in one dimension, see Fig. 5) are arranged in a surface matrix under the support surface AF of the zone heating device 90 in its interior and are embedded in the material of the zone heating device 90. In the embodiments described here, the plate-shaped zone heating device 90 is formed from a ceramic, a glass ceramic, a glass, or a plastic.
[0046] The heating zones H1 - H8 are formed by a respective heating resistor, which can be individually controlled via respective electrical connections (see Fig. 2 and 3). Their size is typically a few mm 2 , so that depending on the chip size, one or more chips CH of the semiconductor wafer 50 can be heated per heating zone.
[0047] In the present embodiments, the heating zones H1-H8 are square and are each enclosed by a lateral thermal insulation region 11-17. The lateral insulation regions 11-17 are circumferential and thus form island-shaped, thermally insulated insulation regions 11-17. The insulation regions 11-17 are formed overlapping on the lateral sides of the heating zones H1-H8.
[0048] A programmable test control device 20 is used to test the tempered semiconductor wafer 50 clamped onto the support surface AF of the zone heating device 90 by impressing a predetermined electrical test power PT as a single pulse or pulse sequence into a respective chip DUT to be tested on the front side of the semiconductor wafer 50 by means of probes P1, P2 on a needle head NK of a probe card 10. The electrical connection between the test control device 20 and the probe card runs via a line PL.
[0049] Also provided is a temperature control device 30, which is connected to the test device 20, the chuck device 100 and the zone heating device 90 and which is configured to set a predetermined measuring temperature on the chip DUT to be tested.
[0050] To this end, it controls the chuck device 90 using a cooling fluid to a predetermined cooling capacity PK. The cooling fluid is supplied to the chuck device 100 via an inlet line F1 and an inlet connection 11a, and via an outlet line F2 and an outlet connection 11b. According to this embodiment, the chuck device 100 has a single cooling circuit K for the cooling fluid, which is indicated by dashed lines in Fig. 1.
[0051] Optionally, the chuck device 100 can have a heating device H100, which can be controlled by the temperature control device 30 via lines S1, S2 and corresponding connections 10a, 10b to stabilize the cooling. One or more temperature sensors TS1, which are also electrically connected to the temperature control device 30 via lines (not shown), also serve this purpose.
[0052] Via a bus line H30, the temperature control device 30 can control a respective heating zone corresponding to the chip DUT to be tested to a predetermined heating power PH, wherein the predetermined heating power PH is greater than the predetermined test power PT.
[0053] For this purpose, it receives a position signal POS from the test device 20 during testing, which provides an assignment of the respective heating zone to be controlled to the chip DUT to be tested.
[0054] A temperature detection device TSC in an integrated circuit IC of the chip under test (DUT) serves to directly detect a chip temperature increase during testing, reflecting the test power PT. The temperature detection device TSC has a respective temperature sensor device TSC, which is integrated into the chips under test (CH, DUT) and which can be contacted using temperature probes T1, T2 of the probe card 10. This enables highly accurate determination of the chip temperature increase in real time.
[0055] For this purpose, the chip temperature TDUT is transmitted in real time to the test device 20 via a first temperature monitor line TL, and from there to the temperature control device 30 via a second temperature monitor line TL'. The temperature control device 30 is configured to reduce the heating power PH in the relevant heating zone—here H3—while maintaining a constant cooling power PK based on the directly detected chip temperature increase during testing, in order to stabilize the measurement temperature.
[0056] The lateral thermal insulation areas—here 12, 13—inhibit heat propagation in the lateral direction, while maintaining heat propagation in the vertical direction toward the chuck device 100. This allows the test-related excess heat to be dissipated as quickly as possible via the cooling of the chuck device 100. This makes it possible to perform test pulse sequences with rapidly varying test power without the measurement results being distorted by delayed heat dissipation.
[0057] Fig. 2 shows a partially schematic cross-sectional view of the zone heating device of the apparatus for testing semiconductor wafers according to the first embodiment of the present invention.
[0058] As shown in Fig. 2, the lateral thermal insulation regions 11-17 - shown here as I2 and I3 - have respective annular cavities H in the plate-shaped zone heating device 90, which extend as close as possible to the support surface AF or the opposite rear surface RF.
[0059] The heating zones H1-H8 enclosed by the cavities H—shown here as H3 and H4—have respective heating resistors HR3 and HR4 and are coiled within the heating zones H1-H8 to maximize the thermal output density. They can be electrically controlled by the temperature control device 30 via the bus line H30 via respective electrical connections H31, H32 and H41, H42, respectively.
[0060] Fig. 3 shows a partially schematic cross-sectional view of a modified zone heating device for an apparatus for testing semiconductor wafers according to a second embodiment of the present invention.
[0061] In the second embodiment, the annular cavities H' in the plate-shaped zone heating device 90' - shown here as thermal insulation areas I2' and I3' - have a respective first vacuum connection VL' for evacuating the cavities H' on the rear side surface RF opposite the support surface AF.
[0062] Otherwise, the second embodiment is designed analogously to the first embodiment. Fig. 4 shows a schematic cross-sectional view of an apparatus for testing semiconductor wafers according to a third embodiment of the present invention.
[0063] In the third embodiment, the temperature detection device 120, 121 is an infrared thermometer 120, 121, which is arranged on the probe card 10 and which has an IR light guide 120 and an evaluation circuit 121, which in turn is connected to the first temperature monitor line TL. Thus, the probes T1, T2 are unnecessary.
[0064] Otherwise, the third embodiment is designed analogously to the first embodiment.
[0065] Fig. 5 shows a plan view and Fig. 6 shows a partially schematic cross-sectional view of a modified zone heater for an apparatus for testing semiconductor wafers according to a fourth embodiment of the present invention.
[0066] In the third embodiment, 32 square heating zones H1 H32" are provided, which are embedded under the support surface AF. The connections of the heating resistors are guided inside the plate-shaped zone heating device 90" up to its edge, where they are connected to the bus line H30.
[0067] In contrast to the embodiments already described, the annular cavities H" - shown here as thermal insulation areas I" and I3" which surround the heating zones - here H3" and H4" - are exposed in the plate-shaped zone heating device 90" on the support surface AF.
[0068] Otherwise, the fourth embodiment is designed analogously to the first embodiment.
[0069] Fig. 7 shows a schematic cross-sectional view of an apparatus for testing semiconductor wafers according to a fifth embodiment of the present invention.
[0070] In the fifth embodiment, the thermal insulation areas 11 a thermal insulation material embedded in the plate-shaped zone heating device 90"', e.g. glass fibers or similar.
[0071] Otherwise, the fifth embodiment is designed analogously to the first embodiment.
[0072] Fig. 8 shows a schematic cross-sectional view of an apparatus for testing semiconductor wafers according to a sixth embodiment of the present invention. For clarity, not all elements of the sixth embodiment are shown, but only the essential differences from the first embodiment.
[0073] In the sixth embodiment, the chuck device 100' has a plurality of cooling circuits K1-K8, whereby the individual heating zones H1-H8 can be selectively cooled individually by the cooling fluid. For this purpose, a valve device V1-V8, which can be controlled by the temperature control device 30 via a control line SEL, is provided for selectively activating each individual cooling circuit K1-K8. The valve device V1-V8 has one valve per cooling circuit on the line F1, which is opened when the respective cooling circuit is activated.
[0074] Otherwise, the sixth embodiment is designed analogously to the first embodiment.
[0075] Although the present invention has been explained above using preferred embodiments, it is not limited thereto but can be modified in many ways.
[0076] In particular, the geometry, size and number of thermal insulation areas and heating zones are only examples and can be varied as desired.
Claims
PATENT CLAIMS 1. A device for testing semiconductor wafers, comprising: a temperature-controlled clamping device (90, 100; 90', 100, 90", 100; 90'", 100; 90, 100') which has a chuck device (100; 100') and a plate-shaped zone heating device (90; 90'; 90"; 90'") which can be attached to the chuck device (100; 100') and has a plurality of discrete heating zones (H1-H8; H1"-H32"); wherein the heating zones (H1 - H8; H1"-H32") are arranged in a surface matrix under a support surface (AF) of the zone heating device (90; 90'; 90"; 90'") and are each enclosed by a lateral thermal insulation region (11-17; 12', 13'; 12", 13"; 11"-17'"); a test control device (20) for testing a contact surface (AF) of the zone heating device (90; 90'; 90";90'") by impressing a predetermined electrical test power (PT) into a respective chip to be tested (DUT) on the front side of the semiconductor wafer (50) by means of probes (P1, P2) of a probe card (10); a temperature control device (30) which is connected to the test device (20), the chuck device (100; 100') and the zone heating device (90; 90'; 90"; 90'") and is designed to control the chuck device (90) to a predetermined cooling power (PK) by means of a cooling fluid in order to set a predetermined measuring temperature and to control a respective heating zone corresponding to the chip to be tested (DUT) to a predetermined heating power (PH), wherein the predetermined heating power (PH) is greater than the predetermined test power (PT); a temperature detection device (TSC;120, 121) for detecting a temperature increase during testing and for transmitting the temperature increase to the temperature control device (30); wherein the temperature control device (30) is configured to reduce the heating power (PH) with constant cooling power (PK) based on the directly detected temperature increase during testing in order to stabilize the measurement temperature.
2. Apparatus for testing semiconductor wafers according to claim 1, wherein the temperature detection device (TSC; 120, 121) is configured to directly detect a chip temperature increase during testing, reflecting the test power (PT), and to transmit the chip temperature increase to the temperature control device (30); and the temperature control device (30) is configured to reduce the heating power (PH) while maintaining a constant cooling power (PK) based on the directly detected chip temperature increase during testing in order to stabilize the measurement temperature.
3. Apparatus for testing semiconductor wafers according to claim 1 or 2, wherein the lateral thermal insulation regions (11-17; 12', 13'; 12", 13") have respective annular cavities (H; H'; H") in the plate-shaped zone heater (90; 90'; 90").
4. Apparatus for testing semiconductor wafers according to claim 3, wherein the annular cavities (H; H'; H") are arranged in an overlapping manner in the plate-shaped zone heating device (90; 90'; 90").
5. Apparatus for testing semiconductor wafers according to claim 3 or 4, wherein the annular cavities (H') in the plate-shaped zone heating device (90') have a respective first vacuum connection (VL') for evacuating the cavities (H') on the rear side surface (RF) opposite the support surface (AF).
6. Apparatus for testing semiconductor wafers according to claim 3 or 4, wherein the annular cavities (H") in the plate-shaped zone heating device (90") are exposed on the support surface (AF).
7. Apparatus for testing semiconductor wafers according to claim 3, 4 or 5, wherein the thermal insulation regions (11 "'-17'") comprise a thermal insulation material embedded in the plate-shaped zone heating device (90"').
8. Apparatus for testing semiconductor wafers according to one of the preceding claims, wherein the plate-shaped zone heating device (90; 90'; 90"; 90'") is formed from a ceramic, a glass ceramic, a glass or a plastic.
9. Apparatus for testing semiconductor wafers according to one of the preceding claims, wherein the heating zones (H1 - H8; H1" - H32") have a respective heating resistor (HR3, HR4) which can be electrically controlled via respective electrical connections (H31, H32; H41, H42).
10. Apparatus for testing semiconductor wafers according to one of the preceding claims, wherein the temperature detection device (TSC) has a respective temperature sensor device (TSC) which is integrated in the chips to be tested (DUT) and which can be contacted by means of temperature probes (T1, T2) of the probe card (10).
11. Apparatus for testing semiconductor wafers according to one of claims 1 to 9, wherein the temperature detection device (120, 121) comprises an infrared thermometer (120, 121) arranged on the probe card (10).
12. Apparatus for testing semiconductor wafers according to one of the preceding claims, wherein the chuck device (100) has a single cooling circuit (K) for the cooling fluid.
13. Apparatus for testing semiconductor wafers according to one of the preceding claims, wherein the chuck device (100') has a plurality of cooling circuits (K1-K8), whereby the individual heating zones (H1-H8) can be selectively cooled individually by the cooling fluid.
14. Apparatus for testing semiconductor wafers according to claim 13, wherein a valve device (V1-V8) controllable by the temperature control device (30) is provided for selectively activating each individual cooling circuit (K1-K8).
15. Apparatus for testing semiconductor wafers according to one of the preceding claims, wherein the chuck device (100) has second vacuum suction grooves (81) via which the plate-shaped zone heating device (90; 90'; 90"; 90"') can be mounted on the chuck device (100).
16. Plate-shaped zone heating device (90) for heating semiconductor wafers with a plurality of discrete heating zones (H1 - H8), wherein the heating zones (H1 - H8) are selectively heatable and are arranged in a surface matrix below a support surface (AF) of the zone heating device (90; 90'; 90"; 90'") for a semiconductor wafer (50) and are each enclosed by a lateral thermal insulation region (11-17) which is mounted on a chuck device (100; 100'), in particular for use in a device for testing semiconductor wafers according to one of claims 1 to 13.
17. Method for testing semiconductor wafers using a temperature-controlled clamping device, comprising the steps: Providing a temperature-controlled clamping device (90, 100; 90', 100, 90", 100; 90"', 100; 90, 100'), which comprises a chuck device (100; 100') and a plate-shaped zone heating device (90; 90'; 90"; 90'") which can be mounted on the chuck device (100; 100') and has a A plurality of discrete heating zones (H1-H8; H1"-H32"), wherein the heating zones (H1-H8; H1 "-H32") are arranged in a surface matrix under a support surface (AF) of the zone heating device (90; 90'; 90"; 90"') and are each enclosed by a lateral thermal insulation region (11-17; 12', 13'; 12", 13"; 11 "'-17'"). Testing a tempered semiconductor wafer (50) clamped onto the support surface (AF) of the zone heating device (90; 90'; 90"; 90'") by impressing a predetermined electrical test power (PT) into a respective chip to be tested (DUT) on the front side of the semiconductor wafer (50) by means of probes (P1, P2) of a probe card (10); for setting a predetermined measuring temperature by controlling the chuck device (90) by means of a cooling fluid to a predetermined cooling power (PK) and controlling a respective heating zone corresponding to the chip to be tested (DUT) to a predetermined heating power (PH), wherein the predetermined heating power (PH) is greater than the predetermined test power (PT); Detecting a temperature increase during testing; and Reducing the heating power (PH) while maintaining constant cooling power (PK) based on the detected temperature increase during testing in order to stabilize the measuring temperature.
18. A method for testing semiconductor wafers according to claim 17, wherein an immediate detection of a chip temperature increase reflecting the test power (PT) is performed during testing; and the heating power (PH) is reduced while maintaining a constant cooling power (PK) based on the immediately detected chip temperature increase during testing in order to stabilize the measurement temperature.