A system and method for routing an optical signal

Abstract

A routing system 200 for routing an optical signal is presented. The optical signal forms a data stream having a header and a payload. The routing system includes an optical switch 220, a splitter 210 and a data stream analyser 230. The optical switch 220 comprises at least one input port and a plurality of outputs ports. The splitter 210 is coupled to the optical switch 220 via a first path and to the data stream analyser 230 via a second path. The splitter 210 splits the optical signal into a first signal along the first path and a second signal along the second path. The data stream analyser 230 identifies a destination information of the optical signal in the header. In turn the system configures the optical switch to route the optical signal to a destination port among the plurality of output ports, based on the destination information.

Description

[0001]A^SYSTEM^AND^METHOD^FOR^ROUTING^AN^OPTICAL^SIGNAL Technical^Field The present disclosure relates to a system and corresponding method for routing an optical signal. Background Routing may be described as the process of selecting a path in a network or between multiple networks. As such, routing may be used in many different applications. The Open Systems Interconnection model (OSI model), partitions the flow of data in a communication system into seven abstraction layers to describe networked communication from the physical implementation of transmitting bits across a communications medium to the highest-level representation of data of a distributed application. The seven different abstraction layers are: Physical (Layer 1), Data Link (Layer 2), Network (Layer 3), Transport (Layer 4), Session (Layer 5), Presentation (Layer 6), and Application (Layer 7). Currently all-optical switches are only used for layer 1 switching. They purely route optical input channels to optical outputs without knowledge of the data going through. An example are MEMS based optical switches. For more complex routing in larger networks, packet based switching is used. Each data-packet has a header or frame with information about destination and sometimes origin. A Layer 2 and above switch can read this header and configure the ports so that the packet leaves the switch at the correct output port that is on the way to the destination. Layer 2 switches (packet switches) are typically implemented electronically. The optical input data is converted to electronics and buffered in memory, while the packet header is analysed to identify the packet destination encoded in it. Once the correct output port is determined, the data is read from the buffer and converted to the optical domain using a transmitter and leaves at the correct port. The electronic implementation adds significant latency to the network. This may include the time to process the header and the regeneration of optical data stream, for instance electrical to optical conversion using a transmitter. The optical to electrical and electrical to optical conversion add significant power consumption. The power consumption increases with increasing data rates. It is an object of the disclosure to address one or more of the above mentioned limitations. Summary According to a first aspect of the disclosure there is provided a routing system for routing an optical signal, wherein the optical signal forms a data stream having a header and a payload; the routing system comprising an optical switch comprising at least one input port and a plurality of outputs ports; a splitter coupled to the optical switch via a first path and to a data stream analyser via a second path; the splitter being adapted to split the optical signal into a first signal along the first path and a second signal along the second path; wherein the data stream analyser is configured to identify a destination information of the optical signal in the header; the system being adapted to configure the optical switch to route the optical signal to a destination port among the plurality of output ports, based on the destination information. Optionally, the data stream analyser comprises a controller configured to generate a control signal to control the configuration of the optical switch to route the optical signal to the destination port. Optionally, the data stream analyser is configured to read the header to identify the destination information. Optionally, the controller is configured to identify a conflict between a plurality of optical signals, and wherein the controller is configured to delay one or more optical signals to prevent multiple signals from passing through a same destination port of the optical switch at the same time. Optionally, the system comprises at least one optical delay and wherein the controller is configured to send an identified optical signal through the delay. Optionally, wherein the said at least one optical delay is an adjustable delay, and wherein the controller is configured to adjust the adjustable delay. Optionally, the system comprises an optical transmitter coupled between the controller and the optical switch, the optical transmitter being adapted to convert an electronic signal into an optical signal. Optionally, the controller comprises a memory, the controller being configured to delay a signal by storing the signal in electronic form in the memory before sending the signal to the optical transmitter. Optionally, the controller is configured to extract clock information from the optical signal. Optionally, the data stream analyser comprises an optical pattern recognition circuit. Optionally, the optical pattern recognition circuit comprises an optical multiplication circuit coupled to the controller. Optionally, the optical multiplication circuit is adapted to multiply a plurality of optical input vectors with a pattern matrix; wherein the optical input vectors comprise a set of data values and wherein the pattern matrix comprises target values of the pattern to be detected; wherein upon multiplying each optical input vector with the pattern matrix, the optical multiplication circuit provides a set of multiplication values. Optionally, the routing system comprises a comparator configured to compare the multiplication values with at least one threshold value to identify the pattern or a similar pattern in the plurality of optical input vectors. Optionally, the data stream analyser comprises an array of photodetectors coupled to the controller. Optionally, the optical switch comprises a plurality of input waveguides; a plurality of output waveguides; and a plurality of coupling waveguides, each coupling waveguide being configured to couple an input waveguide to an output waveguide, wherein a plurality of coupling waveguides comprises an amplitude adjuster. For instance the optical switch may be a Layer 1 switch. Optionally, the amplitude adjuster comprises an optical modulator or an optical amplifier or a combination of both. Optionally, the optical multiplication circuit comprises a plurality of cells, the said plurality of cells comprising at least one primary cell and at least one reference cell; the system being configured such that upon sending the said at least one input signal to the multiplication circuit, a first pair of output adjusted signals adjusted by the primary cell, and a second pair of output adjusted signals adjusted by the reference cell are obtained for each input signal; the system further comprising an output circuit adapted to detect the first and second pairs of output adjusted signals; wherein the said at least one input signal forms an input vector, and wherein the transmission factors of the cells form a coefficient matrix; and to process the first and second pairs of output adjusted signals to obtain a result of a multiplication operation of the input vector with the coefficient matrix. Optionally, each reference cell has a reference amplitude adjuster having a reference transmission factor. Optionally, wherein each primary cell has a primary amplitude adjuster having a primary transmission factor, or wherein at least one primary cell has a coupler and wherein the cell transmission factor is based on splitting ratios of the coupler. Optionally, wherein the first pair of output adjusted signals is adjusted by the primary amplitude adjuster, and the second pair of output adjusted signals is adjusted by the reference amplitude adjuster. Optionally, the optical multiplication circuit comprises a reference stage having a light source coupled to at least one wavelength multiplexer, the light source being coupled to each wavelength multiplexer via a reference channel provided with an input reference amplitude adjuster, the light source being configured to provide optical signals at a reference wavelength. Optionally, each input reference amplitude adjuster, and each matrix reference adjuster, is operable in a plurality of states that include a first state for minimum transmission, a second state for maximum transmission, and a middle state between the first state and the second state, and wherein each input reference amplitude adjuster and each matrix reference amplitude adjuster is set to the middle state. Optionally, wherein for each optical input vector, each wavelength multiplexer is configured to receive an optical signal at a data wavelength. Optionally, the splitter comprises a plurality of inputs for receiving a plurality of optical signals; and for each input of the splitter, the array of photodetectors comprises a corresponding photodetector directly connected to an output of the splitter. Optionally, the splitter comprises a wavelength demultiplexer. Optionally, the optical switch is coupled to a combiner. Optionally, the controller has an output coupled to a plurality of bi-directional channels for communicating with a plurality of host devices. Optionally, the data stream analyser comprises an internal oscillator adapted to generate a reference clock; and wherein the controller comprises a phase locked loop circuit adapted to generate a clock signal for each input of the splitter based on the reference clock, or based on a recovered clock; and wherein the controller is configured to generate control packet data streams, wherein each control packet data stream embed the clock signal generated by the phase locked loop circuit. Optionally, wherein the second path provides a constant connection between the splitter and the optical switch. According to a second aspect of the disclosure, there is provided a method of routing an optical signal, wherein the optical signal forms a data stream having a header and a payload; the method comprising splitting the optical signal into a first signal and a second signal; sending the first signal to an optical switch, wherein the optical switch has at least one input port for receiving the first signal and a plurality of output ports; sending the second signal to a data stream analyser; identifying a destination information of the optical signal in the header; and configuring the optical switch to route the optical signal to a destination port among the plurality of output ports, based on the destination information. The options described with respect to the first aspect of the disclosure are also common to the second aspect. Description of^the^drawings^ The disclosure is described in further detail below by way of example and with reference to the accompanying drawings, in which: figure 1 is a flow chart of a method for routing an optical signal; figure 2 is a diagram of a routing system for routing one or more optical signals; figure 3 is a schematic diagram of a data stream analyser using an optical pattern recognition circuit for use in the system of figure 2; figure 4 is a diagram of another routing system for routing one or more optical signals; figure 5 is a diagram of a controller for use in the system of figure 2 or the system of figure 4; figure 6 is a schematic diagram of an optical switch; figure 7 is a diagram of an exemplary implementation of the optical coupling device of figure 6; figure 8 is an exemplary implementation of the schematic optical pattern recognition circuit of figure 3; figure 9A is a diagram illustrating the splitting ratios set to achieve equal splitting of light to all outputs; figure 9B is a diagram illustrating a multiplication matrix without any primary cell adjuster; figure 9C is a diagram illustrating a multiplication matrix without primary cell adjuster, and with some cells having no couplers; figure 10 is a diagram of a routing system coupled to a plurality of host devices; figure 11(A) is a diagram of a splitter implemented as a power splitter; figure 11(B) is a diagram of a splitter implemented as a wavelength demultiplexer; figure 12 is a diagram of a combiner implemented as a wavelength combiner; figure 13 is a diagram of a system having a first optical switch controlled by a first data stream analyser operating as a clock source; and a second optical switch controlled by a second data stream analyser operating as a clock repeater. Description Figure 1 is a flow chart of a method for routing an optical signal. The optical signal forms a data stream having a header and a payload. The method includes the steps 110 to 150. This approach enables all optical routing of data packets based on information in the header of the packet and reduces both power consumption and latency. Figure 2 is a diagram of a routing system for routing one or more optical signals. Each optical signal forms a data stream also referred to as packets, each packet having two portions: the header and the payload. The header includes information about the data provided in the payload including its destination. The routing system 200 includes a splitter 210 coupled to an optical switch 220 via a first path referred to as data path, and to a data stream analyser 230 via a second path referred to as control path. The data stream analyser 230 is coupled to the optical switch 220 via a transmitter 240. Optionally, an optical delay line 250 may be provided between the splitter 210 and the optical switch 220. Another delay line 260 may also be provided as a loop between an output port and an input port of the optical switch 220. The optical delay lines 250 and 260 may be fixed or tuneable delay lines. The optical switch 220, also referred to as layer one switch, has a plurality of input ports for receiving the input optical signals and a plurality of output ports. The data stream analyser 230 is configured to identify a destination information of the optical signal in the header. The data stream analyser 230 may be implemented in different fashion. In figure 2, the data stream analyser 230 includes an optical multiplication circuit 232 coupled to an electronic controller 234 for performing optical pattern recognition. In operation, the splitter 210 receives one or more optical signals. The splitter 210 splits each optical signal into two sub signals: a first sub signal is directed to the optical switch 220 via the data path, and a second sub signal is directed to the data stream analyser 230 via the control path. The split ratio is chosen so that the first sub signal is larger than the second sub signal. For instance the first sub signal may represent 90% of the input signal and the second sub signal may represent 10% of the input signal. The splitter may be implemented in different ways, for instance the splitter may be an optical tap. The second sub signal is fed to the data stream analyser 230. The data stream analyser 230 identifies the destination of the optical signal in the header and sends a control signal to the optical switch to configure the optical switch in order to route the optical signal to a destination port among the various output ports of the optical switch. Stated another way the optical switch is operated to connect the input port at which the input signal is received to the desired output port. The control signal sent by the data stream analyser 230 may be an electronic signal or an optical signal. So the circuit of figure 2 may be modified such that communication between the data stream analyser 230 and the optical 220 happens optically. The data stream analyser 230 may also be configured to collect data and statistics about the packets and detect potential conflicts. Depending on the traffic through the optical switch 220, there is a potential for conflicts, for instance if two or more input ports try to send packets to the same output port at the same time. If this is allowed, when combining the packets in the optical domain the information will be destroyed. To resolve such conflicts the identified signals can be buffered optically or for longer data streams using electronic buffering. Another option involves sending a failure message back to the source either electronically or optically. If the packet streams referred to a first packet and second packet, are short enough the second packet can be buffered optically through the optical delay line 250 before the optical switch or the optical delay line 260 between the input and output of the optical switch. Once the first packet has passed through the optical switch 220, the second packet can be released to the same output port. The delay of the delay line 250 or 260 may be designed to be longer than the time required to perform pattern matching and to reconfigure the optical switch. For longer data streams, electronic buffering may be used. The controller 234 may include a memory (not shown) that may be used to buffer incoming packets. Once the first packet has passed through the optical switch 220, the second packet can be regenerated using the optical transmitter 240 connected to the optical switch 220. The optical transmitter 240 receives the signal in electronic form and convert it to the optical domain before sending it to the optical switch. Figure 3 is a schematic diagram of a data stream analyser using an optical pattern recognition circuit for use in the system of figure 2. The data stream analyser 300 is designed to detect a pattern in a data stream. The pattern may be the destination information provided in the header. For instance the data stream analyser may be configured to detect a destination address corresponding to any one the output port of the optical switch. The data stream analyser 300 includes an optical matrix multiplication circuit 330 coupled to an electronic controller 332 and a threshold detection circuit 333. The electronic controller 332 and the threshold detection circuit 333 may be implemented as part of the controller 232 of figure 2. The optical multiplication circuit 330 is adapted to multiply a plurality of optical input vectors with a pattern matrix. The optical input vectors include a set of data values (for instance logic values 0 and 1). The pattern matrix comprises target values of the pattern to be detected. In operation each input vector is multiplied with the pattern matrix. The optical multiplication circuit 330 provides a set of multiplication values to the detection circuit 333 in which a comparator compares the multiplication values with a threshold value to identify the pattern or a similar pattern in the optical input vectors. The comparator may also be configured to identify the highest multiplication value among the set of multiplication values. A data converter not shown may be provided to identify logic low values (0) in the input vectors and the pattern vector, and to convert each logic low value (0) to an inverted logic high value (-1) prior to the multiplication step. In a mathematical example the pattern to find may be written as pattern 1 vector: ^ 0 ^ 1 1 1 0 0 The input data in vector form may be the input vectors: ^ 0 ^, ^ 1 ^, ^0 ^, ^ 0 ^ 1 1 0 1 The data converter converts all the 0 of the pattern and input vector entries into -1. This can be achieved by setting reference adjustors / modulators used to generate reference input vectors and matrix reference adjustors / modulators to a middle state (half opened state). Each reference amplitude adjuster is operable in a plurality of states that include a first state for minimum transmission (closed state), a second state for maximum transmission (open state), and a middle state between the first state and the second state. Each input reference amplitude adjuster and each matrix reference amplitude adjuster is set to the middle state. The minimum and maximum transmissions depend of the implementation of the adjustors. If the first state corresponds to 50% transmission and the second states corresponds to 100% transmission, then the middle state corresponds to 75% transmission. 1 The pattern to find becomes the new pattern vector:^−1^, and 1 1 1 −1 −1 the input vectors become the new input vectors: ^ −1 ^, ^ 1 ^, ^ −1 ^, ^ −1 ^ . 1 1 −1 1 The multiplication circuit is then used to calculate dot products between the (new) input vectors and the (new) pattern vector as follows: The output of the dot product is the highest if the pattern vector and the input vector match. The output value also provides a measure of similarity between pattern vector and input vector. The more bits match, the higher the output. Exact matches or degrees of similarity may be identified by setting a threshold value for the identifier. In the above example one can detect exact matches by setting the threshold to be equal or greater than 3 to detect the exact pattern match. A plurality of threshold values may be used to identify a degree of similarity with the pattern. In this case each threshold value may be set to a pre- determined level to identify a match or a degree of similarity between an input vector and the pattern. The use of optical signal processing (pattern matching) to extract the header information permits to implement a system with ultra-low latency. Figure 4 is a diagram of another routing system for routing one or more optical signals. The system 400 is similar to the system 200 of figure 2. The same reference numerals have been used to represent corresponding components and their description will not be repeated for sake of brevity. In this implementation, the optical multiplication circuit or optical pattern recognition 232 has been replaced by an array of photodetectors 432. In operation the splitter 210 splits each optical signal into two sub signals: a first sub signal is directed to the optical switch 220 via the data path, and a second sub signal is directed to the data stream analyser 430. The second sub signal is fed to controller 234 via the array of photodetectors 432. The controller 234 identifies the destination of the optical signal in the header and sends an electronic control signal to the optical switch to configure the optical switch accordingly. If conflicts are detected between incoming packets, the corresponding channel is buffered electronically and when the output port of the optical switch is free, the signal is regenerated using the optical transmitter. Alternatively, optical buffering may be performed via the optical delay line 250 and / or the optical delay line 260. Also alternatively, a failure message might be sent back to the source, either electronically or optically. Figure 5 is a diagram of a controller for use in the system of figure 2 or the system of figure 4. The controller may include various modules for performing a variety of functions. The digital processing module is configured to receive the output from the photodetectors in the pattern recognition unit 232 or the 432. When using the pattern recognition 232, the digital processing module is configured to implement reference subtraction and threshold detection (pattern recognition). When using the array of photodetector 432, the digital processing module receives signal from the detectors, reads the header information and performs the pattern matching function electronically. The clock recovery module is configured to extract the clock information, which is used to time the switching of the optical switch. Part of the signal in the control path can be used for clock recovery. In an exemplary implementation, part of the signal is converted to electronics using a photodetector and the bit transitions are observed to identify start and end of packets. This means that bit transitions can be observed electronically and be used for accurately aligning control path and data path and ensure switching at the correct time. The recovered clock in the controller 234 can be used to adjust the optical delay lines 250 and 260 for accurate timing of the switching events. A photonic clock signal could be used if skew is an issue. As described above the controller may also be configured to handle conflicts between signals. The conflict resolution module is adapted to configure the optical switch to use a delay line as optical buffer or to buffer data in the memory. Buffered data are then sent through the optical switch later via the transmitter. The packet statistics module is designed to collect packet statistics. Figure 6 is a schematic diagram of an optical coupling switch, simply referred to as optical switch. The optical switch 600 may be used for connecting M optical input ports to N optical output ports in a configurable way. The coupling device has M input channels, N output channels. A plurality of coupling channels (not shown) is also provided. Each coupling channel is configured to couple an input channel to an output channel. The coupling channels are provided with dedicated amplitude adjusters configured to attenuate or amplify an optical signal. The amplitude adjusters may be optical modulators or optical amplifiers or a combination of both. A controller, such as an electronic controller or an optical controller is provided to control the operation of the amplitude adjusters. The controller 234 described above is configured to control the operation of the amplitude adjusters. The input ports are designed to receive optical input signals labelled Sin_1- Sin_M. Optical coupling may be achieved using optical fibres, for example via grating couplers or edge coupling. Similarly, the output ports are configured to provide optical output signal Sout_1 to Sout_N. The optical switch 600 can be used to manipulate optical signals in various ways. For instance, the amplitude adjusters may be operated to replicate or duplicate one or more optical signals. The amplitude adjusters may also be operated to perform a computational task. For instance the controller may be configured to perform additions and / or multiplications of optical signals. The optical input signals include information or data to be transmitted. The device 600 is designed to route the input optical signals independently from the information or data present in them. As described above the controller 234 route the signals in a based on the destination information present in the header of the relevant signal. The optical switch 600 may be referred to as a layer 1 (L1) switch. Figure 7 is a diagram of an exemplary implementation of the optical coupling device of figure 6. The circuit 700 has two input ports coupled to input channels 701 and 702, and three output ports coupled to three output channels 791, 792, 793. The coupling between the input channels and output channels is provided by three sets of coupling channels labelled 710, 720, 730, referred to as primary sets. In each primary set the coupling channels are configured to couple the plurality of input channels to a single output channel. The first set 710 has two coupling channels 711, 712 configured to couple the input channels 701, 702 to the first output channel 791. The coupling channel 711 is provided between the first input channel 701 and the first output channel 791; the coupling channel 712 is provided between the second input channel 702 and the first output channel 791. A similar arrangement is shown for the sets 720 and 730. The device 700 is also provided with two secondary sets. In a secondary set the coupling channels are configured to couple a single input channel to a plurality of output channels. The coupling channels 711, 721, 731, form a first secondary set. In this way each input channel may be coupled to a plurality of outputs. It will be appreciated that the above arrangement may be extended to any number of input channels and any number of output channels. Each coupling channel extends between a first coupler, also referred to as input coupler, coupled to an input channel; and a second coupler, also referred to as output coupler, coupled to the corresponding output channel. For instance, the coupling channel 711 extends between the input coupler C1a at the input channel 701 and the output coupler Cout1a at the output channel 791. In this example each coupling channel is provided with both an optical amplifier and an optical attenuator. For example the coupling channel 711 is provided with optical amplifier 761a and optical attenuator 771a. Similarly coupling channel 712 is provided with optical amplifier 761b and optical attenuator 771b. Optionally optical amplifiers 781, 782, 783 may be provided on the output channels 791, 792 and 793. The optical amplifiers may be implemented as semiconductor optical amplifiers SOAs. The optical attenuators may be Mach Zehnder modulators (MZMs) also referred to as Mach Zehnder interferometers (MZIs), or electro- absorption modulators (EAMs), or micro-ring resonators, or a phase-change material (PCM) modulators. In an alternative embodiment at least one or each coupling channel is provided with two optical amplifiers and no optical attenuator. In an alternative embodiment at least one or each or each coupling channel is provided with two optical attenuators and no optical amplifier. In an alternative embodiment at least one or each coupling channel is provided with only one optical attenuator or only one optical amplifier. Figure 8 is an exemplary implementation of the schematic optical pattern recognition circuit of figure 3. The optical circuit 800 includes a matrix multiplication unit 810 for performing a multiplication operation in the optical domain, coupled to a reference unit 820 and an output unit 830. The reference unit 820 and the output unit 830 may be referred to as input and output circuits, respectively. A controller 805 is provided to control the operation of the various amplitude adjusters provided in the circuit 800. The controller 805 and the output circuit 830 may be implemented as part of the controller 234 of figure 2. An amplitude adjuster may be an optical modulator or an optical amplifier or a combination of both. For instance the controller may adjust the transmission factor or transmission coefficients of the adjusters. When the adjuster is an amplifier the transmission factor may be greater than 1. The matrix multiplication unit 810 also referred to as multiplication circuit, has a plurality of cells comprising at least one primary cell also referred to as data cell, and at least one reference cell. The primary cell has a primary adjuster (M) having a primary transmission factor (A). The primary adjuster may be referred to as data adjuster and the primary transmission factor as data transmission factor. Each reference cell has a reference adjuster (Mref) having a reference transmission factor (Aref). The matrix multiplication unit 810 has two input waveguides 812a and 812b (rows) coupled to the multiplexers 822a and 822b, and three output waveguides 813a, 813b, 813c (columns) coupled to the output unit 830. It will be appreciated that the number of input and output waveguides may vary and can be generalised to Nin input waveguides and Mout output waveguides. The input and output waveguides 812, 813 are arranged to form a grid of multiplication unit cells 811. For each unit cell, the input and output waveguides 812, 813 cross one another at a crossing point C. A coupler or coupling channel / waveguide 814 is interposed between the input waveguide 812 and the associated output waveguide 813. The coupler 814 is provided with an amplitude adjuster M. The amplitude adjusters may be implemented in different fashion and can be made of any material that is switchable between different states corresponding to different optical properties of the adjuster. An optical amplifier may be implemented as a semiconductor optical amplifier SOA. An optical attenuator may be Mach Zehnder modulators (MZMs) also referred to as Mach Zehnder interferometers (MZIs), or electro- absorption modulators (EAMs), electro optic modulator (EOM), or micro- ring resonators (MRR), or a phase-change material (PCM) modulators. An attenuator can be used to cancel or extinct an optical signal that should not be transferred to an output port. In this scenario the amplifier is turned off and the attenuator is turned on. The amplifier / attenuator combination may be implemented using a same component or as two separate components. An adjuster component, such as for instance an SOA, may be designed to perform signal amplification when a positive voltage is applied to it, and to perform signal attenuation when a negative voltage is applied to it. The input waveguide 812 and the coupler 814 act as two directional couplers in the unit cell, with fixed transmission. The input waveguide 812 splits light from the input row so that part of the light is transmitted along 812 to the next cell and part of the light is sent to the adjuster M to adjust the amplitude of the light hence increase or attenuate the light intensity. The coupler 814 then adds the modulated light to the output waveguide 813 so that each unit cell contributes equally to the output. In figure 8, six unit cells are shown. Four primary cells labelled 811aa, 811ab, 811ba, 811bb are provided with adjusters Maa, Mab, Mba, Mbb. Two reference cells labelled 811ca, 811cb are provided with adjusters Mca, Mcb, respectively. Each adjuster has a corresponding transmission factor or transmission coefficient labelled A. For instance adjuster / modulator Maa has transmission factor A11. In an alternative implementation where the patterns are static, the adjusters Maa, Mab, Mba, Mbb of the primary cells are omitted. In this case the attenuation is provided by setting the splitting ratio couplers to be achieved the desired attenuation. This implementation can be used when the pattern to be identified does not change (static pattern). The reference unit 820 is configured to generate one or more input signals. Each input signal includes two signals: an input optical signal arising from the splitter 210 at a data wavelength (λd) and an input reference optical signal at a reference wavelength (λref). The reference unit 820 has a light source 821 coupled to a plurality of combiners or wavelength multiplexers 822a and 822b. The light source 821 is configured to provide optical signals at the reference wavelength λref. The output of multiplexer 832a is coupled to the input waveguide 812a, and the output of multiplexer 832b is coupled to the input waveguide 812b. The light source 821 is coupled to each multiplexer via a waveguides fitted with a reference modulator / adjuster M1ref or M2ref for providing an input reference optical signal. In figure 8, the multiplexer 822a receives the input optical signal V1, and the input reference optical signal Vref,1. Similarly, the multiplexer 822b receives the input optical signal V2, and the input reference optical signal Vref,2. Optionally, optical amplifiers (not shown) may be provided at the output of the output channels 813a, 813b and 813c. The output unit 830 includes three splitters or wavelength demultiplexers labelled 832a, 832b and 832c, coupled to the output of the output waveguides 813a, 813b and 813c, respectively. Each splitter / wavelength demultiplexer is adapted to split the output signal in a plurality of wavelength dependent sub signals. In this example the wavelength demultiplexers split the output signals in two sub signals at the data wavelength and the reference wavelength respectively. A pair of photodetectors is coupled to each demultiplexer via waveguides. The demultiplexer 832a is coupled to photodetectors D1 and D2 for measuring photo current intensities from optical powers O1,1 and O1,2, respectively. The demultiplexer 832b is coupled to photodetectors D3 and D4 for measuring photo current intensities from O2,1 and O2,2. The demultiplexer 832c is coupled to photodetectors D5 and D6, for measuring photo current intensities from Or,1and Or,2. The output of each photodetector is coupled to a subtraction circuit 835 for generating the result signals R1 and R2. An input vector may have a plurality Nin of input signals. In figure 8 Nin=2, but the matrix multiplication unit 810 may be extended to receive any number Nin of inputs. It will also be appreciated that the reference unit 820 may be extended to generate multiple input / reference vectors. For example, for two input vectors each multiplexer would receive three inputs signals at λd1 for the first vector, λd2 for the second vector, and λref for the reference signal. In this case each demultiplexer would be connected to a third detector for detecting the second data wavelength λd2. More generally for a number N of input vectors N different data wavelengths are provided: λd1- λdN, and the same reference wavelength λref is used for all the input reference optical signals. Then each demultiplexer is coupled to N+1 detectors. In operation the input optical signal at a first data wavelength (λd1) and the input reference optical signal at the reference wavelength (λref) travel together but independently in the matrix 810. For each input signal two pairs of output modulated signals are obtained: a first pair of output modulated signals modulated by a primary modulator / adjuster, and a second pair of output modulated signals modulated by a reference modulator / adjuster. The output adjusted / modulated signals obtained at the output of waveguides 813a, 813b and 813c are then separated (demultiplexed based on their wavelength) before being detected by the photodetectors D1-D6. The one or more input signals form an input vector, and the transmission factors of the modulators / adjusters present in the multiplication circuit from a coefficient matrix. The subtraction circuit 835 is then used to process the first and second pairs of output modulated signals to obtain a result R (R1, R2) of a multiplication operation of the input vector with the coefficient matrix. The values of ^^can be obtained from the detected values as follows: By multiplying the input vector with reference matrix states (extra column 821ca, 821cb) and multiplying the matrix states with a reference vector, one can obtain the input-dependent offset values to be subtracted to find the correct mathematical result of the matrix vector multiplication (MVM). In this way the reference values are obtained in parallel at the same time together with the data outputs. Using a balanced detection scheme between the input and reference vector outputs and a subsequent analogue electronic subtraction to remove the offset using the reference column, reveals the mathematical result in real time. The optical system 800 is used to perform the multiplication ^ ∙ ^ = ^ In which Aii’ is the mathematical value encoded in the adjuster / modulator of the corresponding primary cell; ^^′ is the value encoded in the input power Pin_1 of the first input optical signal; ^^′ is the value encoded in the input power Pin_2 of the second input optical signal; ^^ ^is the value encoded in the out power Pout_1 of the first output optical signal; and ^^ ^ is the value encoded in the out power Pout_2 of the second output optical signal. The values ^^′ and ^^′ of vector R can be expressed as: ^^′ = ^^^′ ∙ ^^′ + ^^^′ ∙ ^^′ and The photodetectors D1-D6 detect optical powers ^^,^, ^^,^, ^^,^, ^^,^, ^^,^in parallel simultaneously. Each detected optical power is converted to a current (photo current) that is proportional to the optical power. The photodetector D1 detects ^^,^= ^^^∙ ^^^_1 + ^^^∙ ^^^_2 at λd1. The photodetector D2 detects ^^,^= ^^^∙ Pin_ref1 + ^^^∙ Pin_ref2 at λref.The photodetector D3 detects ^^,^= ^^^∙ ^^^_1 + ^^^∙ Pin_2 at λd1. The photodetector D4 detects ^^,^= ^^^∙ Pin_ref1 + ^^^∙ Pin_ref2 at λref. The photodetector D5 detects t ^^,^= ^^^^∙ ^^^_1 + ^^^^∙ Pin_2 at λd1. The photodetector D6 detects ^^,^= ^^^^∙ Pin_ref1 + ^^^^∙ Pin_ref2 at λref.In which Aii are transmission factors of the adjusters / modulators; Pin_1 is optical power of the input optical signal V1; Pin_2 is optical power of the input optical signal V2; Pin_ref1 is optical power of the input reference optical signal Vref1; Pin_ref2 is optical power of the input reference optical signal Vref2. The values of ^^can be obtained from the detected values as follows: The pattern to be searched is encoded in a matrix column; and multiple patterns can be in multiple columns. The data pattern to be searched is the input vector. A reference vector (Vref1, Vref2) and a reference column (511ca, 511cb) are used to perform a reference subtraction electronically to reveal the multiplication result (R1, R2). This permits to ensure that the accurate pattern match yields the highest output value. The vector V (V1,V2) is compared to the patterns encoded in the primary adjusters Maa, Mab, Mba, Mbb. The modulators Maa, Mab, Mba, Mbb are set to either closed (logic 0) or open (logic 1) depending on the pattern to be searched. The reference adjusters / modulators Mca, Mcb are set to the middle state between open and closed. The reference vector Vref is set to the middle state between open and closed. At the output, the reference subtraction is performed and the result fed to the identifier also referred to as threshold detection unit described above with reference to figure 3. Figure 9A is a diagram illustrating the splitting ratios set to achieve equal splitting of light to all outputs. The numbers (ratios) indicate what fraction of light is split to the cross port. The adjusters / modulators are programmed to the matrix state. If the matrix values are fixed, there is no need for the programmable adjusters / modulators. Figure 9B is a diagram illustrating a multiplication matrix without any adjuster / modulator. In this case the desired optical attenuation of the optical signal is provided by the splitting ratios. Induced losses are controlled by selecting the splitting ratios appropriately for various couplers of the cell. For instance in the top left cell of figure 9B, instead of coupling 1 / 3 of the light down as in the standard implementation (see Figure 9A), an attenuation coefficient (A1) is applied to the splitting ratio (1 / 3*A1). The light coupled to the column waveguide now is the same as if there was a modulator in state A1. One can also use the second splitting ratio in a cell. Looking at the top left cell in figure 9B if the first splitter is set to 1 / 3 as usual, the second one (currently 1 / 1) can be adjusted to include the transmission factor of the modulator. For a fully closed modulator, the splitting ratio is set to 0 / 1. In this case the light is scattered out of the circuit and not transferred to the column. Figure 9C is a diagram illustrating a multiplication matrix without any adjuster / modulator, and with some cells having no couplers. To achieve maximum dynamic range (previously between open and closed modulator state) one can even remove at least some splitters to encode a logic low (0). This is analogous to a modulator that attenuates the light completely. The splitting ratios illustrated in figures 9B and 9C are provided for example only and would need to be adjusted based on the required data patterns to be searched. The routing systems described above with reference to figures 1 to 8 may be implemented using integrated photonic circuits to reduce electro-optic conversions. The data path is used to keep the incoming packets in the optical domain. It uses an optical layer 1 switch to route the packets. The data can stay in the optical domain and inefficient regeneration of optical signals from the electronic domain can be reduced or completely avoided. The control path can be electronic or photonic in nature. The electronic implementation is based on existing electronic switch hardware without the need to regenerate the optical signal. In the photonic implementation the pattern matching is achieved at very high speeds in the optical domain to reduce latency. The various waveguides / channels described above with reference to figures 2 to 8 may be integrated or fibre based. The routing system as describe with reference to figures 1 to 8 may be implemented at least in part using an integrated optical circuit such as a photonic integrated circuit (PIC). Figure 10 is a diagram of a routing system coupled to a plurality of host devices. The routing system 1000 is similar to the routing system 400 of figure 4. The same reference numerals have been used to represent corresponding components and their description will not be repeated for sake of brevity. The host devices labelled 1011-101N are coupled to the inputs of the splitter 210. The optical switch 220 is also coupled to the hosts devices via a combiner 225 such as an optical multiplexer. The host devices may be of different kind. For instance, a host device may be a computer node, an interface adapter or a switch device, to name a few. The splitter 210 can be either an optical power splitter with a set ratio (for example 90:10 or 95:5) or a wavelengths splitter such as a de-multiplexer, if the payload and header are transmitted on different optical wavelengths. Figure 11(A) illustrates the splitter 210 implemented as a power splitter. Figure 11(B) illustrates the splitter 210 implemented as a wavelength splitter or wavelength demultiplexer. Initially the data or payload travels on a first wavelength λ-data together (in the same fibre) with the destination information of the data, also referred to as the label or header on a second wavelength λ-label. The de-multiplexer 210 then passes the data on the first wavelength; and the second wavelength with the label / header is sent to the array of photodetectors 432. Figure 12 shows an example implementation of the combiner 225 as a wavelength combiner. For each channel the combiner 225 receives the label / header at wavelength λ-label from the data stream analyser 430 via the transmitter 240 and combines it with the data at wavelength λ-data. In this way λ-data and λ-label can be fed back to the hosts on a same channel or optical fiber. The combiner 225 therefore provides a return optical path from the optical switch to the host. This return path may be used to add information on the label wavelength to the same host. For instance, the additional information may be an acknowledgement information that data has been sent to the receiver host or a timing information of when data will be sent to the receiver host, or setup information for preparing the receiver host prior to receive information. Alternatively the combiner 225 may be implemented as an optical power combiner. The array of photodetectors 432 is made of a number N of photodetectors labelled PD1 to PDN. Each photodetector receives a signal from one specific input. For example, the first photodetector PD1 receives a signal from the first input (input 1). Similarly, the Nth photodetector PDN receives a signal from the Nth input (input N). Each photodetector in the array of photodetectors 432, converts the optical signal into an analogue electrical signal. A conversion circuit 433 is provided to digitize the electronic signal for further processing in the digital electronic domain. For instance, the conversion circuit 433 may include a trans impedance amplifier (TIA) followed by an analogue to digital converter (ADC). The photodetector array 432 can either be integrated on the same photonic chip as the optical switch 220, or on a separate chip. The photodetector array 432 may be included in the receiver part of a standard transceiver ( such as an ethernet transceiver like 10G LR or 25G LR , or any other type) . For instance 432 and 433 may form a receiver and the optical transmitter 240 a transmitter. This may require various elements to be fibre coupled. As described in figure 5, the controller 234 may include various modules for performing a variety of functions. The controller 234 would also include a phase locked loop (PLL) circuit which provides the clock reference to transmitter and receiver circuits, particularly the clock and data recovery (CDR) module of the receivers. The PLL circuit may be implemented in different ways and include several PLLs. Optionally, the data stream analyser 430 may be provided with an internal oscillator 434 such as a high precision quartz oscillator that provides a reference clock which serves as a reference to all the phase locked loops (PLLs) contained in the controller 234. Alternatively, all PLLs may be configured to use any CDR clock output, possibly jitter cleaned, as a clock reference. It should be noted that the control path (210, 430, 240, 225) is terminated electronically, providing a constant (always-on) link between the host devices 1011-101N connected to the input of the optical switch 220 and the switch electronic control plane that includes both the data stream analyser 430 and the optical transmitter 240. In operation, the splitter 210 splits each optical signal into two sets of sub signals: a first set of sub signals ( e.g four channels of a wavelength division multiplexing (WDM) based protocol) is directed to the optical switch 220 via the data path, and a second sub set of signals ( e.g a single control channel wavelength) is directed to the data stream analyser 430. The second set of sub signals is fed to controller 234 via the array of photodetectors 432. The controller 234 identifies the destination of the optical signal, and sends an electronic control signal to the optical switch 220 to configure the optical switch accordingly. Optionally, the hosts 1011-101N may be connected to the controller 234 via a set of bi-directional channels CN1-CNN, also referred to as side channels. In this case the label can be sent from the host to the controller 234 on a separate link (side channel), hence circumventing the splitter 210. One bi-directional (side) channel is provided for each input of the optical data path. The side channels may be implemented as copper cables or as a direct fibre connection between the host and the controller. The control logic circuit contained in the controller 234 may be configured to obtain the control packet data stream from the set of bi-directional electronic channels. The system 1000 provides a bidirectional link between the host and the optical switch 220. Each host can transmit information to the controller 234, either via the splitter 210 or via the side channels CN1-CNN. Similarly, each host can receive information from the data stream analyser 430 via the optical transmitter 240, the combiner 225 and back to the initial host. This return path is not going through the optical switch 220, and therefore avoids breaking the connection. Each optical input of the splitter may be connected to a different output of the optical switch 220 via the optical switch. Each input / output combination may be referred to as a switch conjugate or switch port. Irrespective of the way in which the control data to and from a given host device 1011-101N connected to the routing system 1000 is received – optically and converted or through an electronic side channel – the bidirectional link between the host and the routing system 1000 on this control plane is point to point and always active, irrespective of the current switch state. This provides a fixed connection between the host and the routing system 1000, that is not changed and therefore does not need to re- lock or synchronise. It is only the path through the data plane that is altered by the operation of the optical switch 220. For instance when considering data sent between a sender host ( for example host 1) and a receiver host (for example host 2), then the transceivers in host 1 and host 2 establishing the communication on the data plane and through optical switch 220 have first to synchronise or re-lock to be able to talk to each other. A control channel protocol may be used for different purposes. The control channel protocol may be used to distribute a common clock throughout the system to bring all connected devices (hosts) into a clock coherency domain. The control channel protocol may also be used to provide a mechanism to communicate information that facilitates faster relock operation of attached host transceivers. It may also be used to implement routing and signal flow capabilities within the network but outside the data plane protocol. The data plane protocol is the network protocol that is communicated across the data path. Various data plane protocols may be considered including Ethernet, Infiniband, CXL, NVLink, etc…. All these protocols encode the information on where to route packets into in-band header data. As explained above the data on the data plane is not analysed. Instead, the information needed to route the data stream (containing the entire data plane protocol) is entirely contained in the control plane protocol. The control plane protocol can be freely defined without any interdependencies with the data plane protocol. So the proposed routing system 1000 is agnostic to the data plane protocol. When a particular request between a source host and a receiver host has failed, a failure message may be sent back to the source host, either electronically or optically. The failure message may be sent on the control path back to the host which initiated the request using the optical transmitters 240 and the combiner 225, or via one of the side channels CN1- CNN. Alternatively, the failure message sent back to the host upon congestion may contain a timestamp indicating the time of availability of the requested output port (delayed acknowledge). When using the splitter 210 implemented as a power splitter; if conflicts are detected between incoming packets on different ports, the corresponding channel which is not granted a path by the arbitration logic is buffered electronically and when the output port of the optical switch is free, the signal is regenerated using the optical transmitter 240. Alternatively, optical buffering may be performed via the optical delay line 250 and / or the optical delay line 260. The routing system 1000 of figure 10 may be used for different purposes. For instance, the system 1000 may be used as a clock generator or as a clock follower. When the system 1000 operates as clock generator the internal oscillator 434 generates a reference clock (clock-ref) which serves as a reference to all the phase locked loops (PLLs) contained in the controller 234. Each channel has its own clock and data recovery CDR based receiver. All PLLs lock onto the oscillator 434 and all the CDR receivers retime onto the locally generated clocks (Clocki-clockN). The CDR module recovers the clock signal of each channel. The controller 234 then generates for each channel a control packet data stream , for instance as a bitstream, that includes the clock signal (Clocki) based on the reference clock (clock-ref). Therefore the reference clock is also embedded into the control packet data stream. The bitstream may be sent to the hosts via the channels CN1-CNN or via 240 and 225. The clock (clocki) embedded in the control packet stream then serves as a timing reference to lock onto in all connected devices. These devices can then in turn base their outgoing data streams on this timing reference thus creating a fully synchronous communication path with the routing system 1000. Alternatively, jitter cleaning PLL circuitry may be used in both host and switch routing systems to avoid unacceptable accumulation of timing jitter. If in turn the routing system 1000 is set to clock follower mode, the device uses the recovered CDR clock from one of its control physical layers (PHYs) of the electronic control plane to drive all internal clocks, including the ones driving the transmitters on all PHYs of the electronic control plane 234. Thus, the clock reference is passed on to devices not directly connected to the clock generator. Each network may only have a single clock generator in active state. Additionally, a failover protocol may be devised to always have exactly one operational clock generator in the network. Figure 13 shows a system having two optical switches. The first optical switch 1321 is controlled by a first data stream analyser 1331 operating as a clock source 1340. The second optical switch 1322 is controlled by a second data stream analyser 1332 operating as a clock repeater 1350. Four hosts are represented and labelled 1301-1304. All PLLs internal to the data stream analyser 1331 are locked onto a local high precision oscillator which serves as a timing reference. All control channel data streams which are continuously generated on all active ports of the optical switch 1321 are thus created based on this timing reference. Switch 1321 on port N connects to switch 1322 on port 1. Thus, the control data stream generated by 1331 which is modulated onto the λ-label or onto the electrical sideband connection, is received by the CDR based receiver in the data stream analyser 1332. The data stream analyser 1332 uses the CDR recovered clock of its control PHY 1, may jitter clean it and then use it as a timing reference for all its internal PLL circuitry. Thus, switch 1322 will pass on the clock reference as output by switch 1321 to all the devices that are attached to switch 1322 by means of the control channels 2 through N of data stream analyser 1332. Host devices are always configured as clock followers which, as a result lets them establish a source synchronous communication path with every other host attached to the same network. A skilled person will appreciate that variations of the disclosed arrangements are possible without departing from the disclosure. Accordingly, the above description of the specific embodiments is made by way of example only and not for the purposes of limitation. It will be clear to the skilled person that minor modifications may be made without significant changes to the operation described.

Claims

CLAIMS 1. A routing system for routing an optical signal, wherein the optical signal forms a data stream having a header and a payload; the routing system comprising an optical switch comprising at least one input port and a plurality of outputs ports; a splitter coupled to the optical switch via a first path and to a data stream analyser via a second path; the splitter being adapted to split the optical signal into a first signal along the first path and a second signal along the second path; wherein the data stream analyser is configured to identify a destination information of the optical signal in the header; the system being adapted to configure the optical switch to route the optical signal to a destination port among the plurality of output ports, based on the destination information.

2. The routing system as claimed in claim 1, wherein the data stream analyser comprises a controller configured to generate a control signal to control the configuration of the optical switch to route the optical signal to the destination port.

3. The routing system as claimed in claim 1 or 2, wherein the data stream analyser is configured to read the header to identify the destination information.

4. The routing system as claimed in any of the preceding claims, wherein the controller is configured to identify a conflict between a plurality of optical signals, and wherein the controller is configured to delay one or more optical signals to prevent multiple signals from passing through a same destination port of the optical switch at the same time.

5. The routing system as claimed in claim 4, wherein the system comprises at least one optical delay and wherein the controller is configured to send an identified optical signal through the delay.

6. The routing system as claimed in claim 5, wherein the said at least one optical delay is an adjustable delay, and wherein the controller is configured to adjust the adjustable delay.

7. The routing system as claimed in any of the claims 4 to 6, wherein the system comprises an optical transmitter coupled between the controller and the optical switch, the optical transmitter being adapted to convert an electronic signal into an optical signal.

8. The routing system as claimed in claim 7, wherein the controller comprises a memory, the controller being configured to delay a signal by storing the signal in electronic form in the memory before sending the signal to the optical transmitter.

9. The routing system as claimed in any of the claims 4 to 8, wherein the controller is configured to extract clock information from the optical signal.

10. The routing system as claimed in any of the preceding claims, wherein the data stream analyser comprises an optical pattern recognition circuit.

11. The routing system as claimed in claim 10, wherein the optical pattern recognition circuit comprises an optical multiplication circuit coupled to the controller.

12. The routing system as claimed in claim 11, wherein the optical multiplication circuit is adapted to multiply a plurality of optical input vectors with a pattern matrix; wherein the optical input vectors comprise a set of data values and wherein the pattern matrix comprises target values of the pattern to be detected; wherein upon multiplying each optical input vector with the pattern matrix, the optical multiplication circuit provides a set of multiplication values.

13. The routing system as claimed in claim 12, comprising a comparator configured to compare the multiplication values with at least one threshold value to identify the pattern or a similar pattern in the plurality of optical input vectors.

14. The routing system as claimed in any of the preceding claims, wherein the data stream analyser comprises an array of photodetectors coupled to the controller.

15. The routing system as claimed in any of the preceding claims, wherein the optical switch comprises a plurality of input waveguides; a plurality of output waveguides; and a plurality of coupling waveguides, each coupling waveguide being configured to couple an input waveguide to an output waveguide, wherein a plurality of coupling waveguides comprises an amplitude adjuster.

16. The routing system as claimed in claim 15, wherein the amplitude adjuster comprises an optical modulator or an optical amplifier or a combination of both.

17. The system as claimed in any of the claims 11 to 16, wherein the optical multiplication circuit comprises a plurality of cells, the said plurality of cells comprising at least one primary cell and at least one reference cell; the system being configured such that upon sending the said at least one input signal to the multiplication circuit, a first pair of output adjusted signals adjusted by the primary cell, and a second pair of output adjusted signals adjusted by the reference cell are obtained for each input signal; the system further comprising an output circuit adapted to detect the first and second pairs of output adjusted signals; wherein the said at least one input signal forms an input vector, and wherein the transmission factors of the cells form a coefficient matrix; and to process the first and second pairs of output adjusted signals to obtain a result of a multiplication operation of the input vector with the coefficient matrix.

18. The system as claimed in claim 17, wherein each reference cell has a matrix reference amplitude adjuster having a reference transmission factor.

19. The system as claimed in claim 17 or 18, wherein each primary cell has a primary amplitude adjuster having a primary transmission factor, or wherein at least one primary cell has a coupler and wherein the cell transmission factor is based on splitting ratios of the coupler.

20. The system as claimed in any of the claims 17 to 19, wherein the first pair of output adjusted signals is adjusted by the primary amplitude adjuster, and the second pair of output adjusted signals is adjusted by the reference amplitude adjuster.

21. The system as claimed in any of the claims 17 to 20, wherein the optical multiplication circuit comprises a reference stage having a light source coupled to at least one wavelength multiplexer, the light source being coupled to each wavelength multiplexer via a reference channel provided with an input reference amplitude adjuster, the light source being configured to provide optical signals at a reference wavelength.

22. The system as claimed in claim 21, wherein each input reference amplitude adjuster, and each matrix reference adjuster is operable in a plurality of states that include a first state for minimum transmission, a second state for maximum transmission, and a middle state between the first state and the second state, and wherein each input reference amplitude adjuster and each matrix reference amplitude adjuster is set to the middle state.

23. The system as claimed in claim 21 or 22, wherein for each optical input vector, each wavelength multiplexer is configured to receive an optical signal at a data wavelength.

24. The routing system as claimed in claim 14, wherein the splitter comprises a plurality of inputs for receiving a plurality of optical signals; and wherein for each input of the splitter, the array of photodetectors comprises a corresponding photodetector directly connected to an output of the splitter.

25. The routing system as claimed in any of the preceding claims, wherein the splitter comprises a wavelength demultiplexer.

26. The routing system as claimed in any of the preceding claims, wherein the optical switch is coupled to a combiner.

27. The routing system as claimed in any one of the claims 2 to 26, wherein the controller has an output coupled to a plurality of bi-directional channels for communicating with a plurality of host devices.

28. The routing system as claimed in any one of the claims 2 to 27, wherein the data stream analyser comprises an internal oscillator adapted to generate a reference clock; and wherein the controller comprises a phase locked loop circuit adapted to generate a clock signal for each input of the splitter based on the reference clock, or based on a recovered clock; and wherein the controller is configured to generate control packet data streams, wherein each control packet data stream embed the clock signal generated by the phase locked loop circuit .

29. The routing system as claimed in any of the preceding claims, wherein the second path provides a constant connection between the splitter and the optical switch.

30. A method of routing an optical signal, wherein the optical signal forms a data stream having a header and a payload; the method comprising splitting the optical signal into a first signal and a second signal; sending the first signal to an optical switch, wherein the optical switch has at least one input port for receiving the first signal and a plurality of output ports; sending the second signal to a data stream analyser ; identifying a destination information of the optical signal in the header; and configuring the optical switch to route the optical signal to a destination port among the plurality of output ports, based on the destination information.

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