Detecting a fault during scanning of an analogue signal
Patent Information
- Authority / Receiving Office
- EP · EP
- Patent Type
- Applications
- Current Assignee / Owner
- SIEMENS AG
- Filing Date
- 2024-08-12
- Publication Date
- 2026-05-20
Smart Images

Figure EP2024072711_13032025_PF_FP_ABST
Abstract
Description
[0001] Description
[0002] Detecting an error when sampling an analog signal
[0003] The invention relates to a module for sampling an analog signal and a method for detecting an error when sampling an analog signal by a module.
[0004] In particular, the invention relates to the sampling of an analog signal by a module whose module time is repeatedly synchronized with a system time. In particular in Ethernet networks, clocks are synchronized according to a synchronization protocol, for example. One such synchronization protocol is the so-called Precision Time Protocol (PTP). With such synchronization, synchronization telegrams with time stamps are sent over the network, by means of which clocks in the network align their time with one another. Typically, one of these clocks is a so-called master clock, which specifies a master time for so-called slave clocks. In particular, faulty or missing synchronization of the clocks in the network can lead to errors when sampling the analog signal.
[0005] The invention is based on the object of detecting an error when sampling an analog signal.
[0006] The object is achieved according to the invention by a method having the features of claim 1 and a module having the features of claim 10.
[0007] Advantageous embodiments of the invention are the subject of the dependent claims.
[0008] The method according to the invention for detecting an error in a module for sampling an analog signal at a predetermined sampling rate comprises the following steps: - the completion of each sampling of the analog signal is reported to a processor of the module by a message signal,
[0009] - a module time is repeatedly synchronized with a system time,
[0010] - the processor generates a processor signal at module times equidistant from the module time, so that the difference between any two consecutive module times is a constant module time difference,
[0011] - a reference time period is measured once, which is a time interval between the generation of a processor signal and the next reception of a message signal by the processor following the generation of the processor signal,
[0012] - for each processor signal following the processor signal used to measure the reference time period, a signal difference time period is measured, which is a time interval between the generation of the processor signal and the next reception of an indication signal by the processor following the generation of the processor signal,
[0013] - a tolerance period is set and
[0014] - an error is concluded if a measured signal difference time deviates from the reference time by more than the specified tolerance time.
[0015] The inventive method is based on the idea of relating processor signals from a processor of the module and the samples of the analog signal to one another. The processor signals are generated by the processor at module times that are equidistant from the module time. The processor signals are thus a measure of the module time. The completion of each sample of the analog signal is reported to the module's processor by a notification signal. Therefore, a shift in the notification signals relative to the processor signals indicates that the sampling of the analog signal is no longer consistent with the module time. The method aims to detect such a shift in the notification signals relative to the processor signals.For this purpose, the method provides for a one-time measurement of a reference time period. This reference time period is used to compare signal difference time periods which, like the reference time period, are each a time period between the generation of a processor signal and the next receipt of a message signal by the processor following the generation of the processor signal. If a signal difference time period deviates significantly from the reference time period, i.e. by more than a specified tolerance time period, an error is concluded.
[0016] The method according to the invention advantageously enables the module itself to detect faulty sampling of the analog signal, since the method is based exclusively on the measurement and evaluation of signals internal to the module, namely the processor signals and the status signals. In particular, the method therefore does not require a higher-level control or monitoring unit to detect faulty sampling.
[0017] In one embodiment of the method according to the invention, the module time difference is a multiple of the inverse of the sampling rate.
[0018] The aforementioned embodiment of the method according to the invention ensures that, when the analog signal is sampled error-free relative to the module time, the signal difference duration always has the same value—namely, the value of the reference duration. This is necessary in order to be able to meaningfully compare each measured signal difference duration with the reference duration. In a further embodiment of the method according to the invention, the tolerance duration is less than half the inverse of the sampling rate.
[0019] The above-mentioned embodiment of the method according to the invention aims at relating the tolerance period to the correct reporting signal and not to a reporting signal that follows or precedes this reporting signal.
[0020] In a further embodiment of the method according to the invention, the module time is synchronized with the system time using synchronization messages received from the module according to a synchronization protocol. For example, the Precision Time Protocol (PTP) or the Network Time Protocol (NTP) is used as the synchronization protocol.
[0021] The above-mentioned embodiment of the method according to the invention is aimed in particular at the use of the method according to the invention for a module which is connected to a network, in particular to an Ethernet network.
[0022] In a further embodiment of the method according to the invention, the analog signal is sampled by a sampling unit which has a clock generator derived from the module time by means of a clock tracking unit.
[0023] The aforementioned embodiment of the method according to the invention aims to relate the samples of the analog signal to the modulo time. For this purpose, a sampling unit is used that has a clock generator that is related to the modulo time by means of a clock tracking unit.
[0024] In a further embodiment of the method according to the invention, a time interval between the reception of two successive message signals is detected by the processor and a fault in the module is concluded if one of these time intervals is greater or less than a predetermined time threshold value.
[0025] The aforementioned embodiment of the method according to the invention takes into account that the time interval between the receipt of any two consecutive signaling signals by the processor should be at least approximately constant. A deviation of this time interval from a suitably selected time threshold therefore also indicates faulty sampling of the analog signal.
[0026] In a further embodiment of the method according to the invention, a response is output if a module error is detected. As a response, an optical signal is output, for example, a signal generated by one or more LEDs. This can signal an incorrect sampling of the analog signal.
[0027] A module according to the invention for sampling an analog signal with a predetermined sampling rate comprises
[0028] - a synchronization unit configured to repeatedly synchronize a module time with a system time,
[0029] - a processor which is configured to generate a processor signal at module times equidistant from the module time, so that the difference between any two consecutive module times is a constant module time difference,
[0030] - a sampling unit which has a clock generator derived from the module time by means of a clock tracking unit and is arranged to sample the analogue signal according to the sampling rate and to report the completion of each sampling of the analogue signal to the processor by means of a notification signal,
[0031] - a time measuring unit which is set up to measure a signal difference time duration for each processor signal, which is a time interval between the generation of the processor signal and the next reception of a message signal by the processor following the generation of the processor signal, and
[0032] - an evaluation unit which is set up to store a signal difference time period measured once for a processor signal as a reference time period and to compare the measured signal difference time period with the reference time period for each processor signal which follows the processor signal used for measuring the reference time period and to conclude that there is a fault in the module if the measured signal difference time period deviates from the reference time period by more than the tolerance time period.
[0033] A module according to the invention enables the implementation of the method according to the invention. Therefore, the advantages of a module according to the invention correspond to the above-mentioned advantages of the method according to the invention.
[0034] The above-described properties, features, and advantages of this invention, as well as the manner in which they are achieved, will become clearer and more readily understood in connection with the following description of exemplary embodiments, which are explained in more detail in conjunction with the drawings.
[0035] FIG 1 shows a signal chain for detecting an error when sampling an analog signal,
[0036] FIG 2 is a block diagram of a module for sampling an analog signal.
[0037] Corresponding parts in the figures are provided with the same reference symbols.
[0038] FIG. 1 illustrates an exemplary embodiment of the method according to the invention for detecting an error during sampling of an analog signal S at a predetermined sampling rate by a module 1. FIG. 2 shows a block diagram of an exemplary embodiment of the module 1. The module 1 comprises a synchronization unit 3, a processor 5, a sampling unit 7, a clock tracking unit 9, a time measurement unit 11, and an evaluation unit 13.
[0039] The synchronization unit 3 repeatedly synchronizes a module time with a system time T. For example, the module time is synchronized with the system time T using synchronization messages received from the module 1 according to a synchronization protocol. The synchronization protocol used, for example, is the Precision Time Protocol (PTP) or the Network Time Protocol (NTP).
[0040] Processor 5 generates a processor signal P at module times equidistant from the module time, so that the difference between any two consecutive module times is a constant module time difference. The module time difference is a multiple of the inverse of the sampling rate.
[0041] The clock tracking unit 9 derives a sampling clock A for a clock generator of the sampling unit 7 from the module time. The sampling unit 7 samples the analog signal S according to the sampling clock A tracked by the clock tracking unit 9. The completion of each sampling of the analog signal S is reported to the processor 5 by the sampling unit 7 via a notification signal M.
[0042] The time measuring unit 11 measures a reference time period once, which is a time interval between the generation of a processor signal P and the next reception of a message signal M by the processor 5 following the generation of the processor signal P. The reference time period is measured, for example, after the system has settled, e.g. when a master time provided by a synchronization protocol and a slave time differ from each other by at most a predetermined time difference, for example 50 ns, or when a predetermined minimum number of synchronization telegrams of the synchronization protocol have been exchanged. The reference time period is stored by the evaluation unit 13.
[0043] Subsequently, for each processor signal P that follows the processor signal P used for measuring the reference time period, the time measuring unit 11 measures a signal difference time period, which is a time interval between the generation of the processor signal P and the next receipt of a message signal M by the processor 5 following the generation of the processor signal P. The evaluation unit 13 compares the measured signal difference time period with the reference time period and concludes that there is a fault in module 1 if the measured signal difference time period deviates from the reference time period by more than a specified tolerance time period. The tolerance time period is, for example, less than half the inverse of the sampling rate.
[0044] Optionally, the time measuring unit 11 additionally records a time interval between the reception of two successive message signals M by the processor 5 and concludes that there is an error in the module 1 if one of these time intervals is greater or less than a predetermined time threshold value.
[0045] Furthermore, a response can be output if a fault is detected in module 1. As a response, an optical signal is output, for example, a signal generated by one or more LEDs.
[0046] Although the invention has been illustrated and described in detail by means of preferred embodiments, the invention is not limited by the disclosed examples, and other variations may be derived therefrom by those skilled in the art without departing from the scope of the invention. Regardless of the grammatical gender of a particular term, this includes persons of male, female, or other gender identities.
Claims
Patent claims 1. Method for detecting an error of a module (1) for sampling an analog signal (S) with a predetermined sampling rate, wherein - the completion of each sampling of the analogue signal (S) is reported to a processor (5) of the module (1) by a signal (M), - a module time is repeatedly synchronized with a system time (T), - a processor signal (P) is generated by the processor (5) at module times equidistant from the module time, so that the difference between any two consecutive module times is a constant module time difference, - a reference time period is measured once, which is a time interval between the generation of a processor signal (P) and the next reception of a message signal (M) by the processor (5) following the generation of the processor signal (P), - for each processor signal (P) following the processor signal (P) used for measuring the reference time period, a signal difference time period is measured, which is a time interval between the generation of the processor signal (P) and the next reception of a message signal (M) by the processor (5) following the generation of the processor signal (P), - a tolerance period is specified and - an error is concluded if a measured signal difference time deviates from the reference time by more than the specified tolerance time.
2. The method of claim 1, wherein the module time difference is a multiple of the inverse of the sampling rate.
3. The method according to claim 1 or 2, wherein the tolerance period is less than half the inverse of the sampling rate.
4. Method according to one of the preceding claims, wherein the module time is synchronized with the system time (T) using synchronization messages received from the module (1) according to a synchronization protocol.
5. The method of claim 4, wherein the synchronization protocol is the Precision Time Protocol.
6. The method of claim 4, wherein the synchronization protocol is the Network Time Protocol.
7. Method according to one of the preceding claims, wherein the analog signal (S) is sampled by a sampling unit (7) which has a clock generator derived from the module time by means of a clock tracking unit (9).
8. Method according to one of the preceding claims, wherein a time interval between the reception of two successive message signals (M) is detected by the processor (5) and a fault of the module (1) is concluded if one of these time intervals is greater or less than a predetermined time threshold value.
9. Method according to one of the preceding claims, wherein a reaction is output when an error of the module (1) is inferred.
10. Module (1) for sampling an analog signal (S) with a predetermined sampling rate, the module (1) comprising - a synchronization unit (3) configured to repeatedly synchronize a module time with a system time (T), - a processor (5) which is arranged to generate a processor signal (P) at module times equidistant from the module time, so that the difference between any two consecutive module times is a constant module time difference, - a sampling unit (7) which has a clock generator derived from the module time by means of a clock tracking unit (9) and is arranged to sample the analogue signal (S) according to the sampling rate and to report the completion of each sampling of the analogue signal (S) to the processor (5) by means of a notification signal (M), - a time measuring unit (11) which is designed to measure a signal difference time duration for each processor signal (P), which is a time interval between the generation of the processor signal (P) and the next reception of a message signal (M) by the processor (5) following the generation of the processor signal (P), and - an evaluation unit (13) which is set up to store a signal difference time duration measured once for a processor signal (P) as a reference time duration and to compare the measured signal difference time duration with the reference time duration for each processor signal (P) which follows the processor signal (P) used for measuring the reference time duration and to conclude that there is an error in the module (1) if the measured signal difference time duration deviates from the reference time duration by more than the tolerance time duration.