METHOD FOR IONIC IMPLANTATION INTO A SEMICONDUCTOR WAVELENGTH

Abstract

According to one aspect, an ion implantation method is proposed for a semiconductor wafer (PS) placed in a vacuum implantation chamber (CHI). The semiconductor wafer (PS) has an integrated circuit area (ICA) and a peripheral zone (PRZ) surrounding this ICA. Ion implantation allows for the application of doping to regions, called implantation regions (IGRs), of the ICA. The method comprises: - the formation of a photoresistive resin (RES) coating serving as a mask on the semiconductor wafer (PS), then - the formation of openings in the photoresistive resin (RES) coating at the implantation regions (IGRs) of the ICA and at least one region (RDM) of the peripheral zone, and finally - the implantation of ions (12) into the semiconductor wafer (PS). Figure for the abstract: Figure 5

Description

Description Title of the invention: ION IMPLANTATION METHOD IN A SEMICONDUCTIVE WAVE

[0001] Embodiments and implementation methods relate to the manufacture of circuits integrated, and more specifically an ion implantation process in a platelet semiconductor.

[0002] = Ion implantation in a semiconductor wafer is used for fa- Integration of integrated circuit(s) into this semiconductor wafer. The implementation Ionics allows the introduction of dopants into this semiconductor in order to modify its conductivity properties.

[0003] — Ion implantation doping is performed in an implantation chamber under vacuum. Doping involves accelerating ions with an electric field using of an implantation machine in order to impart sufficient energy to the ions to so that they can enter the semiconductor wafer to be doped.

[0004] — Accelerating an ion increases its kinetic energy so that the ion can penetrate deeper into the semiconductor wafer.

[0005] Once implanted in the semiconductor wafer, the dopants are subjected to a Heat treatment is necessary for their electrical activation. Each dopant then creates a charge carrier (hole or electron depending on whether it is a P-type dopant or type N) thus locally modifying the conductivity of the semiconductor plate.

[0006] The quantity of implanted dopants is measured using a Faraday cavity (in (English "Faraday cup"). During ion implantation, the pressure in the chamber The implantation is also monitored to ensure that it does not exceed a threshold predefined to maintain at least a significant vacuum in the room of implantation.

[0007] — To select the regions of the semiconductor plate to be doped, it is appropriate to use a mask made of a photosensitive resin coating. The photo- resin sensitive is generally made up of carbon chains composed of atoms of carbon and hydrogen. In particular, the mask includes solid areas allowing the implantation of ions in the semi-platelet regions Conductive elements are arranged under the solid parts of the mask. The mask includes also openings allowing the implantation of ions in the regions, called implantation region, of the semiconductor wafers arranged at the level of these or- vertures.

[0008] However, during implantation, the emitted ion flux can damage the resin The mask's photosensitive properties. In particular, the emitted ions can break the bonds between The atoms of the photosensitive resin. The carbon and hydrogen atoms are then degassed (i.e., expelled) from the resin in the implantation chamber due to the energy transferred to them. The pressure in the implantation chamber then increases. In particular, the beginning of implantation can lead to a high peak in the degassing of carbon and hydrogen atoms. The degassed atoms can then react with the implanted ions, which can lose their charge. Some implanted ions are therefore not counted by the Faraday cavity. Consequently, the amount of dopants actually implanted in the semiconductor plate may differ by a few percent from the initially targeted amount. Furthermore, resin outgassing degrades the vacuum in the implantation chamber. When the pressure in the chamber exceeds the predefined threshold, the implantation machine may stop, thus delaying the manufacturing of the integrated circuit. Exceeding the predefined threshold can occur, in particular, during the peak outgassing at the beginning of the implantation process. A pumping system is used to maintain a high vacuum in the implantation machine throughout the implantation process. However, such a pumping system may not be sufficient to react quickly to the rapid pressure increase at the peak of degassing. One solution to reduce the outgassing of atoms from the resin is to reduce the ion beam current. However, this solution necessarily increases the implantation time, and therefore the time and cost of manufacturing the integrated circuit. Therefore, there is a need to develop a simple and inexpensive solution for ion implantation in a semiconductor wafer. This solution must reduce outgassing intensity while ensuring adequate doping of the semiconductor wafer. According to one aspect, a method for ion implantation is proposed in a semiconductor wafer placed in a vacuum implantation chamber, the semiconductor wafer having an integrated circuit area and a peripheral area around this integrated circuit area, the ion implantation allowing the application of doping in at least one region, called the implantation region, of the integrated circuit area, the method comprising: - the formation of a photosensitive resin coating serving as a mask on the semiconductor wafer, the photosensitive resin coating being applied to the integrated circuit area and to the peripheral area, then - the formation of an opening in the photosensitive resin coating at the level of said at least one region of implantation of the integrated circuit area, then - implantation of ions in the semiconductor wafer, the process further comprising, prior to said ion implantation, the formation of an opening in the photosensitive resin coating at the level of at least one region of the peripheral zone so as to reduce a coverage area of ​​the photosensitive resin coating on the semiconductor wafer. The peripheral zone is an area used solely to facilitate the fabrication of the integrated circuit. This peripheral zone can be useful for etching, chemical polishing, or for creating cutting paths. Advantageously, at least one region of the peripheral zone above which an opening is formed is a region devoid of electrical connections. The openings in the photosensitive resin coating are formed in regions of the peripheral zone where it is possible to implant ions without having any subsequent impact on the manufacturing of the integrated circuit. Reducing outgassing minimizes interactions between the outgassed atoms and the ions in the implantation beam. This ensures accurate ion counting by the Faraday cavity, resulting in an integrated circuit that conforms to the expected specifications. Such a process is suitable for high power installations, for example above 1000W. Advantageously, the surface area covered by the photosensitive resin coating, after said formation of an opening at the level of at least one region of the peripheral zone, is sufficiently reduced to reduce outgassing of atoms from the photosensitive resin coating during said ion implantation so that the pressure in the implantation chamber remains below a given threshold during this ion implantation. This process reduces the mask's surface area, thus minimizing mask outgassing during ion implantation. Specifically, during ion implantation, the photosensitive resin surface of the mask exposed to ions is sufficiently limited to ensure that the pressure within the chamber remains below the threshold required to prevent the implantation machine from shutting down. In an advantageous embodiment, the formation of the aperture in at least one region of the integrated circuit area and the formation of the aperture in at least one region of the peripheral area are performed simultaneously. Such a method has the advantage of not increasing the manufacturing time of the integrated circuit. Preferably, the surface area covered by the photosensitive resin coating, after forming said openings at the level of said at least one region of the integrated circuit area and at said at least one region of the peripheral area, is less than 75% of the total surface area of ​​the semiconductor wafer. driver. Advantageously, during said ion implantation, the ions are counted using a Faraday cavity, said ion implantation ending when the number of ions counted reaches a predefined number. Preferably, said at least one doped region of the peripheral area and said at least one implantation region of the integrated circuit area are doped at a dose greater than or equal to 1x10' atoms / cm?. According to another aspect, a semiconductor device is proposed comprising an integrated circuit area and a peripheral area around said integrated circuit area, the peripheral area comprising at least one doped region of the same nature as at least one doped implantation region of the integrated circuit area. Thus, a semiconductor device is proposed, obtained from a semiconducting wafer for which an implantation process as described above has been implemented. Advantageously, said at least one boosted region of the peripheral zone is devoid of electrical connections. Preferably, said at least one doped region of the peripheral area and said at least one implantation region of the integrated circuit area have a dopant concentration greater than or equal to 1x107 atoms / em*. Other advantages and features of the invention will become apparent upon examination of the detailed description of implementation and embodiments, which are by no means limiting, and the accompanying drawings in which: [Fig.1] [Fig.2] [Fig.3] [Fig.4] [Fig. 5] [Fig.6] schematically illustrate embodiments and implementations of the invention. Figure [Fig.1] illustrates an ion implantation procedure according to one implementation method. The process includes obtaining a PS semiconductor wafer. This semiconductor wafer is used to fabricate an integrated circuit. As illustrated in [Fig. 2] in a cross-sectional view, the wafer comprises a dedicated integrated circuit area (ZCI) for forming integrated circuit components, and a peripheral ZPR area surrounding said ZCI. This peripheral ZPR area is not used to form integrated circuit components but is useful for implementing the integrated circuit fabrication. In particular, the peripheral ZPR area is used solely to facilitate the fabrication of the integrated circuit. This peripheral area can be useful for etching, chemical polishing, or for creating cutting paths. For the sake of clarity, the semiconductor wafer here is defined as comprising a single integrated circuit area and a single peripheral area surrounding that area. However, it is possible to design a PS semiconductor wafer with multiple integrated circuit areas to form several integrated circuits and multiple peripheral areas around these integrated circuit areas. The peripheral area may also only partially surround the integrated circuit area. As illustrated in [Fig. 3], the PS semiconductor wafer is placed in a vacuum CHI implantation chamber of an MI implantation machine. Specifically, the MI implantation machine includes a pumping system (not shown) for creating a vacuum in the CHI implantation chamber. The MI implantation machine is configured to deliver an ion beam into the CHI implantation chamber towards the PS semiconductor wafer to perform ion implantation. Ion implantation in the PS semiconductor wafer allows for the application of doping to regions, called implantation regions, of the ZCI integrated circuit area to form integrated circuit components. Before implantation, the process includes the formation of a mask on the PS semiconductor wafer for ion implantation. The MSK mask then allows the selection of the implantation regions to be doped. In particular, the MSK mask formation 11 comprises a formation 11-1 of a photoresistive resin coating RES on the PS semiconductor wafer. Figure 4 illustrates a cross-sectional view of a result of the formation 11-1 of the photoresistive resin coating RES on the PS semiconductor wafer. The MSK mask formation also comprises a formation 11-2 of ORGI and ORDM apertures in the photoresistive resin coating at the RGI implantation regions (for ORGI apertures) of the integrated circuit area ZCI and at least one RDM region (for ORDM apertures) of the peripheral area ZPR. Figure 5 illustrates a cross-sectional view of a result of the formation 11-2 of ORGT and ORDM apertures in the photoresistive resin coating. In particular, ORDM apertures are formed in regions of the peripheral ZPR zone where ions can be implanted without any subsequent impact on the integrated circuit fabrication. ORDM apertures formed in the peripheral ZPR zone reduce the coverage area of ​​the photoresistive resin (RES) coating. It is important to seek to form as many ORDM openings as possible at the level of the peripheral ZPR zone to minimize the coverage area of ​​the photosensitive resin coating RES. For example, ORDM openings are formed in dummy regions (or "dummies") of the peripheral area. These dummy regions are areas that do not participate in any of the integrated circuit's components but are useful for homogenizing the surface density of the semiconductor wafer at the integrated circuit level. These ORDM regions are therefore devoid of electrical connections. It is also possible to form ORDM openings at RDM regions of the peripheral ZPR area within a seal ring. The seal ring acts as a protective barrier between the integrated circuit and the grooves on the semiconductor wafer. The seal ring prevents contamination of the integrated circuit by polluting particles resulting from the wafer's groove cutting along the grooves. The ORDM aperture formation in the peripheral ZPR area is performed simultaneously with the ORGI aperture formation in the integrated circuit area (ZCI). Therefore, ORDM aperture formation in the peripheral ZPR area does not increase the integrated circuit manufacturing time. The process then involves implanting ions into the semiconductor wafer. The ions are implanted in the wafer regions located beneath the mask openings. The photoresistive resin coating then prevents the ions from reaching the regions of the semiconductor wafer covered by this RES coating. The RDM regions of the peripheral zone ZPR and the RGI regions of the integrated circuit zone ZCI can be doped with a dose greater than or equal to 1 x 10⁻⁵ atoms / cm², so as to obtain a dopant concentration greater than or equal to 1 x 10⁻³ atoms / cm² in the RDM and RGI regions. Ion implantation in the semiconductor wafer allows doping to be applied in the said RGI implantation regions of the integrated circuit area ZCI to form integrated circuit components. Furthermore, implanting ions in the RDM regions of the peripheral ZPR zone under the mask openings does not interfere with the fabrication of the integrated circuit. Furthermore, reducing the MSK mask's coverage area through ORDM openings formed above the wafer's peripheral ZPR zone minimizes outgassing of photoresist atoms during ion implantation. This keeps the pressure within the chamber limited and prevents the implantation machine from shutting down, a problem that can occur when the chamber pressure exceeds a certain threshold. During ion implantation, ions are counted using a Faraday cup. Ion implantation ends when the number of counted ions reaches a predetermined value. Reducing outgassing minimizes the reactions between the outgassed atoms and the implanted ions, thus reducing the charge of the implanted ions. Therefore, the number of ions counted by the Faraday cup corresponds to the number of ions implanted in the implantation regions of the integrated circuit area. Such a process is suitable for high power installations, for example above 1000W. The semiconductor wafer can then be used to obtain a DIS semiconductor device, as illustrated in [Fig. 6]. The DIS semiconductor device comprises the ZCI integrated circuit area and at least a portion of the ZPR peripheral area. The ZPR peripheral area then exhibits at least one RDM-doped region of the same type as at least one RGI implantation region of the ZCI integrated circuit area.

Claims

Demands

1. Method for ion implantation in a semiconductor wafer (PS) placed in a vacuum implantation chamber (CHI), the semiconductor wafer (PS) with an integrated circuit area (ZCT) and a peripheral zone (ZPR) around this circuit zone integrated (ZCI), ion implantation allowing the application of doping in at least one region, known as the implantation region (RGI), of the area integrated circuit, the process comprising: - a formation (11-1) of a photosensitive resin (RES) coating serving as a mask on the semiconductor wafer (PS), the coating photosensitive resin (RES) being applied to the circuit area integrated zone (ZCI) and on the peripheral zone (ZPR), then - the formation (11-2) of an opening in the resin coating photosensitive (RES) at the level of said at least one region implantation (RG) of the integrated circuit area, then - implantation of ions (12) in the semiconductor wafer (PS), the process further comprising, prior to said ion implantation, a formation (11-2) of an opening in the photo-resin coating sensitive (RES) at the level of at least one region (RDM) of the peri- zone pherical so as to reduce a coating coverage area by photosensitive resin (RES) on the semiconductor wafer (PS).

2. A method according to claim 1, wherein the coverage surface of the photosensitive resin coating, after said formation of a opening at the level of at least one region of the peripheral zone, is sufficiently reduced to minimize outgassing of coating atoms in photosensitive resin (RES) during said ion implantation so that the pressure in the implantation chamber (IC) remains in- less than a given threshold during this ion implantation.

3. A method according to any one of claims 1 or 2, wherein the formation of the opening (ORGI) at the level of said at least one implantation region (RGI) of the integrated circuit zone (ICZ) and the opening formation (ORDM) at the level of said at least region (RDM) of the peripheral zone (ZPR) are performed simultaneously.

4. A method according to any one of claims 1 to 3, wherein the surface of coverage of the photosensitive resin coating, after having formed said openings (ORGI, ORDM) at the level of said at least one integrated circuit zone (ICZ) implementation region (IGR) and at at least one region (RDM) of the peripheral zone (ZPR), is less than 75% compared to a total area of ​​the semiconductor wafer,

5. A method according to any one of claims 1 to 4, wherein during said ion implantation (12), the ions are counted using a cavity of Faraday, the said ion implantation ending when the number The number of ions counted reaches a predefined number.

6. A method according to any one of claims 1 to 5, wherein said at less a doped region (RDM) of the peripheral zone (ZPR) and said at least one implementation region (IGR) of the integrated circuit area (ZCD) are doped at a dose greater than or equal to 1x10!* atoms / em?.

7. Semiconductor device obtained from a semiconductor wafer- conductive (PS) for which an ion implantation process according one of the demands | to 6 has been implemented.

8. Device according to claim 7 wherein said at least one region (RDM) doped by the peripheral zone (ZPR) is devoid of electrical connections.

9. Device according to any one of claims 7 or 8, in which said at least one doped region (RDM) of the peripheral zone (ZPR) and said at least one implantation region (RGI) of the circuit area integrated (ZCI) have a concentration of dopants greater than or equal to 1x102 atoms / cm*.