Transimpedance amplifiers

Abstract

Transimpedance Amplifiers The present description relates to a device (1) comprising a first transimpedance amplifier (TIA1) comprising a first amplification stage (S1) having a first MOS transistor (T1), a second transimpedance amplifier (TIA2) comprising a second amplification stage (S2) having a second MOS transistor (T2), and a current source (100) connected in series with the first and second amplification stages (S1, S2), the current source (100) having a first terminal connected to the drain of the first MOS transistor (T1) and a second terminal connected to the drain of the second MOS transistor (T2). Figure for abstract: Fig. 1

Description

Title of the invention: Transimpedance amplifiers Technical field

[0001] The present description relates generally to electronic devices and circuits and, more particularly, to transimpedance amplifiers. Prior art

[0002] Many applications use transimpedance amplifiers. This is the case, for example, in electronic circuits intended for optical communication in which a current supplied by a photodiode is read by a corresponding transimpedance amplifier.

[0003] Known transimpedance amplifiers comprise a first stage, also called an input stage, having a current source and a single amplification stage biased by the current source. The amplification stage has an input that receives an input from the transimpedance amplifier and an output connected to the output of the transimpedance amplifier, directly or, for example, by at least one other stage of the transimpedance amplifier. The amplification stage is, for example, a MOS (Metal Oxide Semiconductor) transistor biased by the current source, the MOS transistor having its gate that receives the input of the transimpedance amplifier and a drain connected to the output of the transimpedance amplifier.

[0004] However, such known transimpedance amplifiers suffer from various disadvantages such as, for example, high power consumption and / or high noise and / or bandwidth limitation. Summary of the invention

[0005] There is a need to overcome all or part of the disadvantages of known transimpedance amplifiers, for example known transimpedance amplifiers of the type described above.

[0006] One embodiment overcomes all or part of the drawbacks of known transimpedance amplifiers, for example known transimpedance amplifiers of the type described above.

[0007] One embodiment provides a device comprising: a first transimpedance amplifier comprising a first amplification stage having a first MOS transistor, the first MOS transistor having a source connected to a first node configured to receive a first supply potential, a drain connected to an output of the first transimpedance amplifier and a gate connected to an input of the first transimpedance amplifier; a second transimpedance amplifier comprising a second amplification stage having a second MOS transistor, the second MOS transistor having a source connected to a second node configured to receive a second supply potential, a drain connected to an output of the second transimpedance amplifier and a gate connected to an input of the second transimpedance amplifier; and a current source connected in series with the first and second amplification stages between the first and second nodes, the current source having a first terminal connected to the drain of the first MOS transistor and a second terminal connected to the drain of the second MOS transistor.

[0008] According to one embodiment, the current source is shared by the first and second transimpedance amplifiers.

[0009] According to one embodiment, the current source is configured to provide a bias current to the first and second MOS transistors.

[0010] According to one embodiment, no differential pair comprises the first or second MOS transistor.

[0011] According to one embodiment: the first transimpedance amplifier further comprises a first feedback impedance having a first terminal connected to the input of the first transimpedance amplifier and a second terminal connected to the output of the first transimpedance amplifier; and the second transimpedance amplifier further comprises a second feedback impedance having a first terminal connected to the input of the second transimpedance amplifier and a second terminal connected to the output of the second transimpedance amplifier.

[0012] According to one embodiment: the first amplification stage, for example the drain of the first transistor, is connected to the output of the first transimpedance amplifier by a first capacitor; and the second amplification stage, for example the drain of the second transistor, is connected to the output of the second transimpedance amplifier.

[0013] According to one embodiment: the first amplification stage, for example the drain of the first transistor, is connected to the output of the first transimpedance amplifier by a first gain stage; and the second amplification stage, for example the drain of the second transistor, is connected to the output of the second transimpedance amplifier by a second gain stage.

[0014] According to one embodiment, the first supply potential is greater than the second supply potential.

[0015] According to one embodiment, the first MOS transistor is a PMOS transistor and the second MOS transistor is an NMOS transistor.

[0016] According to one embodiment, the device further comprises: a first photodiode connected to the input of the first transimpedance amplifier; and a second photodiode connected to the input of the second transimpedance amplifier.

[0017] According to one embodiment, the first and second photodiodes are configured to receive light having the same wavelength but different angles of incidence.

[0018] According to one embodiment, the first and second photodiodes are configured to belong to different optical channels.

[0019] According to one embodiment, the device further comprises: a photodiode connected to the input of the first transimpedance amplifier and to the input of the second transimpedance amplifier; and a capacitive element connected between the input of the first transimpedance amplifier and the first node or between the input of the second transimpedance amplifier and the second node.

[0020] According to one embodiment, the device further comprises a differential amplifier having a first differential input connected to the output of the first transimpedance amplifier and a second differential input connected to the output of the second transimpedance amplifier. Brief description of the drawings

[0021] These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments given without limitation in relation to the attached figures among which:

[0022] [Fig.l] represents an embodiment of a device comprising transimpedance amplifiers;

[0023] [Fig.2] represents an alternative embodiment of the device of [Fig.l]; and

[0024] [Fig.3] represents an embodiment of a device comprising transimpedance amplifiers. Description of the embodiments

[0025] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.

[0026] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed.

[0027] Unless otherwise specified, when referring to two elements connected to each other, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") to each other, this means that these two elements can be connected or be connected by means of one or more other elements.

[0028] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made unless otherwise specified to the orientation of the figures.

[0029] Unless otherwise specified, the expressions "about", "approximately", "substantially", and "of the order of" mean to within 10%, preferably to within 5%.

[0030] It is proposed to reuse the bias current or, in other words, the DC current (from the English "Direct Current"), supplied by a current source to bias the amplification stage of the input stage of a first transimpedance amplifier, to also bias the amplification stage of the input stage of a second transimpedance amplifier. In other words, it is proposed here to use a shared current source in two transimpedance amplifiers and, more particularly, in two respective input stages of the transimpedance amplifiers. The amplification stage of each of the first and second transimpedance amplifiers comprises, for example, a MOS transistor having its gate connected to the input of the transimpedance amplifier and a drain connected to the output of the transimpedance amplifier.The amplification stage of each of the first and second transimpedance amplifiers is preferably devoid of any differential pair.

[0031] The use by the two transimpedance amplifiers of the DC current provided by the shared current source makes it possible to reduce the energy consumption compared to a first reference device in which the shared current source would be replaced by two separate current sources each providing the same DC current as the shared current source, a first source among the two separate current sources being provided in a first amplifier among the two transimpedance amplifiers to bias the input stage of this first amplifier, and a second source among the two separate current sources being provided in the second amplifier among the two transimpedance amplifiers to bias the input stage of this second amplifier.

[0032] According to an embodiment in which two transimpedance amplifiers share a current source for biasing the amplification stages of their respective input stages, a photodiode is connected between the input of a first amplifier of the two transimpedance amplifiers and the input of the second amplifier of the two transimpedance amplifiers. This allows the current of the photodiode to be reused in both transimpedance amplifiers. This also allows the photodiode to be read differentially, the difference between the outputs of the two transimpedance amplifiers being representative of the current in the photodiode.As a result, the signal-to-noise ratio, SNR, can be improved by 3 dB compared to a second device in which the current in the photodiode is read by a single transimpedance amplifier having the amplification stage of its input stage biased by a DC current equal to that supplied by the shared current source.

[0033] According to an alternative embodiment in which two transimpedance amplifiers share a current source for biasing the amplification stages of their corresponding input stages, a first photodiode is connected to an input of a first amplifier among the two transimpedance amplifiers, and a second photodiode is connected to an input of a second amplifier among the two transimpedance amplifiers.

[0034] According to one embodiment, the two photodiodes belong to the same optical channel, the spatial arrangement of the two photodiodes being configured to improve the spatial sensitivity of the optical channel. In other words, the two photodiodes are configured to improve the range of angles of incidence of light received by this optical channel or, in other words, to improve the opening of the radiation pattern of the optical channel.

[0035] According to one embodiment, the two photodiodes belong to two respective different optical channels. For example, the spatial arrangement of the two photodiodes is configured such that the light received by one of the two photodiodes is different from (or not correlated with) the light received by the other of the two photodiodes and / or one of the two photodiodes is configured to receive light having different wavelengths than those received by the other of the two photodiodes. For example, in an application or system in which data is transmitted using light, this makes it possible to establish two independent communication channels.

[0036] According to one embodiment, the two transimpedance amplifiers are two capacitive transimpedance amplifiers. According to an alternative embodiment, the transimpedance amplifiers are two resistive transimpedance amplifiers.

[0037] [Fig.l] represents an embodiment of a device 1 comprising transimpedance amplifiers TIA1 and TIA2 which share a current source 100 for biasing their input stages.

[0038] More particularly, [Fig.l] represents an example of an embodiment in which a photodiode PD is connected between the inputs of the amplifiers TIA1 and TIA2.

[0039] The TIA1 amplifier is delimited by dotted lines in [Fig.l].

[0040] The TIA1 amplifier comprises an amplification stage SI delimited by lines in dotted lines in [Fig.l]. The amplifier stage S1 has an input connected to an input INI of the amplifier TIA1, an output connected to an output OUT1 of the amplifier TIA1, and a power supply input connected to a node 102 configured to receive a power supply potential VDD.

[0041] More particularly, the stage SI is, for example, implemented by a MOS (Metal Oxide Semiconductor) transistor TL. The transistor T1 has a source connected to the node 102, a gate connected to the input INI and a drain connected to the output OUT1.

[0042] The TIA2 amplifier is delimited by dotted lines in [Fig.2], the dotted lines delimiting the TIA2 amplifier being different from those delimiting the TIA1 amplifier.

[0043] The TIA2 amplifier comprises an amplification stage S2 delimited by dotted lines in [Fig.l]. The amplification stage S2 has an input connected to an input IN2 of the TIA2 amplifier, an output connected to an output OUT2 of the TIA2 amplifier, and a power supply input connected to a node 104 configured to receive a power supply potential GND.

[0044] More particularly, stage S2 is, for example, implemented by a MOS (Metal Oxide Semiconductor) transistor T2. Transistor T2 has a source connected to node 104, a gate connected to input IN2 and a drain connected to output OUT2.

[0045] Preferably, neither transistor T1 nor transistor T2 are part of a differential pair.

[0046] According to one embodiment, the potential VDD is greater than the potential GND. For example, the potential GND is a reference potential, for example the ground potential, and the potential VDD is positive relative to the potential GND.

[0047] According to an embodiment in which the potential VDD is greater than the potential GND, the transistor T1 is a PMOS transistor or, in other words, a MOS transistor having a P-type channel, the transistor T2 being an NMOS transistor or, in other words, a MOS transistor having an N-type channel.

[0048] The current source 100 shared by the two amplifiers TIA1 and TIA2 is connected in series with stages SI and S2 between nodes 102 and 104, the current source 100 being connected between stages SI and S2. More particularly, the current source 100 is, for example, connected in series with transistors T1 and T2 between nodes 102 and 104, the current source 100 being connected between transistors T1 and T2. For example, the current source 100 has one terminal connected to stage SI, for example to the drain of transistor T1 and another terminal connected to stage S2, for example to the drain of transistor T2.

[0049] The current source 100 is configured to provide a bias current II to the amplification stages S1 and S2. The current II is a DC current. For example, the current source 100 is configured to provide the bias current II to the transistors T1 and T2.

[0050] Consider a first reference device comprising a first transimpedance amplifier whose input stage has a first amplification stage and a first current source providing a first current intended to bias the first amplification stage and a second transimpedance amplifier whose input stage has a second amplification stage and a second current source providing a second current intended to bias the second amplification stage, in which each of the first and second amplification stages is similar or identical to the SI stage of the device 1 and each of the first and second current sources provides the same current 13.

[0051] Since the transimpedance amplifiers TIA1 and TIA2 of the device 1 share the same current source 100 to bias their respective amplification stages S1 and S2, the current II in the device 1 can be less than twice the current I3, which results in lower power consumption in the device 1 than in the first reference device.

[0052] Considering again [Fig.l], as is usual in a transimpedance amplifier, the amplifier TIA1, respectively TIA2, comprises a feedback impedance Zl, respectively Z2.

[0053] The impedance Z1 is, for example, identical to the impedance Z2.

[0054] The impedances Z1 and Z2 are, for example, resistive elements, for example resistors, the transimpedance amplifiers TIA1 and TIA2 then being resistive transimpedance amplifiers (RTIA). According to another example, the impedances Z1 and Z2 are, for example, capacitive elements, for example capacitors, the transimpedance amplifiers TIA1 and TIA2 being capacitive transimpedance amplifiers (CTIA).

[0055] The impedance Z1, respectively Z2, connects the input INI, respectively IN2, to the output OUT1, respectively OUT2. For example, the impedance Z1, respectively Z2 has one terminal connected to the input INI, respectively IN2, and one terminal connected to the output 0UT1, respectively 0UT2.

[0056] In the example of [Fig.l], the drain of transistor Tl, respectively T2, is connected to output OUT1, respectively OUT2.

[0057] According to one embodiment, as illustrated in [Fig.l], the photodiode PD of the device 1 is connected between the inputs INI and IN2. For example, the photodiode PD has a terminal 106 connected to the input INI and a terminal 108 connected to the input IN2. For example, when the potential VDD is greater than the potential GND, the terminal 106 corresponds to the cathode of the photodiode PD and the terminal 108 corresponds to the anode of the photodiode PD. The device 1 further comprises a capacitive element Ccm, for example a capacitor. The capacitive element Ccm is, for example, a common-mode capacitive element, or, in other words, is configured to ensure the stability of the common mode of a transimpedance amplifier corresponding to the amplifiers TIA1 and TIA2. In other words, the capacitive element Ccm is configured to reduce or avoid common mode oscillations in the differential transimpedance amplifier comprising the transimpedance amplifiers TIA1 and TIA2.For example, the capacitive element Ccm is connected between the input IN2 and the node 104. In another example, the capacitive element is connected between the input IN 1 and the node 102. .

[0058] In some embodiments in which the inputs INI and IN2 are connected together by the photodiode PD, as already mentioned previously, the amplifiers TIA1 and TIA2 operate in a differential manner or, in other words, implement a differential transimpedance amplifier.

[0059] Consider a second reference device having a single transimpedance amplifier whose input stage has a single amplification stage similar to the stage SI and a current source providing the current II to this single amplification stage. In embodiments in which the amplifiers TIA1 and TIA2 operate in differential mode, the amplifiers TIA1 and TIA2 have uncorrelated noises and their output voltages are in phase opposition. Thus, an output signal (or voltage) between the outputs OUT1 and OUT2 has a signal-to-noise ratio (SNR) that is increased by 3 dB compared to an output signal (or voltage) of the second reference device.

[0060] In embodiments in which the amplifiers TIA1 and TIA2 operate in differential mode, a photocurrent 12 passing through the photodiode PD is used by both the amplifiers TIA1 and TIA2, whereas, in the second reference device, the photocurrent is used by only one.

[0061] In embodiments in which the amplifiers TIA1 and TIA2 operate in differential mode, for a given supply voltage between the nodes 102 and 104, the DC bias voltage across the photodiode PD is higher than the DC bias across a similar photodiode connected to the input of the second reference device powered by the same given supply voltage. The photodiode PD of device 1 thus has a lower capacitance than the photodiode connected to the second reference device. This is advantageous because reducing the capacitance of a photodiode makes it possible to improve the signal-to-noise ratio of an optical reception chain comprising the photodiode.

[0062] In an embodiment in which the amplifiers TIA1 and TIA2 operate in differential mode, as illustrated in [Fig.l], the device 1 further comprises, for example, a differential amplifier OP, for example a differential operational amplifier. The amplifier OP has a differential input 110 connected to the output OUT1 and a differential input 112 connected to the output OUT2. For example, the output OUT1 is connected to the input 110 by a capacitive element C1 and the output OUT2 is connected to the input 112 by a capacitive element C2. The capacitive element C1 is, for example, identical to the capacitive element C2. The capacitive element C1, respectively C2, is, for example, a capacitor.

[0063] An output 114 of the OP amplifier provides an output signal OUT. The output signal OUT is, for example, representative of the current 12 flowing between the terminals 106 and 108 of the photodiode PD. For example, the amplifiers TIA1, TIA2 and OP implement a reading circuit of the photodiode PD, the reading circuit having the signal OUT as an output signal. In an alternative embodiment, the OP amplifier is omitted and the differential signal available between the outputs OUT1 and OUT2 is representative of the current 12 and is, for example, an output signal of a reading circuit of the photodiode PD implemented by the amplifiers TIA1 and TIA2.

[0064] [Fig. 2] shows an alternative embodiment of the device 1 of [Fig. 1]. The device 1 of [Fig. 2] is similar to the device 1 of [Fig. 1] and only the differences between these two devices will be described here. In particular, unless otherwise specified, everything described for the device 1 of [Fig. 1] applies to the device 1 of [Fig. 2].

[0065] The device 1 of [Fig.2] differs from the device 1 of [Fig.l] by the connection of the output of the amplification stage SI, respectively S2, to the output OUT1, respectively OUT2.

[0066] More particularly, in the embodiment of [Fig.2], the output of stage S1, i.e. the drain of transistor T1 in this example, is connected to output OUT1 by a gain stage or circuit G1, the output of stage S2, i.e. the drain of transistor T2 in this example, being connected to output OUT2 by a gain stage or circuit G2. Circuit G1 is, for example, identical or similar to circuit G2.

[0067] Although in the example of Figures 1 and 2 described above each stage amplification stage SI, S2 comprises a single MOS transistor, in other examples not shown, each stage SI, S2 is implemented using more than one MOS transistor. For example, each stage SI, S2 is a simple cascode or a regulated cascode. Preferably, even when each amplification stage SI, S2 comprises more than one transistor, each stage SI, S2 does not include any differential pairs.

[0068] [Fig.3] represents an embodiment of a device 2 comprising two transimpedance amplifiers TIA1 and TIA2.

[0069] The amplifiers TIA1 and TIA2 of the device 2 are identical to the respective amplifiers TIA1 and TIA2 of the device 1 of [Fig. 1], although, in another example not shown, the amplifiers TIA1 and TIA2 of the device 2 are identical to the respective amplifiers TIA1 and TIA2 of the device 1 of [Fig. 2]. In particular, unless otherwise specified, everything described for the amplifiers TIA1 and TIA2 in relation to [Fig. 1] or [Fig. 2] applies to the respective amplifiers TIA1 and TIA2 of the device 2.

[0070] Device 2 differs from device 1 of [Fig.l] or [Fig.2] in that the photodiode PD is replaced by a photodiode PD 1 connected to input IN 1 and a photodiode PD2 connected to input IN2, the capacitive element Ccm and the amplifier OP being omitted.

[0071] In the example of [Fig.3], the photodiode PDI is connected between the input INI and the node 102 and the photodiode PD2 is connected between the input IN2 and the node 104. For example, a terminal 301 of the photodiode PDI is connected to the input INI, a terminal 302 of the photodiode PDI is connected to the node 102, a terminal 303 of the photodiode PD2 is connected to the input IN2 and a terminal 304 of the photodiode PD2 is connected to the node 104. For example, when the potential VDD is greater than the potential GND, the terminals 301 and 302 correspond respectively to the anode and the cathode of the photodiode PDI, the terminals 303 and 304 corresponding respectively to the cathode and the anode of the photodiode PD2.

[0072] In another example not shown, the photodiode PDI is connected between the input INI and the node 104 and the photodiode PD2 is connected between the input IN2 and the node 102. For example, the terminal 301 of the photodiode PDI is connected to the node 104, the terminal 302 of the photodiode PDI is connected to the input INI, the terminal 303 of the photodiode PD2 is connected to the node 102 and the terminal 304 of the photodiode PD2 is connected to the input IN2. For example, when the potential VDD is greater than the potential GND, the terminals 301 and 302 correspond respectively to the anode and the cathode of the photodiode PDI, the terminals 303 and 304 corresponding respectively to the cathode and the anode of the photodiode PD2. Compared to the example shown in [Fig.3], this makes it possible to increase the DC bias across each photodiode PDI, PD2, thus reducing the parasitic capacitance of the photodiode.

[0073] In the device 2, the amplifier TIA1, respectively TIA2, for example implements a circuit for reading the photodiode PDI, respectively PD2. For example, a signal available on the output OUT1 is representative of a current 121 passing between the terminals 301 and 302 of the photodiode PDI and a signal available on the output OUT2 is representative of a current 122 passing between the terminals 303 and 304 of the photodiode PD2.

[0074] According to one embodiment, the photodiodes PDI and PD2 belong to the same optical channel. In other words, the photodiodes PDI and PD2 are configured so that the light received by the photodiode PDI is correlated to the light received by the photodiode PD2. For example, the photodiodes PDI and PD2 belong to the same optical channel and are configured to receive light having an angle of incidence which is not the same for the two photodiodes PDI and PD2. This makes it possible to increase the spatial sensitivity of the optical channel comprising the photodiodes PDI and PD2 or, in other words, the opening of the radiation pattern of the optical channel.

[0075] For example, the photodiodes PDI and PD2 are configured to receive light having the same wavelength, the photodiodes being further configured such that the angle of incidence of the light received by the photodiode PDI is different from the angle of incidence of the light received by the photodiode PD2. For example, the photodiodes PDI and PD2 are arranged such that the light received by the photodiode PDI has a different angle of incidence than that of the light received by the photodiode PD2.

[0076] According to an alternative embodiment, the photodiodes PDI and PD2 do not belong to the same optical channel, but, on the contrary, to two separate (or distinct or uncorrelated) optical channels. The two optical channels are separate and / or uncorrelated. In other words, the photodiode PDI is configured to receive light that is not correlated with the light that the photodiode PD2 is configured to receive. For example, the photodiode PDI is configured to receive light having a wavelength different from the wavelength of the light that the photodiode PD2 is configured to receive.

[0077] Although not shown, one embodiment provides a light sensor having a plurality of devices 1 or 2, the photodiodes of these devices being, for example, organized in a matrix comprising rows and columns of photodiodes.

[0078] According to one embodiment, the described devices 1 and 2 are used in optical communication implemented with light fidelity technology, or LiFi.

[0079] In other embodiments, the photodiodes PD, PDI and PD2 are replaced by other components, for example by resistors used for example to detect temperature, so that the currents flowing in these other components are read by the amplifiers TIA1 and TIA2.

[0080] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art.

[0081] Finally, the practical implementation of the embodiments and variants described is within the reach of the person skilled in the art from the functional indications given above. In particular, the person skilled in the art will be able to implement the current source 100, the stages G1 and G2 and the differential amplifier OP.

Claims

Claims

1. Device (1; 2) comprising: a first transimpedance amplifier (TIA1) comprising a first amplification stage (SI) having a first MOS transistor (Tl), the first MOS transistor (Tl) having a source connected to a first node (102) configured to receive a first supply potential (VDD), a drain connected to an output (OUT1) of the first transimpedance amplifier (TIA1) and a gate connected to an input (INI) of the first transimpedance amplifier (TIA1); a second transimpedance amplifier (TIA2) comprising a second amplification stage (S2) having a second MOS transistor (T2), the second MOS transistor (T2) having a source connected to a second node (104) configured to receive a second supply potential (GND), a drain connected to an output (OUT2) of the second transimpedance amplifier (TIA2) and a gate connected to an input (IN2) of the second transimpedance amplifier (TIA2);and a current source (100) connected in series with the first and second amplification stages (SI, S2) between the first and second nodes (102, 104), the current source (100) having a first terminal connected to the drain of the first MOS transistor (Tl) and a second terminal connected to the drain of the second MOS transistor (T2).;

2. Device (1; 2) according to claim 1, wherein the current source (100) is shared by the first and second transimpedance amplifiers (TIA1, TIA2).

3. Device (1; 2) according to claim 1 or 2, wherein the current source (100) is configured to supply a bias current (II) to the first and second MOS transistors (Tl, T2).

4. Device (1; 2) according to any one of claims 1 to 3, wherein no differential pair comprises the first or the second MOS transistor (T1, T2).

5. Device (1; 2) according to any one of claims 1 to 4, wherein: the first transimpedance amplifier (TIA1) further comprises a first feedback impedance (Zl) having a first terminal connected to the input (INI) of the first transimpedance amplifier (TIA1) and a second terminal connected to the output (OUT1) of the first transimpedance amplifier (TIA1); and the second transimpedance amplifier (TIA2) further comprises a second feedback impedance (Z2) having a first terminal connected to the input (IN2) of the second transimpedance amplifier (TIA2) and a second terminal connected to the output (OUT2) of the second transimpedance amplifier (TIA2).

6. Device (1; 2) according to any one of claims 1 to 5, wherein: the first amplification stage (S1), for example the drain of the first transistor (T1), is connected to the output (OUT1) of the first transimpedance amplifier (TIA1); and the second amplification stage (S2), for example the drain of the second transistor (T2), is connected to the output (OUT2) of the second transimpedance amplifier (TIA2).

7. Device (1) according to any one of claims 1 to 5, wherein: the first amplification stage (S1), for example the drain of the first transistor (T1), is connected to the output (OUT1) of the first transimpedance amplifier (TIA1) by a first gain stage (G1); and the second amplification stage (S2), for example the drain of the second transistor (T2), is connected to the output (OUT2) of the second transimpedance amplifier (TIA2) by a second gain stage (G2).

8. Device (1; 2) according to any one of claims 1 to 7, in which the first supply potential (VDD) is higher than the second supply potential (GND).

9. Device (1; 2) according to claim 8, wherein the first MOS transistor (T1) is a PMOS transistor and the second MOS transistor (T2) is an NMOS transistor.

10. Device (2) according to any one of claims 1 to 9, further comprising: a first photodiode (PDI) connected to the input (INI) of the first transimpedance amplifier (TIA1); and a second photodiode (PD2) connected to the input (IN2) of the second transimpedance amplifier (TIA2).

11. Device (2) according to claim 10, wherein the first and second photodiodes (PDI, PD2) are configured to receive light having the same wavelength but with different angles of incidence.

12. Device (2) according to claim 10, wherein the first and second photodiodes (PDI, PD2) are configured to belong to different optical channels.

13. Device (1) according to any one of claims 1 to 9, further comprising: a photodiode (PD) connected between the input (INI) of the first transimpedance amplifier (TIA1) and the input (IN2) of the second transimpedance amplifier (TIA2); and a capacitive element (Ccm) connected between the input (INI) of the first transimpedance amplifier (TIA1) and the first node (102) or between the input (IN2) of the second transimpedance amplifier (TIA2) and the second node (104).

14. Device (1) according to claim 13, further comprising a differential amplifier (OP) having a first differential input (110) connected to the output (OUT1) of the first transimpedance amplifier (TIA1) and a second differential input (112) connected to the output (OUT2) of the second transimpedance amplifier (TIA2).

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