Optoelectronic device and method for manufacturing such a device

The three-dimensional electroluminescent diode with a semiconductor core and semiconductive shell, featuring an implanted portion with reduced conductivity, addresses the challenges of miniaturization and crystalline defects in optoelectronic devices, resulting in improved light emission and quantum efficiency.

FR3137498B1Active Publication Date: 2025-03-28ALEDIA INC
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Patent Information

Application Number
FR2022006638
Authority / Receiving Office
FR · FR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-06-30
Publication Date
2025-03-28
Estimated Expiration
2042-06-30

AI Technical Summary

Technical Problem

The challenge in optoelectronic devices is to enhance the injection yield and internal quantum efficiency of electroluminescent diodes, particularly as they become miniaturized, leading to issues with light radiation mixing and decreased light intensity due to crystalline defects.

Method used

The implementation of a three-dimensional electroluminescent diode with a semiconductor core doped according to a first type of conductivity and a semiconductive shell doped according to a second type of conductivity, featuring an implanted portion with locally reduced conductivity, which helps in reducing crystalline defects and improving light emission efficiency.

Benefits of technology

This configuration improves the light emission efficiency and internal quantum efficiency of electroluminescent diodes by reducing crystalline defects and minimizing light radiation mixing, thereby enhancing the overall performance of optoelectronic devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a light-emitting diode (10) for an optoelectronic device (1) or for an optoelectronic component, the light-emitting diode (10) comprising a semiconductor core (11) and a semiconductor shell (13), the light-emitting diode (10) further comprising an implanted portion (30) delimiting within the semiconductor shell (13) at least one passivated portion (33) and at least one active portion (34), said at least one passivated portion (33) having a conductivity strictly lower than the conductivity of said at least one active portion (34). The invention also relates to a method for manufacturing an optoelectronic device (1). Figure 1
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Description

Title of the invention: Optoelectronic device and method for manufacturing such a device Technical field of the invention

[0001] The present invention relates to a light-emitting diode, as well as an optoelectronic device comprising such a light-emitting diode.

[0002] The invention also relates to a method for manufacturing an optoelectronic device. State of the art

[0003] An optoelectronic device is a device configured to perform a conversion of an electrical signal into electromagnetic radiation, such as light radiation. Prior art exists optoelectronic devices comprising light-emitting diodes, also known by the acronym LED for "light-emitting diode" according to established Anglo-Saxon terminology, formed on a substrate.

[0004] In general, each light-emitting diode comprises an active material exploiting or not quantum wells, a semiconductor portion doped according to a first type of doping, for example P-doped and a semiconductor portion doped according to a second type of doping, for example N-doped.

[0005] Each light-emitting diode can be formed based on three-dimensional micrometric or even nanometric semiconductor elements, themselves at least partially obtained by growth using metal-organic vapor deposition (MOCVD) or molecular beam epitaxy (MBE) or hydride vapor epitaxy (HVPE) methods. Light-emitting diodes are typically formed from a semiconductor material comprising, for example, elements from group III and group V of the periodic table, such as a III-V compound, in particular gallium nitride (GaN), indium gallium nitride (InGaN), or aluminum gallium nitride (AlGaN).

[0006] Optoelectronic devices exist that comprise a matrix of light-emitting diodes (LEDs) having a certain emission surface through which the light emitted by the LEDs is transmitted. Such optoelectronic devices can be used, in particular, in the construction of display screens or image projection systems, where the LED matrix actually defines a matrix of luminous pixels in which each pixel traditionally comprises at least one sub-pixel to generate each color, each sub-pixel itself containing at least one LED.

[0007] One of the difficulties associated with increasing screen resolution is preventing the light emitted by the three-dimensional LEDs of a subpixel from mixing with the light emitted by the LEDs of an adjacent subpixel in order to improve contrast. However, this problem is becoming increasingly difficult to solve given the increasing miniaturization of LEDs.

[0008] Furthermore, as screen resolution increases, the dimensions between light-emitting diodes and each sub-pixel become micrometric, or even nanometric. The use of three-dimensional light-emitting diodes then becomes inevitable, with ever-smaller dimensions. However, the luminous intensity emitted by nanometric three-dimensional light-emitting diodes decreases drastically as their size decreases.

[0009] This difficulty can be caused, in particular, by the presence of crystal defects generated during the manufacturing of the light-emitting diode (LED). It is, in fact, common to observe these crystal defects at the base of the LED, especially for LEDs with a wire or pyramid shape. These crystal defects can generate dislocations in the crystal structure, which ultimately lead to the degradation of existing quantum wells. This results in unwanted non-radiative recombinations, thus causing a drop in luminous efficacy and overall efficiency. Indeed, it has been observed that the presence of degradation at the base of a wire or pyramid LED affects the internal quantum efficiency (IQE) of this LED.

[0010] Object and invention

[0011] The present invention aims to provide a solution that addresses all or part of the aforementioned problems. In particular, the present invention aims to improve the injection efficiency and the internal quantum efficiency of light-emitting diodes.

[0012] This goal can be achieved through the implementation of a light-emitting diode for an optoelectronic device, the light-emitting diode having a three-dimensional shape and comprising a height extending in a first direction between a proximal part and a distal part opposite to said proximal part along said first direction, said light-emitting diode comprising: - a semiconductor core doped according to a first type of conductivity; - a semiconductor shell doped according to a second type of conductivity In contrast to the first type of conductivity, the said semiconductor shell covering at least partially said semiconductor nucleus;

[0013] the light-emitting diode comprising an implanted portion extending over an implanted height measured along the first direction, said implanted height being strictly less than the height of the diode, said implanted portion being disposed between the distal part and the proximal part and being disjoint from the distal part, so that the implanted portion delimits within the semiconductor shell at least one passivated portion disjoint from the distal part of the light-emitting diode, the semiconductor shell comprising at least one active portion delimited at least partially by said at least one passivated portion, said at least one passivated portion having a conductivity strictly less than a conductivity of said at least one active portion.

[0014] The arrangements described above make it possible to propose a light-emitting diode comprising an implanted portion having locally reduced conductivity. The three-dimensional shape of the light-emitting diode also allows for a simpler definition of an implanted portion in which the conductivity is reduced.

[0015] The light-emitting diode may also have one or more of the following characteristics, taken alone or in combination.

[0016] Generally, the proximal portion corresponds to the part of the light-emitting diode directed towards the growth substrate from which the portions of the light-emitting diode grew. For example, the proximal portion may correspond to the growth base of the semiconductor core. This proximal portion typically has a larger proportion of crystal defects than the distal portion.

[0017] According to one embodiment, the semiconductor shell covers the semiconductor core on the distal side, and does not cover the semiconductor core on the proximal side.

[0018] According to one embodiment, the implanted portion delimits within the semiconductor core at least one first implanted portion disjoint from the distal part of the light-emitting diode, the semiconductor core comprising at least one first non-implanted portion delimited at least partially by said at least one first implanted portion, said at least one first implanted portion having an ionic concentration strictly different from an ionic concentration of said at least one first non-implanted portion.

[0019] According to one embodiment, the implanted height of the implanted portion, measured along the first direction, is less than 500 nm.

[0020] According to one embodiment, the semiconductor core comprises N-doped gallium nitride.

[0021] According to one embodiment, the semiconductor shell comprises nitride of P-doped gallium

[0022] By "P doping" or "P-doped", it is understood that a semiconductor material comprises a large quantity of electron-accepting atoms allowing a lower density of free electrons to be obtained, therefore an excess of holes, said holes being positively charged.

[0023] By "N doping" or "N-doped", it is understood that a semiconductor material comprises a large quantity of electron-donating atoms in order to obtain a higher density of free electrons, which are negatively charged.

[0024] For example, an electron donor atom could be: silicon or germanium.

[0025] For example, an electron acceptor atom could be: magnesium.

[0026] In one embodiment, the implanted portion corresponds to a volume of the light-emitting diode delimited by two distinct planes, parallel to each other, for example with respect to a support face of the optoelectronic device. In another embodiment, said two distinct planes correspond to a cross-section of the light-emitting diode perpendicular to the first direction.

[0027] According to one embodiment, the implanted portion is an area of ​​the light-emitting diode extending transversely to the first direction, and in which ions are implanted, where each implanted ion forms: - a complex with a doping element, the doping according to the second type of conductivity of the semiconductor shell being neutralized at the level of the passivated portion; or - deep levels which limit or eliminate the mobility of positive or negative charge carriers, without these deep levels serving as non-radiative recombination centers.

[0028] According to one embodiment, each ion implanted in the implanted portion forms a complex with a dopant element, so that the doping according to the first type of conductivity of the semiconductor nucleus is neutralized at the level of the first implanted portion.

[0029] According to one embodiment, the ion implantation includes the implantation of at least one ion selected from among argon ions, helium ions, neon ions, oxygen ions, germanium ions, arsenic ions, phosphorus ions, boron ions, magnesium ions, silicon ions, aluminium ions, fluorine ions, nitrogen ions, and hydrogen ions.

[0030] Thus, it is possible to implant ions in deep levels, so as to neutralize the free charge carriers of the semiconductor nucleus and / or the semiconductor shell at the level of the first implanted portion and / or the passivated portion.

[0031] According to one embodiment, the implanted ions are hydrogen ions.

[0032] According to an embodiment in which the semiconductor core is made up of Primarily made of magnesium-doped gallium nitride, the implanted hydrogen ions form a magnesium-hydrogen complex (Mg-H) with the magnesium dopant. Thus, ion implantation neutralizes the magnesium doping (P), thereby passivating the first implanted portion and reducing its conductivity.

[0033] By "compound consisting mainly of a material", it is understood that a compound comprises a proportion greater than or equal to 95% of said material, this proportion preferably being greater than 99%.

[0034] According to one embodiment, at least one semiconductor element chosen from the group comprising the semiconductor core and the semiconductor shell has a wire-like, conical, frustoconical, pyramidal, or truncated pyramidal shape.

[0035] It is therefore well understood that the three-dimensional shape of the light-emitting diode depends on the shape of the semiconductor core and the shape of the semiconductor shell.

[0036] According to one embodiment, the light-emitting diode has a three-dimensional shape of microwire, nanowire, cone, truncated cone, or pyramid.

[0037] According to one embodiment, the implanted portion is positioned, along the first direction, so as to incorporate the proximal part of the light-emitting diode.

[0038] According to one embodiment, the implanted portion is disjointed from the proximal part.

[0039] The object of the invention can also be achieved through the implementation of an optoelectronic device comprising a support extending along a plane, and at least one light-emitting diode of the type of one of those described above; the implanted portion of said at least one light-emitting diode being substantially parallel to the plane of the support.

[0040] Advantageously, the optoelectronic device may include an interlayer filling layer (for example, the planarization layer) disposed between two light-emitting diodes. This interlayer filling layer may have a suitable ion implantation response profile, governing the implantation depth as a function of the implantation energy, typically similar to that of the materials composing the light-emitting diode, and thus include an interlayer portion implanted parallel to the plane of the substrate and in line with the implanted portion of the light-emitting diodes. In this way, it is possible to determine and control the ion implantation depth as a function of the implantation energy. Thus, it is possible to control ion implantation when it is implemented over a continuous cross-section of the optoelectronic device.The provisions described above also apply to the optoelectronic device that is the subject of the invention.

[0041] Indeed, the goal of the invention can also be achieved through the implementation of an optoelectronic device comprising: - a support having a support face; - at least one light-emitting diode of the type described above, cooperating directly or indirectly with said support face; - a first conductive element electrically connected to the semiconductor core of the light-emitting diode, and - a second conductive element electrically connected to the semiconductor shell of the light-emitting diode.

[0042] The provisions described above make it possible to propose an optoelectronic device with light-emitting diodes suitable for converting an electrical signal into light radiation.

[0043] The optoelectronic device may also have one or more of the following characteristics, taken alone or in combination.

[0044] According to one embodiment, said at least one light-emitting diode is arranged on the support face such that the proximal part of said at least one light-emitting diode is turned towards the support face of the support, and such that the first direction extends transversely to the support face.

[0045] According to one embodiment, the semiconductor core is arranged on the support face so as to be in contact with the support by the proximal part.

[0046] According to one embodiment, the semiconductor shell completely covers the semiconductor core when it is in contact with the support face of the support.

[0047] According to one embodiment, the support is integral with a base ensuring general mechanical support of the optoelectronic device.

[0048] Finally, the objective of the invention can be achieved through the implementation of a manufacturing process for an optoelectronic device comprising the following steps: - a step of supplying an initial optoelectronic device comprising: • a support having a support face; and • at least one light-emitting diode cooperating directly or indirectly with said support face, said at least one light-emitting diode having a three-dimensional shape, and comprising a height extending in a first direction between a proximal part and a distal part opposite to said proximal part along said first direction, said light-emitting diode comprising a semiconductor core doped according to a first type of conductivity, and a semiconductor shell doped according to a second type of conductivity opposite to the first type of conductivity, said semiconductor shell covering at least partially said semiconductor core; - a passivation step of at least one light-emitting diode to form the optoelectronic device, wherein the at least one light-emitting diode is passivated on an implanted portion extending over an implanted height measured along the first direction, said implanted height being strictly less than the height of the light-emitting diode, said implanted portion being disposed between the distal and proximal parts, and being disjoint from the distal part, so that the implanted portion delimits within the semiconductor shell at least one passivated portion disjoint from the distal part of the light-emitting diode, the semiconductor shell comprising at least one active portion delimited at least partially by said at least one passivated portion, said at least one passivated portion having a conductivity strictly less than a conductivity of said at least one active portion.

[0049] The arrangements described above make it possible to manufacture an optoelectronic device comprising at least one light-emitting diode (LED) including an implanted portion having locally reduced conductivity. The three-dimensional shape of the LED makes it possible to delimit an implanted portion in which the conductivity is reduced during the passivation step.

[0050] By "passivated" or "neutralized" portion or element, it is understood that the absolute value of the conductivity of said portion or element decreases. For example, said portion or element may become insulating after undergoing the passivation step.

[0051] The manufacturing process may also have one or more of the following characteristics, taken alone or in combination.

[0052] According to one embodiment, during the passivation step, at least one light-emitting diode is passivated so that the implanted portion also delimits within the semiconductor core at least one first implanted portion disjoint from the distal part of the light-emitting diode, the semiconductor core comprising at least one first non-implanted portion delimited at least partially by said at least one first implanted portion, said at least one first implanted portion having an ionic concentration strictly different from an ionic concentration of said at least one first non-implanted portion.

[0053] According to one embodiment, during the step of supplying an initial optoelectronic device, said initial optoelectronic device comprises a first conductive element electrically connected to the semiconductor core of the light-emitting diode, and a second conductive element electrically connected to the semiconductor shell of the light-emitting diode.

[0054] According to one embodiment, during the step of supplying an initial optoelectronic device, said at least one light-emitting diode is arranged on the support face of the support such that the proximal part of the at least one light-emitting diode is turned towards the support face of the support, and such that the first direction extends transversely to said support face.

[0055] According to one embodiment, at least one light-emitting diode having a three-dimensional shape can be manufactured in accordance with one of the embodiments described in documents FR3031242A1, or FR3098013A1.

[0056] According to one embodiment, the passivation step is implemented by ion implantation, in a manner enabling the doping to be neutralized according to the second type of conductivity of the semiconductor shell at the level of the passivated portion.

[0057] Thus, and advantageously, it is possible to modify the conductivity of the first portion implanted at the level of the portion passivated by an ionic implantation.

[0058] According to one embodiment, ion implantation is carried out by implanting ions through the light-emitting diode, and / or through the optoelectronic device.

[0059] According to one embodiment, the passivation step includes the implantation of at least one ion selected from argon ions, helium ions, neon ions, oxygen ions, germanium ions, arsenic ions, phosphorus ions, boron ions, magnesium ions, silicon ions, aluminium ions, fluorine ions, nitrogen ions, and hydrogen ions.

[0060] Thus, it is possible to implant ions in deep levels, so as to neutralize the free charge carriers of the semiconductor nucleus and / or the semiconductor shell at the level of the first implanted portion and the passivated portion.

[0061] Synergistically, the neutralization of free charge carriers during the passivation step makes it possible to make the semiconductor nucleus and the semiconductor shell less conductive without creating recombination centers of non-radiative carriers, which would be detrimental in the case of optoelectronic devices.

[0062] Advantageously, the ion implantation passivation step of a three-dimensional light-emitting diode allows ions to be implanted simultaneously in the semiconductor core and in the semiconductor shell.

[0063] According to one embodiment, an implanted ion dose is between 1011 at / cm2 and 1014 at / cm2. For example, said implanted ion dose can be defined as a function of the mass of the implanted ion and as a function of the thickness of material to be traversed.

[0064] According to one embodiment, the passivation step is implemented on a implanted height, measured along the first direction, less than 500 nm. Thus, it is possible to form the implanted portion, for example by ion implantation, using implantation energy ranges usually used in microelectronic processes.

[0065] According to one embodiment, an implantation energy is between 1 keV and 500 keV. For example, said implantation energy can be defined as a function of the mass of the implanted ion and as a function of the thickness of material to be traversed.

[0066] According to one embodiment, the passivation step is implemented by an implantation of hydrogen ions.

[0067] Advantageously, hydrogen implantation, i.e. implantation of H+ ions, makes it possible to passivate a P-doped material more effectively than an N-doped material, using low doses of ion implantation.

[0068] In this way, it is possible to selectively or differentially passivate a P-doped material with respect to an N-doped material in a single process step.

[0069] According to one embodiment, the passivation step is implemented by ion implantation from the proximal part to the distal part.

[0070] According to one embodiment, the passivation step is implemented by ion implantation from the distal part to the proximal part.

[0071] According to one embodiment, the ion implantation is carried out from a rear face of the support, said rear face of the substrate being opposite the support face of the support.

[0072] According to one embodiment, the ion implantation is carried out from the support face.

[0073] According to one embodiment, the passivation step is implemented at the level of the proximal part, so that the proximal part is included in the implanted portion.

[0074] Thus, and advantageously, it is possible to neutralize the conductivity at the proximal end. For example, in the case of a three-dimensional light-emitting diode in the shape of a microwire, nanowire, cone, truncated cone, or pyramid, it is possible to neutralize the proximal end so as to emit light only at the distal end.

[0075] Thus, any crystalline defect possibly present in the proximal part will be neutralized. It is then possible to improve the emission efficiency and light extraction of the three-dimensional light-emitting diode.

[0076] According to one embodiment, the first conductive element is electrically connected to the semiconductor core at the proximal end, for example via through-holes formed through the substrate. Thus, in the In cases where the semiconductor nucleus is N-doped, and where the passivation step has a low impact on the conductivity of the semiconductor nucleus, it is possible to ensure a good electrical connection between the semiconductor nucleus and the first conducting element, while passivating the passivated portion.

[0077] According to one embodiment, the passivation step is implemented so that the implanted portion is disjointed from the proximal part.

[0078] The arrangements described above make it possible to propose a light-emitting diode having at least two first active portions and at least two active portions separated by the implanted portion. Each first non-implanted portion adjacent to an active portion will then be capable of emitting light, by converting electrical energy into light radiation.

[0079] According to one embodiment, the manufacturing process further includes a planarization step in which a planarization layer is deposited at the level of the support face of the substrate until a thickness of the planarization layer, viewed along the first direction and measured from the support face, is at least equal to the height of at least one light-emitting diode.

[0080] According to one embodiment, the planarization layer comprises an insulating material, for example silicon dioxide SiO2.

[0081] According to one embodiment, the planarization step is implemented so as to cover at least one light-emitting diode.

[0082] According to one embodiment, the planarization step is implemented before the passivation step.

[0083] In this way, the planarization step makes it possible to standardize the thickness of the optoelectronic device along the first direction so as to control the implantation depths during the passivation step.

[0084] According to one embodiment, the manufacturing process further comprises an annealing step in which the optoelectronic device is heated to an annealing temperature, said annealing temperature being less than 500°C.

[0085] Advantageously, the annealing step allows the N-doped semiconductor element, such as the semiconductor core, to be regenerated in order to limit the impact of the passivation step on this semiconductor element. This also allows for differential passivation between the N-doped semiconductor element and the P-doped semiconductor element.

[0086] Brief description of the drawings

[0087] Other aspects, objectives, advantages and features of the invention will become clearer upon reading the following detailed description of preferred embodiments thereof, given by way of non-limiting example, and made with reference to the accompanying drawings in which:

[0088] [Fig.1] Fig.1 is a schematic view of an optoelectronic device according to a particular embodiment of the invention.

[0089] [Fig.2] Fig.2 is a schematic view of an optoelectronic device according to a a particular embodiment of the invention.

[0090] [Fig. 3] Fig. 3 is a schematic view of certain steps in the process of fa construction according to a particular embodiment of the invention.

[0091] [Fig.4] Fig.4 is a schematic view of certain steps in the process of fa construction according to a particular embodiment of the invention.

[0092] [Fig. 5] Fig. 5 is a schematic view of certain steps in the process of fa construction according to a particular embodiment of the invention.

[0093] [Fig. 6] Fig. 6 is a schematic view of the passivation step according to a mode of a particular implementation of the invention.

[0094] [Fig.7] Fig.7 is a schematic view of the passivation step according to a mode of a particular implementation of the invention.

[0095] [Fig.8] Fig.8 is a schematic view of the passivation step according to a mode of a particular implementation of the invention. Detailed description

[0096] In the figures and throughout the description, the same reference numerals represent identical or similar elements. Furthermore, the various elements are not drawn to scale in order to enhance the clarity of the figures. Moreover, the different embodiments and variations are not mutually exclusive and may be combined.

[0097] As illustrated in Figures 1 to 8, the invention relates to a light-emitting diode 10, an optoelectronic component, and an optoelectronic device 1 comprising at least one such light-emitting diode 10.

[0098] The optoelectronic device 1 comprises a support 3, 8 generally consisting of a stack of a monolithic layer (not shown), a lower electrode layer 2 which may be a conductive seed layer, and a first electrically insulating layer 4. The monolithic layer may be formed from a doped or undoped semiconductor material, for example silicon or germanium, and more particularly monocrystalline silicon. It may also be formed from crystalline alumina or even from a III-V semiconductor material, for example GaN. Alternatively, it may be a silicon-on-insulator (SOI) substrate. Alternatively, the monolithic layer may be formed from an electrically insulating material. The lower electrode layer 2 serves to form one or more first lower electrodes and may serve as a seed layer for theGrowth of portions of light-emitting diodes (LEDs) 10. In the following description, reference is made to a proximal portion pl of the LED. This proximal portion pl corresponds to the part of the LED 10 that faces the growth substrate (or, for example, the lower electrode layer 2) from which the portions of the LED 10 have grown. This lower electrode layer 2 can be continuous or discontinuous. The material composing the lower electrode layer 2 can be a nitride, a carbide, or a boride of a transition metal from group IV, V, or VI of the periodic table of elements, or a combination of these compounds. In practice, during the subsequent manufacturing process, this germination lower electrode layer 2 can be supplemented or replaced with metals such as aluminum or copper.The first electrical insulation layer 4 may include an electrically insulating layer covering the lower electrode layer 2. In addition to its electrical insulation properties, it forms a growth mask allowing the growth, for example epitaxial growth, of doped portions of the light-emitting diodes 10 from through-holes 15 delimited by this growth mask, which open locally onto the lower electrode layer 2. According to a non-limiting variant, the support 3, 8 may be provided to include a base 8 ensuring general mechanical support of the optoelectronic device 1. For example, this base 8 may be attached to the distal portion d1 of the light-emitting diodes 10 and form the support 3, 8. In this case, the substrate used for the growth of the doped portions (such as the semiconductor core 11 and the semiconductor shell 13, which will be described later) may be omitted.Thus, the proximal part pl corresponds to the part of the light-emitting diode 10 furthest from the base 8 forming the support 3,8; and the distal part dl is closest to the base 8 forming the support 3,8.

[0099] The support 3, 8 of the optoelectronic device 1 according to the invention has a support face 5 which cooperates directly or indirectly with at least one light-emitting diode 10 according to the invention. For example, as illustrated in [Fig. 1], the light-emitting diodes 10 can be arranged on the support face 5 of the support 3, 8, and thus cooperate directly with the support face 5 of the support 3, 8. Alternatively, and as shown in [Fig. 2], the base 8 forms the support 3, 8. In this case, the support face 5 is directed towards the distal part d1 of the light-emitting diodes and cooperates with them indirectly, for example, via a planarization layer 17 which will be described later.Each light-emitting diode 10 has a three-dimensional shape and comprises a height hl extending along a first direction denoted "X" between the proximal part pl (defined above) and a distal part dl opposite said proximal part pl along said first direction X. As stated previously, the . proximal part pl corresponds to the part of the light-emitting diode 10 directed towards the growth substrate from which the portions of the light-emitting diode 10 grew.

[0100] According to one embodiment, the light-emitting diode 10 is arranged on the support face 5 such that the proximal part pl of said at least one light-emitting diode 10 is turned towards the support face 5 of the support 3, 8. Generally, the light-emitting diodes 10 are arranged such that the first direction X extends transversely to the support face 5. The light-emitting diode 10 comprises a semiconductor core 11 doped according to a first type of conductivity, and a semiconductor shell 13 doped according to a second type of conductivity opposite to the first type of conductivity, the semiconductor shell 13 covering at least partially the semiconductor core 11.In particular, it may be provided that the semiconductor shell 13 covers the semiconductor nucleus 11 on the side of the distal part dl, and does not cover the semiconductor nucleus 11 on the side of the proximal part pl. As shown in the figures, the proximal part pl may for example correspond to the growth base of the semiconductor nucleus 11.

[0101] The optoelectronic device 1 further comprises a first conductive element 7 electrically connected to the semiconductor core 11 of the light-emitting diode 10, and a second conductive element 9 electrically connected to the semiconductor shell 13 of the light-emitting diode 10. As can be seen in the non-limiting embodiment shown in [Fig. 2], the second conductive element 9 is arranged at the support face 5 of the support 3, 8, so as to be electrically connected to the semiconductor shell 13, and the first conductive element 7 is arranged on an opposite face of the first electrical insulation layer 4. The electrical connection between the first conductive element 7 and the semiconductor core 11 is made via through-holes 15, passing through the first electrical insulation layer 4.To improve the clarity of the figures, the first conducting element 7 and the second conducting element 9 are not systematically shown. However, it is well understood that other embodiments can be implemented to allow the electrical connection between the first conducting element 7 and the semiconductor core 11, and between the second conducting element 9 and the semiconductor shell 13.

[0102] Finally, and as illustrated in [Fig.7], the optoelectronic device may include a transparent conductive electrode 12 configured to provide an electrical connection between the second conductive element 9 and the semiconducting shell 13. It is, however, well understood that such a transparent conductive electrode 12 can be adapted to any other embodiment, such as those shown in Figures 1 to 7.

[0103] The arrangements described above make it possible to propose an optoelectronic device 1 with light-emitting diodes 10 adapted to carry out the conversion of an electrical signal into a light radiation.

[0104] As previously stated, the light-emitting diode 10 has a three-dimensional shape, said three-dimensional shape being able to take the form of a microwire, a nanowire, a cone, a truncated cone, a pyramid, or a truncated pyramid. Generally, said three-dimensional shape of the light-emitting diode 10 depends on the shape of the semiconductor core 11 and the shape of the semiconductor shell 13. Thus, if at least one semiconductor element chosen from the group comprising the semiconductor core 11 and the semiconductor shell 13 has a wire, conical, frustoconical, pyramidal, or truncated pyramidal shape, the shape of the light-emitting diode 10 will be similar. For example, and with reference to figures 1 to 5, the semiconductor nucleus 11 may have a pyramidal or conical shape, and may be arranged on the support face 5, so as to be in contact with the support 3, 8 by the proximal part pl.Alternatively, and as shown in Figures 6 to 8, the semiconductor core 11 can have a nanowire shape. In the embodiments of Figures 1 to 7, the semiconductor shell 13 completely covers the semiconductor core 11 when it is in contact with the support face 5 of the support 3, 8, so that the semiconductor shell 13 conforms to the pyramidal, conical, or wire-like shape of the semiconductor core 11. According to the embodiment of [Fig. 8], however, the semiconductor shell 13 partially covers the semiconductor core 11 at the distal part dl, and also covers the flanks of the semiconductor core 11, in the form of residual deposits, disjoint or not from the distal part dl.

[0105] According to one embodiment, the semiconductor core 11 comprises N-doped gallium nitride (GaN), and the semiconductor shell 13 comprises P-doped gallium nitride (GaN). Alternatively, at least one semiconductor element selected from the semiconductor core 11 and the semiconductor shell 13 comprises doped or undoped gallium arsenide (GaAs), doped or undoped gallium-indium arsenide (GalnAs), or another III-V material. "P-doped" or "P-doped" means that a semiconductor material comprises a high number of electron-accepting atoms, resulting in a lower free electron density and thus an excess of holes, these holes being positively charged. For example, an electron-accepting atom could be magnesium. By "N doping" or "N-doped", we mean that a semiconductor material includes a large quantity of electron-donating atoms in order to obtain a higher density of free electrons, which are negatively charged.For example, an electron-donating atom could be silicon or germanium.

[0106] The light-emitting diode 10 further comprises an implanted portion 30 extending over an implanted height h2 measured along the first X direction, said implanted height h2 being strictly less than the height hl of the diode. For example, the implanted height h2, measured along the first X direction, is less than 500 nm.

[0107] The implanted portion 30 is disposed between the distal part dl and the proximal part pl, and is disjoint from the distal part dl. According to the variants shown in Figures 1 to 4, 6, and 8, the implanted portion 30 is positioned, along the first direction X, so as to incorporate the proximal part pl of the light-emitting diode 10. Alternatively, and as shown in Figures 5 and 7, the implanted portion 30 is disjoint from the proximal part pl. By "passivated" or "neutralized" portion or element, it is understood that the absolute value of the conductivity of said portion or element decreases. For example, said portion or element can become insulating when it is passivated. Therefore, it is advantageous for the implanted portion 30 to be disjoint from the distal part dl so as to allow the conversion of an electrical signal into light radiation at said distal part dl.

[0108] The implanted portion 30 can delimit within the semiconductor core 11 at least a first implanted portion 31 disjoint from the distal part dl of the light-emitting diode 10. Consequently, the semiconductor core 11 also comprises at least a first non-implanted portion 32 delimited at least partially by said at least a first implanted portion 31. Said at least a first implanted portion 31 has an ionic concentration strictly different from an ionic concentration of said at least a first non-implanted portion 32.

[0109] The implanted portion 30 further delimits within the semiconductor shell 13 at least one passivated portion 33 disjoint from the distal part dl of the light-emitting diode 10. Consequently, the semiconductor shell 13 also comprises at least one active portion 34 delimited at least partially by said at least one passivated portion 33. Said at least one passivated portion 33 has a conductivity strictly lower than a conductivity of said at least one active portion 34.

[0110] Generally, the implanted portion 30 is a region of the light-emitting diode 10 in which ions are implanted, where each implanted ion forms a complex with a dopant element, the doping according to the first type of conductivity of the semiconductor core 11 being neutralized at the level of the first implanted portion 31, and / or the doping according to the second type of conductivity of the semiconductor shell 13 being neutralized at the level of the passivated portion 33. It is also possible that the ions implanted in the implanted portion 30 form deep levels. This has the effect of limiting or eliminating the mobility of the positive or negative charge carriers, without these deep levels serving as a center of non-radiative recombination. For example, ion implantation includes the implantation of at least one ion chosen from among argon ions Ar, helium ions He, neon ions Ne, oxygen ions O, germanium ions Ge, arsenic ions As, phosphorus ions P, boron ions B, magnesium ions Mg, silicon ions Si, aluminum ions Al, fluorine ions F, nitrogen ions N, and hydrogen ions H. Thus, it is possible to implant ions in deep levels, so as to neutralize the free charge carriers of the semiconductor core 11 and / or the semiconductor shell 13 at the level of the first implanted portion 31 and / or the passivated portion 33.

[0111] According to an embodiment in which the semiconductor core 11 is mainly composed of magnesium-doped gallium nitride, the implanted hydrogen ions H+ form a magnesium-hydrogen complex (Mg-H) with the magnesium dopant. Thus, the ion implantation neutralizes the magnesium doping P, thereby passivating the first implanted portion 31 and reducing its conductivity. The term "compound mainly composed of a material" means that a compound comprises a proportion greater than or equal to 95% of said material, this proportion preferably being greater than 99%.

[0112] The arrangements described above make it possible to propose a light-emitting diode 10 comprising an embedded portion 30 having locally reduced conductivity. The three-dimensional shape of the light-emitting diode 10 also makes it possible to define more simply an embedded portion 30 in which the conductivity is reduced.

[0113] More generally, the invention may also include an optoelectronic device comprising a support 3, 8 extending along a plane, and at least one light-emitting diode 10 as described above, in which the implanted portion 30 is substantially parallel to the plane of the support 3, 8. Advantageously, the optoelectronic device may include an interlayer filling layer (for example, the planarization layer 17) disposed between two light-emitting diodes 10. Said interlayer filling layer may have a suitable ion implantation response profile, governing the implantation depth as a function of the implantation energy, typically similar to that of the materials composing the light-emitting diode 10, and thus include an interlayer portion implanted parallel to the plane of the support 3, 8 and in line with the implanted portion 30 of the light-emitting diodes 10.In this way, it is possible to determine and control the ion implantation depth as a function of the implantation energy. Thus, it is possible to control ion implantation when it is performed on a continuous cross-section of the optoelectronic device. The provisions described above... also apply to the optoelectronic device 1 which is the subject of the invention.

[0114] Figures 3 to 8 illustrate the steps of a manufacturing process which is the subject of the invention, enabling the manufacture of an optoelectronic device 1 of the type of one of those described above.

[0115] The manufacturing process first includes a step of supplying El with an initial optoelectronic device comprising a support 3, 8 having a support face 5 and at least one light-emitting diode 10 cooperating directly or indirectly with said support face 5. Said at least one light-emitting diode 10 has a three-dimensional shape, and includes a height hl extending along a first direction X between a proximal part pl and a distal part dl opposite to said proximal part pl along said first direction X. Said light-emitting diode 10 includes a semiconductor core 11 doped according to a first type of conductivity, and a semiconductor shell 13 doped according to a second type of conductivity opposite to the first type of conductivity, said semiconductor shell 13 covering at least partially said semiconductor core 11.According to a first variant, said at least one light-emitting diode 10 is disposed on said support face 5 of the support 3, 8 such that the proximal part pl of the at least one light-emitting diode 10 is turned towards the support face 5 of the support 3, 8, and such that the first direction X extends transversely to said support face 5. It may however be provided that the light-emitting diode 10 is turned in the other direction with respect to the support 3, 8. According to one embodiment, the initial optoelectronic device supplied during the supply step E1 comprises a first conductive element 7 electrically connected to the semiconductor core 11 of the light-emitting diode 10, and a second conductive element 9 electrically connected to the semiconductor shell 13 of the light-emitting diode 10.

[0116] According to one embodiment, at least one light-emitting diode 10 having a three-dimensional shape can be manufactured in accordance with one of the embodiments described in documents FR3031242A1, or FR3098013A1. Furthermore, and as illustrated previously, the first conductive element 7 can be electrically connected to the semiconductor core 11 at the proximal part pl, for example via through-holes 15 formed through the support 3, 8.

[0117] Figure 3 illustrates a planarization step E2 in which a planarization layer 17 is deposited on the support face 5 of the support 3, 8 until a thickness el of the planarization layer 17, viewed along the first direction X and measured from the support face 5, is at least equal to the height hl of at least one light-emitting diode 10. For example, the planarization layer 17 comprises an insulating material, for example silicon dioxide SiO2. advantageous, the planarization step E2 is implemented in such a way as to cover at least one light-emitting diode 10.

[0118] Such a planarization step E2 can be implemented before a passivation step E3 of the manufacturing process, which will be described below. Advantageously, the planarization step E2 makes it possible to standardize a thickness e2 of the optoelectronic device 1 along the first X direction, which allows for better control of ion implantation depths, particularly during the passivation step E3. This also makes it possible to obtain differential passivation between the N-doped semiconductor element and the P-doped semiconductor element.

[0119] Figures 4 to 8 illustrate said passivation step E3 in which at least one light-emitting diode 10 is passivated over an implanted portion 30 extending over an implanted height h2 measured along the first X direction, said implanted height h2 being strictly less than the height hl of the light-emitting diode 10. For example, the passivation step E3 can be implemented over an implanted height h2, measured along the first X direction, of less than 500 nm. By "passivated" or "neutralized" portion or element, it is understood that the absolute value of the conductivity of said portion or element decreases. For example, said portion or element can become insulating after undergoing the passivation step E3.

[0120] The implanted portion 30 is positioned between the distal part dl and the proximal part pl, and is disjoint from the distal part dl. According to the variants shown in Figures 4, 6, and 8, the passivation step E3 is implemented at the level of the proximal part pl, so that the proximal part pl is included within the implanted portion 30. Thus, and advantageously, it is possible to neutralize the conductivity at the level of the proximal part pl. For example, in the case of a three-dimensional light-emitting diode 10 in the shape of a microwire, nanowire, cone, truncated cone, or pyramid, it is possible to neutralize the proximal part pl, so as to emit light only at the level of the distal part dl. Thus any parasitic crystalline defect, such as a residual deposit of the semiconductor shell 13, possibly present at the level of the proximal part pl, can be neutralized.It is then possible to improve the emission efficiency and light extraction of the three-dimensional light-emitting diode.

[0121] Generally, the passivation step E3 is implemented such that the implanted portion 30 delimits within the semiconductor core 11 at least one first implanted portion 31 disjoint from the distal part dl of the light-emitting diode 10. The semiconductor core 11 then comprises at least one first unimplanted portion 32 delimited at least partially by said at least one first implanted portion 31, said at least one first implanted portion 31 having an ionic concentration strictly different from an ionic concentration of said at least a first non-implanted portion 32.

[0122] Furthermore, the passivation step E3 is implemented so that the implanted portion 30 further delimits within the semiconductor shell 13 at least one passivated portion 33 disjoint from the distal part dl of the light-emitting diode 10. The semiconductor shell 13 then comprises at least one active portion 34 delimited at least partially by said at least one passivated portion 33, said at least one passivated portion 33 having a conductivity strictly lower than a conductivity of said at least one active portion 34.

[0123] In the case where the first conducting element 7 is electrically connected to the N-doped semiconductor nucleus 11, at the level of the proximal part pl, for example through through openings 15 made through the support 3, 8, and in the case where the passivation step E3 has a low impact on the conductivity of the semiconductor nucleus 11, it is possible to ensure a good electrical connection between the semiconductor nucleus 11 and the first conducting element 7, while passivating the passivated portion 33.

[0124] According to the embodiments illustrated in Figures 5 and 7, the passivation step E3 is implemented so that the implanted portion 30 is disjoint from the proximal portion pl. Thus, it is possible to propose a light-emitting diode 10 having at least two first active portions 32 and at least two active portions 34 separated by the implanted portion 30. Each first non-implanted portion 32 adjacent to an active portion 34 will then be capable of emitting light, by conversion of electrical energy into light radiation.

[0125] According to the two non-limiting embodiments shown in Figures 4 and 5, the passivation step E3 is implemented by ion implantation, in a manner that neutralizes the doping according to the first type of conductivity of the semiconductor core 11 at the level of the first implanted portion 31, and / or in a manner that neutralizes the doping according to the second type of conductivity of the semiconductor shell 13 at the level of the passivated portion 33. Thus, and advantageously, it is possible to modify the conductivity of the first implanted portion 31 and of the passivated portion 33 by ion implantation. For example, the ion implantation is carried out by implanting ions through the light-emitting diode 10, and / or through the optoelectronic device 1.Advantageously, the E3 passivation step by ion implantation of a three-dimensional light-emitting diode 10 allows ions to be implanted simultaneously in the semiconductor core 11 and in the semiconductor shell 13. .

[0126] According to the variants illustrated in Figures 4 A and 5, the passivation step E3 is implemented by ion implantation from the distal part dl to the proximal part pl.

[0127] Alternatively, and as illustrated in [Fig. 4] B, the ion implantation carried out during the passivation step E3 is performed from the proximal part pl to the distal part dl. According to an embodiment not shown, it may also be provided that the ion implantation is carried out from a rear face 6 of the support 3, 8, said rear face 6 of the support 3, 8 being opposite the support face 5 of the support 3, 8.

[0128] Generally, the passivation step E3 is implemented over an implanted height h2, measured along the first X direction, of less than 500 nm. Thus, it is possible to form the implanted portion 30, for example by ion implantation, using implantation energy ranges commonly used in microelectronic processes. An implantation energy can, in particular, be between 1 keV and 500 keV. For example, said implantation energy can be defined as a function of the mass of the implanted ion and as a function of the thickness of material to be traversed.

[0129] In the case of implementing the E3 passivation step by ion implantation, it may be envisaged to use at least one ion chosen from among the argon ions Ar, the helium ions He, the neon ions Ne, the oxygen ions O, the germanium ions Ge, the arsenic ions As, the phosphorus ions P, the boron ions B, the magnesium ions Mg, the silicon ions Si, the aluminium ions Al, the fluorine ions F, the nitrogen ions N, and the hydrogen ions H. Thus, it is possible to implant ions in deep levels, so as to neutralize the free charge carriers of the semiconductor core 11 and / or the semiconductor shell 13 at the level of the first implanted portion 31 and the passivated portion 33.Synergistically, the neutralization of free charge carriers during the E3 passivation step makes the semiconductor core 11 and the semiconductor shell 13 less conductive without creating recombination centers of non-radiative carriers, which would be detrimental in the case of optoelectronic devices 1. For example, an implanted ion dose is between 1011 at / cm2 and 1014 at / cm2. For example, said implanted ion dose can be defined as a function of the mass of the implanted ion and as a function of the thickness of material to be traversed.

[0130] Advantageously, the passivation step E3 can be implemented by hydrogen ion implantation. Indeed, the use of hydrogen implantation, i.e., H+ ion implantation, allows for the more efficient passivation of a P-doped material than an N-doped material, using low doses of ion implantation. In this way, it is possible to selectively or differentially passivate a P-doped material with respect to an N-doped material in a single process step.

[0131] Finally, the manufacturing process may include an annealing step E4 in which The optoelectronic device 1 is heated to an annealing temperature, said annealing temperature being less than 500°C. Advantageously, the annealing step E4 allows the N-doped semiconductor element, such as the semiconductor core 11, to be regenerated in order to limit the impact of the passivation step E3 on this semiconductor element.

[0132] The arrangements described above make it possible to manufacture an optoelectronic device 1 comprising at least one light-emitting diode 10 having an implanted portion 30 with locally reduced conductivity. The three-dimensional shape of the light-emitting diode 10 makes it possible to define an implanted portion 30 in which the conductivity is reduced during the passivation step E3.

Claims

Claims

1. Light emitting diode (10) for an optoelectronic device (1), the light emitting diode (10) having a three-dimensional shape and comprising a height (hl) extending in a first direction (X) between a proximal portion (pl) and a distal portion (dl) opposite said proximal portion (pl) along said first direction (X), said light emitting diode (10) comprising: - a semiconductor core (11) doped according to a first type of conductivity, the proximal part (pl) corresponding to a growth base of said semiconductor core (11); - a semiconductor shell (13) doped according to a second type of conductivity opposite to the first type of conductivity, said semiconductor shell (13) at least partially covering said semiconductor core (11); the light-emitting diode (10) comprising an implanted portion (30) extending over an implanted height (h2) counted along the first direction (X), said implanted height (h2) being strictly less than the height (hl) of the diode, said implanted portion (30) being arranged between the distal part (dl) and the proximal part (pl) and being separate from the distal part (dl), so that the implanted portion (30) delimits within the semiconductor shell (13) at least one passivated portion (33) separate from the distal part (dl) of the light-emitting diode (10), the semiconductor shell (13) comprising at least one active portion (34) delimited at least partially by said at least one passivated portion (33), said at least one passivated portion (33) having a conductivity strictly lower than a conductivity of said at least one active portion (34), and so that the implanted portion (30) delimits within the semiconductor core (11) at least a first implanted portion (31) separate from the distal part (dl) of the light-emitting diode (10), the semiconductor core (11) comprising at least a first non-implanted portion (32) delimited at least partially by said at least a first implanted portion (31), said at least a first implanted portion (31) having a strictly different ionic concentration of an ionic concentration of said at least one first non-implanted portion (32).

2. The light-emitting diode (10) according to claim 1, wherein the semiconductor shell (13) covers the semiconductor core (11) on the distal portion (dl) side, and does not cover the semiconductor core (11) on the proximal portion (pl) side.

3. The light-emitting diode (10) of any one of claims 1 to 2, wherein the semiconductor core (11) comprises N-doped gallium nitride (GaN), and wherein the semiconductor shell (13) comprises P-doped gallium nitride (GaN).

4. A light-emitting diode (10) according to any one of claims 1 to 3, wherein the implanted portion (30) is an area of ​​the light-emitting diode (10) extending transversely to the first direction (X), and in which ions are implanted where each implanted ion forms: - a complex with a doping element, the doping according to the second conductivity type of the semiconductor shell (13) being neutralized at the passivated portion (33); or - deep levels which limits or eliminates the mobility of the positive or negative charge carriers, without these deep levels serving as non-radiative recombination centers.

5. The light emitting diode (10) of claim 4, wherein the implanted ions are hydrogen ions.

6. The light-emitting diode (10) of any one of claims 1 to 5, wherein at least one semiconductor element selected from the group comprising the semiconductor core (11) and the semiconductor shell (13) has a wire, conical, truncated cone, pyramid, or truncated pyramid shape.

7. A light-emitting diode (10) according to any one of claims 1 to 6, wherein the implanted portion (30) is positioned, along the first direction (X), so as to incorporate the proximal portion (pl) of the light-emitting diode (10).

8. Light emitting diode (10) according to any one of claims 1 to 6, wherein the implanted portion (30) is separate from the proximal portion (pl).

9. Optoelectronic member comprising a support (3, 8) extending along a plane, and at least one light-emitting diode (10) according to any one of claims 1 to 8; the implanted portion (30) of said at least one light-emitting diode being substantially parallel to the plane of the support (3, 8).

10. Optoelectronic device (1) comprising: - a support (3, 8) having a support face (5); - at least one light-emitting diode (10) according to any one of claims 1 to 8, cooperating directly or indirectly with said support face (5); - a first conductive element (7) electrically connected to the semiconductor core (11) of the light-emitting diode (10), and - a second conductive element (9) electrically connected to the semiconductor shell (13) of the light-emitting diode (10).

11. Optoelectronic device (1) according to claim 10, wherein said at least one light-emitting diode (10) is arranged on the support face (5) so that the proximal part (pl) of said at least one light-emitting diode (10) faces the support face (5) of the support (3), and so that the first direction (X) extends transversely to the support face (5).

12. A method of manufacturing an optoelectronic device (1) comprising the following steps: - a step of providing (El) an initial optoelectronic device comprising: • a support (3, 8) having a support face (5); and • at least one light-emitting diode (10) cooperating directly or indirectly with said support face (5), said at least one light-emitting diode (10) having a three-dimensional shape, and comprising a height (hl) extending in a first direction (X) between a proximal portion (pl) and a distal portion (dl) opposite said proximal portion (pl) along said first direction (X), said light-emitting diode (10) comprising a semiconductor core (11) doped according to a first type of conductivity, the proximal part (pl) corresponding to a growth base of said semiconductor core (11), and comprising a semiconductor shell (13) doped according to a second type of conductivity opposite to the first type of conductivity, said semiconductor shell (13) at least partially covering said semiconductor core (11); a step of passivation (E3) of the at least one light-emitting diode (10) to form the optoelectronic device (1), in which the at least one light-emitting diode (10) is passivated on an implanted portion (30) extending over an implanted height (h2) counted along the first direction (X), said implanted height (h2) being strictly less than the height (hl) of the light-emitting diode (10), said implanted portion (30) being arranged between the distal part (dl) and the proximal part (pl), and being disjointed from the distal part (dl), so that the implanted portion (30) delimits within the semiconductor shell (13) at least one passivated portion (33) separate from the distal part (dl) of the light-emitting diode (10), the semiconductor shell (13) comprising at least one active portion (34) delimited at least partially by said at least one passivated portion (33), said at least one passivated portion (33) having a conductivity strictly lower than a conductivity of said at least one active portion (34), and so that the implanted portion (30) delimits within the semiconductor core (11) at least a first implanted portion (31) separate from the distal part (dl) of the light-emitting diode (10), the semiconductor core (11) comprising at least a first non-implanted portion (32) delimited at least partially by said at least a first implanted portion (31), said at least a first implanted portion (31) having an ionic concentration strictly different from an ionic concentration of said at least a first non-implanted portion (32).

13. A manufacturing method according to claim 12, wherein the passivation step (E3) is carried out by ion implantation, in a manner making it possible to neutralize the doping according to the second conductivity type of the semiconductor shell (13) at the passivated portion (33).

14. A manufacturing method according to claim 13, wherein the passivation step (E3) is carried out by hydrogen ion implantation.

15. A manufacturing method according to any one of claims 13 or 14, wherein the ion implantation is carried out from a rear face (6) of the support (3, 8), said rear face (6) of the support (3, 8) being opposite the support face (5) of the support (3, 8).

16. Manufacturing method according to any one of claims 13 or 14 in which the ion implantation is carried out from the support face (5).

17. A manufacturing method according to any one of claims 12 to 16, wherein the passivation step (E3) is carried out at the proximal portion (pl), so that the proximal portion (pl) is included in the implanted portion (30).

18. Manufacturing method according to any one of claims 12 to 16, wherein the passivation step (E3) is implemented in such a way that the implanted portion (30) is disjointed from the proximal part (pl).

19. A manufacturing method according to any one of claims 12 to 18, further comprising a planarization step (E2) in which a planarization layer (17) is deposited at the support face (5) of the support (3, 8) until a thickness (el) of the planarization layer (17), seen in the first direction (X) and counted from the support face (5), is at least equal to the height (hl) of the at least one light-emitting diode (10).

20. A manufacturing method according to claim 20, wherein the planarization step (E2) is carried out before the passivation step (E3).

21. A manufacturing method according to any one of claims 12 to 20, further comprising an annealing step (E4) in which the optoelectronic device (1) is heated to an annealing temperature, said annealing temperature being less than 500°C.