Method for manufacturing an optoelectronic device comprising a germanium-on-silicon photodiode optically coupled to an integrated Si3N4 waveguide

Abstract

The invention relates to a method for manufacturing an optoelectronic device comprising a germanium-on-silicon photodiode (2) coupled to a Si3N4 waveguide (3). The method comprises the following steps: fabrication of a semiconductor substrate (20), comprising a semiconductor stack of thin films (23, 24, 25) intended to form portions (31, 32, 33) of a semiconductor pad (30) of the photodiode (2); fabrication of a photonic substrate (10), comprising the Si3N4 waveguide (3); transfer and bonding of the semiconductor substrate (20) onto the photonic substrate (10); fabrication of the photodiode (2) by photolithography and etching of the semiconductor stack (23, 24, 25) to form the semiconductor pad (30) then located above the waveguide (3). Figure for the abstract: Fig. 1

Description

Title of the invention: Method for manufacturing an optoelectronic device comprising a germanium-on-silicon photodiode optically coupled to an integrated Si3N4 waveguide Technical field

[0001] The field of the invention is that of optoelectronic devices comprising a germanium-on-silicon type photodiode optically coupled to a waveguide made from a silicon nitride, and more precisely from Si3N4. STATE OF THE PRIOR ART

[0002] There is a need to have germanium-based photodiodes, for detecting a guided optical mode having a wavelength in particular between 1300 and 1550 nm depending on the intended applications, for example telecom, the photodiodes being optically coupled to a waveguide made of stoichiometric silicon nitride Si3N4. Indeed, such a material is transparent in this spectral range and has very low optical losses in transmission.

[0003] However, manufacturing such an optoelectronic device presents difficulties linked in particular to integration constraints. Thus, it may be necessary to carry out high-temperature annealing, of the order of 1000°C, to reduce propagation losses in the silicon nitride Si3N4 guide, which may not be compatible with the thermal budget of the active components having been produced.

[0004] In this respect, the document Lischke et al. entitled Silicon nitride waveguide coupled 67+ GHz Ge photodiode for non-SOI PIC and ePIC platforms, 2019 IEEE International Electron Devices Meeting (IEDM), 2019, 33.2.1 - 33.2.4 describes an optoelectronic device comprising a germanium-based photodiode optically coupled to a waveguide made of a non-stoichiometric silicon nitride. Here, the germanium of the absorption portion of the photodiode is epitaxially grown from a bulk silicon substrate (bulk substrate, in English), and the SiN waveguide is then made above the germanium absorption portion. The waveguide is produced by low-temperature plasma-enhanced chemical vapor deposition (PECVD), so as to respect the thermal budget and thus not degrade the doped portions and active components that have already been produced.Also, this approach does not allow to obtain a stoichiometric silicon nitride waveguide Si3N4.

[0005] Another approach may consist of producing the waveguide, then in Si3N4, above a silicon-on-insulator (SOI) substrate, then producing the germanium-on-silicon (Ge-on-Si) photodiode from this same SOL substrate. The document by Hu et al. entitled 180 Gbit / s Si 3 N 4 -waveguide coupled germanium photodetector with improved quantum efficiency, Opt. Lett. 46, 6019 (2021) describes such an optoelectronic device, where Si3N4 waveguides are arranged laterally and on either side of the germanium absorption portion of the photodiode. However, this approach involves significant integration constraints in terms of sizing and positioning between the different elements. For example, the risks of leakage of guided modes in the thick silicon layer of the SOI substrate remain significant, and can degrade the performance of the optoelectronic device. Statement of the invention

[0006] The invention aims to remedy at least in part the drawbacks of the prior art, and more particularly to propose a method for manufacturing an optoelectronic device comprising a Ge-on-Si type photodiode optically coupled to an integrated Si3N4 waveguide. The optoelectronic device has good performance, and the method makes it possible to limit or even eliminate the integration constraints, in terms of thermal budget, dimensioning and positioning, mentioned above.

[0007] For this, the subject of the invention is a method for manufacturing an optoelectronic device comprising a germanium-on-silicon type photodiode optically coupled to a Si3N4 waveguide, the photodiode comprising a semiconductor pad formed from a doped lower portion made from silicon, a doped upper portion, and an intermediate absorption portion made from germanium and located between the doped lower and upper portions along a thickness axis of the photodiode.

[0008] According to the invention, the method comprises the following steps: - production of a so-called semiconductor substrate, comprising a semiconductor stack of thin layers intended to form the portions of the semiconductor pad; - production of a so-called photonic substrate, comprising the Si3N 4 waveguide; - transfer and bonding of the semiconductor substrate onto the photonic substrate; - production of the photodiode, by photolithography and etching of the semiconductor stack to form the semiconductor pad then located above the waveguide.

[0009] Some preferred but non-limiting aspects of this manufacturing method are as follows.

[0010] The method may comprise, during the step of producing the photodiode, a step of producing the doped upper portion and the intermediate portion. absorption, by localized etching of a doped upper thin layer and an intermediate thin layer made from germanium of the semiconductor stack, with etching stopped on a doped lower thin layer of the semiconductor stack intended to form the doped lower portion.

[0011] The method may comprise, after the step of producing the doped upper portion and the intermediate absorption portion, a step of producing spacers made from an electrically insulating material, arranged against the sides of the intermediate absorption portion, and extending over a part of the doped lower thin layer or of the doped lower portion.

[0012] The method may comprise, after the step of producing the doped upper portion and the intermediate absorption portion, a step of producing the doped lower portion, by localized etching of a doped lower thin layer, so that the doped lower portion has uncovered lateral parts.

[0013] The method may comprise, after the step of producing the doped lower portion, a step of producing conductive lateral portions, made of an electrically conductive material, located on and in contact with an upper face of the lateral parts of the doped lower portion, by siliciding the silicon-based material of the doped lower portion.

[0014] The method may comprise a step of producing a central conductive portion, made of an electrically conductive material, located on and in contact with an upper face of the doped upper portion, the latter being made from silicon, by siliciding the silicon-based material of the doped upper portion simultaneously with the siliciding of the silicon-based material of the doped lower portion.

[0015] The method may comprise a step of depositing an insulating encapsulation layer covering the semiconductor pad, then a step of producing contact metallization comprising lateral conductive vias passing through the insulating encapsulation layer to come into contact with the lateral conductive portions.

[0016] The method may comprise, during the step of producing the photonic substrate, a step of producing the waveguide from a stoichiometric silicon nitride Si3N4, followed by a step of annealing the waveguide at at least 1000°C.

[0017] The invention also relates to an optoelectronic device comprising: - a germanium-on-silicon type photodiode, comprising a semiconductor pad formed from a doped lower portion made from silicon, a doped upper portion, and an intermediate absorption portion made from germanium and located between the doped lower and upper portions along a thickness axis of the photodiode; - a Si3N4 waveguide, optically coupled to the photodiode.

[0018] According to the invention, the waveguide is located below the photodiode along a thickness axis of the photodiode, and is integrated into a photonic substrate on which the photodiode rests.

[0019] The photonic substrate may comprise a support layer and a lower dielectric layer on which the waveguide rests, the waveguide being spaced from the support layer by at least 2 pm.

[0020] The doped lower portion may have a transverse dimension greater than that of the intermediate absorption portion, spacers made from an electrically insulating material, arranged against the sides of the intermediate absorption portion, and extending over a part of the upper face of the doped lower portion.

[0021] The optoelectronic device may comprise conductive lateral portions, made of a silicide, located on and in contact with an upper face of lateral parts of the doped lower portion not covered by the spacers.

[0022] The doped upper portion may be made from silicon. The optoelectronic device may comprise a central conductive portion, made from a silicide, located on and in contact with an upper face of the doped upper portion.

[0023] The optoelectronic device may comprise an insulating encapsulation layer covering the semiconductor pad and the conductive lateral and central portions, and contact metallizations comprising lateral conductive vias passing through the insulating encapsulation layer to come into contact with the conductive lateral portions, and at least one central conductive via passing through the insulating encapsulation layer to come into contact with the conductive central portion. Brief description of the drawings

[0024] Other aspects, aims, advantages and characteristics of the invention will appear better on reading the following detailed description of preferred embodiments thereof, given by way of non-limiting example, and made with reference to the appended drawings in which:

[0025] [Fig.l] is a schematic and partial view, in cross-section, of an optoelectronic device comprising a Ge on Si type photodiode optically coupled to an integrated Si3N4 waveguide arranged under the photodiode, according to one embodiment;

[0026] Figures 2A to 2J illustrate different steps of a method of manufacturing the optoelectronic device according to one embodiment, the optoelectronic device being similar to that illustrated in [Fig.l].

[0027] DETAILED DESCRIPTION OF PARTICULAR EMBODIMENTS

[0028] In the figures and in the remainder of the description, the same references represent identical or similar elements. Furthermore, the different elements are not shown to scale so as to favor the clarity of the figures. Furthermore, the different embodiments and variants are not mutually exclusive and can be combined with each other. Unless otherwise indicated, the terms "substantially", "approximately", "of the order of" mean to within 10%, and preferably to within 5%. Furthermore, the terms "between ... and ..." and equivalents mean that the limits are included, unless otherwise indicated.

[0029] The invention relates to a method of manufacturing an optoelectronic device, and to the optoelectronic device itself, which comprises a germanium-on-silicon type photodiode, optically coupled to an integrated waveguide made of Si3N 4, i.e. stoichiometric silicon nitride.

[0030] [Fig.l] is a schematic and partial view, in cross-section, of such an optoelectronic device 1 according to one embodiment.

[0031] Here and for the remainder of the description, a direct three-dimensional orthogonal reference frame XYZ is defined, where the XY plane is a plane parallel to the plane of the photonic substrate 10 and in which the integrated waveguide 3 extends, where the longitudinal axis Y is oriented along the optical coupling axis of the latter with the photodiode 2, and where the vertical axis Z is oriented from the integrated waveguide 3 towards the photodiode 2. Furthermore, the terms “lower” and “upper” are understood as relating to an increasing positioning along the +Z direction.

[0032] The optoelectronic device 1 comprises a Ge on Si type photodiode 2, which rests on a photonic substrate 10 where the integrated waveguide 3 made of Si3N4 is located.

[0033] The substrate 10 is said to be photonic insofar as it comprises the waveguide 3 made of Si3N4, which is then called an integrated waveguide. It may comprise an integrated photonic circuit formed from the waveguide 3 possibly coupled to other waveguides.

[0034] The photonic substrate 10 here comprises a support layer 11, made for example from the same material (for example silicon, here a bulk silicon substrate) or from a stack of different materials, and which has a thickness of the order of several hundred microns.

[0035] A lower dielectric layer 12 covers the support layer 11, and participates in forming the low refractive index cladding of the integrated waveguide 3. It can be made of an oxide, for example here of a silicon oxide. It has a sufficient thickness to avoid optical leaks of the guided mode in the direction of the support layer, for example of at least 2 μm, and of the order of 2 to 3 μm.

[0036] The integrated waveguide 3 therefore rests on the lower dielectric layer 12. It is made of Si3N4, so that the optical losses in transmission of the guided mode are particularly low. In this example, the integrated waveguide 3 is a straight guide (rectangular cross-section) but, as a variant, it can be a ridge guide formed of a base (slah) and an edge (rib). Other shapes are of course possible.

[0037] An upper dielectric layer 13 covers the integrated waveguide 3 as well as the lower dielectric layer 12. It also helps to form the cladding of the waveguide. It can also be made of an oxide, for example here of a silicon oxide. In this example, it defines the upper face of the photonic substrate 10, and here makes it possible to ensure direct oxide-oxide bonding with a thin bonding layer 26 of oxide (see [Fig.2D]) of the semiconductor substrate 20 which will have been transferred onto the photonic substrate 10. It also makes it possible to ensure a spacing with respect to the photodiode 2 to allow good optical coupling, here by evanescence, with the photodiode 2.

[0038] The photodiode 2 comprises a semiconductor pad 30 formed from portions of thin semiconductor layers 31, 32, 33. More precisely, the semiconductor pad 30 comprises a stack, along the +Z direction, of a doped lower portion 31, an intermediate absorption portion 32, and a doped upper portion 33. Insofar as the photodiode 2 is of the Ge on Si type, the intermediate absorption portion 32 is made from germanium and the doped lower portion 31 is made from p-type doped silicon.

[0039] The doped lower portion 31 is made from silicon doped according to a first type of conductivity, here of type p. In this example, it is made of silicon. It extends here on and in contact with the thin bonding layer 26 (see [Fig.2D]). It has a transverse dimension greater than that of the intermediate 32 and upper 33 portions, so that it comprises at least one lateral part 31.1, and here two lateral parts, not covered by the latter and which extend on either side, along the X axis, of the intermediate 32 and upper 33 portions. These lateral parts 31.1 make it possible to electrically polarize the doped lower portion 31 laterally.

[0040] The intermediate absorption portion 32 is made from unintentionally doped germanium (intrinsic or with slight p-type doping). In this example, it is made from germanium. It extends over and in contact with the doped lower portion 31 and has a transverse dimension smaller than the latter. It is the absorption site of the optical mode to be detected, and has a thickness adapted to maximize absorption. The germanium here presents constraints mechanical in tension in the XY plane, so that the absorption cut-off wavelength can be at least 1550nm here.

[0041] The doped upper portion 33 is made of a semiconductor material doped according to a second conductivity type opposite to the first type, here of type n. It can be made from silicon and / or germanium, and is preferably made of silicon.

[0042] In one embodiment, the photodiode 2 comprises conductive lateral portions 42, located on and in contact with the lateral parts 31.1 of the doped lower portion 31, and made of an electrically conductive material, and here of a silicide. They improve the electrical contact between the doped lower portion 31 and the conductive vias 45.

[0043] In one embodiment, the photodiode 2 also comprises spacers 41, in the form of insulating lateral portions, made of an electrically insulating material, for example a silicon nitride and / or tetraethyl orthosilicate (TEOS). These spacers 41 provide a physical separation, along the X axis, between the conductive lateral portions 42 and the intermediate absorption portion 32.

[0044] In this embodiment where the doped upper portion 33 is made of silicon, a central conductive portion 43 may be located on and in contact with the latter. It is made of an electrically conductive material, and here of a silicide. It improves the electrical contact between the doped upper portion 33 and the conductive via(s) 46.

[0045] The photodiode 2 comprises an insulating encapsulation layer 44, which covers the semiconductor pad 30 and extends over the photonic substrate 10. Contact metallizations are provided to ensure the electrical polarization of the photodiode 2, namely here lateral conductive vias 45 and at least one central conductive via 46, which extend through the insulating encapsulation layer 44 to come into contact here, respectively, with the lateral conductive portions 42 and the central conductive portion 43. Conductive pads 47, 48 may be provided on and in contact with the upper ends of the conductive vias 45, 46 to facilitate the electrical connection.

[0046] The optoelectronic device 1 therefore comprises a Ge on Si type photodiode 2 optically coupled by evanescence to an integrated waveguide 3 made of Si3N4 located under the photodiode 2, and more precisely vertically to the intermediate absorption portion 32. Thus, the optoelectronic device 1 has good performance due to the fact that the integrated waveguide 3 is made of Si3N4 on the one hand and that a high temperature annealing (at least 1000°C, for example approximately 1000°C or 1100°C) could be carried out (without causing degradation with respect to the other active components or the doped portions) and not only in a nitride of non-stoichiometric silicon. In addition, the integrated waveguide 3 is arranged under the photodiode 2 and not laterally next to or above it, and can thus be spaced from the thick layer 11 of the photonic substrate 10 by an adequate distance to limit optical losses by leakage of the guided mode in the latter. Furthermore, as explained below, the fact that the integrated waveguide 3 is arranged under the photodiode 2, and not laterally next to or above it, makes it possible to reduce the production constraints in terms of dimensioning, positioning, and thermal budget.

[0047] Figures 2A to 2J illustrate different steps of a method of manufacturing the optoelectronic device 1 according to one embodiment, where the optoelectronic device 1 is similar to that illustrated in [Fig. 1].

[0048] With reference to [Fig.2A] and 2B, a first substrate called a semiconductor substrate 20 is produced, insofar as it comprises a stack of thin semiconductor layers 23, 24, 25 intended for the production of the semiconductor pad 30.

[0049] First of all, an SOI or GeOI substrate is produced ([Fig.2A]), formed from a stack of a support layer 21, here a solid silicon substrate, a layer 22 of buried oxide (BOX, for Buried Oxide, in English) which covers the support layer 11 and whose thickness is preferably equal to approximately 145nm, and a thin semiconductor layer 23 based on silicon whose thickness is preferably equal to 70nm. In this example, the substrate is of the SOI type and the thin semiconductor layer 23 is made of monocrystalline silicon. Alternatively, the substrate may be of the GeOI type and the thin semiconductor layer 23 would then be made of monocrystalline germanium.

[0050] Next ([Fig.2B]), the semiconductor stack is produced by epitaxy. First, doping of the semiconductor thin layer 23 is carried out by ion implantation, for example with phosphorus, followed by activation annealing of the dopants, to thus obtain a first doped thin layer 23, here made of n-type doped silicon. An intermediate thin layer 24 is then produced in unintentionally doped germanium, by epitaxy from the doped thin layer 23, then a second thin layer 25 based on p-type doped silicon. This doped thin layer 25 is here made of silicon and the boron doping is preferably carried out during growth. Preferably, a thin bonding layer 26, made of an oxide, is deposited on the doped thin layer 25.Note that, following the production by epitaxy of the semiconductor stack, the intermediate thin layer 24 presents mechanical stresses in tension in the XY plane, due to the thermal expansion differential between the silicon and the germanium. The absorption cut-off frequency of the photodiode 2 can then be at least equal to 1550nm.

[0051] With reference to [Fig.2C], the photonic substrate 10 is then produced. As indicated previously, it comprises a support layer 11, for example a solid silicon substrate, a lower dielectric layer 12 made for example of an oxide, the integrated waveguide 3, and an upper dielectric layer 13 made of an oxide. The waveguide 3 here belongs to an integrated photonic circuit located in the photonic substrate 10. It may have been produced by low-pressure chemical vapor deposition (LPCVD) followed by high-temperature annealing (of the order of 1000°C). An integrated waveguide 3 made of Si3N4 is thus obtained, the optical transmission losses of which are greatly reduced. A surface treatment may be carried out to prepare the direct oxide / oxide type bonding of the semiconductor substrate 20 onto the photonic substrate 10.

[0052] With reference to [Fig.2D], the semiconductor substrate 20 is transferred onto the photonic substrate 10, by bringing the thin bonding layer 26 into contact with the upper dielectric layer 13. The semiconductor substrate 20 is then bonded to the photonic substrate 10 by direct bonding, here of the oxide / oxide type.

[0053] With reference to [Fig.2E], the support layer 21 is removed or eliminated from the semiconductor substrate 20, for example by mechanical thinning followed by wet etching with hydrochloric acid. The buried oxide layer 22 is then thinned uniformly over its entire surface.

[0054] With reference to [Fig.2F], the n-doped thin layer 23 and the intermediate layer 24 are structured to thus obtain respectively the n-doped upper portion 33 and the intermediate absorption portion 32. The structuring can be carried out by photolithography and localized etching, for example by dry etching with etching stopped by detection of the end of attack on the p-doped thin layer 25. The n-doped upper portion 33 and the intermediate absorption portion 32 are positioned above and vertically to the integrated waveguide 3 using lithography marks made beforehand in the photonic substrate 10.

[0055] With reference to [Fig.2G], spacers 41 are produced on either side of the intermediate absorption portion 32. For this, a hard mask layer (not shown) made of an electrically insulating material, for example silicon nitride and / or tetraethyl orthosilicate (TEOS), is deposited in a conformal manner so as to continuously cover the n-doped upper portion 33 and the intermediate absorption portion 32, as well as the p-doped thin layer 25. Then, the hard mask layer is etched by dry etching with stopping by detection of the end of attack on the silicon of the n-doped upper portion 33 and the p-doped thin layer 25. Two spacers 41 are thus obtained located against and in contact with the sides of the n-doped upper portion 33 and the intermediate absorption portion 32. The upper face of the n-doped upper portion 33 is made free, as well as a surface not covered by the spacers 41 of the upper face of the thin P-doped layer 25

[0056] With reference to [Fig.2H], the p-doped lower portion 31 is then produced. Note that this step can be carried out before the formation of the spacers 41. The p-doped lower portion 31 can be produced by lithography and etching of the p-doped thin layer 25 by dry etching with stopping by detection of the end of attack on the oxide of the thin bonding layer 26. The p-doped lower portion 31 thus has a central part covered by the intermediate absorption portion 32 and by the spacers 41, and uncovered lateral parts 31.1.

[0057] With reference to [Fig. 21], the conductive lateral portions 42 are then produced, and here the conductive central portion 43. These lateral portions 42 and central 43 are advantageously produced simultaneously insofar as the n-doped upper portion 33 and the p-doped lower portion 31 are here both made of silicon. They are made of an electrically conductive material. This material is preferably a silicide of a transition metal, for example a nickel silicide NiSi2. For this, by way of example, a continuous thin layer of nickel Ni with a thickness of, for example, 9 nm is deposited, so as to continuously cover the upper face of the n-doped upper portion 33 and the upper face of the lateral parts 31.1 of the p-doped lower portion 31, then a continuous thin layer of titanium nitride TiN with a thickness of, for example, 10 nm is deposited.A siliciding anneal is then carried out to form localized zones of NiSi2 in contact with the n-doped upper portion 33 and the lateral parts 31.1 of the p-doped lower portion 31. A wet etching step makes it possible to remove the zones which have not been silicided. This gives the conductive lateral portions 42 and the conductive central portion 43 in NiSi2.

[0058] With reference to [Fig.2J], the production of the photodiode 2 is finalized. For this, an insulating encapsulation layer 44 is deposited so as to cover the semiconductor pad 30 and the photonic substrate 10, followed by planarization. Contact metallizations are then produced to ensure the electrical polarization of the photodiode 2. Here, they comprise lateral conductive vias 45 and central conductive vias 46 which extend through the insulating encapsulation layer 44 to come into contact, respectively, with the lateral conductive portions 42 and the central conductive portion 43. Contact pads 47, 48 can be produced on the insulating encapsulation layer 44 to facilitate the electrical connection.

[0059] Thus, the method makes it possible to manufacture an optoelectronic device 1 which has good performance, by implementing the production then the transfer and bonding direct of a photonic substrate 10 comprising the integrated waveguide 3 in Si3N4 on the one hand, and a semiconductor substrate 20 intended to form the semiconductor pad 30 of the photodiode 2 on the other hand. The annealing step to reduce the propagation losses in the Si3N4 waveguide is carried out before the transfer and bonding step, as are the doping steps of the doped thin layers 23 and 25. These substrates 10, 20 are thus 'pre-functionalized' before the transfer and bonding step, which thus makes it possible to reduce the integration constraints in terms of thermal budget once the transfer and bonding step is carried out.The silicon of the p-doped lower portion 31 has the advantage of ensuring both an etching stop during the production of the n-doped upper portion 33 and the intermediate absorption portion 32, and allows the formation of a silicide improving the electrical contact between the p-doped lower portion 31 and the conductive via 45.

[0060] Furthermore, the integrated waveguide 3 is arranged under the photodiode 2 and not laterally next to or above it, which simplifies the production of the integrated photonic circuit. It is optically coupled to the photodiode 2 in an evanescent manner via an intermediate dielectric layer 13, 26 of uniform thickness of approximately a few hundred nanometers, for example equal to approximately 200 nm. It is finally spaced a sufficient distance from the support layer 11 to limit the optical leaks of the guided mode, for example from 2 to 3 pm.

[0061] Particular embodiments have just been described. Different variants and modifications will appear to those skilled in the art.

Claims

1.

2. Claims Method for manufacturing an optoelectronic device (1) comprising a germanium-on-silicon type photodiode (2) optically coupled to a Si3N4 waveguide (3), the photodiode (2) comprising a semiconductor pad (30) formed of a doped lower portion (31) made from silicon doped according to a first conductivity type, an upper portion (33) doped according to a second conductivity type opposite to the first type and made from silicon and / or germanium, and is preferably made from silicon, and an intermediate absorption portion (32) made from germanium and located between the doped lower and upper portions (31, 33) along a thickness axis of the photodiode (2), the method being characterized in that it comprises the following steps: • production of a so-called semiconductor substrate (20), comprising a semiconductor stack of thin layers (23, 24, 25) intended to form the portions (31, 32, 33) of the semiconductor pad (30); • production of a so-called photonic substrate (10), comprising a support layer (11) and comprising the waveguide (3) in Si3N4; the production of said substrate comprising a step of producing the waveguide (3) in a stoichiometric silicon nitride Si3N4, followed by a step of annealing the waveguide (3) at least equal to 1000°C; • transfer and bonding of the semiconductor substrate (20) onto the photonic substrate (10) after the annealing step; • production of the photodiode (2), by photolithography and etching of the semiconductor stack (23, 24, 25) to form the semiconductor pad (30) then located above the waveguide (3). Manufacturing method according to claim 1, comprising, during the step of producing the photodiode (2), a step of producing the doped upper portion (33) and the intermediate absorption portion (32), by localized etching of a doped upper thin layer (23) and of an intermediate thin layer (24) produced from germanium of the semiconductor stack, with etching stop on a doped lower thin layer (25) of the semiconductor stack intended to form the doped lower portion (31).

3. Manufacturing method according to claim 2, comprising, after the step of producing the doped upper portion (33) and the intermediate absorption portion (32), a step of producing spacers (41) made from an electrically insulating material, arranged against the sides of the intermediate absorption portion (32), and extending over a part of the doped lower thin layer (25) or of the doped lower portion (31).

4. Manufacturing method according to claim 2 or 3, comprising, after the step of producing the doped upper portion (33) and the intermediate absorption portion (32), a step of producing the doped lower portion (31), by localized etching of a doped lower thin layer (25), so that the doped lower portion (31) has uncovered lateral parts (31.1).

5. Manufacturing method according to claim 4, comprising, after the step of producing the doped lower portion (31), a step of producing conductive lateral portions (42), made of an electrically conductive material, located on and in contact with an upper face of the lateral parts (31.1) of the doped lower portion (31), by siliciding the silicon-based material of the doped lower portion (31).

6. Manufacturing method according to claim 5, comprising a step of producing a central conductive portion (43), made of an electrically conductive material, located on and in contact with an upper face of the doped upper portion (33), the latter being made from silicon, by siliciding the silicon-based material of the doped upper portion (33) simultaneously with the siliciding of the silicon-based material of the doped lower portion (31).

7. Manufacturing method according to claim 4 or 5, comprising a step of depositing an insulating encapsulation layer (44) covering the semiconductor pad (30), then a step of producing contact metallization comprising lateral conductive vias (45) passing through the insulating encapsulation layer (44) to come into contact with the lateral conductive portions (42).

8. A manufacturing method according to any one of the preceding claims, comprising a step of covering the support layer (11) with a lower dielectric layer (12) which has a thickness of at least 2 μm to prevent optical leakage towards the support layer (11).

9. Optoelectronic device (1), comprising: • a photodiode (2) of the germanium on silicon type, comprising a semiconductor pad (30) formed of a doped lower portion (31) made from silicon, a doped upper portion (33), and an intermediate absorption portion (32) made from germanium and located between the doped lower and upper portions (31, 33) along a thickness axis of the photodiode (2); • a waveguide (3) made of Si3N4, integrated in a photonic substrate on which the photodiode rests and optically coupled to the photodiode (2); • characterized in that the waveguide (3) is located below the photodiode (2) along a thickness axis of the photodiode (2), and is integrated in a photonic substrate (10) on which the photodiode (2) rests;the device comprising: • an upper dielectric layer (13) which covers the integrated waveguide (3) as well as a lower dielectric layer (12) on which the waveguide (3) rests, so that the waveguide (3) is optically coupled to the photodiode (2) in an evanescent manner via the intermediate dielectric layer (13), the intermediate dielectric layer (13) being in direct contact with the doped lower portion (31).;

10. Optoelectronic device (1) according to claim 9, wherein the photonic substrate (10) comprises a support layer (11) and the lower dielectric layer (12) on which the waveguide (3) rests, the waveguide (3) being spaced from the support layer (11) by at least 2pm.

11. Optoelectronic device (1) according to claim 9 or 10, in which the doped lower portion (31) has a transverse dimension greater than that of the intermediate absorption portion (32), spacers (41) made from an electrically insulating material, arranged against the sides of the intermediate absorption portion (32), and extending over a part of the upper face of the doped lower portion (31).

12. Optoelectronic device (1) according to claim 11, comprising conductive lateral portions (42), made of a silicide, located on and in contact with an upper face of lateral parts (31.1) of the doped lower portion (31) not covered by the spacers (41).

13. Optoelectronic device (1) according to any one of claims 9 to 12, in which the doped upper portion (33) is made from silicon, and comprising a central conductive portion (43), made from a silicide, located on and in contact with an upper face of the doped upper portion (33).

14. Optoelectronic device (1) according to claims 12 and 13, comprising an insulating encapsulation layer (44) covering the semiconductor pad (30) and the lateral and central conductive portions (42, 43), and contact metallizations comprising lateral conductive vias (45) passing through the insulating encapsulation layer (44) to come into contact with the lateral conductive portions (42), and at least one central conductive via (46) passing through the insulating encapsulation layer (44) to come into contact with the central conductive portion (43).

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