BONDED SILICON WAFER AND PROCESS FOR PRODUCTION THEREOF

Abstract

The purpose of this disclosure is to provide a bonded silicon wafer having a thin thickness and high infrared reflectance, and a method for producing the same. This disclosure provides a bonded silicon wafer comprising, a silicon wafer serving as a supporting substrate; a single-crystal silicon layer on the silicon wafer serving as a supporting substrate; and an infrared-reflecting silicon film provided between the silicon wafer serving as a supporting substrate and the single-crystal silicon layer; the infrared-reflecting silicon film comprises amorphous silicon, and a thickness of the infrared-reflecting silicon film is 16 nm or more. Abstract Figure: Figure 1

Description

Title of the invention: BONDED SILICON WAFER AND PROCESS FOR PRODUCTION THEREOF

[0001] The present invention relates to a bonded silicon wafer and a method of producing the same. Prior art

[0002] MEMS devices and semiconductor devices produced using the normal temperature bonding apparatus are known as bonded silicon wafers (see, for example, PTL 1). In recent years, high-sensitivity infrared light receiving sensors have been required in fields such as surveillance cameras and automobile anti-collision sensors, and efforts are required to utilize silicon wafers which are conventionally used as sensors in the visible light range.

[0003] Patent Documents: PTL 1:2014 / 72249 A Technical problem

[0004] Both monocrystalline silicon and silicon oxide are relatively transparent with low reflectance to infrared lights. Therefore, when silicon oxide or monocrystalline silicon is used as the infrared reflecting layer of the infrared light receiving sensor, the infrared reflecting layer requires a thickness of about 100 μm. If the thickness of the infrared reflecting layer can be made thinner, the infrared light receiving sensor can be made smaller. Therefore, an object of this disclosure is to provide a bonded silicon wafer of thin thickness and high infrared reflectance, and a method for producing the same.

[0005] The inventors of this disclosure studied in order to solve the above problem and examined the use of amorphous silicon instead of silicon oxide, which has been commonly used as an infrared-reflecting silicon film in silicon wafer-based devices. Since amorphous silicon has a higher infrared reflectance than silicon oxide and is formed using normal temperature bonding technology, they expected that it would have an advantage on the production process. However, the amorphous silicon film formed by the commonly used normal temperature bonding technology could not reflect infrared radiation sufficiently due to its small thickness.The inventor of this disclosure further studied the use of amorphous silicon and found that controlling the thickness of the amorphous silicon layer or combining it with a polycrystalline silicon layer significantly improves . the above infrared reflectance. This disclosure has been completed based on the above findings, and the spirit and configuration thereof are as follows. Disclosure of the Invention

[0006] <1> Bonded silicon wafer comprising: a silicon wafer serving as a substrate supporting; a monocrystalline silicon layer on the silicon wafer serving as a supporting substrate; and an infrared-reflecting silicon film provided between the silicon wafer serving as a supporting substrate and the monocrystalline silicon layer; the infrared-reflecting silicon film comprises amorphous silicon, and a thickness of the infrared-reflecting silicon film is 16 nm or more.

[0007] <2> Silicon wafer bonded according to <1> , in which the reflective silicon film infrared is made of amorphous silicon.

[0008] <3> Silicon wafer bonded according to <1> , in which the reflective silicon film infrared is formed by a layered structure made of amorphous silicon layer(s) and polycrystalline silicon layer(s).

[0009] <4> Silicon wafer bonded according to any one of <1> has <3> , in which the thickness of the infrared-reflecting silicon film is 25 nm or more.

[0010] <5> Silicon wafer bonded according to any one of <1> has <3> , in which the thickness of the monocrystalline silicon layer is 3 qm or more and 30 qm or less.

[0011] <6> A method of producing the bonded silicon wafer according to any one of of <2> , <4> , Or <5> comprising the steps of:an amorphous silicon film layer(s) forming process forming an amorphous silicon film layer having a thickness of 15 nm or more on one surface of the silicon wafer for a supporting substrate; an activation treatment process subjecting one surface of the amorphous silicon film layer and one surface of a silicon wafer for a single-crystal silicon layer to an activation treatment in a vacuum at normal temperature to make both surfaces of the activated areas; a bonding process, following the activation treatment process, bringing the two activated areas into contact with each other in a vacuum at normal temperature, thereby bonding the two activated areas together to form the infrared-reflecting silicon film;and a thickness reduction process, after the bonding process, reducing the thickness of the silicon wafer for monocrystalline silicon layer, thereby obtaining the monocrystalline silicon layer. ;

[0012] <7> A method of producing the bonded silicon wafer according to any one of of <2> , <4> , Or <5> comprising the steps of:a process of forming a layer(s) formed from an amorphous silicon film forming a formed layer of an amorphous silicon film having a thickness of 15 nm or more on one surface of a silicon wafer for a single-crystal silicon layer; an activation treatment process subjecting a surface of the layer formed from an amorphous silicon film and a surface of the silicon wafer for a supporting substrate to an activation treatment in a vacuum at normal temperature to make both surfaces of the activated areas; a bonding process, following the activation treatment process, bringing the two activated areas into contact with each other in a vacuum at normal temperature, thereby bonding the two activated areas together to form the infrared-reflecting silicon film; and a thickness reduction process, after the bonding process, reducing the thickness of the silicon wafer for a single-crystal silicon layer, thereby obtaining the single-crystal silicon layer.

[0013] <8> A method of producing the bonded silicon wafer according to any one of of <2> , <4> , Or <5> comprising the steps of:an amorphous silicon film layer formation process forming amorphous silicon film layers having a total thickness of 16 nm or more on each surface of the silicon wafer for a supporting substrate and a silicon wafer for a single crystal silicon layer; an activation treatment process subjecting each surface of the amorphous silicon film layers formed on each surface of the silicon wafer for a supporting substrate and the silicon wafer for a single crystal silicon layer to an activation treatment in a vacuum at normal temperature to make both surfaces of the activated areas;a bonding process, following the activation treatment process, bringing the two activated areas into contact with each other under vacuum at normal temperature, thereby bonding the two activated areas together to form the infrared-reflecting silicon film; and a thickness reduction process, after the bonding process, reducing the thickness of the silicon wafer for monocrystalline silicon layer, thereby obtaining the monocrystalline silicon layer. ;

[0014] <9> A method of producing the bonded silicon wafer according to any one of <3> has <5> comprising the steps of:a process for forming a polycrystalline silicon film layer(s) forming a polycrystalline silicon film layer having a thickness of 15 nm or more on one surface of the silicon wafer for a supporting substrate; an activation treatment process subjecting a surface of the polycrystalline silicon film layer and a surface of a silicon wafer for a single-crystal silicon layer to an activation treatment in a vacuum at normal temperature to make both surfaces of the activated areas; a bonding process, following the activation treatment process, bringing the two activated areas into contact with each other in a vacuum at normal temperature, thereby bonding the two activated areas together to form the silicon film reflecting infrared; and a thickness reduction process, after the bonding process, reducing the thickness of the silicon wafer to monocrystalline silicon layer, thereby obtaining the monocrystalline silicon layer.

[0015] <10> A method of producing the bonded silicon wafer according to any one of <3> has <5> comprising the steps of:a polycrystalline silicon film layer forming process forming a polycrystalline silicon film layer having a thickness of 15 nm or more on one surface of a silicon wafer for a single-crystal silicon layer; an activation treatment process subjecting one surface of the polycrystalline silicon film layer and one surface of the silicon wafer for a supporting substrate to an activation treatment in a vacuum at normal temperature to make both surfaces of the activated areas; a bonding process, following the activation treatment process, bringing the two activated areas into contact with each other in a vacuum at normal temperature, thereby bonding the two activated areas together to form the infrared-reflecting silicon film;and a thickness reduction process, after the bonding process, reducing the thickness of the silicon wafer for monocrystalline silicon layer, thereby obtaining the monocrystalline silicon layer. ;

[0016] <11> A method of producing the bonded silicon wafer according to any one of <3> has <5> comprising the steps of:a polycrystalline silicon film layer formation process forming polycrystalline silicon film layers having a thickness of 16 nm or more on each surface of the silicon wafer for a supporting substrate and a silicon wafer for a single crystal silicon layer; an activation treatment process subjecting each surface of the polycrystalline silicon film layers formed on each surface of the silicon wafer for a supporting substrate and the silicon wafer for a single crystal silicon layer to an activation treatment in a vacuum at normal temperature to make both surfaces of the activated areas;a bonding process, following the activation treatment process, bringing the two activated areas into contact with each other under vacuum at normal temperature, thereby bonding the two activated areas together to form the infrared-reflecting silicon film; and a thickness reduction process, after the bonding process, reducing the thickness of the silicon wafer for monocrystalline silicon layer, thereby obtaining the monocrystalline silicon layer. ;

[0017] Hereinafter, the method of forming the activated areas on each of the silicon wafers for the support substrate and the silicon wafer for the monocrystalline silicon layer, and then bonding the activated areas of the two wafers together in a vacuum at normal temperature is called "bonding in a vacuum at normal temperature".

[0018] This disclosure provides a bonded silicon wafer of thin thickness and high infrared reflectance and a method of producing the same. Brief description of the drawings

[0019] Other characteristics, details and advantages will appear on reading the detailed description below, and on analyzing the attached drawings, in which: Fig.l

[0020] [Fig.l] is a schematic cross-sectional view illustrating a bonded silicon wafer, in accordance with this disclosure; Fig. 2A

[0021] [Fig.2A] is a schematic cross-sectional view illustrating a bonded silicon wafer, in accordance with this disclosure, wherein the infrared-reflecting silicon film is made of amorphous silicon;. Fig. 2B

[0022] [Fig.2B] is a schematic cross-sectional view illustrating the first aspect of a bonded silicon wafer according to this disclosure, wherein the infrared-reflecting silicon film is formed by a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer; Fig. 2C

[0023] [Fig.2C] is a schematic cross-sectional view illustrating the second aspect of a bonded silicon wafer according to this disclosure, wherein the infrared-reflecting silicon film is formed by a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer; Fig. 2D

[0024] [Fig.2D] is a schematic cross-sectional view illustrating the third aspect of a bonded silicon wafer according to this disclosure, wherein the infrared-reflecting silicon film is formed by a laminated structure of an amorphous silicon layer and polycrystalline silicon layers; Fig. 3

[0025] [Fig. 3 is a schematic cross-sectional view illustrating the first embodiment of the method for producing a bonded silicon wafer according to this disclosure; Fig. 4

[0026] [Fig.4] is a schematic cross-sectional view illustrating the second mode of carrying out the method of producing a bonded silicon wafer according to this disclosure; Fig. 5

[0027] [Fig.5] is a schematic cross-sectional view illustrating the third mode of carrying out the method of producing a bonded silicon wafer according to this disclosure; Fig. 6

[0028] [Fig.6] is a schematic cross-sectional view illustrating the fourth mode of carrying out the method of producing a bonded silicon wafer according to this disclosure; Fig. 7

[0029] [Fig.7] is a conceptual diagram illustrating an example of an apparatus used for the vacuum bonding at normal temperature in one embodiment of the method for producing a bonded silicon wafer according to this disclosure; and Fig. 8

[0030] [Fig.8] is a cross-sectional view of a bonded silicon wafer to illustrate a method of measuring the reflectance of infrared lights on a bonded silicon wafer according to one embodiment of this disclosure.

[0031] Description of the embodiments

[0032] (1. Overview)

[0033] Before describing the embodiments according to this disclosure, the correspondence between each drawing will be explained. [Fig. 1] is a schematic cross-sectional view of a bonded silicon wafer 1 according to this disclosure. Here, an infrared-reflecting silicon film 30 may be made of amorphous silicon or be formed by a laminated structure of amorphous silicon layer(s) and polycrystalline silicon layer(s). [Fig. 2A] illustrates a bonded silicon wafer 2 in which the infrared-reflecting silicon film 30 is made of amorphous silicon.Figures 2B to 2D illustrate three different aspects of the infrared reflective silicon films 30 in bonded silicon wafers 3 to 5 in which the infrared reflective silicon films 30 are particularly formed by a laminated structure of amorphous silicon layer(s) and polycrystalline silicon layer(s), and are hereinafter referred to as first, second and third aspects, respectively.

[0034] [Fig. 3] is a schematic cross-sectional view illustrating one embodiment of the method for producing the bonded silicon wafer 2 when the infrared-reflecting silicon film is made of amorphous silicon (hereinafter referred to as the first embodiment). In the first embodiment illustrated in [Fig. 3], an amorphous silicon film layer 131 is formed on a supporting substrate silicon wafer 110, however, the amorphous silicon film layer 131 is formed on the supporting substrate silicon wafer 110. amorphous silicon can be formed on a silicon wafer for monocrystalline silicon layer 120 instead.

[0035] [Fig.4] is a schematic cross-sectional view illustrating one embodiment of the production method of the bonded silicon wafer 2 when the infrared-reflecting silicon film is made of amorphous silicon and provides the layer formed of an amorphous silicon film 231 on both the supporting substrate silicon wafer 210 and the single-crystal silicon layer silicon wafer 220 (hereinafter referred to as the second embodiment).

[0036] [Fig. 5] is a schematic sectional view illustrating an embodiment of the method for producing the bonded silicon wafer 3 when the infrared-reflecting silicon film is formed by a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer and having the infrared-reflecting silicon film according to the first aspect (hereinafter referred to as the third embodiment). In the third embodiment illustrated in [Fig. 5], the polycrystalline silicon film formed layer 335 is formed on the supporting substrate silicon wafer 310, however, the polycrystalline silicon film formed layer may be formed on the single-crystal silicon layer silicon wafer 320 instead, and in this case, the bonded silicon wafer 4 having the infrared-reflecting silicon film according to the second aspect may be produced.

[0037] [Fig.6] is a schematic sectional view illustrating an embodiment of the production method of the bonded silicon wafer 5 when the infrared-reflecting silicon film 430 is formed by a laminated structure of an amorphous silicon layer and polycrystalline silicon layers and having the infrared-reflecting silicon film 430 according to the third aspect (hereinafter referred to as the fourth embodiment).

[0038] One or more embodiments of this disclosure are described in detail below with reference to the drawings. First, an overview of the bonded silicon wafers 1 to 5 according to this disclosure is given with reference to [Fig. 1] and FIGS. 2A to 2D. Here, the infrared-reflecting silicon film 30 in the bonded silicon wafer 1 described in [Fig. 1] may be made of amorphous silicon or be formed by a laminated structure of amorphous silicon layer(s) and polycrystalline silicon layer(s). Next, the method for producing a bonded silicon wafer according to the first to fourth embodiments to obtain the bonded silicon wafers 2 to 5 will be described, and the details of each configuration will also be explained. The specific aspects applicable to this disclosure are then described. In each drawing, the thickness of each component is exaggerated. for explanation purposes. Therefore, the thickness of each component differs from the actual thickness ratio.

[0039] (2. Bonded silicon wafer)

[0040] Referring to [Fig. 1], the bonded silicon wafer 1 according to this disclosure comprises a support substrate silicon wafer 10, a monocrystalline silicon layer 21 made of monocrystalline silicon on the support substrate silicon wafer 10, and an infrared-reflecting silicon film 30 provided between the support substrate silicon wafer 10 and the monocrystalline silicon layer 21. The infrared-reflecting silicon film 30 comprises amorphous silicon. In the bonded silicon wafer 2 of [Fig. 2A], the infrared-reflecting silicon film 30 is made of amorphous silicon, and in the bonded silicon wafers 3 to 5 of FIGS. 2B to [Fig. 2D], the infrared-reflecting silicon film 30 is formed by a laminated structure of amorphous silicon layer(s) and polycrystalline silicon layer(s).Here, the monocrystalline silicon as the material of the supporting substrate silicon wafer 10 and the monocrystalline silicon layer 21 is transparent to infrared lights, while the amorphous silicon and polycrystalline silicon as the material of the infrared reflective silicon film 30 are opaque to infrared lights. By making the thickness of the infrared reflective silicon film 30 which is made of amorphous silicon alone or amorphous and polycrystalline silicon 16 nm or more, the bonded silicon wafers of thin thickness and high infrared reflectance can be obtained. The infrared reflective silicon film 30 may be made of amorphous silicon or may be formed by a laminated structure of amorphous silicon layer(s) and polycrystalline silicon layer(s), however if the thickness thereof is less than 16 nm, it will not reflect infrared lights sufficiently.The thickness of the infrared-reflecting silicon film 30 is preferably 20 nm or more, more preferably 25 nm or more, and even more preferably 30 nm or more. Although the infrared-reflecting silicon film 30 approaches 100% reflectance the thicker it is, it generally saturates at 25 nm. For this reason, although there is no particular limit to the upper limit, it is possible to set the upper limit at 40 nm for the purpose of making the bonded silicon wafer 1 smaller. The thickness of the single-crystal silicon layer 21, into which infrared lights penetrate, is preferably 3 μm or more and 30 μm or less, although there is no particular limit. Depending on the application of the bonded silicon wafer 1, the thickness of the monocrystalline silicon layer 21 may be 5 qm or more, 10 qm or more, 20 qm or less, or 15 qm or less.

[0041] [Fig.2A] schematically illustrates the bonded silicon wafer when the infrared reflective silicon film 30 is made of amorphous silicon.

[0042] Figures 2B to 2D each schematically illustrate the first to third aspects in which the infrared-reflecting silicon films 30 are formed by a laminated structure of amorphous silicon layer(s) and polycrystalline silicon layer(s).

[0043] In the first aspect of the infrared-reflecting silicon film 30 illustrated in [Fig.2B], the polycrystalline silicon layer 35 is provided on one surface side of the supporting substrate silicon wafer 10, and the amorphous silicon layer 32 is provided on the surface side of the monocrystalline silicon layer 21.

[0044] In the second aspect of the infrared-reflecting silicon film 30 illustrated in [Fig.2C], the polycrystalline silicon layer 35 is provided on one surface side of the monocrystalline silicon layer 21, and the amorphous silicon layer 32 is provided on the surface side of the supporting substrate silicon wafer 10.

[0045] In the third aspect of the infrared-reflecting silicon film 30 illustrated in [Fig.2D], the infrared-reflecting silicon film 30 has a polycrystalline silicon layer 35a and a polycrystalline silicon layer 35b provided on the surface side of both the supporting substrate silicon wafer 10 and the monocrystalline silicon layer 21, respectively. The amorphous silicon layer 32 is provided between the polycrystalline silicon layer 35a and the polycrystalline silicon layer 35b.

[0046] In the first to third aspects where the infrared reflecting silicon film 30 is formed by a laminated structure of amorphous silicon layer(s) and polycrystalline silicon layer(s), the following cases are determined due to the embodiments of the production method: the case where the polycrystalline silicon layer and the amorphous silicon layer are laminated in this order from the side of the supporting substrate silicon wafer 10 in the infrared reflecting silicon film 30; the case where the amorphous silicon layer and the polycrystalline silicon layer are laminated in this order from the side of the supporting substrate silicon wafer 10 in the infrared reflecting silicon film 30;and the case where the polycrystalline silicon layer, the amorphous silicon layer, and the polycrystalline silicon layer are laminated in this order from the side of the support substrate silicon wafer 10 into the infrared-reflecting silicon film 30. In addition, in the first to third illustrated aspects, although not shown, the laminated structure may further comprise a laminated structure formed by one or each of the amorphous silicon layer(s) and the additional polycrystalline silicon layer(s). In either case, for the bonded silicon wafers 2 to 5 according to this disclosure, the laminated structure of the amorphous silicon layer(s) and the polycrystalline silicon layer(s) will also function as a reflective silicon film; infrared. The following is a sequential description of embodiments for producing the bonded silicon wafers 2 to 5.

[0047] (3. First embodiment of a method for producing a wafer of silicon bonded)

[0048] Referring to [Fig. 3], the method for producing a bonded silicon wafer 100 according to the first embodiment is described. This embodiment is a method for producing the bonded silicon wafer 2 in [Fig. 2A], and is an embodiment of the bonded silicon wafer 1 in [Fig. 1] where the infrared-reflecting silicon film 30 is made of amorphous silicon.

[0049] The method for manufacturing the bonded silicon wafer 100 comprises the following steps: an amorphous silicon film layer(s) forming process (see S110 and S120 in [Fig. 3]) forming the amorphous silicon film layer 131 with a thickness of 15 nm or more on the surface of the supporting substrate silicon wafer 110; an activation treatment process (see S130 and S140 in [Fig. 3]) subjecting the surface of the amorphous silicon film layer 131 and the surface of the single-crystal silicon wafer 120 to an activation treatment in a vacuum at normal temperature to make both surfaces of the activated areas 132a, 132b; a bonding process (see S150 in [Fig.3]), following this activation treatment process, bringing the two activated areas 132a, 132b into contact with each other under vacuum at normal temperature, thereby bonding the two activated areas 132a, 132b together to form the infrared-reflecting silicon film 130; and a thickness reduction process (see S160 in [Fig.3]), after the bonding process, reducing the thickness of the monocrystalline silicon layer wafer 120, thereby obtaining the monocrystalline silicon layer 121. The details of each process are described sequentially below.

[0050] <Processus de formation d'une / de couche(s) formée(s) d'un film de silicium amorphe>

[0051] In the process of forming amorphous silicon film layer(s) (see S110 and S120 in [Fig. 3]), the amorphous silicon film layer 131 made of amorphous silicon is formed on the surface of the supporting substrate silicon wafer 110. The amorphous silicon film layer 131 can be formed by generally known methods. The thickness of the amorphous silicon film layer 131 formed here is 15 nm or more so that the amorphous silicon area will function as an infrared-reflecting silicon film when formed into a bonded silicon wafer. During the activation treatment, the activated areas made of amorphous silicon are formed from surfaces of each silicon wafer to a depth position of about 1 nm, therefore, when the silicon wafers are bonded together, an infrared-reflecting silicon film 130 with a thickness of 16 nm or more is formed. The thickness of the amorphous silicon film-formed layer 131 formed in this process is preferably 19 nm or more, more preferably 24 nm or more, and even more preferably 29 nm or more. The upper limit of the thickness of the amorphous silicon film-formed layer 131 is not particularly limited, but the upper limit is about 40 nm for industrial productivity.

[0052] “Formation of a layer formed from an amorphous silicon film by CVD process”

[0053] The amorphous silicon film layer 131, which is made of amorphous silicon, can be formed on the surface of the support substrate silicon wafer 110 using a CVD method such as plasma CVD. If the layer is formed while the temperature of the support substrate silicon wafer 110 is between 500°C and 600°C, the amorphous silicon film layer made of amorphous silicon can be grown.

[0054] <Processus de traitement d'activation>

[0055] Next, in the activation treatment process (see S130 and S140 in [Fig. 3]), the activation treatment is performed for the bonding in a vacuum at normal temperature. That is, the surface of the amorphous silicon film layer 131 of the silicon wafer for a support substrate 110 and the surface of the silicon wafer for a single crystal silicon layer 120 are subjected to an activation treatment by irradiation of ion beams or neutral atom beams 910 in a vacuum at normal temperature to form activated areas 132a, 132b on each surface of the silicon wafer for a support substrate 110 and the silicon wafer for a single crystal silicon layer 120.As described below, on the surface of each silicon wafer, an activated zone made of amorphous silicon is formed at a depth position of about 1 nm from the surface on the side irradiated by the beam, although the depth depends on the injected energy.

[0056] Linking process

[0057] In the bonding process (see S150 in [Fig. 3]), following the above activation treatment process, by bringing the activated areas 132a, 132b of both the supporting substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120 into contact with each other in a vacuum at normal temperature, the two silicon wafers are bonded together via the amorphous silicon film layer 131. At this time, amorphous silicon is formed not only in the activated area 132a on the surface of the amorphous silicon film layer 131 on the supporting substrate silicon wafer 110, but also in the activated area 132b on the surface of the silicon wafer for monocrystalline silicon layer 120, where the amorphous silicon film formed layer 131 has not been formed, at a depth position of about 1 nm. Therefore, at the time of bonding, the activated area 132b and the amorphous silicon film formed layer 131 together form the infrared-reflecting silicon film 130 made of amorphous silicon with a thickness of 16 nm or more.

[0058] “Vacuum bonding at normal temperature”

[0059] With reference to [Fig.3] and [Fig.7], the bonding method using the bond under vacuum at normal temperature to carry out the activation treatment process and the above bonding process is described. The vacuum bonding at normal temperature is a method of bonding the silicon wafer for a supporting substrate 110 and the silicon wafer for a single crystal silicon layer 120 to each other at normal temperature without heating. In this embodiment, the surface of the layer formed from an amorphous silicon film 131 of the silicon wafer for a supporting substrate 110 and the surface of the silicon wafer for a single crystal silicon layer 120 are each subjected to an activation treatment by irradiation of ion beams or neutral atom beams in a vacuum at normal temperature, and the above two surfaces are transformed into activated areas 132a, 132b, respectively (see also S130 and S140 in [Fig. 3]). As a result, dangling bonds appear in the activated areas 132a, 132b.Therefore, when the above two activated areas are brought into contact in a vacuum at normal temperature, a bonding force is instantly activated and the supporting substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120 are firmly bonded with the above activated areas 132a, 132b as bonding surfaces (see also S150 in [Fig.3]).

[0060] The activation processing methods include accelerating ionized elements in a plasma atmosphere toward the substrate surface and accelerating accelerated ionized elements from an ion beam device toward the substrate surface. With reference to [Fig. 7], the activation processing method is explained using a conceptual diagram illustrating an exemplary device that implements this method. The normal temperature vacuum bonding apparatus 930 has a plasma chamber 931, a gas inlet 932, a vacuum pump 933, a pulse voltage application device 934, and wafer holders 935a, 935b.

[0061] First, the supporting substrate silicon wafer 110 and the monocrystalline silicon layer silicon wafer 120 are placed on the wafer holder(s) 935a, 935b in the plasma chamber 931, respectively, and fixed. Then, the interior of the plasma chamber 931 is depressurized by the vacuum pump 933, and then the source gas is introduced into the plasma chamber 931 from the gas inlet 932. Then, a negative voltage is pulsedly applied to the wafer holders 935a, 935b (as well as the supporting substrate silicon wafer 110 and the single-crystal silicon layer silicon wafer 120) by the pulse voltage application device 934. This generates a plasma of the raw material gas, and accelerates and irradiates the ions of the raw material gas contained in the generated plasma toward the surface of the amorphous silicon film layer 131 formed on the supporting substrate silicon wafer 110 and the surface of the single-crystal silicon layer silicon wafer 120.

[0062] The element to be irradiated is chosen from at least one of Ar, Ne, Xe, H, He and Si.

[0063] Referring to S140 in [Fig. 3]. As mentioned above, the activation treatment in the normal temperature vacuum bonding forms an amorphous silicon region in each of the amorphous silicon film formed layer 131 and the silicon wafer for single crystal silicon layer 120 at a depth position of about 1 nm from the surface, on the side where the beam is irradiated, and dangling bonds are formed. In this embodiment, since the amorphous silicon film formed layer 131 is made of amorphous silicon, the activated region 132a is formed on the silicon wafer for support substrate 110 without changing the thickness of the amorphous silicon region, and the activated region 132b made of amorphous silicon is formed on the silicon wafer for single crystal silicon layer 120.It should be noted that these areas made of amorphous silicon formed on the two silicon wafers also function as gas gettering layers. For example, the activated area 132a, which is made of amorphous silicon, is useful in that it can suppress the outward diffusion of oxygen and impurities contained in the support substrate silicon wafer 110 to the single crystal silicon layer silicon wafer 120.

[0064] - Specificities of vacuum bonding at normal temperature -

[0065] The chamber pressure in the plasma chamber 931 may be 1 xl0-5 Pa or less. If the value is 1 x 10-5 Pa or less, there is no risk that the rate of formation of dangling bonds will be reduced due to reattachment of the sputtered elements to the surface of the substrate.

[0066] The pulse voltage applied to the support substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120 can be set such that the acceleration energy of the irradiated elements relative to the substrate surface falls between 100 eV and 10 keV. If the value is 100 eV or more, there is no risk of the irradiated elements being deposited on the substrate surface, and if the value is 10 keV or less, there is no risk of the irradiated elements being injected into the substrate, thereby enabling stable formation of dangling bonds.

[0067] The frequency of the pulse voltage determines the number of times the support substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120 are irradiated with ions or neutral atoms. The frequency of the pulse voltage may be between 10 Hz and 10 kHz. If the frequency of the pulse voltage is 10 Hz or higher, variations in irradiation of the ions or neutral atoms can be absorbed, thereby stabilizing the irradiation of the ions or neutral atoms. If the frequency of the pulse voltage is 10 kHz or lower, the formation of plasma by glow discharge is stable.

[0068] The pulse width of the pulse voltage determines the time for which the support substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120 are irradiated with ions or neutral atoms. The pulse width is preferably between 1 psec and 10 msec. If the pulse width is 1 psec or more, the ions or neutral atoms can be stably irradiated to the support substrate and the single crystal silicon layer substrate. If the pulse width is 10 ms or less, the glow discharge plasma formation is stable.

[0069] As mentioned above, the support substrate silicon wafer 110 and the monocrystalline silicon layer silicon wafer 120 are not heated. Therefore, the temperature of each wafer is room temperature (typically 30°C to 90°C).

[0070] <Processus de réduction d'épaisseur d'une galette de silicium pour couche de silicium monocristallin>

[0071] After the activation treatment process and the bonding process by the normal temperature vacuum bonding described above, the thickness reduction process of the silicon wafers for monocrystalline silicon layer 120 is carried out (see S160 in [Fig. 3]). In this process, the thickness of the silicon wafer for monocrystalline silicon layer 120 is reduced from the opposite side of the laminated surface, thereby obtaining the monocrystalline silicon layer 121 made of monocrystalline silicon. To reduce the thickness, for example, the silicon wafer for monocrystalline silicon layer 120 can be ground and polished. In this way, a silicon wafer bonded with a monocrystalline silicon layer 121 of the desired thickness can be obtained.The thickness of the monocrystalline silicon layer 121 may be determined according to the device to be formed therein, and is preferably 3 qm or more and 30 qm or less, or may be 5 qm or more, 10 qm or more, 20 qm or less, or 15 qm or less. It should be noted that for this grinding and polishing, any known or given grinding and polishing method may be suitably used, and specific examples include surface grinding and mirror polishing.

[0072] The thus obtained bonded silicon wafer 100 comprises the carrier substrate silicon wafer 110, the monocrystalline silicon layer 121 on the carrier substrate silicon wafer 110, and the infrared-reflecting silicon film 130, made of amorphous silicon, provided between the carrier substrate silicon wafer 110 and the monocrystalline silicon layer 121. The amorphous silicon of the infrared-reflecting silicon film 130 consists essentially of the amorphous silicon film layer 131 on the surface side of the carrier substrate silicon wafer 110 and the activated area 132b formed on the surface of the monocrystalline silicon layer 120, and the amorphous silicon film layer 131 comprises the activated area 132a formed on the surface of the amorphous silicon film layer 131.

[0073] The first embodiment of the method for producing the bonded silicon wafer is described above with reference to [Fig. 3]. In the first embodiment, the amorphous silicon film layer 131 was formed on the supporting substrate silicon wafer 110. However, as an alternative to the first embodiment, the bonded silicon wafer 100 illustrated in [Fig. 1] can also be produced by the same process as in the first embodiment above,except that the amorphous silicon film formed layer 131 is formed on the silicon wafer for monocrystalline silicon layer 120. That is, the bonded silicon wafer 100 can be produced by the following steps: a process of forming an amorphous silicon film formed layer(s) forming the amorphous silicon film formed layer 131 made of amorphous silicon on the surface of the silicon wafer for monocrystalline silicon layer 120; an activation treatment process subjecting the surface of the silicon wafer for support substrate 110 and the surface of the layer formed by an amorphous silicon film 131 on the silicon wafer for monocrystalline silicon layer 120 to an activation treatment to irradiate the ion beams or the neutral atom beams 910 in a vacuum at normal temperature, thereby forming the activated areas 132a,132b on each of the silicon wafer for support substrate 110 and the silicon wafer for monocrystalline silicon layer 120; a bonding process, following this activation treatment process, bringing the two activated areas 132a, 132b into contact in a vacuum at normal temperature, thereby bonding the silicon wafer for support substrate 110 and the silicon wafer for monocrystalline silicon layer 120 via the layer formed from an amorphous silicon film 131; and a thickness reduction process reducing the thickness of the silicon wafer for monocrystalline silicon layer 120 from the opposite side of the laminated surface, to make the monocrystalline silicon layer 121. Since the same techniques as those described above in the first embodiment can be used for the formation of the layer, formed from amorphous silicon film 131, vacuum bonding at normal temperature, and grinding and polishing for thickness reduction, redundant descriptions are omitted.

[0074] (4. Second embodiment of a method for producing a silicon wafer linked)

[0075] Referring to [Fig. 4], the method for producing the bonded silicon wafer 200 according to the second embodiment is described. The bonded silicon wafer 200 produced in this embodiment is, like the bonded silicon wafer 100 produced in the first embodiment, a bonded silicon wafer in which the infrared-reflecting silicon film 30 shown in [Fig. 1] is made of amorphous silicon. For brevity, the same components and steps as in the first embodiment are, in principle, marked with the same reference numerals in units and tens, and the detailed description as to the configuration is omitted, and the same applies hereinafter.

[0076] The method for manufacturing the bonded silicon wafer 200 comprises the following steps: an amorphous silicon film layer formation process (see S210 and S220 in [Fig.4]) forming amorphous silicon film layers 231a, 231b having a thickness of 16 nm or more on each surface of the support substrate silicon wafer 210 and the single crystal silicon layer silicon wafer 220; an activation treatment process (see S230 and S240 in [Fig. 4]) subjecting each surface of the amorphous silicon film layers 231a, 231b formed on each surface of the support substrate silicon wafer 210 and the single crystal silicon layer silicon wafer 220 to an activation treatment in a vacuum at normal temperature to make both surfaces of the activated areas 232a, 232b; a bonding process (see S250 in [Fig.4]), following the activation treatment process, bringing the two activated areas 232a, 232b into contact with each other under vacuum at normal temperature, thereby bonding the two activated areas 232a, 232b together to form the infrared-reflecting silicon film 230; and a thickness reduction process (see S260 in [Fig.4]), after the bonding process, reducing the thickness of the silicon wafer for monocrystalline silicon layer 220, thereby obtaining the monocrystalline silicon layer 221. .

[0077] <Processus de formation d'une / de couche(s) formée(s) d'un film de silicium amorphe>

[0078] While in the first embodiment, the amorphous silicon film layer 131 was formed only on the supporting substrate silicon wafer 110, the second embodiment differs in that the amorphous silicon film layers 231a, 231b are formed on each of the wafer silicon film for support substrate 210 and the silicon wafer for monocrystalline silicon layer 220. The method for forming the amorphous silicon film formed layers 231a, 231b made of amorphous silicon is the same as in the first embodiment, and a CVD method or the like may be applied. The total thickness of the amorphous silicon film formed layers 231a, 231b formed here is 16 nm or more to ensure that the infrared-reflecting silicon film 230 effectively reflects infrared light when formed into the bonded silicon wafer 200. The thickness of each of the amorphous silicon film formed layers 231a, 231b may be the same or different.In the production method of the second embodiment, since both surfaces to be activated are made of amorphous silicon, the thickness of the infrared-reflecting silicon film 230 obtained after bonding and the total thickness of the amorphous silicon film layers 231a, 231b formed before bonding are the same. The total thickness of the amorphous silicon film layers 231a, 231b is preferably 20 nm or more, more preferably 25 nm or more, and even more preferably 30 nm or more. The upper limit to the total thickness of the amorphous silicon film layer 231 is not particularly limited, but the upper limit is about 40 nm for industrial productivity.

[0079] <Processus de traitement d'activation et processus de liaison>

[0080] In the second embodiment, the activation treatment activates the surfaces of the amorphous silicon film-formed layers 231a, 231b to form the activated areas 232a, 232b on the surfaces of the two silicon wafers. Then, in the bonding process, the activated areas 232a, 232b are bonded together in a vacuum at normal temperature as in the first embodiment.

[0081] <Processus de réduction d'épaisseur>

[0082] The thickness reduction process can also be carried out in the same manner as in the first embodiment.

[0083] The bonded silicon wafer 200 thus obtained comprises the support substrate silicon wafer 210, the monocrystalline silicon layer 221 on the support substrate silicon wafer 210, and the infrared-reflecting silicon film 230, made of amorphous silicon, provided between the support substrate silicon wafer 210 and the monocrystalline silicon layer 221. The amorphous silicon of the infrared-reflecting silicon film 230 consists essentially of the amorphous silicon film layer 231a provided on the surface of the support substrate silicon wafer 110 and the amorphous silicon film layer 231b provided on the surface of the monocrystalline silicon layer wafer 220. The amorphous silicon film layer 231a comprises the activated area 232a formed on the surface of the layer formed from a film of amorphous silicon 231a, and the layer formed of an amorphous silicon film 231b comprises the activated region 232b formed on the surface of the layer formed of an amorphous silicon film 231b.

[0084] (5. Third embodiment of a method for producing a silicon wafer linked)

[0085] Referring to [Fig. 5], the method for producing the bonded silicon wafer 300 according to the third embodiment is described. This embodiment is a method for producing bonded silicon wafers 2, 3 in the aspects illustrated in [Fig. 2B] and [Fig. 2C]. Unlike the first and second embodiments, the infrared-reflecting silicon wafer film 330 in this embodiment is formed by a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer.

[0086] The method for manufacturing the bonded silicon wafer 300 comprises the following steps: a polycrystalline silicon film layer(s) forming process (see S310 and S320 in [Fig. 5]) forming a polycrystalline silicon film layer 331 having a thickness of 5 nm or more on the surface of the supporting substrate silicon wafer 310; an activation treatment process (see S330 and S340 in [Fig. 5]) subjecting the surface of the polycrystalline silicon film layer 331 and the surface of a single-crystal silicon wafer 320 to an activation treatment in a vacuum at normal temperature to make both surfaces of the activated areas 332a, 332b; a bonding process (see S350 in [Fig.5]), following this activation treatment process, bringing the two activated areas 332a, 332b into contact with each other under vacuum at normal temperature, thereby bonding the two activated areas 332a, 332b together to form the infrared-reflecting silicon film 330; and a thickness reduction process (see S360 in [Fig.5]), after the bonding process, reducing the thickness of the silicon wafer for monocrystalline silicon layer 320, thereby obtaining the monocrystalline silicon layer 321. .

[0087] <Processus de formation d'une / de couche(s) formée(s) d'un film de silicium polycristallin>

[0088] In the process of forming polycrystalline silicon film layer(s) (see S310 and S320 in [Fig. 5]), a polycrystalline silicon film layer 335 made of polycrystalline silicon is formed on the surface of the supporting substrate wafer 310. The polycrystalline silicon film layer 335 can be formed by generally known methods. The thickness of the polycrystalline silicon film layer 335 formed herein should be 15 nm or more so that the area formed by the laminated structure of the polycrystalline silicon and the amorphous silicon functions as a silicon film. infrared-reflecting layer when formed into the bonded silicon wafer 300. Since the activated area made of amorphous silicon is formed from the surface of each silicon wafer to a depth position of about 1 nm during the activation treatment, an infrared-reflecting silicon film 330 with a thickness of 16 nm or more is formed when the silicon wafers are bonded together. The thickness of the polycrystalline silicon layer 335 formed during this process is preferably 19 nm or more, more preferably 24 nm or more, and even more preferably 29 nm or more. The upper limit of the thickness of the formed layer of a polycrystalline silicon film 335 is not particularly limited, but the upper limit is about 40 nm for industrial productivity.

[0089] “Formation of a layer formed from a polycrystalline silicon film by CVD process”

[0090] The polycrystalline silicon film layer 335, which is made of polycrystalline silicon, can be formed on the surface of the carrier substrate silicon wafer 310 using a CVD method such as plasma CVD. If the layer is formed while the temperature of the carrier substrate silicon wafer 310 is between 700°C and 900°C, the polycrystalline silicon film layer made of polycrystalline silicon can be grown.

[0091] <Processus de traitement d'activation>

[0092] The activation processing may be performed in the same manner as the first and second embodiments described above. That is, referring to S330 and S340 in [Fig. 5], the surface of the polycrystalline silicon film layer 335 of the supporting substrate silicon wafer 310 and the surface of the single-crystal silicon layer silicon wafer 320 are subjected to an activation treatment by irradiation of ion beams or neutral atom beams 910 in a vacuum at normal temperature to form activated areas 332a, 332b on the respective surfaces of the supporting substrate silicon wafer 310 and the single-crystal silicon layer silicon wafer 320. As described below, on the surface of each silicon wafer, an activated area made of amorphous silicon is formed at a depth position of about 1 nm from the surface on the beam-irradiated side.

[0093] Linking process

[0094] In the bonding process (see S350 in [Fig.5]), following the activation treatment process, by contacting the activated areas 332a, 332b of both the carrier substrate silicon wafer 310 and the single crystal silicon layer silicon wafer 320 with each other in a vacuum at normal temperature, the two silicon wafers are bonded together via the formed layer of a polycrystalline silicon film 335. At this time, at least 1 nm of amorphous silicon is also formed on the surface of the silicon wafer for monocrystalline silicon layer 320, where the layer formed of a polycrystalline silicon film 335 has not been formed. Therefore, at the time of bonding, together with the layer formed of a polycrystalline silicon film 335, an infrared-reflecting silicon film 330 made of polycrystalline silicon and amorphous silicon will be formed with a thickness of 16 nm or more.

[0095] <Processus de réduction d'épaisseur>

[0096] The subsequent thickness reduction process can be carried out in the same manner as in the first and second embodiments.

[0097] The bonded silicon wafer 300 thus obtained comprises the support substrate silicon wafer 310, the single crystal silicon layer 321 on the support substrate silicon wafer 310, and the infrared reflecting silicon film 330 provided between the support substrate silicon wafer 310 and the single crystal silicon layer 321. The infrared reflecting silicon film 330 comprises a layer formed of a polycrystalline silicon film 335 made of polycrystalline silicon and the activated region 332. The activated region 332 is derived from the activated regions 332a, 332b described above.

[0098] The third embodiment of the method for producing the bonded silicon wafer 300 according to the first aspect is described above with reference to [Fig. 5]. In this embodiment, the polycrystalline silicon film layer 335 is formed on the supporting substrate silicon wafer 310, however, as an alternative variation of the third embodiment, the same process as in the above third embodiment can be followed except that the polycrystalline silicon layer 335 is formed on the single-crystal silicon layer silicon wafer 320; by this process, the bonded silicon wafer 4 according to the second aspect illustrated in [Fig. 2C] can be produced.In other words, the bonded silicon wafer 4 according to the second aspect can be produced by the following steps: a polycrystalline silicon film layer(s) forming process forming the polycrystalline silicon film layer 335 made of polycrystalline silicon on the surface of the silicon wafer for single-crystal silicon layer 320; an activation treatment process subjecting the surface of the silicon wafer for support substrate 310 and the surface of the silicon wafer for single-crystal silicon layer 320 to an activation treatment in a vacuum at normal temperature to provide the activated areas 332a, 332b on each surface of the silicon wafer for support substrate 310 and the silicon wafer for single-crystal silicon layer 320; a bonding process, following this activation treatment process, bringing the two areas into contact. activated 332a, 332b to each other in a vacuum at normal temperature, thereby bonding both the support substrate silicon wafer 310 and the monocrystalline silicon layer silicon wafer 320 together via the polycrystalline silicon film formed layer 335; and a thickness reduction process, reducing the thickness of the monocrystalline silicon layer silicon wafer 320 from the opposite side of the laminated surface, thereby obtaining the monocrystalline silicon layer 321 made of monocrystalline silicon. The formation of the polycrystalline silicon film formed layer 335, the bonding in a vacuum at normal temperature, and the grinding and polishing for thickness reduction can be accomplished using the same techniques as those described above in the third embodiment, so that redundant descriptions are omitted.

[0099] (6. Fourth embodiment of a method for producing a silicon wafer linked)

[0100] Referring to [Fig.6], a method for producing the bonded silicon wafer 400 according to the fourth embodiment is described. This embodiment is provided for producing the bonded silicon wafer 5 of the third aspect illustrated in [Fig.2D]. The infrared-reflecting silicon film 430 in this embodiment is made of polycrystalline silicon and amorphous silicon, as in the third embodiment.

[0101] The method for manufacturing the bonded silicon wafer 400 comprises the following steps: a polycrystalline silicon film layer formation process (see S410 and S420 in [Fig.6]) forming polycrystalline silicon film layers 435a, 435b having a thickness of 16 nm or more on each surface of the support substrate silicon wafer 410 and the single-crystal silicon layer silicon wafer 420; an activation treatment process (see S430 and S540 in [Fig. 6]) subjecting each surface of the polycrystalline silicon film-formed layers 435a, 435b formed on each surface of the support substrate silicon wafer 410 and the monocrystalline silicon layer silicon wafer 420 to an activation treatment in a vacuum at normal temperature to make both surfaces of the activated areas 432a, 432b; a bonding process (see S450 in [Fig.6]), following this activation treatment process, bringing the two activated areas 432a, 432b into contact with each other under vacuum at normal temperature, thereby bonding the two activated areas 432a, 432b together to form the infrared-reflecting silicon film 430; and a thickness reduction process (see S460 in [Fig.6]), after the bonding process, reducing the thickness of the silicon wafer for monocrystalline silicon layer 420, thereby obtaining the monocrystalline silicon layer 421. .

[0102] <Processus de formation d'une / de couche(s) formée(s) d'un film de silicium polycristallin>

[0103] While in the third embodiment, the polycrystalline silicon film formed layer 335 was formed only on the support substrate silicon wafer 310, the fourth embodiment differs in that the polycrystalline silicon film formed layers 435a, 435b are formed on each of the support substrate silicon wafer 410 and the single crystal silicon layer silicon wafer 420. The method for forming the polycrystalline silicon film formed layers 435a, 435b made of amorphous silicon is the same as in the third embodiment, and a CVD method or the like may be applied. The total thickness of the polycrystalline silicon film-formed layers 435a, 435b formed herein is 16 nm or more to ensure that the infrared-reflecting silicon film 430 effectively reflects infrared light when formed into the bonded silicon wafer 400.The thickness of each of the amorphous silicon film layers 435a, 435b may be the same or different. In the production method of the fourth embodiment, since both surfaces to be activated are polycrystalline silicon, the thickness of the infrared-reflecting silicon film 430 obtained after bonding and the total thickness of the polycrystalline silicon film layers 435a, 435b formed before bonding are the same. The total thickness of the polycrystalline silicon film layers 435a, 435b is preferably 20 nm or more, more preferably 25 nm or more, and even more preferably 30 nm or more. The upper limit for the total thickness of the polycrystalline silicon film layer 430 is not particularly limited, but the upper limit is about 40 nm for industrial productivity.It is noted that, in the fourth embodiment, the polycrystalline silicon film layer is formed on each of the support substrate silicon wafer 410 and the monocrystalline silicon wafer 420, however, the polycrystalline silicon film layer may be formed on one side and the amorphous silicon film layer may be formed on the other side.

[0104] <Processus de traitement d'activation et processus de liaison>

[0105] In the fourth embodiment, the activation treatment activates the surfaces of the polycrystalline silicon film-formed layers 435a, 435b to form activated areas 432a, 432b on the surfaces of the two silicon wafers. Then, in the bonding process, the activated areas 432a, 432b are bonded together in a vacuum at normal temperature as in the third embodiment.

[0106] <Processus de réduction d'épaisseur>

[0107] The thickness reduction process can also be carried out in the same manner as in the third embodiment.

[0108] The thus obtained bonded silicon wafer 400 comprises the support substrate silicon wafer 410, the monocrystalline silicon layer 421 on the support substrate silicon wafer 410, and the infrared reflecting silicon film 430 provided between the support substrate silicon wafer 410 and the monocrystalline silicon layer 421. The infrared reflecting silicon film 430 is formed by the laminated structure made of the amorphous silicon layer and the polycrystalline silicon layers.Furthermore, the laminated structure of the amorphous silicon layer and the polycrystalline silicon layers comprises the polycrystalline silicon film formed layer 435a and the polycrystalline silicon film formed layer 435b provided on the surface side of both the support substrate silicon wafer 410 and the monocrystalline silicon layer silicon wafer 421, respectively; the polycrystalline silicon film formed layer 435a comprises polycrystalline silicon and the activated area 432a made of amorphous silicon on the surface thereof, and the polycrystalline silicon film formed layer 435b comprises polycrystalline silicon and an activated area 432b made of amorphous silicon on the surface thereof.

[0109] In the first to fourth embodiments, it is also preferable to planarize the surfaces of the amorphous silicon film layer and the polycrystalline silicon film layer before the activation treatment. In other words, it is preferable to planarize the amorphous silicon film layers 131, 231 in the first and second embodiments, respectively, and the polycrystalline silicon film layers 335, 435 in the third and fourth embodiments, respectively.

[0110] Although the planarization conditions are not restricted, the layer formed from an amorphous silicon film or the layer formed from a polycrystalline silicon film is preferably planarized so that their surface roughness Ra is less than 3 nm; and it is preferable to contain the polishing tolerance under 30 nm. This is because the planarization enables more secure bonding after activation. For the planarization, the known method of chemical mechanical polishing (CMP), etc. can be used appropriately. The surface roughness Ra here follows the definition of the arithmetic mean roughness Ra specified in JIS B 0601 (2001).

[0111] The production method of the first to fourth embodiments described above can be used to produce the bonded silicon wafer according to this disclosure.

[0112] (7. Specific aspects)

[0113] In the following, the specific aspects of the silicon wafers applicable to the silicon wafer for the support substrate 10 and the silicon wafer for the layer of monocrystalline silicon 20 (monocrystalline silicon layer 21) which can be used in this disclosure are described.

[0114] The orientation of the silicon wafer plane is arbitrary; a (100) wafer or a (110) wafer, etc., may be used.

[0115] The thickness of the silicon wafer can be determined depending on the application, and can be from 300 pm to 1.5 mm. It has already been mentioned that the thickness of the monocrystalline silicon layer made of monocrystalline silicon obtained from the silicon wafer for monocrystalline silicon layer is determined in the range of 100 nm to 1 mm depending on the case.

[0116] The silicon wafer can be doped with dopants such as boron (B), phosphorus (P), arsenic (As) and antimony (Sb); or to obtain the desired characteristics, with carbon (C) or nitrogen (N).

[0117] The diameter of the silicon wafer is not limited in any way. This disclosure can be applied to silicon wafers with a typical diameter of 300 mm or 200 mm, etc. Of course, this disclosure can be applied to silicon wafers with a diameter greater than 300 mm, as well as to silicon wafers with a diameter less than 300 mm.

[0118] The term "silicon wafer" as used herein may refer to a so-called "bulk" silicon wafer, which does not have an epitaxial layer or other layer such as an infrared-reflecting silicon film made of silicon oxide or the like formed on the surface; or an epitaxial silicon wafer with another layer, such as an epitaxial layer, separately formed on its surface. Although a natural oxide film with a thickness of a few Å may be formed on the surface of the silicon wafer, such a natural oxide film may be present, or if necessary, may be removed using known cleaning methods, etc. Examples

[0119] This disclosure is described in more detail below using examples, however this disclosure is not limited in any way to the following examples.

[0120] [Experimental Example 1]

[0121] (Example 1-1)

[0122] The n-type CZ silicon wafers (dopant: phosphorus) with a diameter of 8 inches (203.2 mm) and a thickness of 500 μm were prepared to be the silicon wafer serving as the supporting substrate and the single-crystal silicon layer. Then, the silicon wafer serving as the supporting substrate was introduced into the plasma CVD system, and the vacuum degree in the system was maintained at 1 x 10-5 Pa or less. Then, with the stage temperature maintained at 500°C, 55 cm3STP / min (in English "sccm") of silane gas (CH3SiH3) as the source gas and 110 cm3STP / min of H2 gas as carrier gas were circulated, to form a layer formed of amorphous silicon film with a thickness of 15 nm on the surface of the silicon wafer for supporting substrate by plasma CVD process.

[0123] Then, both the supporting substrate silicon wafer and the monocrystalline silicon layer silicon wafer were introduced into the chamber, and the vacuum degree was maintained at 1 x 10-5 Pa or less. Then, the activation treatment was applied to the surface of the supporting substrate silicon wafer and the surface of the active layer wafer by irradiating argon ions at 1.4 keV to form activated areas (amorphous silicon) on the surface of both silicon wafers. Then, the two substrates were bonded by contacting the activated areas of both wafers together under vacuum at normal temperature.

[0124] Then, the silicon wafer for the monocrystalline silicon layer was ground and polished from the opposite side of the bonded surface so as to leave a thickness of 10 μm, and the bonded silicon wafer for Example 1-1 was obtained.

[0125] TEM observation of the bonding interface of the thus obtained bonded silicon wafer confirmed the formation of amorphous silicon with a thickness of 16 nm. In other words, it was found that an activated area with a thickness of 1 nm was formed when the surface of the silicon wafer for monocrystalline silicon layer was subjected to the activation treatment.

[0126] (Example 1-2)

[0127] In Example 1-1, an amorphous silicon film layer with a thickness of 15 nm was formed on the surface of the silicon wafer serving as a supporting substrate by the plasma CVD method. Here, in Example 1-2, the bonded silicon wafer for Example 1-2 was produced under the same conditions as Example 1-1, except that the thickness of the formed amorphous silicon film layer was 20 nm.

[0128] (Example 1-3)

[0129] In Example 1-1, an amorphous silicon film layer with a thickness of 15 nm was formed on the surface of the silicon wafer serving as a supporting substrate by the plasma CVD method. Here, in Example 1-3, the bonded silicon wafer for Example 1-3 was produced under the same conditions as Example 1-1, except that the thickness of the formed amorphous silicon film layer was 25 nm.

[0130] (Example 1-4)

[0131] In Example 1-1, a layer formed of an amorphous silicon film with a thickness of 15 nm was formed on the surface of the silicon wafer serving as a supporting substrate by the plasma CVD method. Here, in Example 1-3, the bonded silicon wafer for Example 1-3 was produced under the same conditions as Example 1-1, except that the thickness of the formed amorphous silicon film layer was 30 nm.

[0132] (Conventional Example 1)

[0133] The same silicon wafer serving as a supporting substrate and the same silicon wafer for a single-crystal silicon layer as in Example 1-1 were prepared. Then, without forming an amorphous silicon film layer or any other layer on either substrate, both substrates were subjected to the vacuum activation treatment at normal temperature to form activated areas on both wafers, and the activated areas of both wafers were bonded together.

[0134] Then, the silicon wafer for the monocrystalline silicon layer was ground and polished from the opposite side of the bonded surface so as to leave a thickness of 10 μm, and the bonded silicon wafer for Conventional Example 1 was obtained.

[0135] (Comparative Example 1)

[0136] The same silicon wafer serving as a supporting substrate and the same silicon wafer for a single-crystal silicon layer as in Example 1-1 were prepared. In Example 1-1, an amorphous silicon film layer with a thickness of 15 nm was formed on the surface of the silicon wafer serving as a supporting substrate by the plasma CVD method. Here, in Comparative Example 1, the bonded silicon wafer was produced under the same conditions as Example 1-1, except that the thickness of a formed amorphous silicon film layer was 10 nm.

[0137] (Evaluation: Infrared Reflectance)

[0138] To evaluate the infrared reflectivity of the infrared-reflecting silicon film, infrared light was incident on the surfaces of the bonded silicon wafers using a film thickness measuring device (CHRocodile IT500, manufactured by Presitec), and the signal intensity of the reflected light was detected. With reference to [Fig. 8], the principle of measuring infrared reflectance using the Fourier Transform Infrared (FTIR) method with this instrument is briefly explained. The laser light source that serves as the incident light for this instrument is a super luminescent diode. Using this instrument, the reflected light L2 and the reflected light L3 obtained when the near-infrared light L1 was irradiated onto the bonded silicon wafer were detected, and the infrared reflectance L2 / L3 was obtained.Here, the reflected light L2 is the light reflected from the surface 528A of the bonded silicon wafer 500, and the reflected light L3 is the light reflected from the interface of the monocrystalline silicon layer 521 and the region 530 formed of amorphous silicon. The non-reflected infrared light will then travel to the region 510 of the monocrystalline silicon on the support substrate side.

[0139] The results are listed in Table 1 below. From the results of this evaluation, it was confirmed that the amorphous silicon areas in Examples 1-1 to Example 1-4 function sufficiently as infrared-reflecting silicon films, while the amorphous silicon areas formed in Conventional Example and Comparative Example 1 are insufficient to function as infrared-reflecting silicon films.

[0140] [Tables 1] Sample Conventional Example 1 Comparative Example 1 Example 1 -1 Example 1 -2 Example 1 -3 Example 1 -4 IR-reflecting silicon film Amorphous Silicon Amorphous Silicon Amorphous Silicon Amorphous Silicon Amorphous Silicon Amorphous Silicon Thickness of IR-reflecting silicon film 6 11 16 21 26 31 Reflection intensity of reflected light 4214 7862 11700 14879 18262 19394 Reflectance (%) 23.7 44.3 65.9 83.8 100 100

[0141] [Experimental Example 2]

[0142] (Example 2-1)

[0143] The n-type CZ silicon wafers (dopant: phosphorus) with a diameter of 8 inches (203.2 mm) and a thickness of 500 μm were prepared to be the silicon wafer serving as the supporting substrate and the single-crystal silicon layer. Then, the silicon wafer serving as the supporting substrate was introduced into the plasma CVD system, and the vacuum degree in the system was maintained at 1 x 10-5 Pa or less. Then, with the stage temperature maintained at 800°C, 55 cm3STP / min (in English "sccm") of silane gas (CH3SiH3) as the source gas and 110 cm3STP / min of H2 gas as the carrier gas were circulated, to form a layer formed from a 15 nm thick polycrystalline silicon film on the surface of the silicon wafer for the supporting substrate by plasma CVD process.

[0144] Then, both the supporting substrate silicon wafer and the monocrystalline silicon layer silicon wafer were introduced into the chamber, and the vacuum degree was maintained at 1 x 10-5 Pa or less. Then, the activation treatment was applied to the surface of the supporting substrate silicon wafer and the surface of the active layer wafer by irradiating argon ions at 1.4 keV to form an activated area (amorphous silicon) on the surface of the two silicon wafers. Then, the two substrates were bonded by bonding the activated areas of the two wafers together under vacuum at normal temperature.

[0145] Then, the silicon wafer for the monocrystalline silicon layer was ground and polished from the opposite side of the bonded surface so as to leave a thickness of 10 qm, and the bonded silicon wafer was obtained.

[0146] TEM observation of the bonding interface of the thus obtained bonded silicon wafer confirmed the formation of an amorphous silicon region with a thickness of 1 nm in addition to the layer formed by a polycrystalline silicon film with a thickness of 15 nm. In other words, it was found that an activated region with a thickness of 1 nm was formed when the surface of the silicon wafer for monocrystalline silicon layer was subjected to the activation treatment.

[0147] (Example 2-2)

[0148] In Example 2-1, a polycrystalline silicon film layer with a thickness of 15 nm was formed on the surface of the silicon wafer serving as a supporting substrate by the plasma CVD method. Here, in Example 2-2, the bonded silicon wafer for Example 2-2 was produced under the same conditions as Example 2-1, except that the thickness of the formed polycrystalline silicon film layer was 20 nm.

[0149] (Example 2-3)

[0150] In Example 2-1, a polycrystalline silicon film layer with a thickness of 15 nm was formed on the surface of the silicon wafer serving as a supporting substrate by the plasma CVD method. Here, in Example 2-3, the bonded silicon wafer for Example 2-3 was produced under the same conditions as Example 2-1, except that the thickness of the formed polycrystalline silicon film layer was 25 nm.

[0151] (Example 2-4)

[0152] In Example 2-1, a layer formed of a polycrystalline silicon film with a thickness of 15 nm was formed on the surface of the silicon wafer serving as a supporting substrate by the plasma CVD method. Here, in Example 2-3, the bonded silicon wafer for Example 2-3 was produced under the same conditions as Example 2-1, except that the thickness of the formed polycrystalline silicon film layer was 30 nm.

[0153] (Comparative Example 2)

[0154] In Example 2-1, a polycrystalline silicon film layer with a thickness of 15 nm was formed on the surface of the silicon wafer serving as a supporting substrate by the plasma CVD method. Here, in Comparative Example 2, the bonded silicon wafer was produced under the same conditions as Example 2-1, except that the thickness of the formed polycrystalline silicon film layer was 10 nm.

[0155] (Evaluation: Infrared Reflectance)

[0156] In the evaluation of the infrared reflectance in Example 2, as in Example 1, the aforementioned film thickness measuring device was used to determine the infrared reflectance. Here, in Experimental Example 2, the reflected light L2 is the light reflected from the surface 528A of the bonded silicon wafer 500, and the reflected light L3 is the light reflected from the interface of the monocrystalline silicon layer 521 and the region 530 formed of polycrystalline silicon.

[0157] The results are listed in Table 2 below. From the results of this evaluation, it was confirmed that the areas formed from amorphous silicon and polycrystalline silicon in Examples 2-1 to Example 2-4 function as infrared-reflecting silicon films, while the areas of amorphous silicon and polycrystalline silicon formed in Comparative Example 2 are insufficient to function as infrared-reflecting silicon films.

[0158] [Tables2] Sample Example 2-1 Example 2-2 Example 2-3 Example 2-4 Example 2-5 IR-reflecting silicon film Polycrystalline silicon + Amorphous silicon Polycrystalline silicon + Amorphous silicon Polycrystalline silicon + Amorphous silicon Polycrystalline silicon + Amorphous silicon Thickness of IR-reflecting silicon film 16 21 26 31 11 Reflection intensity of reflected light 11993 15962 18434 18534 8936 Reflectance (%) 67.5 89.9 100 100 50.3 Industrial application

[0159] According to this disclosure, the bonded silicon wafer with small thickness and high infrared reflectance can be obtained. List of cited documents Patent documents

[0160] For all useful purposes, the following patent document(s) is (are) cited: - [Patent Document 1] PTL 1: 2014 / 72249 A.

Claims

Claims

1. A bonded silicon wafer (1, 2, 3, 4, 5) comprising: a silicon wafer serving as a support substrate (10); a monocrystalline silicon layer (21) on the silicon wafer serving as a support substrate (10); and an infrared-reflecting silicon film (30) provided between the silicon wafer serving as a support substrate (10) and the monocrystalline silicon layer (21); wherein the infrared-reflecting silicon film (30) comprises amorphous silicon, and a thickness of the infrared-reflecting silicon film is 16 nm or more and 40 nm or less.

2. The bonded silicon wafer (2) of claim 1, wherein the infrared-reflecting silicon film (30) is made of amorphous silicon.

3. A bonded silicon wafer (3, 4, 5) according to claim 1, wherein the infrared reflective silicon film (30) is formed by a laminated structure made of amorphous silicon layer(s) (32) and polycrystalline silicon layer(s) (35).

4. A bonded silicon wafer (1, 2, 3, 4, 5) according to any one of claims 1 to 3, wherein the thickness of the infrared-reflecting silicon film (30) is 25 nm or more.

5. A bonded silicon wafer (1, 2, 3, 4, 5) according to any one of claims 1 to 3, wherein the thickness of the monocrystalline silicon layer (21) is selected from the values ​​ranging from 3 pm to 30 pm, the values ​​3 pm and 30 pm being inclusive.

6. A method for producing the bonded silicon wafer (100) according to claim 2 comprising the steps of: forming (S 110, S120) an amorphous silicon film layer (131) having a thickness of 15 nm or more on one surface of the silicon wafer for a support substrate (110); activation treatment (S 130, S140) subjecting a surface of the amorphous silicon film layer (131) and a surface of a silicon wafer for a single-crystal silicon layer (120) to an activation treatment in a vacuum at room temperature to make both surfaces of the activated areas (132a, 132b); bonding (S150), following the activation treatment step (S130, S140), bringing the two activated areas (132a, 132b) into contact with each other under vacuum at room temperature, thereby bonding the two activated areas (132a, 132b) together to form the infrared-reflecting silicon film (130); and thickness reduction (S160), after the bonding step (S150), reducing the thickness of the silicon wafer for monocrystalline silicon layer (120) by grinding and polishing, thereby obtaining the monocrystalline silicon layer (121).

7. A method for producing the bonded silicon wafer according to claim 2 comprising the steps of: forming an amorphous silicon film layer having a thickness of 15 nm or more on one surface of a silicon wafer for a single-crystal silicon layer; activation treatment subjecting a surface of the amorphous silicon film layer and a surface of the silicon wafer for a supporting substrate to an activation treatment in a vacuum at room temperature to make both surfaces of the activated areas; bonding, following the activation treatment step, bringing the two activated areas into contact with each other in a vacuum at room temperature, thereby bonding the two activated areas together to form the infrared-reflecting silicon film;and thickness reduction, after the bonding step, reducing the thickness of the silicon wafer for monocrystalline silicon layer by grinding and polishing, thereby obtaining the monocrystalline silicon layer.;

8. A method for producing the bonded silicon wafer (200) according to claim 2 comprising the steps of: forming (S210, S220) an amorphous silicon film layer (231a) having a thickness of 16 nm or more on one surface of the supporting substrate silicon wafer (210) and an amorphous silicon film layer (231b) having a thickness of 16 nm or more on one surface of a single-crystal silicon wafer (220); activation treatment (S230, S240) subjecting one surface of each of the formed amorphous silicon film layers (231a, 231b) to an activation treatment in a vacuum at a temperature ambient to make the two surfaces of the activated areas (232a, 232b); bonding (S250), following the activation treatment step (S230, S240), bringing the two activated areas (232a, 232b) into contact with each other under vacuum at room temperature, thereby bonding the two activated areas (232a, 232b) together to form the infrared-reflecting silicon film (230); and thickness reduction (S260), following the bonding step (S250), reducing the thickness of the silicon wafer for monocrystalline silicon layer (220) by grinding and polishing, thereby obtaining the monocrystalline silicon layer (221).

9. A method for producing the bonded silicon wafer (300) according to claim 3 comprising the steps of: forming (S310, S320) a polycrystalline silicon film layer (335) having a thickness of 15 nm or more on one surface of the supporting substrate silicon wafer (310); activating treatment (S330, S340) subjecting one surface of the polycrystalline silicon film layer (335) and one surface of a single-crystal silicon wafer (320) to an activating treatment in a vacuum at room temperature to make both surfaces of the activated areas (332a, 332b); bonding (S350), following the activation treatment step (S330, S340), bringing the two activated areas (332a, 332b) into contact with each other under vacuum at room temperature, thereby bonding the two activated areas (332a, 332b) together to form the infrared-reflecting silicon film (330);and thickness reduction (S360), after the bonding step (S350), reducing the thickness of the monocrystalline silicon layer silicon wafer (320) by grinding and polishing, thereby obtaining the monocrystalline silicon layer (321).;

10. A method for producing the bonded silicon wafer according to claim 3 comprising the steps of: forming a polycrystalline silicon film layer having a thickness of 15 nm or more on one surface of a silicon wafer for a single-crystal silicon layer; activating treatment subjecting a surface of the polycrystalline silicon film layer and a surface of the silicon wafer to silicon for supporting substrate to an activation treatment under vacuum at room temperature to make both surfaces of the activated areas; bonding, following the activation treatment step, bringing the two activated areas into contact with each other under vacuum at room temperature, thereby bonding the two activated areas together to form the infrared-reflecting silicon film; and thickness reduction, after the bonding step, reducing the thickness of the silicon wafer for monocrystalline silicon layer by grinding and polishing, thereby obtaining the monocrystalline silicon layer.

11. A method for producing the bonded silicon wafer (400) according to claim 3 comprising the steps of: forming (S410, S420) a polycrystalline silicon film layer (435a) having a thickness of 16 nm or more on one surface of the supporting substrate silicon wafer (410) and a polycrystalline silicon film layer (435b) having a thickness of 16 nm or more on one surface of a single-crystal silicon layer silicon wafer (420); activating treatment (S430, S440) subjecting one surface of each of the formed polycrystalline silicon film layers (435a, 435b) to an activation treatment in a vacuum at room temperature to make both surfaces of the activated areas (432a, 432b);bonding (S450), following the activation treatment step (S430, S440), bringing the two activated areas (432a, 432b) into contact with each other under vacuum at room temperature, thereby bonding the two activated areas (432a, 432b) together to form the infrared-reflecting silicon film (430); and thickness reduction (S460), following the bonding step (S450), reducing the thickness of the silicon wafer for monocrystalline silicon layer (420) by grinding and polishing, thereby obtaining the monocrystalline silicon layer (421).;

Images