Chip package and its manufacturing process
Patent Information
- Application Number
- FR2022011833
- Authority / Receiving Office
- FR · FR
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-11-14
- Publication Date
- 2025-02-28
- Estimated Expiration
- 2042-11-14
AI Technical Summary
Existing chip packages face issues with the holding mechanism of the transparent plate above the chip and the formation of the cavity for the pixels, leading to potential misalignment and interference with electrical connections.
A method involving the use of photosensitive resin layers to create precise openings and secure a transparent plate above the chip, ensuring alignment and preventing movement, while maintaining electrical connections through wire bonding.
The solution provides a stable and aligned chip package with improved light capture functionality by preventing dendrite formation and ensuring precise positioning of the transparent plate, enhancing the chip's operational reliability.
Abstract
Description
Description Title of the invention: Chip package and method of manufacturing it Technical field
[0001] — The present description relates generally to integrated circuits, and, more particu- particularly packages for integrated circuit chips comprising at least one pixel for receiving light. The present application also relates to a method of manufacturing such a case. Prior art
[0002] — Integrated circuit chips comprising one or more pixels are known, for example example a matrix of pixels, arranged on the side of an upper face of the chip, in a central part of the upper face. These known chips further comprise electrical connection pads arranged on the side of the upper face of the chip, that is to say on the upper face of the chip, the pads being arranged in the periphery from the top side of the chip. These known chips implement, for example, a light sensor or an image sensor.
[0003] — Known encapsulation packages of these known chips generally comprise a support on which the chip is mounted or assembled, a lower face of the chip, opposite the top face of the chip, resting on an upper face of the support. The chip's connection pads are then electrically connected by wires conductors to electrical connection pads of the support, using a technique called “wire bonding”. The encapsulation packages for these chips further include a plate transparent to the operating wavelengths pixels of the chip. The transparent plate is placed above and opposite the top side of the chip. These packages further include an annular wall extending vertically between the chip and the transparent plate or between the support and the transparent plate, so as to define a cavity in which the pixels of the chip.
[0004] — However, these known cases have various drawbacks, for example in that concerns how the transparent plate is held above the chip and / or the way in which the cavity in which the pixel(s) of the chip are arranged is made. Summary of the invention
[0005] — There is a need to overcome all or part of the disadvantages of the known housings of the type described above,
[0006] — An embodiment overcomes all or part of the drawbacks of the known housings of the type described above,
[0007] — One embodiment provides a method of manufacturing a package for a chip, the method comprising the following successive steps: (a) providing a support having an upper face on which the chip is mounted, the chip comprising: - a lower face facing the upper face of the support, - at least one pixel arranged on the side of an upper face of the chip, in a central part of the upper face of the chip, and - first electrical connection pads arranged on the periphery of the upper face of the chip, b) forming, on the upper face of the support and the periphery of the chip, a first layer of photosensitive resin comprising a first through opening opening onto the central part of the upper face of the chip; c) forming a second layer of photosensitive resin comprising a second through opening having a central portion opening onto the first opening and a peripheral portion opening onto the first layer of photosensitive resin; d) placing a transparent plate in the second opening; and e) forming a third layer of photosensitive resin comprising, opposite the central part of the upper face of the chip, a third through opening opening onto a central part of the transparent plate. According to one embodiment, in steps b), c), d) and e), the first layer covers the periphery of the chip. According to one embodiment, in step a), electrical connection wires connect the first pads to second electrical connection pads of the support arranged on the side of the upper face of the support, and, in steps b), c), d) and e), the first layer covers the connection wires. According to one embodiment, the transparent plate and the second opening have substantially equal dimensions in a plane parallel to the upper face of the support. According to one embodiment, in step d), the periphery of the transparent plate rests on and in contact with the first layer. According to one embodiment, in step c), the second layer is formed on and in contact with the first layer of resin. According to one embodiment, in step e), the third layer rests on and / in contact with a peripheral part of the transparent plate around the third opening. According to one embodiment, step b) successively comprises: - deposit the first layer; and - forming the first opening by exposing the first layer through a first mask configured so that only a portion of the first layer disposed at the location of the first opening receives light, and then removing the part of the first layer having received light. According to one embodiment, step c) successively comprises: - place the second layer on the first layer; and - forming the second opening by exposing the second layer through a second mask configured so that only a portion of the second layer disposed at the location of the second opening receives light, and then removing the portion of the second layer having received light. According to one embodiment, the second layer is deposited in the form of a laminated film on the first layer, According to one embodiment, step e) successively comprises: - deposit the third layer on the second layer of resin and on the transparent plate; - forming the third opening by exposing the third layer through a third mask configured so that only a portion of the third layer disposed at the location of the third opening receives light, and then removing the portion of the third layer that received light. Another embodiment provides a device comprising: - a support having an upper face; - a chip mounted on the upper face of the support, the chip comprising: a lower face facing the upper face of the support, at least one pixel arranged on the side of an upper face of the chip and in a central part of the upper face of the chip, and first electrical connection pads arranged on the periphery of the upper face of the chip; - resin covering the upper face of the support and the periphery of the chip and comprising an opening facing the central part of the chip; and - a transparent plate closing the opening, in which: a lower face of the transparent plate is turned towards the chip and has its periphery resting on and in contact with the resin; a portion of the resin rests on and in contact with the periphery of an upper face of the transparent plate; and the resin prevents the transparent plate from moving in a plane parallel to the upper face of the support. According to one embodiment, the device is free of glue between the upper face of the chip and the lower face of the transparent plate. Brief description of the drawings These and other features and advantages will be set forth in detail in the following description of particular embodiments given without limitation in relation to the attached figures, among which: [Fig. 1] represents, by a schematic sectional view, a step of an embodiment of a method for manufacturing an encapsulation package of an integrated circuit chip; [Fig.2] represents, by a schematic sectional view, another stage of the manufacturing process: [Fig.3] represents, by a schematic sectional view, another stage of the manufacturing process: [Fig.4] represents, by a schematic sectional view, another stage of the manufacturing process: [Fig.5] represents, by a schematic sectional view, another stage of the manufacturing process: [Fig.6] represents, by a schematic sectional view, another stage of the manufacturing process: and [Fig.7] represents, by a schematic sectional view, another stage of the manufacturing process. Description of the embodiments The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties. For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, the functions implemented by the described chips and their pixels have not been detailed, the described embodiments being compatible with the usual functions of integrated circuit chips comprising pixels, for example the functions of color imager, three-dimensional imager, ambient light sensor, etc. Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") together, this means that these two elements can be connected or be connected by means of one or more other elements. In the following description, when referring to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", vertical", etc., are referred to, unless otherwise specified, the orientation of the figures. Unless otherwise specified, the expressions 'about', 'approximately', 'substantially', and 'of the order of' mean to within 10%, preferably to within 5%. [Fig. 1] represents, by a schematic sectional view, a step of an embodiment of a method for manufacturing an encapsulation package of an integrated circuit chip 1. The chip | comprises an upper face 100 and a lower face 102 opposite the upper face 100. The chip | comprises at least one pixel, for example several pixels preferably arranged in the form of a matrix of pixels 104 as illustrated in [Fig. 1], the pixel or pixels of the chip 1 being arranged on the side of the upper face 100 of the chip 1. In other words, the pixel or pixels of the chip 1 are configured to receive light from the side of the face 100 of the chip 1. The pixel or pixels of the chip 1 are arranged in a central part of the chip 1, that is to say in a central part of the face 100. The chip | further comprises electrical connection pads 106. The pads 106 are arranged on the side of the face 100 of the chip 1. More particularly, the pads 106 are arranged at the periphery of the chip 1, that is to say in the periphery (or peripheral part) of the face 100 of the chip 1. For example, each pad 106 is arranged in a space extending between the pixel(s) of chip 1 and a corresponding lateral edge of chip 1, i.e. between the central portion of chip 1 and the edges of chip 1. In the remainder of the description, the term "edge" of the chip | refers to a vertical face of the chip 1 extending orthogonally to the faces 100 and 102, from one of the faces 100 and 102 to the other of the faces 100 and 102. In the step illustrated in [Fig. 1], the chip 1 is mounted on a support 110, for example a printed circuit board or a substrate, for example a semiconductor. More particularly, the support 110 comprises an upper face 112, and the chip 1 is mounted on the face 112 of the support 110, that is to say that it rests on this face 112. By way of example, although this is not shown in [Fig. 1], a layer of glue is arranged between the face 102 of the chip 1 and the face 112 of the support 110, so as to mechanically fix the chip 1 to the support 110, this glue possibly having thermal conduction properties promoting the evacuation of the heat produced by the chip 1 towards the support 110. The support 110 comprises electrical connection pads 113 arranged on the side of its face 112, or, in other words, the face 112 of the support 110 comprises the pads 113. The support 110 comprises a lower face 114, opposite its upper face 112. Although not shown in [Fig. 1], electrically conductive balls may be attached to the face 114 of the support 110 and electrically connected to elements arranged on the side of the face 112 of the support 110, for example to the pads 113, by electrical conductors arranged in the support 110. The chip | is electrically connected to the support 110. More particularly, the pads 106 of the chip 1 are electrically connected to the pads 113 of the support 110 by electrically conductive wires 116, according to the wire bonding technique. [Fig.2] represents, by a schematic sectional view, another stage of the manufacturing process, and more particularly a stage subsequent to the stage of [Fig.1]. At this stage, a photosensitive resin layer 200, or photoresist layer 200, has been formed on the structure described in relation to [Fig. 1]. More particularly, the layer 200 is formed on the face 112 of the support 110, that is to say on the entire part of the face 112 which is not covered by the chip |, and on at least the periphery of the chip 1, that is to say on at least the peripheral part of the face 100 of the chip 1. Thus, the layer 200 covers the pads 106 of the chip 1, but also the pads 113 of the support 110. According to one embodiment, as shown in [Fig.2], the layer 200 is formed over the entire face 100 of the chip 1. Preferably, the layer 200 is formed with a sufficient thickness so that the connection wires 116 are embedded in the layer 200. For example, the thickness of the layer 200, measured orthogonally to the face 112 and from this face 112 is equal to the desired height between the support 110 and a transparent plate which will be placed above and opposite the chip 1. Preferably, the layer 200 is formed so that its upper face is flat. [Fig.3] represents, by a schematic sectional view, another stage of the manufacturing process, and more particularly a stage subsequent to the stage of [Fig.2]. At this stage, an opening 300 has been formed in the layer 200. The opening 300 passes through the layer 200 over its entire thickness. The opening 300 opens onto the central part of the chip 1, that is to say onto a central part of the face 100 of the chip 1. Thus, the pixel(s) of the chip 1, for example the pixel matrix 104 of the chip 1, are exposed at the bottom of the opening 300. In addition, the opening 300 is formed so that a part of the layer 200 remains in place on the periphery of the face 100 of the chip 1 and covers the pads 113. According to one embodiment, to form the opening 300, only a portion of the layer 200 arranged at the location of the opening 300 is exposed through a mask configured so that a portion of the layer 200 resting on the periphery of the chip | and the support 110 does not receive light, then the portion of the layer 200 having received light is removed, for example using a suitable solution, so as to form the opening 300. In this case, the resin of the layer 200 is said to be “positive”. After the formation of the opening 300, a heat treatment may be provided to make the resin of the layer 200 insensitive to light and / or to mechanically stabilize (or harden) the resin. According to an alternative embodiment, to form the opening 300, a portion of the layer 200 resting on the periphery of the chip 1 and the support 110 is exposed through a mask configured so that a portion of the layer 200 arranged at the location of the opening 300 does not receive light, then the portion of the layer 200 that has not received light is removed, for example using a suitable solution, so as to form the opening 300. In this case, the resin of the layer 200 is said to be "negative". A heat treatment can then be provided to make the resin of the layer 200 insensitive to light and / or to mechanically stabilize the resin. According to yet another embodiment variant, to form the layer 200 and the opening 300, rather than first forming the layer 200 ([Fig. 2]) and then the through opening 300 in the layer 200 ([Fig. 3]), the layer 200 already provided with the opening 300 is laminated, in the form of a dry film, ("dry film" in English), on the support 110 and the chip 1 so that the opening 300 opens onto the central part of the chip 1 and that resin of the layer 200 covers the periphery of the chip 1 and the support 110. The layer 200 is then, for example, called a laminated dry film ("laminate dry film" in English). A heat treatment can then be provided to make the resin of the layer 200 insensitive to light and / or to mechanically stabilize the resin. [Fig.4] represents, by a schematic sectional view, another stage of the manufacturing process, and more particularly a stage subsequent to the stage of [Fig.3]. At this stage, a layer of photosensitive resin 400 has been formed on the structure described in relation to [Fig.3]. More particularly, according to an embodiment illustrated by [Fig.4], the layer 400 has been laminated, in the form of a dry film, on the layer 200 so that a part of the layer 400 blocks the opening 300 on the side opposite the chip 1. [Fig.5] represents, by a schematic sectional view, another stage of the manufacturing process, and more particularly a stage subsequent to the stage of [Fig.4]. At this stage, an opening 500 has been formed in the layer 400. The opening 500 passes through the layer 400 over its entire thickness. The opening 500 comprises a central portion opening onto the opening 300, i.e., a central portion directly above the opening 300, and a peripheral portion opening onto the layer 200, i.e., a central portion directly above a portion of the layer 200. A portion of the layer 400 remains in place on the layer 200, all around the opening 500. For example, in a direction orthogonal to the face 112 of the support 110, the opening 500 is aligned with the opening 300, the center of the opening 500 being for example aligned with the center of the opening 300 in this direction, and, in a plane parallel to the face 112, the opening 500 has dimensions greater than those of the opening 300. The pixel(s) of chip 1, for example the pixel array 104 of chip 1, are exposed to light passing through apertures 500 and 300. According to one embodiment, to form the opening 500, a portion of the layer 400 arranged at the location of the opening 500 is exposed through a mask configured so that a portion of the layer 500 intended to remain in place on the layer 200 does not receive light, then the portion of the layer 400 having received light is removed, for example using a suitable solution, so as to form the opening 500. In this case, the resin of the layer 400 is said to be "positive". A heat treatment may then be provided to make the resin of the layer 400 insensitive to light and / or to mechanically stabilize the resin. According to an alternative embodiment, to form the opening 500, a portion of the layer 400 intended to remain in place on the layer 200 after the formation of the opening 500 is exposed through a mask configured so that a portion of the layer 400 arranged at the location of the opening 500 does not receive light, then the portion of the layer 400 that has not received light is removed, for example using a suitable solution, so as to form the opening 500. In this case, the resin of the layer 400 is said to be "negative". A heat treatment may then be provided to make the resin of the layer 400 insensitive to light and / or to mechanically stabilize the resin. According to yet another embodiment, to form the layer 400 and the opening 500, rather than first forming the layer 400 ([Fig. 4]) and then the through opening 500 in the layer 400 ([Fig. 5]), the layer 400 already provided with the opening 500 is laminated, in the form of a dry film, onto the layer 200, so that the opening 500 comprises a central portion opening onto the opening 300 and a peripheral portion opening onto the layer 200. The layer 400 is then, for example, a laminated dry film. A heat treatment may then be provided to make the resin of the layer 400 insensitive to light and / or to mechanically stabilize the resin. [Fig.6] represents, by a schematic sectional view, another stage of the manufacturing process, and more particularly a stage subsequent to the stage of [Fig.5]. In the step of [Fig. 6], a plate 600 has been arranged in the opening 500 ([Fig. 5]). The plate 600 is made of a material transparent to the operating wavelengths of the pixel(s) of the chip 1. The plate 600 has, in a plane parallel to the face 112 of the support 110, dimensions substantially equal to those of the opening 500 ([Fig. 5]), so that the plate 600 fits into the opening 500. In other words, in a plane parallel to the face 112 of the support 110, the plate 600 has dimensions identical to those of the opening 500. manufacturing tolerances close to those of the 500 opening ([Fig.5]). Thus, the plate 600 comprises a peripheral portion which rests on the layer 200. More particularly, the plate 600 has a lower face facing the chip 1, the periphery of the lower face of the plate 600 resting on and in contact with the layer 200. Preferably, no glue is disposed between the plate 600 and the layer 200. The movements of the plate 600 in a plane parallel to the face 112 of the support 110 are prevented by the resin of the layer 400. Thus, the positioning and holding of the plate 600 above the chip 1 are facilitated by the opening 500 and the layer 400. Furthermore, the parallelism between the plate 600 and the chip 1, for example the parallelism between the plate 600 and the upper face 100 of the chip 1, is ensured by the fact that the upper face of the layer 200 is flat and that no glue is dispensed between the periphery of the plate 600 and the layer 200. The plate 600 also comprises a central part arranged opposite the central part of the chip 1, therefore opposite the pixel(s) of the chip 1. In other words, the central part of the plate 600 is directly above the opening 300. This central part of the plate 600 blocks the opening 600 on the side opposite the chip 1. Thus, the pixel(s) of the chip 1 are arranged in a cavity corresponding to the opening 300, the cavity extending in height between the chip 1 and the plate 600 and being delimited laterally by resin, more particularly by the resin of the layer 200. For example, plate 600 and layer 400 have equal or substantially equal thicknesses. In the step of [Fig. 6], after placing the plate 600 in the opening 500 ([Fig. 5]), a photosensitive resin layer 602 is formed on the layer 400 and at least on the periphery of the plate 600, i.e. on and in contact with the peripheral portion of the upper face of the plate 600. In the embodiment illustrated by [Fig.6], the layer 602 is formed on the layer 400 and on the entire upper face of the plate 600. [Fig.7] represents, by a schematic sectional view, another stage of the manufacturing process, and more particularly a stage subsequent to the stage of [Fig.6]. At this stage, an opening 700 has been formed in the layer 602. The opening 700 passes through the layer 602 over its entire thickness. The opening 700 opens onto a central portion of the plate 600. Furthermore, the opening 700 does not open onto the periphery of the plate 600, or, in other words, the resin of the layer 602 remains in place on and in contact with the periphery of the plate 600, and, more precisely, the periphery portion of the upper face of the plate 600. For example, in a direction orthogonal to the face 112 of the support 110, the opening 700 is aligned with the opening 300, i.e., the center of the opening 700 is by example aligned with the center of the opening 300 and that of the opening 500 ([Fig.5]) in this direction. Furthermore, in a plane parallel to the face 112, the opening 700 has, for example, dimensions equal to or greater than those of the opening 300 but less than those of the plate 600, therefore of the opening 500 ([Fig.5]). The movements of the plate 600 in a direction orthogonal to the face 112 of the support 110 are prevented by the layer 602 and the layer 200, between which the periphery of the plate 600 is interposed. More particularly, the part of the layer 602 resting on and in contact with the periphery of the upper face of the plate 600 prevents any movement of the plate 600 in a direction orthogonal to the face 112 of the support 110, in a direction which would move the plate 600 away from the support 110 (upwards in [Fig.7]). Symmetrically, the part of the layer 200 on and in contact with which the periphery of the lower face of the plate 600 rests prevents any displacement of the plate 600 in a direction orthogonal to the face 112 of the support 110, in a direction which would bring the plate 600 closer to the support 110 (downwards in [Fig.7]). The plate 600 is then held in place by the resin, and, more precisely, the resin of the layers 200, 400 and 600, the resin preventing any movement of the plate 600 in a direction orthogonal to the face 112 of the support 110 and in a plane parallel to this face 112. The pixel(s) of chip 1, for example the pixel matrix 104 of chip 1, are exposed to light passing successively through opening 700, through transparent plate 600 and through opening 300. According to one embodiment, to form the opening 700, a portion of the layer 602 arranged at the location of the opening 700 is exposed through a mask configured so that a portion of the layer 602 intended to remain in place on the layer 400 and the periphery of the plate 600 does not receive light, then the portion of the layer 602 having received light is removed, for example using a suitable solution, so as to form the opening 700. In this case, the resin of the layer 602 is said to be "positive". A heat treatment can then be provided to make the resin of the layer 602 insensitive to light and / or to mechanically stabilize the resin. According to an alternative embodiment, to form the opening 700, a portion of the layer 602 intended to remain in place on the layer 400 and on the periphery of the plate 600 after the formation of the opening 700 is exposed through a mask configured so that a portion of the layer 602 arranged at the location of the opening 700 does not receive light, then the portion of the layer 602 which has not received light is removed, for example using a suitable solution, so as to form the opening 700. In this case, the resin of the layer 602 is said to be "negative". A heat treatment can then be provided to make the resin of the layer 602 insensitive to light. and / or to mechanically stabilize the resin. In [Fig.7], the chip | is encapsulated in a package comprising the support 110, the resin of the layers 200, 400 and 602 and the plate 600. Furthermore, although the central part of the chip 1 comprising the pixel(s) of the chip 1 is not covered with resin and is opposite a central part of the plate 600 so as to be able to receive light, the periphery of the upper face 100 of the chip | where the pads 113 are arranged, and the edges of the chip 1 are covered with resin. This advantageously makes it possible to avoid the formation of dendrites or foreign bodies, i.e. small particles of metal, for example from the pads 106 and / or the wires 116. Indeed, such dendrites and foreign bodies can render the chip 1 inoperative, in particular its light capture functions, when they are deposited on the pixel(s) of the chip 1. Although this has not been specified so far, in the embodiments and variant embodiments of the method described in relation to Figures 1 to 7, the masks used are, for example, optical masks or, in other words, plates of a material transparent to the exposure light provided with patterns in one or more materials opaque to these wavelengths, for example chrome patterns. During each exposure step through a mask, the mask may be placed above the exposed resin layer, or in contact with the latter. For example, at each exposure step, the exposure light is ultraviolet light. Of course, the person skilled in the art is able to design these masks and implement these exposure steps. Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art. Finally, the practical implementation of the embodiments and variants described is within the reach of the person skilled in the art from the functional indications given above. In particular, the person skilled in the art is able to choose the photosensitive resin of each of the layers 200, 400 and 602, as well as the corresponding masks and exposure conditions.
Claims
Claims
1. A method of manufacturing a package for a chip (1), the method comprising the following successive stages: a) providing a support (110) having an upper face (112) on which the chip (1) is mounted, the chip (1) comprising: - a lower face (102) facing the upper face (112) of the support (110), - at least one pixel (104) arranged on the side of an upper face (100) of the chip (1), in a central part of the upper face (100) of the chip (1), and - first electrical connection pads (106) arranged on the pe- ridge of the upper face (100) of the chip (1), b) forming, on the upper face of the support (110) and the periphery of the chip (1), a first photosensitive resin layer (200) comprising a first through opening (300) opening onto the part central part of the upper face (100) of the chip (1); c) forming a second layer of photosensitive resin (400) comprising a second through opening (500) having a portion central opening onto the first opening (300) and a peri- spherical opening onto the first layer of photosensitive resin (200); d) placing a transparent plate (600) in the second opening (500); and e) forming a third layer of photosensitive resin (602) comprising, opposite the central part of the upper face (100) of the chip (1), a third through opening (700) opening onto a central part of the transparent plate (600).
2. A method according to claim !, wherein, in steps b), c), d) and e), the first layer (200) covers the periphery of the chip (1).
3. A method according to claim | or 2, wherein, in step a), wires electrical connection (116) connect the first pads (106) to second electrical connection pads (113) of the support (110) arranged on the side of the upper face (112) of the support (110), and, at steps b), c), d) and e), the first layer (200) covers the wires of connection (116).
4. A method according to any one of claims 1 to 3, wherein the transparent plate (600) and the second opening (500) have di- dimensions substantially equal in a plane parallel to the upper face (112) of the support (110).
5. A method according to any one of claims 1 to 4, wherein, at step d), the periphery of the transparent plate (600) rests on and in contact with the first layer (200).
6. A method according to any one of claims 1 to 5, wherein, at step c), the second layer (400) is formed on and in contact with the first layer of resin (200).
7. A method according to any one of claims 1 to 6, wherein, at step e), the third layer (602) rests on and / in contact with a peripheral part of the transparent plate (600) around the third opening (700).
8. A method according to any one of claims 1 to 7, wherein step b) successively comprises: - deposit the first layer (200); and - form the first opening (300) by exposing the first layer (200) through a first mask configured so that only a portion of the first layer (200) arranged at the location of the first opening (300) receives light, and then removing the part of the first layer (200) having received light.
9. A method according to any one of claims 1 to 8, wherein step c) successively comprises: - depositing the second layer (400) on the first layer (200); and - form the second opening (500) by exposing the second layer (400) through a second mask configured so that only a portion of the second layer (400) arranged at the location of the second opening (500) receives light, and then removing the part of the second layer (500) having received light.
10. The method of claim 9, wherein the second layer (400) is deposited as a laminated film on the first layer (200).
11. | A method according to any one of claims 1 to 10, wherein step e) successively comprises: - deposit the third layer (602) on the second layer of resin (400) and on the transparent plate (600); - form the third opening (700) by exposing the third layer (602) through a third mask configured so that only a portion of the third layer (602) arranged at the location of the third opening (700) receives light, and then removing the part of the third layer (602) having received light.
12. Device comprising: - a support (110) having an upper face (112); - a chip (1) mounted on the upper face (112) of the support (110), the chip including: a lower face (102) facing the upper face (112) of the support (110), at least one pixel (104) arranged on the side of an upper face (100) of the chip (1) and in a central part of the upper face (100) of the chip (1), and first electrical connection pads (106) arranged at the periphery of the upper face (100) of the chip (1); - resin (200, 400, 602) covering the upper face (112) of the support (110) and the periphery of the chip (1) and comprising an opening (300) opposite the central part of the chip (1); and - a transparent plate (600) closing the opening (600), in which: a lower face of the transparent plate (600) is turned towards the chip (1) and has its periphery resting on and in contact with the resin (200) a portion (602) of the resin (200, 400, 602) rests on and in contact with the periphery of an upper face of the transparent plate (600); And the resin (200, 400, 602) prevents the plate from moving transparent (600) in a plane parallel to the upper face (112) of the support (110).
13. A device according to claim 12, wherein the device is without glue between the upper face (100) of the chip (1) and the face lower part of the transparent plate (600).