Optoelectronic system comprising a transducer and a waveguide

The optoelectronic system addresses the challenge of LED-waveguide coupling by using a semiconductor stack with a matching refractive index, improving light transmission efficiency for inter-chip communication.

FR3144325B1Active Publication Date: 2026-03-06COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
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Patent Information

Authority / Receiving Office
FR · FR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-12-22
Publication Date
2026-03-06

AI Technical Summary

Technical Problem

The challenge of efficiently coupling light-emitting diodes (LEDs), particularly micro-LEDs, with a waveguide in photonic systems for high-speed, low-power inter-chip communication is hindered by the LED's emission of optical modes in multiple directions, leading to reflection and loss of photons.

Method used

An optoelectronic system is designed with a semiconductor stack comprising a first porous layer, a second weakly doped layer, and an area with quantum wells, where the second layer extends to form part of both the transducer and the waveguide, ensuring a matching refractive index and minimizing photon loss through a common layer.

Benefits of technology

This configuration enhances the coupling between the transducer and waveguide, reducing photon reflection and loss, enabling efficient light transmission for high-speed, low-power inter-chip communication.

✦ Generated by Eureka AI based on patent content.

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Abstract

An optoelectronic system comprising at least one transducer and a waveguide. One aspect of the invention relates to an optoelectronic system (1) comprising a photoelectric transducer (11) configured to emit or receive optical waves and a waveguide (12) configured to guide the waves emitted by the transducer (11) or to guide the waves to the transducer (11), the optoelectronic system (1) comprising a stack comprising successively: - a first porous layer (111) of semiconductor material doped according to a first type of doping, - a second layer (112) of semiconductor material doped according to the first type of doping and weakly doped compared to the semiconductor material of the first layer (111), - a region (113) comprising quantum wells, - a third layer (116) of semiconductor material doped according to a second type of doping opposite to the first type,the photoelectric transducer (11) comprising a first portion (111a) of the first porous layer (111), a first portion (112a) of the second layer (112), at least a first portion (113a) of the area comprising the quantum well(s) and at least a first portion (116a) of the third layer (116); the waveguide (12) comprising a second portion (112b) of the second layer (112) adjacent to the first portion (112a) and disposed on a second portion (111b) of the first porous layer (111).
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Description

Title of the invention: Optoelectronic system comprising a transducer and a waveguide TECHNICAL FIELD OF THE INVENTION

[0001] The technical field of the invention is that of photonic systems for intra-chip and inter-chip communication.

[0002] The present invention relates to an optoelectronic system comprising a waveguide and a photoelectric transducer, methods of manufacturing the optoelectronic system and methods of integrating the optoelectronic system with a control circuit. TECHNOLOGICAL BACKGROUND OF THE INVENTION

[0003] In the field of inter-chip or intra-chip communication, the use of optical signals and in particular light to replace electrical signals makes it possible to overcome physical constraints related to the impedance and size of metallic interconnections, and thus to meet the need to transfer large amounts of data at very high speed.

[0004] The photonic systems or platforms developed for this purpose include a light source, generally of micrometric dimensions, electrically excited and capable of being efficiently coupled to a photonic waveguide, which conducts the light and, thus, carries the information.

[0005] In this context, light-emitting diode (LED) architectures, also called LED sources or micro-LED sources, have recently been used as light sources. Compared to laser sources, they have the advantage of being low-cost and consuming little power. It is also easier to reduce their size down to the micrometer scale.

[0006] LEDs, for example, enable visible light communication in free-field conditions. This is the principle of LiFi (Light Fidelity), a technology that allows high-speed data transmission in free fields by modulating the intensity of an LED lamp. Very recently, LEDs have also been used to emit modulated light in optical fibers for short-distance interconnections (for example, distances of 10 meters).

[0007] New applications are emerging, particularly for micro-LEDs, notably for high-speed, very low-power visible communications. Numerous academic and industrial projects are underway on the use of micro-LEDs at high frequencies (e.g., 0.1 to 5 GHz), both for transmission and reception.

[0008] The use of LED sources and in particular micro-LEDs however poses the problem of efficiently coupling the emitted light in a waveguide.

[0009] In order to achieve good coupling of an LED, for example a GaN LED, in a waveguide, it is necessary to maximize the coupling between the light generated in the LED and the waveguide. This coupling is difficult because the LED emits optical modes in multiple directions.

[0010] In particular, by coupling an LED to a waveguide, it is possible to achieve a very short-distance, low-power inter-chip link. Other technologies could be considered, such as silicon photonics, which can provide very high data exchange rates on the same waveguide.

[0011] However, unlike the high-speed serial links possible in silicon photonics, communication using micro-LEDs does not require serialization / deserialization, which is very costly in terms of power consumption (the speed of a high-speed serial link is on the order of 25-50 Gbit / s, unlike communications with micro-LEDs where the link speed is on the order of a few Gbit / s) and space, and often requires very advanced CMOS technology nodes, smaller than 30 nm, and external laser sources. Although InP laser sources can be bonded to a silicon substrate, this process is still complex and expensive, and reserved for certain high-end applications.

[0012] There is therefore a need to maximize the coupling between an LED, and in particular a micro-LED, and a waveguide. More generally, there is a need to maximize the coupling between a photoelectric transducer and a waveguide. Summary of the invention

[0013] The invention offers a solution to the problems mentioned above, by allowing the coupling between a photoelectric transducer (for example an LED) and a waveguide to be maximized.

[0014] A first aspect of the invention relates to an optoelectronic system comprising a photoelectric transducer configured to emit or receive optical waves and a waveguide configured to guide the waves emitted by the transducer or to guide the waves to the transducer,

[0015] said optoelectronic system comprising a stack successively comprising: • a first porous layer of semiconductor material doped according to a first type of doping, • a second layer of semiconductor material doped according to the first type of doping and weakly doped compared to the semiconductor material of the first layer, • an area comprising one or more quantum wells, • a third layer of semiconductor material doped according to a second type of doping opposite to the first type of doping, the photoelectric transducer comprising a first portion of the first porous layer, a first portion of the second layer, at least a first portion of the area comprising the quantum well(s) and at least a first portion of the third layer;

[0016] the waveguide comprising a second portion of the second layer adjacent to the first portion and disposed on a second portion of the first porous layer.

[0017] The coupling between the transducer and the waveguide is improved by the second layer, which is common to both. This common second layer ensures that the transducer and the waveguide have the same refractive index, thus reducing the number of reflected and lost photons. However, a waveguide only functions correctly if a refractive index contrast exists between two materials. To achieve this refractive index contrast, the first porous layer is created within the transducer and extends beneath the waveguide to create a refractive index contrast with the second layer, which forms at least part of the waveguide. Therefore, the optoelectronic system maximizes the coupling between the waveguide and the transducer through the common second layer and the first porous layer.

[0018] In addition to the characteristics mentioned in the preceding paragraph, the optoelectronic system according to the first aspect of the invention may have one or more additional characteristics from among the following, considered individually or in all technically possible combinations: • The first porous layer has a porosity level between 1% and 80%. The effective index of the first porous layer depends on the degree of porosity. Therefore, it is possible to adjust the index of the first layer according to the degree of porosity and to change the index contrast between the first and second layers. In particular, a stronger index contrast minimizes radiation losses in curves. • The waveguide also includes a second portion of the area containing the quantum well(s). Having a part of the waveguide aligned with the quantum wells of the transducer minimizes coupling losses between the transducer and the waveguide by maximizing modal overlap between the two parts. • the waveguide further includes a second portion of the third layer. the first type of doping is N doping and the second type of doping is P doping or the first type of doping is P doping and the second type of doping is N doping. The waveguide has a height and width between 200 nm and 300 nm. These heights and widths are suitable for achieving single-mode propagation in the visible range for the considered refractive indices. Single-mode propagation is not essential, but it is desirable for implementing passive or active photonic components, such as a power splitter or a grating coupler, and for propagating light through curved waveguides. the first layer, the second layer and the third layer are formed of the same semiconductor material, for example a III-V material, for example gallium nitride. The photoelectric transducer comprises a first electrode in electrical contact with the second layer and a second electrode in electrical contact with the third layer. Thus, the transducer differs from a waveguide primarily in that it includes electrodes. The first and second electrodes do not extend into the waveguide. The photoelectric transducer is of the light-emitting diode or photodiode type. The optoelectronic system includes a dielectric layer enclosing the photoelectric transducer and the waveguide. The optoelectronic system includes a mirror disposed on at least one peripheral surface of the photoelectric transducer. The addition of a mirror and / or a dielectric layer on at least one peripheral surface of the transducer minimizes losses to the substrate. The optoelectronic system includes a Bragg mirror arranged below the transducer and below the waveguide, said mirror comprising one or more porous layers of semiconductor material stacked alternately with one or more layers of non-porous semiconductor material. The Bragg mirror minimizes optical losses to the substrate without affecting the horizontal propagation of the waves. The optoelectronic system includes a second photoelectric transducer, the first and second transducers being arranged on either side of the waveguide, and the second photoelectric transducer comprises: • a third portion of the first porous layer, • a third portion of the second layer, • a third portion of the area including the well(s) quantum, • a third portion of the third layer. • The second photoelectric transducer is of the light-emitting diode or photodiode type and is distinct from the photoelectric transducer.

[0019] A second aspect of the invention relates to a method for manufacturing the optoelectronic system according to the first aspect of the invention, the method comprising: • The formation of a stack by successively growing, by epitaxy, on a substrate, a layer of semiconductor material doped according to the first type of doping, the second layer of semiconductor material containing the region comprising the quantum well(s), and the third layer of semiconductor material, • The porosification of the doped semiconductor material layer according to the first type of doping, to obtain the first porous semiconductor layer, • Partial etching of at least the third layer of semiconductor material, to define the waveguide, and obtain a first unetched pattern area, • Partial etching of the stack up to the second layer of semiconductor material, so as to laterally delimit the transducer in the first pattern area,

[0020] In addition to the characteristics mentioned in the preceding paragraph, the method according to the second aspect of the invention may have one or more additional characteristics from among the following, considered individually or in all technically possible combinations: • the partial etching step of at least the third layer of semiconductor material is carried out in such a way as to further delimit a second unetched pattern zone, the first and second pattern zones being arranged on either side of the waveguide, • the partial etching step of the stack up to the second layer of semiconductor material is carried out in such a way as to further delimit laterally the second transducer in the second pattern area. • The process according to the second aspect of the invention comprises the formation: • of a first electrode in electrical contact with the first portion of the third layer, • a second electrode in electrical contact with the first portion of the second layer, • a third electrode in electrical contact with the third portion of the third layer, and preferably, • of a fourth electrode in electrical contact with the third portion of the second layer.

[0021] A third aspect of the invention relates to a method for manufacturing the optoelectronic system according to the first aspect of the invention, the method comprising: • The formation of a stack by successively growing, by epitaxy, on a substrate, a layer of semiconductor material doped according to the first type of doping and a second layer of semiconductor material doped according to the first type of doping and weakly doped compared to the first layer, • Partial etching of the second layer of semiconductor material, so as to obtain an island, • The porosification of the layer in semiconductor material doped according to the first type of doping, to obtain the first layer of porous semiconductor material, • the formation, by selective epitaxy, of the zone containing the quantum well(s) on a first region of the island, • the formation by selective epitaxy of the third layer of semiconductor material on the area including the quantum well(s) in the first region, so as to form the transducer in the first region, • According to one embodiment: • the selective epitaxial formation step of the zone containing the quantum well(s) is performed simultaneously on a second region of the island, distinct from the first region, • The selective epitaxial formation step of the third layer of semiconductor material is carried out simultaneously in the second region of the island so as to form the second transducer in the second region of the island, • The process according to the third aspect of the invention comprises the formation: • of a first electrode in electrical contact with the first portion of the third layer and belonging to the transducer, • a second electrode in electrical contact with the second layer, the second electrode preferably being common to the transducer and the second transducer; • of a third electrode in contact with the third portion of the third layer and belonging to the second transducer.

[0022] A fourth aspect of the invention relates to a method for integrating a system optoelectronic according to the first aspect of the invention with an integrated control circuit, the method comprising: • the formation of a stack by successively growing, by epitaxy, on a substrate, a layer of semiconductor material doped according to the first type of doping, the second layer, the area including the quantum well(s), and the third layer of semiconductor material, • the porosification of the doped semiconductor material layer according to the first type of doping, to obtain the first porous semiconductor material layer, • the partial etching of at least the third layer, to delimit the waveguide, and to obtain a first pattern zone and a second pattern zone, the first pattern zone and the second pattern zone being arranged on either side of the waveguide, • the deposition of a dielectric layer on the waveguide; • the deposition of a first metallic layer on the dielectric layer and the third layer in the first pattern area and the second pattern area, • the deposition of a second metallic layer on a first face of a receiving substrate, the receiving substrate including the control circuit, • the bonding of the first metallic layer and the second metallic layer, • the removal of the substrate, • the partial engraving of the first pattern area to delimit the transducer and of the second pattern area to delimit the second transducer, • Training: • of a first electrode on the first portion of the second layer, • a second electrode on the third portion of the second layer, • a third metallic layer on a second opposite face of the receiving substrate, the third metallic layer being connected to the second metallic layer forming a third electrode common to the transducer and the second transducer.

[0023] A fifth aspect of the invention relates to a method for integrating an optoelectronic system according to the first aspect of the invention with a control circuit, the method comprising: • the manufacturing of the optoelectronic system according to the first aspect of the invention, by carrying out the steps of the manufacturing process according to the second or third aspect of the invention; • the formation on the stack of a hybrid bonding level comprising a first electrode in electrical contact with the first portion of the third layer, the first electrode belonging to the transducer, and a second electrode in electrical contact with the third portion of the third layer, the second electrode belonging to the second transducer, the first and second electrodes being surrounded by a dielectric layer, so as to obtain a flat surface with the first and second electrodes; • the hybrid bonding of the stack with a receiving substrate comprising the control circuit, the control circuit having a plurality of connecting pads surrounded by a dielectric layer, such that the first electrode and the second electrode are bonded to the connecting pads of the control circuit, and such that the dielectric layer of the stack is bonded to the dielectric layer of the control circuit, • the removal of the substrate, • Partial engraving: • Within the transducer: from the first portion of the first porous layer to the second layer, to obtain a first aperture, • Within the second transducer: from the third portion of the first porous layer to the second layer, to obtain a second opening; • The formation of a third electrode in the first and second openings, the third electrode being common to the transducer and the second transducer, and connection of the third electrode to one of the connection pads of the control circuit.

[0024] The invention and its various applications will be better understood by reading the following description and examining the accompanying figures. BRIEF DESCRIPTION OF THE FIGURES

[0025] The figures are presented for illustrative purposes only and are in no way limiting of the invention.

[0026] [Fig. 1] is a cross-sectional view of an embodiment of an optoelectronic system according to a first aspect of the invention,

[0027] Figures [Fig.2] and [Fig.3] represent variants of the embodiment of [Fig.1].

[0028] [Fig.4] is a top view of the variant of [Fig.3],

[0029] Figures [Fig. 5], [Fig. 6], [Fig. 7] and [Fig. 8] represent other variants of the rea- lisation of the [Fig.1],

[0030] Figure 9 is a top view of one embodiment of the optoelectronic system,

[0031] Figs.10a, 10b, 10c, 10d and 10e are steps in a manufacturing process of the optoelectronic system according to a second aspect of the invention.

[0032] Fig. 11a, Fig. 11b, Fig. 11c, Fig. 11d, Fig. 11e and Fig. 11f are steps in a manufacturing process of the optoelectronic system according to a third aspect of the invention.

[0033] Figs. 12a, 12b, 12c, 12d, 12e, 12f, 12g, 12h, 12i and 12j are steps in a method of integrating the optoelectronic system according to a fourth aspect of the invention.

[0034] Figs. 13a, 13b, 13c, 13d and 13e are steps in a process for integrating the optoelectronic system according to a fifth aspect of the invention. DETAILED DESCRIPTION

[0035] The figures are presented by way of illustration and in no way limit the invention.

[0036] A first aspect of the invention relates to an optoelectronic system.

[0037] Fig. 1 shows a schematic cross-sectional representation of a first embodiment of the optoelectronic system 1. The optoelectronic system 1 comprises a photoelectric transducer 11, configured to emit or receive optical waves, and a waveguide 12 configured to guide the waves emitted by the transducer 11 or to guide the received waves to the transducer 11. The transducer 11 is, for example, a light-emitting diode or a photodiode.

[0038] The optoelectronic system 1 preferably comprises, on a substrate 14, a stacking, successively including: a first porous layer 111 of semiconductor material doped according to a first type of doping, a second layer 112 of semiconductor material doped according to the first type of doping and weakly doped compared to the semiconductor material of the first layer 111, a region 113 comprising one or more quantum wells, and a third layer 116 of semiconductor material doped according to a second type of doping. The second layer 112 of semiconductor material is, however, sufficiently doped to allow a PN junction to be formed.

[0039] The semiconductor material is, for example, an IILV semiconductor material or an ILVI semiconductor material.

[0040] A IILV semiconductor material is formed, for example, from a binary alloy such as boron nitride (BN), boron phosphide (BP), boron arsenide (BAs), aluminum nitride (AIN), aluminum phosphide (A1P), aluminum arsenide (AlAs), aluminum antimonide (AlSb), gallium phosphide (GaP), gallium arsenide (GaAs), gallium antimonide (GaSb), indium nitride (InN), indium phosphide (InP), indium arsenide (InAs), indium antimonide (InSb), or preferably gallium nitride (GaN). A III-V material can also be a semiconductor material formed from a ternary alloy such as gallium-indium nitride (InGaN), aluminum-gallium nitride (AlGaN), gallium-indium phosphide (InGaP), etc.

[0041] A II-VI semiconductor material is, for example, formed from cadmium telluride (CdTe) or cadmium sulfide (CdS). Advantageously, CdTe and CdSe are efficient light-emitting semiconductors.

[0042] More generally, the semiconductor material forming each layer of the optoelectronic system 1 is capable of emitting light.

[0043] The substrate 14 may include a support layer, also called a growth support, for example made of silicon or sapphire, and a buffer layer made for example of gallium nitride and disposed on the support layer.

[0044] The first type of doping (or conductivity type) is the opposite of the second type of doping. For example, the first type of doping is N-type doping and the second type of doping is P-type doping. Alternatively, the first type of doping is P-type doping and the second type of doping is N-type doping.

[0045] The photoelectric transducer 11 comprises a first portion 11a of the first porous layer 111, a first portion 112a of the second layer 112, a first portion 113a of the area 113 comprising the quantum well(s) and a first portion 116a of the third layer 116.

[0046] The waveguide 12 comprises a second portion 112b of the second layer 112 is adjacent to the first portion 112a and is arranged on a second portion 111b of the first porous layer 111. In other words, the second layer 112 extends beyond the transducer 11 to form at least part of the waveguide 12. Furthermore, the first layer 111 extends beyond the transducer 11 and is arranged beneath the waveguide 12. In particular, the second portion 112b of the second layer 112 forms the core of the waveguide 12.

[0047] The first layer 111, the second layer 112 and the third layer 116 are advantageously formed of the same semiconductor material, for example gallium nitride (GaN). The same semiconductor material facilitates the fabrication of the optoelectronic system 1.

[0048] According to a preferred embodiment, the third layer 116 is formed of P-doped GaN, the region 113 comprises one or more InGaN / (GaN) quantum wells (emitting (in the red, green, or blue regions, for example), the second layer 112 is formed from N-doped GaN and the first layer 111 is formed from heavily N-doped GaN.

[0049] The semiconductor material of the first layer 111 is heavily doped compared to the semiconductor material of the second layer 112. In other words, the concentration of doping impurities in the first layer 111 is, for example, greater than or equal to 5 times the concentration of doping impurities in the second layer 112. For example, the concentration of doping impurities in the first layer is on the order of 5 x 10¹⁸ atoms / cm³ and the concentration of doping impurities in the second layer 112 is on the order of 10¹⁹ atoms / cm³.

[0050] The coupling between the transducer 11 and the waveguide is improved by the fact that the second layer extends continuously in the transducer 11 and in the waveguide 12. Indeed, the second layer 112 allows the transducer 11 and the waveguide 12 to have the same refractive index. If the refractive index of the transducer 11 is different from the refractive index of the waveguide 12, light waves can be injected into the guide by the transducer, but a greater number of photons will be reflected (depending on the angles of incidence) and will therefore be lost.

[0051] However, a waveguide only fulfills its functions if a refractive index contrast is possible between two materials. This refractive index contrast is obtained here between the first porous layer 111 and the second layer 112.

[0052] Let nm be the refractive index of the semiconductor material forming the first porous layer 111 and nair the refractive index of air. The refractive index of the first porous layer 111 is equal to neff = [(1-<p)nm2 + q> nair2] 1 / 2, with q> the porosity rate of the first porous layer 111.

[0053] In particular, q> is between 1% and 80%, for example between 20% and 80%, and in particular between 40% and 80% or between 20% and 70%. In particular, q> is preferably equal to 20%. A porosity ratio of 20% makes it possible, for example, to obtain the waveguide 12 with a refractive index contrast of 3 between the first porous layer 111 and the second layer 112.

[0054] The largest dimension (the height) of the pores of the first layer 111 can vary from a few nanometers to a few micrometers. The smallest dimension (the diameter) can vary from a few nanometers to a hundred nanometers, in particular from 10 nm to 70 nm, for example from 30 nm to 70 nm, and preferably from 15 nm to 40 nm.

[0055] In the embodiment of [Fig. 1], the height h of the waveguide 112 is equal to the thickness of the second layer, preferably between 200nm and 350nm.

[0056] The transducer 11 further comprises a first electrode 117, in electrical contact with the first portion 116a of the third layer 116, and a second electrode (not shown in [Fig. 1]), in electrical contact with the first portion 112a of the second layer 112.

[0057] The first electrode 117 is preferably disposed on the first portion 116a of the third layer 116 and in direct contact with it. It can cover the entire upper surface of the first portion 116a of the third layer 116, since vertical emission / reception of light is not desired.

[0058] Unlike the second layer 112, the first and second electrodes do not extend into the waveguide 12. The waveguide 12 is electrode-free.

[0059] [Fig.2] represents a variant of the embodiment of [Fig.1].

[0060] The waveguide 12 further includes a second portion 113b of the zone 113 comprising the quantum well(s) and a second portion 116b of the third layer 116. The second portion 116b of the third layer 116 can be thinned, i.e. have a thickness less than that of the first portion 116a of the third layer 116.

[0061] Thus, the area 113 comprising the quantum well(s) extends beyond the transducer 11 to form part of the waveguide 12 and the third layer 116 extends beyond the transducer 11 to also form part of the waveguide 12.

[0062] This has the effect of further improving the coupling between the transducer 11 and the waveguide 12, because the modal overlap between the guide and transducer part is improved.

[0063] The quantum wells in the waveguide absorb only a negligible portion of the light, thanks to the Stokes shift (which describes the wavelength difference between the absorption peak and the emission peak (the absorption wavelength is smaller than the emission wavelength)). By reducing the size of the waveguide 12 in height and width (to achieve single-mode propagation), the mechanical stresses and the internal electric field are reduced, which increases the Stokes shift. The height is defined along the y-axis, and the width along the z-axis.

[0064] In this embodiment, the height h of the waveguide is preferably between 200 nm and 300 nm.

[0065] According to a variant of [Fig.1] not shown, the waveguide comprises, in addition to the second portion 112b of the second layer 112, only the second portion 113b of the area 113 comprising the quantum well(s).

[0066] Common to all modes and variants of embodiments, the optoelectronic system 1 may include a second photoelectric transducer 13, configured to emit or receive optical waves, the waveguide 12 also being configured to guide the waves emitted by the second transducer 13 or to guide the waves to the second transducer 13. The second transducer 13 is, for example, a light-emitting diode or a photodiode.

[0067] Preferably, the second transducer 13 is of a different type than the transducer 11. By type, we mean the transmitting or receiving nature of the transducer, i.e., light-emitting diode or photodiode. Thus, one of the transducers 11 and 13 is in transmitting mode (LED) and the other of the transducers 11 and 13 is in receiving mode (photodiode).

[0068] The second transducer 13 includes a third portion 11 of the first porous layer 111, that is to say that the first porous layer 111 extends beyond the first transducer 11 and the waveguide 12 to form part of the second transducer 13.

[0069] The second transducer further includes a third portion 112c of the second layer 112, that is to say that the second layer 112 extends beyond the first transducer 11 and the waveguide 12 to form part of the second transducer 13.

[0070] The second transducer 13 includes a third portion 113c of the area 113 comprising the quantum well(s) and a third portion 116c of the third layer 116.

[0071] In the embodiment of [Fig. 1], the third portion 113c of zone 113 is distinct (i.e., separate) from the first portion 113a of zone 113 and the third portion 112c of the second layer 112 is distinct from the first portion 112a of the second layer 112. Conversely, in the variant of [Fig. 2], the second portion 113b of zone 113 is adjacent to the first and third portions 113a and 113c of zone 113 and the second portion 112b of the second layer 112 is adjacent to the first and third portions 112a and 112c of the second layer 112.

[0072] The second transducer 13 further includes a third electrode 137 in electrical contact with the third portion 116c of the third layer 116. The third electrode 137 is preferably disposed on the third portion 116c of the third layer 116 and in direct contact with it.

[0073] In the absence of the second transducer 13, the transducer 11 can include the whole of the zone 113 and the whole of the third layer 116.

[0074] The optoelectronic system 1 may further include a dielectric layer 121 enclosing the transducer 11, the waveguide 12 and, where applicable, the second transducer 13. The dielectric layer 121 preferably forms a flat surface with the electrodes 117, 137 of the transducer 11 and the second transducer 13. The dielectric layer 121 is for example formed of aluminium oxide (or alumina, Al2O3).

[0075] According to an embodiment shown in [Fig. 3], the optoelectronic system 1 It comprises a first mirror, or reflective structure 128a, located on one or more peripheral surfaces of the transducer 11 and, where applicable, a second mirror 128c located on one or more peripheral surfaces of the second transducer 13. Preferably, the first and second mirrors 128a-128c are each formed of a metallic layer. The two metallic layers are preferably formed of the same metal, for example, aluminum.

[0076] Fig. 4 is a top view of the optoelectronic system 1 according to Fig. 3. This figure shows the dielectric layer 121 surrounding the transducer 11, the waveguide 12 and the second transducer 13, the first mirror 128a arranged on several lateral faces of the transducer 11 and separated from them by the dielectric layer 121, and the second mirror 128c arranged on several lateral faces of the second transducer 13 and separated from them by the dielectric layer 121.

[0077] The arrangement of the dielectric layer 121, the first mirror 128a and, where applicable, the second mirror 128c promotes the coupling of light from the transducers in the waveguide (in the case of an LED-type transducer) and / or the reception of light by the other transducer (in the case of a photodiode-type transducer) by reducing light ray losses.

[0078] Still with reference to [Fig.4], the width L (defined along the z-axis) of the waveguide 12 (without the dielectric layer 121) is preferably less than the width of the transducer 11 (and the width of the second transducer 13), for example between 200 nm and 300 nm.

[0079] In an alternative embodiment shown in [Fig. 5], the first mirror 128a is parabolic in shape with axis y. The transducer 11 (comprising the stack of layers) conforms to the shape of the first mirror 128a and therefore also has a parabolic first lateral surface. The first electrode 117 of the transducer 11 is located vertically above at least some of the foci F of the first mirror 128a. In particular, the first mirror 128a is a truncated right cylinder, with axis and generatrices perpendicular to the plane (X, Z) of the substrate 14, and having as its directrix a parabola with axis XOi parallel to the plane of the substrate 10 and having as its focus the point F located on the axis XOi, the right cylinder being truncated by a plane parallel to the generatrices and passing through the focus F. The first mirror 128a is thus delimited by a cylindrical surface comprising a parabolic lateral surface 128a' and a flat lateral surface 128a".

[0080] The dielectric layer 121 which coats the waveguide 12 covers at least one second lateral surface opposite the first mirror 128a. It can also extend, as described above, between the transducer 11 and the first mirror 128a, as described above in relation to [Fig.4].

[0082] Thus, when the transducer 11 is an LED, the waves emitted by the transducer 11 and received by the first mirror 128a are concentrated in the waveguide 12. Conversely, when the transducer 11 is a photodiode, the waves coming from the waveguide 12 and received by the first mirror 128a are concentrated in the transducer 11.

[0083] Figure 6 is an alternative embodiment of the optoelectronic system 1 in which the substrate 14 comprises a Bragg mirror 141, preferably in direct contact with the first porous layer 111. In particular, the Bragg mirror 141 (also called the porous mirror) comprises one or more porous layers 1411 of semiconductor material stacked alternately with one or more non-porous layers 1412 of semiconductor material. When the transducer 11 is a light-emitting diode, the Bragg mirror 141 minimizes losses to the substrate 14 without affecting the propagation of light in the waveguide 12.

[0084] Figure 7 is an alternative embodiment of the optoelectronic system 1 in which the optoelectronic system 1 comprises a third transducer 14 and in which the waveguide 12 comprises a first portion 12a and a second portion 12b arranged on either side of the third transducer 14. In particular, the third transducer 14 comprises a fourth portion 11d of the first layer 111, a fourth portion 112d of the second layer 112, a fourth portion 113d of the region 113 comprising the quantum well(s), and a fourth portion 116d of the third layer 116. Furthermore, the third transducer 14 comprises an electrode 147 arranged on the fourth portion 116d of the third layer 116. The electrode 147 of the third transducer 14 does not extend beyond the third transducer 14.

[0085] The third transducer 14 is preferably a light-emitting diode, located on the optical path of the waves guided by the waveguide 12. Its role is to change the propagation index of the waves or to modulate the power of said waves (modulator function), by applying a bias which allows the light propagating in the waveguide 12 and passing through the third transducer 14 to be absorbed.

[0086] Fig. 8 shows a possible arrangement of the electrodes of the optoelectronic system 1, compatible with all the embodiments described above.

[0087] In addition to the first electrode 117 disposed on the first portion 116a of the third layer 116, the transducer 11 includes a second electrode 118 disposed on a first recessed portion 112e of the second layer 112. The first recessed portion 112e is adjacent to the first portion 112a.

[0088] Furthermore, in addition to the third electrode 137 disposed on the third portion 116c of the third layer 116, the second transducer 13 may include a fourth electrode 138 disposed on a second recessed portion 112f of the second layer 112. The second recessed portion 112f is adjacent to the third portion 112c.

[0089] The fourth electrode 138 is not mandatory, since the electrical contact with the second layer 112 is already ensured by the second electrode 118 and the second layer 112 extends continuously to the second transducer 13. However, it improves the current distribution in the second transducer (this is also referred to as electrical injection in the case of an LED).

[0090] The first and second recessed portions 112e-112f of the second layer 112 are preferably formed by partial etching of the second layer 112.

[0091] Preferably, none of the electrodes extends beyond the transducer 11 or beyond the second transducer 13 in the waveguide 12.

[0092] When the second layer 112 is N-doped and the third layer 116 is P-doped, the first electrode 117 is the anode of the transducer 11, the second electrode 118 is the cathode of the transducer 11, the third electrode 137 is the cathode of the second transducer 13 and the fourth electrode 138 is the anode of the second transducer 13.

[0093] According to another arrangement, the second electrode 118 and / or the fourth electrode 138 is arranged in contact with an underside of the second layer 112 and consequently extends through the first porous layer 111.

[0094] Figure 9 shows a top view of another embodiment of the optoelectronic system 1 in which a second waveguide 12' is coupled to the first waveguide 12, preferably by evanescent coupling. The second waveguide is preferably made of SiN, AIN, or Al₂O₃ and allows, for example, the propagation of light waves emitted by the transducer 11 and propagating in the waveguide 12. The second waveguide 12', which extends, for example, perpendicularly to the first waveguide 12, propagates the waves with less loss than the first waveguide 12. The evanescent coupling results in few losses.

[0095] A second aspect of the invention relates to a method 100 for manufacturing the optoelectronic system 1 according to the first aspect of the invention.

[0096] A first step 101 of the process 100, represented in [Fig.10a], is a stacking formation step, by successively growing by epitaxy on the substrate 14 a layer 111' of semiconductor material heavily doped according to the first type of doping, the second layer 112 of semiconductor material, the area 113 comprising the quantum well(s), and the third layer 116 of semiconductor material.

[0097] A second step 102 of the process 100, shown in [Fig. 10b], is a porosification step of the layer 111' to obtain the first porous layer 111. The porosification is, for example, accomplished by an electrochemical process: the layer 111' is immersed in a solution and a potential difference is applied between the layer 111' and the solution, resulting in the formation of pores in layer 111'. During porosification, the heavily doped layer 111' acts as the anode, and a platinum wire can act as the cathode. This porosification, known as electrochemical porosification, is carried out, for example, in a 0.2M oxalic acid solution by applying a voltage of 15V for 30 minutes.

[0098] A third step 103 of the process 100, shown in [Fig. 10c], is a step of partial etching of at least the third layer 116, to delimit the waveguide 12, and obtain a first area of ​​unetched patterns Ml.

[0099] The third layer 116 can preferably be etched through its entire thickness, thus extending to the area 113 comprising the quantum well(s), to form the first portion 116a and the third portion 116c of the third layer 116, layer 116c not being formed in this case. This preferred embodiment allows for the electrical isolation of the first area of ​​motifs M1 and the second area of ​​motifs M2 up to the small quantum well. In particular, the thickness of the area 13 comprising one or more quantum wells is equal to or substantially equal to 100 nm.

[0100] The third layer 116 can also be engraved over only part of its thickness, to form the first portion 116a, the second portion 116b and the third portion 116c.

[0101] The area 113 comprising the quantum well(s) can also be etched, following the third layer 116 (depending on the desired composition of the waveguide 12).

[0102] As shown in [Fig.10d], the partial etching step of at least the third layer 116 can further delimit a second unetched pattern zone M2, the first and second pattern zones M1, M2 being arranged on either side of the waveguide 12.

[0103] At the end of step 103, the first portion 116a and the third portion 116c of the third layer 116 are obtained.

[0104] A fourth step 104 of the process 100 is a partial etching step 104 of the stack up to the second layer 112, so as to laterally delimit the transducer 11 in the first area of ​​ML patterns. Preferably, the first recessed portion 112e of the second layer 112 is formed simultaneously.

[0105] When the pattern area M2 has been delimited in the third step 103, the stack etching carried out in the fourth step 104 can further delimit, laterally, the second transducer 13 in the second pattern area M2. The second recessed portion 112f of the second layer 112 is preferably formed simultaneously.

[0106] A fifth step 105 of the process, shown in [Fig. 10e], is a step of forming the first electrode 117 and the second electrode 118 of the transducer 11. The third electrode 137 and the fourth electrode 138 of the second transducer 13 can also be formed during this fifth step 105. Electrodes 117-118, 137-138 are as described with reference to [Fig.8].

[0107] The second step 102 of porosification of the layer 111' of heavily doped semiconductor material can be carried out before or after the third 103 and fourth 104 steps of the process 100. The porosification can also be accomplished immediately after the growth of the layer 111' of heavily doped semiconductor material, before the growth of the other layers of the stack.

[0108] A third aspect of the invention relates to a method 200 for manufacturing the optoelectronic system 1 according to the first aspect of the invention.

[0109] A first step 201 of the process 200, represented in [Fig.1a], is a step of forming a stack, on the substrate 14, by successively growing by epitaxy a layer 111' of semiconductor material doped according to the first type of doping and the second layer 112 of semiconductor material doped according to the first type of doping and weakly doped compared to the first layer 111.

[0110] A second step 202 of the process 200, shown in [Fig. 11b], is a partial etching step of the second layer 112, so as to obtain an island (also called a "mesa"). The etching serves in particular to define the mark which will be used to form an electrode, but also to form the mesa which passes through the layer 111' in order to be able to porosify it subsequently; otherwise the electrolyte enabling the porosification does not have access to the layer 111'.

[0111] A third step 203 of the process 200, shown in [Fig. 11e], is a porosification step of the conductive material layer 111' doped according to the first type of doping to obtain the first porous layer 111. In particular, the third step 203 of the process is carried out identically to the second porosification step 102 of the process 100 according to the second aspect of the invention.

[0112] A fourth step 204 of the process 200, shown in [Fig. 1 Id], is a selective epitaxial formation step of the zone 113 comprising the quantum well(s) on a first RI region of the island. In particular, the fourth step 204 enables the formation of the first portion 113a of the zone 113.

[0113] According to one embodiment, the fourth step 204 is carried out simultaneously on a second region R2 of the block, distinct from the first region RL. The third portion 113c of the zone 113 is thus formed.

[0114] In particular, the RI region and the R2 region were delimited by a hard mask to allow growth by selective epitaxy of the first portion 113a and the third portion 113c of zone 113.

[0115] A fifth step 205 of the process 200, shown in [Fig. 11], is a step of forming the third layer 116 of semiconductor material on the area 113 comprising the quantum well(s) in the first RI region, so as to form transducer 11 in the first RI region. In particular, the fifth step 205 allows the formation of the first portion 116a of the third layer 116.

[0116] According to one embodiment, the fifth step 205 of selective epitaxial formation of the third layer 116 of semiconductor material is carried out simultaneously in the second region R2 of the island so as to form the third portion 116c of the third layer 116 and thus form the second transducer 13 in the second region R2 of the island.

[0117] A sixth step 206 of the process 206, shown in [Fig.1 If], is a step of forming a first electrode 117 on the first portion 116a of the third layer 116, a second electrode 118 on a recessed portion of the second layer 112 (outside the island) and a third electrode 137 on the third portion 116c of the third layer 116.

[0118] The first electrode 117 is in electrical contact with the first portion 116a of the third layer 116 and thus belongs to the transducer 11, while the third electrode 137' is in electrical contact with the third portion 116c of the third layer 116 and thus belongs to the second transducer 13.

[0119] The second electrode 118 is here common to the transducer 11 and the second transducer 13. Alternatively, the process 200 can include, in the sixth step 206, the formation of a fourth electrode 138 in electrical contact with the second layer 112, on a second portion set back from the second layer 112 (outside the island).

[0120] A fourth aspect of the invention relates to a method 400 for integrating an optoelectronic system 1 according to the first aspect of the invention with a transducer control circuit (LEDs and photodiodes). The control circuit is, for example, of the ASIC type (acronym for "application-specific integrated circuit").

[0121] The first three steps 301 to 303 of process 300, represented by [Fig. 12a], [Fig. 12a] and [Fig. 12c] are identical to steps 101 to 103 of process 100 (Figs. 10a-10c).

[0122] A fourth step 304 of the process 300, shown in [Fig. 12d], is a step of depositing a dielectric layer 121' on the waveguide 12.

[0123] A fifth step 305 of the process 300, shown in [Fig. 12e], is a step of depositing a first metallic layer 3 onto the dielectric layer 121' and the third layer 116 in the first pattern zone M1 and the second pattern zone M2. The first metallic layer 3 thus forms a first electrode (anode or cathode depending on the type of doping of the third layer 116) common between the transducer 11 and the second transducer 13.

[0124] The first metallic layer 3 may include a first sub-layer called A barrier layer of TaN, TiN, WN, TiW, or a combination of one or more of these materials, and a second sublayer, called the bonding layer, of Ti, Ni, Pt, Sn, Au, Ag, Al, Pd, W, Pb, Cu, AuSn, TiSn, NiSn, or an alloy of all or part of these materials. The barrier sublayer is deposited on the dielectric layer 121' and the third layer 116, and the bonding sublayer is deposited on the barrier sublayer.

[0125] A sixth step 306 of the process 300, shown in [Fig. 12f], is a step of depositing a second metallic layer 4 on a first face of a receiving substrate 5, the receiving substrate 5 comprising a control circuit 51. The control circuit 51 may in particular comprise a plurality of connection pads (not shown) electrically connected to the second metallic layer 4.

[0126] By way of example, the receiving substrate 5 is said to be "active", that is to say that the substrate 5 includes active electronic components such as transistors. The substrate 5 is for example of the CMOS type (from the English "Complementary Metal-Oxide-Semiconductor") or of the TFT type (from the English "Thin-Film Transistor").

[0127] Like the first metallic layer 3, the second metallic layer 4 may include a barrier underlayer of TaN, TiN, WN, TiW, or a combination of one or more of these materials and a bonding underlayer of Ti, Ni, Pt, Sn, Au, Ag, Al, Pd, W, Pb, Cu, AuSn, TiSn, NiSn or an alloy of all or part of these materials.

[0128] A seventh step 307 of the process 300, shown in [Fig.12g], is a step of bonding the first metal layer 3 and the second metal layer 4, so that the third layer 116 of the stack is electrically connected to the control circuit 51. Metal-to-metal bonding makes it possible to avoid a precise alignment step between the connection pads of the control circuit 51 and the transducers 11,13 during the assembly step of the optoelectronic system 1 with the control circuit 51, this alignment step being generally difficult to carry out, especially for transducers whose dimensions are less than 1 pm.

[0129] The bonding is for example molecular bonding, thermocompression bonding, eutectic bonding, or any other suitable method of fixation.

[0130] An eighth step 308 of the process 300, shown in [Fig.12h], is a removal step 308 of the substrate 14, the removal being carried out by etching or chemical-mechanical polishing (CMP) for example.

[0131] A ninth step 309 of the process 300, shown in [Fig. 12i], is a partial etching step of the first pattern zone M1 so as to laterally delimit the transducer 11 and of the second pattern zone M2 so as to laterally delimit the second transducer 12. Completion of the ninth etching step 309 after the seventh bonding step 307 makes it possible to define an electrode common for transducer 11 and second transducer 13, said common electrode being formed of the first metallic layer 3 and the second metallic layer 4, the individual driving of each of the transducers between transducer 11 and second transducer 13 being carried out by electrode 118' for transducer 11 and electrode 138' for second transducer 13.

[0132] A tenth step 310 of the process 300, shown in [Fig.12j], is a step of forming a second electrode 118' and a third electrode 138' in electrical contact with the third layer 116 and a third metallic layer 6 on a second opposite face of the receiving substrate 5.

[0133] The first electrode 118' extends through the first portion 11 of the first porous layer 111 and belongs to the transducer 11.

[0134] The second electrode 138' extends through the third portion 11 of the first porous layer 111 and belongs to the second transducer 13.

[0135] The third metallic layer 6 is electrically connected to the second metallic layer 4 by one or more vias through the receiving substrate 5.

[0136] A fifth aspect of the invention relates to a method 400 for integrating the optoelectronic system 1 according to the first aspect of the invention with a control circuit.

[0137] The process 400 for integrating the optoelectronic system 1 begins with the fabrication of the optoelectronic system 1 comprising the transducer 11, the waveguide 12 and the second transducer 13. To do this, steps 101 to 104 of the manufacturing process 100 or steps 201 to 205 of the manufacturing process 200 are advantageously carried out.

[0138] With reference to [Fig. 13a], the process 400 then includes a step 401 of forming a hybrid (metal-dielectric) bonding level on the stack, and more particularly the waveguide 12 and the third layer 116. The hybrid bonding level includes a first electrode 117” in electrical contact with the first portion 116a of the third layer 116 and a second electrode 137” in contact with the third portion 116c of the third layer 116.

[0139] The hybrid bonding level also includes a dielectric layer 121 surrounding the first electrode 117” and the second electrode 137”. The dielectric layer 121 forms a flat surface with the upper face of the first and second electrodes 117”, 137”.

[0140] With reference to [Fig. 13b], the process 400 then includes a step 402 of hybrid bonding of the stack with a receiving substrate 5 comprising the control circuit 51.

[0141] In particular, the receiving substrate 5 comprises a plurality of connection pads 511 surrounded by a dielectric layer 512. The first electrode 117” and the second electrode 137” are brought into contact and bonded with the connection pads 511 of the control circuit, and the dielectric layer 121 of the stack is disposed in contact and bonded to the dielectric layer 512 covering the receiving substrate 5.

[0142] With reference to [Fig. 13c], the process 400 then includes a step 403 of removing the substrate 14, by etching or CMP for example.

[0143] With reference to [Fig. 13d], the process 400 then includes a step 404 of partial etching of the first porous layer 111, so as to obtain a first opening which leads to the first portion 112a of the second layer 112 (therefore in the transducer 11) and a second opening which leads to the third portion 112c of the second layer 112 (therefore in the second transducer 13).

[0144] Finally, [Fig. 13e] represents a step 405 of formation of a third electrode 138” in the first and second openings and on the first porous layer 111, preferably by deposition of a metal, the electrode 138” thus being common to the transducer 11 and the second transducer 13.

[0145] The third electrode 138” is advantageously connected to a metal pad 511 of the control circuit 51. This connection is advantageously made by forming a third opening which extends through the first porous layer 111 and the dielectric layer 121 enveloping the transducer 11, the waveguide 12 and the second transducer 13, and then filling this third opening with the metal.

Claims

Demands

1. An optoelectronic system (1) comprising a photoelectric transducer (11) configured to emit or receive optical waves and a waveguide (12) configured to guide the waves emitted by the transducer (11) or to guide the waves to the transducer (11), said optoelectronic system (1) comprising a stack successively comprising: - a first porous layer (111) of semiconductor material doped according to a first type of doping, - a second layer (112) of semiconductor material doped according to the first type of doping and weakly doped with respect to the semiconductor material of the first layer (111), - a region (113) comprising one or more quantum wells, - a third layer (116) of semiconductor material doped according to a second type of doping opposite to the first type of doping, the photoelectric transducer (11) comprising a first portion (11a) of the first porous layer (111),a first portion (112a) of the second layer (112), at least a first portion (113a) of the area comprising the quantum well(s) and at least a first portion (116a) of the third layer (116); the waveguide (12) comprising a second portion (112b) of the second layer (112) adjacent to the first portion (112a) and disposed on a second portion (111b) of the porous first layer (111).

2. Optoelectronic system (1) according to the preceding claim characterized in that the first porous layer (111) has a porosity ratio between 1% and 80%.

3. Optoelectronic system (1) according to the preceding claim characterized in that the waveguide (12) further comprises a second portion (113b) of the area (113) comprising the quantum well(s).

4. Optoelectronic system (1) according to the preceding claim characterized in that the waveguide (12) further comprises a second portion (116b) of the third layer (116).

5. Optoelectronic system (1) according to any one of the preceding claims characterized in that the waveguide (12) has a height (h) between 200 nm and 300 nm and a width (L) between 200 nm and 300 nm.

6. Optoelectronic system (1) according to any one of the preceding claims characterized in that the first layer (11), the second layer (112) and the third layer (116) are formed of the same semiconductor material, for example a III-V material, for example gallium nitride.

7. Optoelectronic system (1) according to any one of the preceding claims characterized in that the photoelectric transducer (11) is of the light-emitting diode or photodiode type.

8. Optoelectronic system (1) according to any one of the preceding claims characterized in that it further comprises a dielectric layer (121) enclosing the photoelectric transducer (11) and the waveguide (12).

9. Optoelectronic system (1) according to any one of the preceding claims characterized in that it comprises a mirror (128a) disposed on at least one peripheral surface of the photoelectric transducer (11).

10. Optoelectronic system (1) according to any one of the preceding claims characterized in that it comprises a Bragg mirror (141) arranged under the transducer (11) and under the waveguide (12), said mirror (141) comprising one or more porous layers (1411) of semiconductor material stacked alternately with one or more layers (1412) of non-porous semiconductor material.

11. Optoelectronic system (1) according to any one of the preceding claims characterized in that it comprises a second photoelectric transducer (13), the transducer (11) and the second transducer (13) being arranged on either side of the waveguide (12), and in that the second photoelectric transducer (13) comprises: - a third portion (111e) of the first porous layer (111), - a third portion (112c) of the second layer (112), - a third portion (113c) of the area (113) comprising the quantum well(s), - a third portion (116c) of the third layer (116).

12.

13.

14. Optoelectronic system (1) according to the preceding claim characterized in that the second photoelectric transducer is of the light-emitting diode or photodiode type and of a different type from the first photoelectric transducer. Method (100) of manufacturing the optoelectronic system (1) according to any one of claims 1 to 12, characterized in that it comprises: - the formation (101) of a stack by successively growing, by epitaxy, on a substrate (14), a layer (111') of semiconductor material doped according to the first type of doping, the second layer (112) of semiconductor material, the zone (113) comprising the quantum well(s), and the third layer (116) of semiconductor material, - the porosification (102) of the layer (111') of semiconductor material doped according to the first type of doping, to obtain the first porous semiconductor layer (111), - the partial etching (103) of at least the third layer (116) of semiconductor material, to delimit the waveguide (12), and obtain a first unetched pattern area (M1), - the partial etching (104) of the stack up to the second layer (112) of semiconductor material, so as to laterally delimit the transducer (11) in the first pattern area (M1), Method (100) according to the preceding claim, for manufacturing the optoelectronic system (1) according to one of claims 11 and 12, characterized in that: - the partial etching step (103) of at least the third layer (116) of semiconductor material is carried out so as to further delimit a second unetched pattern zone (M2), the first (M1) and second (M2) pattern zones being arranged on either side of the waveguide, - the partial etching step (104) of the stack up to the second layer (112) of semiconductor material is carried out so as to further delimit laterally the second transducer (13) in the second pattern area (M2).

15. A method (100) according to any one of claims 13 and 14 characterized in that it comprises the formation (105): - of a first electrode (117) in electrical contact with the first portion (116a) of the third layer (116), - of a second electrode (118) in electrical contact with the first portion (112a) of the second layer (112), - of a third electrode (137) in electrical contact with the third portion (116c) of the third layer (116), and preferably, - of a fourth electrode (138) in electrical contact with the third portion (112c) of the second layer (112).

16. A method (200) for manufacturing an optoelectronic system, the optoelectronic system being, according to any one of claims 1 to 12, the method comprising: - the formation (201) of a stack by successively growing by epitaxy, on a substrate (14), a layer (111') of semiconductor material doped according to the first type of doping and the second layer (112) of semiconductor material doped according to the first type of doping and weakly doped compared to the first layer (111), - the partial etching (202) of the second layer (112) of semiconductor material, so as to obtain an island, - the porosification (203) of the layer (111') in semiconductor material doped according to the first type of doping, to obtain the first layer (111) of porous semiconductor material, - the formation (204), by selective epitaxy, of the zone (113) comprising the quantum well(s) on a first region of the island, - the formation (205) by selective epitaxy of the third layer (116) of semiconductor material on the area (113) comprising the quantum well(s) in the first region, so as to form the transducer (11) in the first region (RI).

17. Method (200) according to the preceding claim characterized in that: - the formation step (204) by selective epitaxy of the zone (13) comprising the quantum well(s) is carried out simultaneously on a second region (R2) of the island, distinct from the first region (RI), - the formation step (205) by selective epitaxy of the third layer (116) of semiconductor material is carried out simultaneously in the second region (R2) of the island so as to form the second transducer (13) in the second region of the island.

18. A method according to the preceding claim characterized in that it comprises the formation (206): - of a first electrode (117) in electrical contact with the first portion (116a) of the third layer (116) and belonging to the transducer (11), - of a second electrode (118) in electrical contact with the second layer (112), the second electrode (118) preferably being common to the transducer (11) and to the second transducer (13); - of a third electrode (137) in contact with the third portion (116c) of the third layer (116) and belonging to the second transducer (13).

19. A method (300) for integrating an optoelectronic system (1) according to any one of claims 11 to 12 with a control circuit (51), the method comprising: - the formation (301) of a stack by successively growing by epitaxy, on a substrate (14), a layer (111') of semiconductor material doped according to the first type of doping, the second layer (112), the area (113) comprising the quantum well(s), and the third layer (116) of semiconductor material, the porosification (302) of the layer (111') of semiconductor material doped according to the first type of doping, to obtain the first layer (111) of porous semiconductor material, the partial etching (303) of at least the third layer (116), to delimit the waveguide (12), and to obtain a first pattern zone (M1) and a second pattern zone (M2), the first pattern zone (M1) and the second pattern zone (M2) being arranged on either side of the waveguide (12), the deposition (304) of a dielectric layer (121) on the waveguide (12); the deposition (305) of a first metallic layer (3) on the dielectric layer and the third layer (116) in the first pattern zone (M1) and the second pattern zone (M2), the deposition (306) of a second metallic layer (4) on a first face of a receiving substrate (5), the receiving substrate (5) comprising the control circuit (51), the bonding (307) of the first metallic layer (3) and the second metallic layer (4), the removal (308) of the substrate (14), the partial engraving (309) of the first pattern zone (M1) so as to delimit the transducer (11) and of the second pattern zone (M2) so as to delimit the second transducer (12), the training (310): • of a first electrode (118') on the first portion (112a) of the second layer (112), • of a second electrode (138') on the third portion (112c) of the second layer (112), • of a third metallic layer (6) on a second opposite face of the receiving substrate (5), the third metallic layer (6) being connected to the second metallic layer (4) forming a third electrode common to the transducer (11) and the second transducer (13).

20. A method (400) for integrating an optoelectronic system (1) with a control circuit, the method comprising: - the manufacture of the optoelectronic system (1) according to claim 11, by carrying out the steps (101-104; 201-205) of the manufacturing process according to claim 14 or 17; - the formation (401) on the stack of a hybrid bonding level comprising a first electrode (117”) in electrical contact with the first portion (116a) of the third layer (116), the first electrode (117”) belonging to the transducer (11), and a second electrode (118”) in electrical contact with the third portion (116c) of the third layer (116), the second electrode (118”) belonging to the second transducer (13), the first and second electrodes being surrounded by a dielectric layer (121), so as to obtain a flat surface with the first (117”) and second (118”) electrodes; - the hybrid bonding (402) of the stack with a receiving substrate (5) comprising the control circuit (51), the control circuit having a plurality of connection pads (511) surrounded by a dielectric layer (52), such that the first electrode and the second electrode are bonded to the connection pads (511) of the control circuit, and such that the dielectric layer of the stack is bonded to the dielectric layer (52) of the control circuit (51), - the removal (403) of the substrate (14), - the partial etching (404): • Within the transducer (11): from the first portion (11a) of the first porous layer (111) to the second layer (112), to obtain a first opening, • Within the second transducer (13): from the third portion (111) of the first porous layer (111) to the second layer (112), to obtain a second opening; - The formation (405) of a third electrode (138”) in the first and second openings, the third electrode being common to the transducer (11) and the second transducer (12), and connection of the third electrode (138”) to one of the connection pads of the control circuit (51).