Printed circuit board with at least two power switches
A multilayer printed circuit with capacitive decoupling and mutual inductance effects addresses parasitic inductances and overvoltages in broadband semiconductor components, improving switching performance and component protection.
Patent Information
- Application Number
- FR2023006862
- Authority / Receiving Office
- FR · FR
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-06-29
- Publication Date
- 2025-01-03
AI Technical Summary
The integration of broadband semiconductor components in a printed circuit faces challenges due to parasitic inductances and overvoltages caused by rapid switching, which can degrade performance and damage components, despite efforts to minimize component proximity by conventional methods.
A multilayer printed circuit design with a capacitive decoupling component and conductive tracks on separate layers, forming a mutual inductance effect to reduce parasitic inductances, using wide-band semiconductor components and a diode configuration to manage current flow.
The design effectively minimizes parasitic inductances and overvoltages, enhancing switching performance and protecting components by canceling parasitic inductances through mutual inductance, suitable for high-frequency switching.
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Abstract
Description
Title of the invention: Printed circuit comprising at least two power switches
[0001] The present invention relates to a printed circuit of the type comprising at least two power switching components, at least one of which comprises at least one wideband semiconductor component.
[0002] The invention lies in the field of electronics, and finds applications in particular in power electronics.
[0003] The use of silicon-based semiconductor components for the development of electronic components, for example transistors and diodes, is well known.
[0004] More recently, wide band gap (or WBG) semiconductors have been developed, particularly based on Gallium Nitride (GaN) or Silicon Carbide (SiC). Wide band gap semiconductors have a significantly larger band gap between the valence band and the conduction band than silicon, which allows for higher performance. Wide band gap semiconductors have lower switching and conduction losses than silicon semiconductors at a given current and voltage rating, which allows for an increase in their efficiency, particularly in their use in power converters. In addition, the switching speed between an open position and a closed position is higher.
[0005] Such components are advantageously used in switching circuits (or switching meshes), for example for power switching or transistor control applications.
[0006] A switching mesh is a circuit that transfers electrical energy between two systems, these systems being respectively current and / or voltage sources. The switching mesh comprises at least two semiconductor components, each of which switches between an open position and a closed position, so that when one of the components is open, the other is closed and vice versa.
[0007] Broadband semiconductor components are generally encapsulated in a suitable package, for example a TO247 type package for silicon carbide semiconductors.
[0008] Such encapsulated components are also called discrete components.
[0009] The integration of several wideband semiconductor components in a printed circuit, the components being independent and surface mounted, for example to form an electrical switching circuit (or switching mesh) is problematic. Indeed, rapid switching, in particular the opening of semiconductors, induces parasitic inductances inside each component, as well as high overvoltages that risk damaging the components. In addition, parasitic currents are generated in the conductive tracks of the printed circuit, which causes parasitic inductances due to the printed circuit, which risks degrading performance, and even damaging the components. To reduce the parasitic inductances of the printed circuit, one solution would be to bring the components closer together.
[0010] Conventionally, circuits are made with components placed close together, so as to minimize parasitic inductances, but the proximity of discrete components is limited, in particular by the very size of the packages encapsulating the components. Thus, parasitic inductances of approximately 1 nanohenry (nH) per millimeter (mm) are observed, which is not compatible with the performance expected for proper operation.
[0011] The invention aims to overcome the drawbacks of the state of the art, in particular to enable protection of wideband semiconductor components while integrating them into a printed circuit, to produce an electrical switching circuit.
[0012] To this end, the invention proposes, according to one aspect, a printed circuit comprising at least two power switches, at least one of which comprises at least one broadband semiconductor component, and a capacitive decoupling component implemented on a multilayer electronic card, each power switch being able to move from an open position to a closed position and vice versa to form an electrical switching circuit being such that the opening of one of the power switches causes the closing of the other power switch.
[0013] This printed circuit is such that: - said at least one wideband semiconductor component of one of said power switches is an independent surface-mounted component, on a first conductive layer of the multilayer electronic card,
[0014] and
[0015] said multilayer electronic card comprises at least one second conductive layer separated from said first conductive layer by an insulating layer, the printed circuit comprising at least one conductive track formed on said second conductive layer, said at least one conductive track being located opposite said at least one surface-mounted broadband semiconductor component, so as to allow electric current to flow in said at least one broadband semiconductor component in a first direction on the first conductive layer and a flow of electric current in a second direction, opposite to the first direction, on the second conductive layer, thus forming a mutual inductance effect. Advantageously, the formation of a mutual inductance effect makes it possible to minimize the parasitic inductances of the circuit for semiconductor components mounted on the surface of the printed circuit, which makes it possible to avoid damage to the components and to preserve the performance of the electrical switching circuit produced.
[0016] The printed circuit may also have one or more of the characteristics below, taken independently or in any technically conceivable combination.
[0017] The printed circuit comprises a first bidirectional power switch in current and voltage, said first switch comprising two wideband semiconductor components, connected in opposite directions, said wideband semiconductor components being independent components mounted on the surface on said first conductive layer of the multilayer electronic card.
[0018] Each of the broadband semiconductor components is a Gallium Nitride or Silicon Carbide component.
[0019] A second power switch is formed in the form of a semiconductor diode.
[0020] The semiconductor diode is made in the form of a through-hole component.
[0021] The printed circuit comprises at least one first through-via for connecting an output of one of the surface-mounted broadband semiconductor components of the first conductive layer to said at least one conductive track, and at least one second through-via, for connecting said at least one conductive track of the second conductive layer to a current path of the first conductive layer.
[0022] The first conductive layer and the second conductive layer are spaced apart, in the stack of layers forming the multilayer electronic card, by a spacing less than or equal to 2.5 mm, preferably less than 1 mm, preferably of the order of 0.32 mm.
[0023] Said at least one second via is located at a spatial distance less than or equal to 3 mm from a conductive track of said first conductive layer.
[0024] The printed circuit is such that the electric current travels along a current path of length L, and the conductive track(s) formed on said second conductive layer have a dimension and positioning making it possible to obtain a mutual inductance effect over at least 50% of said length L, and preferably 70% of said length L.
[0025] The printed circuit is such that said conductive track has a width at least equal to a maximum width projected onto the second conductive layer of the independent wideband semiconductor components surface-mounted on the first conductive layer, preferably substantially equal to a maximum width projected onto the second conductive layer of the independent wideband semiconductor components surface-mounted on the first conductive layer.
[0026] The conductive track formed on said second layer covers the whole of said second conductive layer.
[0027] Other characteristics and advantages of the invention will emerge from the description given below, for information purposes only and in no way limiting, with reference to the appended figures, among which:
[0028] [Fig-1] [Fig.l] is an electrical diagram of an electrical switching circuit in which the parasitic inductance and capacitance are also represented;
[0029] [Fig.2] [Fig.2] is a schematic top view of a printed circuit im implementing a switching circuit according to one embodiment;
[0030] [Fig.3] [Fig.3] is an exploded view of the layers of the printed circuit of [Fig.2] according to one embodiment.
[0031] The invention is described below in its application for the production of an electrical switching circuit, also called a switching mesh, in the form of a printed circuit.
[0032] Such a printed circuit is for example useful for the integration of components in a compact system, allowing interconnection between components for detection, information transmission, power conversion, etc.
[0033] [Fig.l] represents the equivalent electrical diagram of an electrical switching circuit 2, which forms a switching mesh between an input point 4 and an output point 6, at fixed potential.
[0034] Such a circuit is adapted to be connected between an input electric current source and an output load, not shown.
[0035] The switching circuit 2 comprises a power switch 8, bidirectional in current and voltage, formed by two semiconductor components 10, 12 mounted in opposite directions, or in other words, mounted head to tail.
[0036] In one embodiment, the semiconductor components 10, 12 are complementary switches, when one is open, the other is closed and vice versa.
[0037] The components 10, 12 are preferably semiconductor transistors based on Gallium Nitride (GaN) or Silicon Carbide (SiC), which are wide band (or “wide gap”) semiconductor components.
[0038] Advantageously, the use of components of this type promotes the increase in the switching frequency.
[0039] The electrical circuit 2 further comprises a diode 14, which is a semiconductor component forming a switch in the switching circuit 2, as well as a capacitive component (e.g. a capacitor) 16, called a capacitive decoupling component, which makes it possible to supply current to the switching to recharge the drain-source capacitances of the transistors when the power switch 8 opens.
[0040] In other words, the switching circuit 2 comprises two power switches, respectively a first power switch which is the switch 8 and a second power switch which is the diode 14, configured so that when there is an action on a power switch (e.g. opening), there is an opposite response from another power switch (e.g. closing).
[0041] When the power switch 8 is closed, the electric current flows through this component, the associated drain-source capacitance is discharged, and the diode 14 is blocked, the drain-source capacitance associated with the diode is charged to the voltage Vb between the terminals of the capacitor 16.
[0042] When the power switch 8 opens, the associated drain-source capacitor charges and the diode 14 is conductive, the drain-source capacitor associated with the diode discharges.
[0043] Then, when the power switch 8 closes, a so-called hard switching occurs, the drain-source capacitor associated with the power switch discharges, the diode 14 blocks and the drain-source capacitor associated with the diode charges.
[0044] Furthermore, [Fig.l] schematically shows the parasitic capacitance 18 and the parasitic inductance 20, which appear with the voltage and current edges during switching. In particular, the presence of parasitic capacitance 18 and parasitic inductance 20 causes oscillations and overvoltages during switching.
[0045] It is important to limit parasitic elements as much as possible in order to preserve switching performance and protect circuit components.
[0046] Arrow F illustrates the direction of flow of the electric current in the electrical switching circuit 2, when the diode 14 is conducting.
[0047] In practice, the electrical switching circuit 2 is produced in the form of a printed circuit 30, as illustrated schematically in [Fig. 2], by integrating discrete components, mounted on a support card 32, at least a portion of the components being mounted on the surface of a conductive layer 34 of the card 32.
[0048] In one embodiment, the support board 32 is a multi-layer electronic board, formed from a stack of layers (in English “multi-layer PCB”), forming a sandwich structure of conductive layers and insulating layers. Thus, the printed circuit produced is a multi-layer printed circuit.
[0049] Multilayer printed circuit technology is well known. In such a multilayer printed circuit, two successive conductive layers of the stack are separated by an insulating layer, the support board also comprising holes (or vias), through or blind, metallized, allowing an electrical connection to be established between conductive layers.
[0050] Such a printed circuit comprises two external conductive layers, and a number of internal layers.
[0051] The conductive layers are made of conductive material, for example copper, and are etched by a chemical process to obtain a set of conductive tracks, which makes it possible to obtain a set of tracks, terminated by pads, which make it possible to electrically connect portions of the printed circuit. The pads, when perforated, make it possible to establish connections between components soldered through the printed circuit, or between layers. Certain discrete components, encapsulated in their own packages, are mounted on the first conductive layer 34 (which is an external layer), which comprises conductive areas (tracks or surface connections), and soldered or brazed onto surface connections of the external layer.
[0052] In the embodiment of Figures 2 and 3, the circuit comprises at least three layers, namely the conductive layer 34, an insulating layer 36 and another conductive layer 38, these layers being illustrated in the exploded view of [Fig.3].
[0053] In [Fig. 3] a plurality of layers of the printed circuit 30 are shown in exploded view.
[0054] It is noted that in embodiments, the printed circuit 30 may comprise any number of superimposed layers such as those shown in [Fig. 3].
[0055] In [Fig. 3] the first conductive layer 34 (or external layer), the second conductive layer 38, and the insulating layer 36 separating them are shown, as well as the components 40, 42 mounted on the surface on the first conductive layer 34, and the through-component 44.
[0056] The conductive track(s) 54 are positioned opposite (or facing) the semiconductor components 40, 42, i.e. in an area located directly below the semiconductor components 40, 42.
[0057] To realize the electrical switching circuit, wideband semiconductor switches 40, 42, forming the bidirectional current / voltage power switch referenced 8 in [Fig.l], are surface mounted. They correspond to the semiconductor components 10, 12 of the electrical switching circuit 2.
[0058] The diode 14 is produced by a component 44 which is for example a through-hole semiconductor component.
[0059] In other conceivable embodiments, the diode 14 is produced by a surface-mounted component.
[0060] The capacitive decoupling component 46 is connected by vias 48, which are electrically conductive through vias (also called connection vias) between the first conductive layer 34 and the second conductive layer 38, in the electrical switching circuit, and is located near one of the two semiconductor switches, which is the switch 40 in [Fig.2].
[0061] In the embodiment illustrated in [Fig.2], the capacitive decoupling component 46 is inserted into the first conductive layer 34. According to variants, the capacitive decoupling component 46 is inserted into a lower layer of the stack of the printed circuit, for example in the second conductive layer 38.
[0062] The printed circuit 30 has a number of through vias 50 in proximity to the other of the two semiconductor switches, which is switch 42 in [Fig. 2],
[0063] The vias 48, and the vias 50 are metallized vias, crossing the first layer 34, the insulating layer 36, so as to allow an electrical connection between parts of the first layer 34 and parts of the second layer 38.
[0064] Advantageously, and as is apparent from the schematic representation of [Fig. 3], a mutual inductance effect is generated by the production of one or more conductive tracks 54 formed on the second conductive layer 38, separated from the first conductive layer 34 by the insulating layer 36, the tracks 54 thus formed being located opposite the semiconductor components 40, 42.
[0065] The or each conductive track 54 is electrically connected, by metal contact, to at least one of the vias 50 at a first end, and to at least one other of the vias 48 at the other end, opposite the first end, of the or each conductive track 54.
[0066] Thanks to this arrangement, the parasitic inductance of the circuit, which is due to the magnetic field created around the conductive tracks during the circulation of an electric current, is almost cancelled by the mutual inductance effect obtained.
[0067] Various embodiments are possible for producing the conductive track(s) 54.
[0068] In one embodiment, the conductive track 54 forms a conductive strip of width determined as a function of the connection planes, as a function of the power to be conveyed, and also to maximize the mutual inductance effect.
[0069] In one embodiment, the conductive track 54 is formed, opposite the first conductive layer 34, and more particularly opposite the semiconductor components 40, 42. Preferably, the conductive track 54 has a width / substantially equal to the maximum width projected onto the second layer 38 of the independent components 40, 42. Of course, if the two independent components 40, 42 are contained in housings of the same dimensions, they have the same width, which is then in fact the maximum width. Advantageously, this choice of conductive track width 54 makes it possible to maximize the mutual inductance effect.
[0070] Preferably, the width of the conductive track 54 is further and if necessary increased so as to support the corresponding electrical power.
[0071] In another embodiment, the conductive track 54 covers the entire surface of the layer 38.
[0072] According to another variant, several conductive tracks 54 are drawn substantially in parallel, at least one of which is located directly opposite the semiconductor components 40, 42.
[0073] In one embodiment, at least one of the vias 48 is located at a spatial distance less than or equal to 3 mm from a conductive track of the first conductive layer 34.
[0074] Preferably, at least one of the vias 48 opens in proximity, i.e. at a distance less than or equal to 3 mm from the current path symbolized by the arrows F1 or F2 in [Fig. 3] on the first layer 34. This is all the more important when the conductive layer 54 has a large surface area and largely exceeds the simple opposite of the boxes 40 and 42, and therefore it could be possible to have the vias, and therefore the outlets of the vias 48, distant from the current paths F1 or F2. This location of the outlets of the vias 48 ensures a current path that is both well superimposed between F2 and F4, and a proximity of the current paths F1 and F6, and consequently the maximization of the mutual inductance effect.
[0075] Arrows F1, F2, F3, F4, F5, F6 illustrate the direction of flow of the electric current in the printed circuit 30, during hard switching, which can be critical for the components, potentially subject to overvoltages during this hard switching. This is the switching step during which the power switch closes, the diode 44 is blocked and the associated drain-source capacitor charges to the voltage Vb between the terminals of the capacitive decoupling component.
[0076] The electric current follows the direction of circulation indicated by the arrows F1 and F2 in the upper layer 34, passing through the components 40, 42, reaches the vias 50, and, thanks to the interlayer connection (arrow F3), passes through the insulating layer 36 and reaches the second conductive layer 38.
[0077] The electric current then flows in the direction of arrow F4, opposite to the direction of arrow F2, along the conductive track 54 of the second conductive layer 38. Indeed, according to a physical principle, the high-frequency current follows a current path of minimum impedance / inductance.
[0078] Preferably, the first conductive layer 34 and the second conductive layer 38 are spaced apart, in the stack of layers forming the card 32, by a spacing less than or equal to 2.5 mm, preferably still less than 1 mm, and for example of the order of 0.32 mm. The distances between facing current paths on these two layers thus have similar values.
[0079] The proximity of the first and second layers makes it possible to obtain a mutual inductance effect between the current h flowing in the first conductive layer 34 in the direction of the arrow F2 and the current I2 flowing in the second conductive layer 38 in the direction of the arrow F4.
[0080] If the respective currents h and I2 are of the same intensity, they each produce the same magnetic field, and then the magnetic fields cancel each other out. Thus, the mutual inductance effect is obtained, and the parasitic circuit inductance is canceled.
[0081] Thanks to the interlayer connection made by the vias 48, the current I2 flowing in the second conductive layer crosses towards the first conductive layer 34 (arrow F5) and is directed towards the capacitive decoupling component 46 (arrow F6).
[0082] The current path, represented schematically by the arrows F1, F2, F3, F4, F5 and F6, forms a current loop of length L, part of which is in mutual inductance (eg the part represented by the arrows F2 and F4), this part representing a portion at least equal to 50% of the length L, and preferably greater than 70% of the length L of the total current path.
[0083] Simulation tests have shown that a spacing of 0.32 mm between the conductive layers 34 and 38 makes it possible to obtain a parasitic inductance of 6 nH for a high switching frequency, greater than 1 MHz, this parasitic inductance increasing with the spacing between the conductive layers 34 and 38, and being able to reach more than 9 nH for a spacing of 1 mm.
[0084] Thus, the invention makes it possible to produce electrical switching circuits supporting 10 Amperes and more, with a parasitic inductance of the circuit of only a few nanohenries (nH), typically less than 10 nH for 10A.
[0085] The mutual inductance effect allowing the parasitic inductance to be cancelled is obtained, thanks to the addition of conductive tracks in the second layer, separated from the first layer by an insulating layer, for surface-mounted components.
[0086] The mutual inductance effect is not applicable for through-hole components, for example for diode 44 of the example in [Fig.2], but this represents, in the example, a small percentage, typically less than 20%, of the total parasitic inductance of the printed circuit.
[0087] Thus, advantageously, the invention makes it possible to significantly limit the parasitic inductance of a printed circuit to produce an electrical switching circuit comprising broadband semiconductor components, and to achieve a parasitic inductance of less than 10NH for a switching frequency greater than 1MHz.
[0088] Advantageously, thanks to the minimization of parasitic inductances, the overvoltages occurring when opening switches in hard switching are minimized.
[0089] Advantageously, the proposed electrical switching circuit arrangement makes it possible to reduce drain-source oscillations of the power switch components, which makes it possible to maximize switching performance and minimize electromagnetic disturbances.
[0090] The invention has been described above in an embodiment of a switching circuit comprising a first bidirectional power switch in current and voltage, and a second power switch in the form of a diode.
[0091] The invention is also applicable for different switching circuit arrangements, for example with a second active power switch instead of a diode.
Claims
Claims
1. Printed circuit comprising at least two power switches (8, 14), at least one of which comprises at least one wideband semiconductor component (10, 12; 40, 42), and a capacitive decoupling component (16; 46) implemented on a multi-layer electronic card (32), each power switch being capable of moving from an open position to a closed position and vice versa to form an electrical switching circuit being such that the opening of one of the power switches (8, 14) causes the closing of the other power switch (14, 8), characterized in that: - said at least one wideband semiconductor component (40, 42) of one of said power switches (8) is an independent surface-mounted component, on a first conductive layer (34) of the multilayer electronic card (32), and in that - said multilayer electronic card (32) comprises at least one second conductive layer (38) separated from said first conductive layer (34) by an insulating layer (36), the printed circuit comprising at least one conductive track (54) formed on said second conductive layer (38), said at least one conductive track (54) being located opposite said at least one surface-mounted broadband semiconductor component (40, 42), so as to allow a flow of electric current in said at least one broadband semiconductor component (40, 42) in a first direction on the first conductive layer (34) and a flow of electric current in a second direction, opposite to the first direction, on the second conductive layer (38), thus forming a mutual inductance effect.
2. Printed circuit according to claim 1, comprising a first power switch (8) bidirectional in current and voltage, said first switch comprising two wideband semiconductor components (10, 12; 40, 42), connected in opposite directions, said wideband semiconductor components being independent components surface-mounted on said first conductive layer (34) of the multilayer electronic card (32).
3. A printed circuit according to claim 2, wherein each of the broadband semiconductor components is a Gallium Nitride or Silicon Carbide component.
4. A printed circuit according to claim 2 or 3, wherein a second power switch (14) is constituted as a semiconductor diode.
5. A printed circuit according to claim 4, wherein said semiconductor diode is formed as a through-hole component.
6. A printed circuit according to claim 1 to 5, comprising at least one first through via (50) for connecting an output of one of the broadband semiconductor components (42) mounted on the surface of the first conductive layer (34) to said at least one conductive track (54), and at least one second through via (48), for connecting said at least one conductive track (54) of the second conductive layer (38) to a current path of the first conductive layer.
7. Printed circuit according to any one of claims 1 to 6, in which the first conductive layer (34) and the second conductive layer (38) are spaced apart, in the stack of layers forming the multilayer electronic card (32), by a spacing less than or equal to 2.5 mm, preferably less than 1 mm, preferably of the order of 0.32 mm.
8. Printed circuit according to claim 6 or 7, wherein said at least one second via (48) is located at a spatial distance less than or equal to 3 mm from a conductive track of said first conductive layer (34).
9. Printed circuit according to one of claims 1 to 8, in which the electric current travels along a current path of length L, and in which the conductive track(s) (54) formed on said second conductive layer (38) have a dimension and positioning making it possible to obtain a mutual inductance effect over at least 50% of said length L, and preferably 70% of said length L.
10. Printed circuit according to one of claims 1 to 9, comprising a said conductive track (54) on the second conductive layer (38), said conductive track (54) having a width at least equal to a maximum width projected onto the second conductive layer (38) of the independent wideband semiconductor components (40, 42) surface-mounted on the first conductive layer (34), preferably substantially equal to a maximum width projected onto the second conductive layer (38) of the independent wideband semiconductor components (40, 42) surface-mounted on the first conductive layer (34)
11. A printed circuit according to claim 10, wherein said conductive track (54) formed on said second layer covers all of said second conductive layer.
Citation Information
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