Computer-based methods and systems for data transmission, particularly in flight controls
Patent Information
- Application Number
- FR2024009487
- Authority / Receiving Office
- FR · FR
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-07
- Filing Date
- 2024-09-06
- Publication Date
- 2025-03-14
Smart Images

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Abstract
Description
Title of the invention: Computer method and systems for transmitting data, more particularly in flight controls
[0001] The present invention relates to a computer-implemented method for transmitting data, more particularly in flight controls.
[0002] In the state of the art, systems or system architectures for transmitting data between computing units or for importing data into a computing unit from a plurality of other computing units are known.
[0003] These systems are used for example in flight controls or flight control computers (FCC).
[0004] In [Fig.3] an example of a known system or system architecture is shown.
[0005] In this case, several computing units 2, for example each in the form of a field programmable gate array (FGPA), are electrically connected respectively via a high-speed data bus B to a first computing unit 1, for example in the form of a central computing unit (CPU) and / or a processor.
[0006] The high-speed data bus 3 therefore serves as an electrical connection between the second computing units 2 and the first computing unit 1.
[0007] It is therefore known that certain second computing units, for example FGPAs, are connected, via a high-speed data bus, to a first computing unit, for example a CPU, each second computing unit being able to be controlled and / or read individually by the first computing unit.
[0008] A high-speed data bus B is therefore an electrical interface of the first computing unit 1, in which the first computing unit 1 comprises three electrical interfaces. The second computing unit 2, shown with a dotted line in [Fig. 3], can optionally be connected, via the high-speed data bus B shown in dotted lines, with the first computing unit 1.
[0009] The first computing unit 1, for example the CPU, is therefore the master of the communication and it comprises the corresponding number of high-speed data buses B, in order to connect the second computing units 2, for example FGPAs, as slaves of the communication. Due to the limited number of high-speed data buses B that can comprise a first computing unit, there results a limitation of the maximum number of second computing units 2 that can be connected. This therefore limits the number of interfaces or electrical connections, for example for sensors that the system can include, for example in an FCC.
[0010] Furthermore, the effort for processing data in the first computing unit 1, for example the CPU, is higher when several high-speed data buses B are controlled or processed. This decreases, for example, the performance of the first computing unit and increases the execution time for processing the data.
[0011] For example, for cost reduction, it is desirable to reduce, in systems or system architectures, more particularly flight controls, the number of computers as well as to increase the number of functions per computer.
[0012] As a result, systems or system architectures must comprise fewer computers, which are however each more complex. This results in high requirements with regard to the computing power or performance of the CPUs or first computing units of the computer and this requires a high number of electrical interfaces which are read and processed by a computer or a CPU or a first computing unit.
[0013] It is desirable that systems, more particularly in FCCs, exhibit a highly deterministic behavior with regard to the implementation of the software as well as with regard to the processing of electrical interfaces, for example when reading sensors, driving outputs, etc. In order to guarantee this, a deterministic data transmission, from the electrical input to a signal processing chain, with a low latency time as well as a low time margin of fluctuation (jitter).
[0014] In order to keep system delays to a minimum, very high requirements are imposed, particularly with regard to latency. In particular, in the case of long transmission paths, for example over several FGPAs, a suitable design is necessary in order to keep the latency as well as the time margin for fluctuation (jitter) as low as possible.
[0015] In this context, the objective of the present invention is to provide an improved method compared to the method mentioned above, more particularly in order to connect a high number of computing units to a first computing unit with a limited number of electrical interfaces.
[0016] This objective is achieved in the following manner:
[0017] According to the present invention, there is therefore provided: a computer-implemented method for transmitting data, more particularly in flight controls, with the following steps: - transmission of a synchronization signal by a first computing unit; - reception of the synchronization signal by a second and / or a third computing unit, at a reception time for each case; - transmission of first data from the third computing unit to the second computing unit, wherein the transmission of the first data takes place at a first transmission time which depends on the respective reception time of the reception of the synchronization signal by the second and / or the third computing unit; - transmission of the first and / or second data by the second computing unit to the first computing unit, wherein the transmission takes place at a second transmission time which depends on the respective reception time of the reception of the synchronization signal by the second and / or third computing unit.
[0018] The term "moment" should be interpreted broadly within the scope of the invention and it also includes, for example, a period or a period of time.
[0019] In other words, a transmission of data from any computing unit to the first computing unit preferably takes place via one or more other computing units.
[0020] Data from any number of computing units can thus be transmitted to the first computing unit, via a single electrical interface and / or a single data channel, for example a pin or a connection of the first computing unit.
[0021] Preferably, it is provided that the first transmission time is a sum of the reception time of the reception of the synchronization signal by the second and / or the third computing unit, of a first time offset and / or of a duration, more particularly of a collection of the first data and / or that the second transmission time is the sum of the reception time of the reception of the synchronization signal by the second and / or the third computing unit, of a second time offset and / or of a duration, more particularly of a collection of the second data.
[0022] Preferably, it is provided that the method comprises, before the transmission of the first data by the third calculation unit to the second calculation unit, the following step:
[0023] Collection of the first data by the third computing unit.
[0024] Preferably, it is provided that the method comprises, before the transmission of the first and / or second data by the second calculation unit to the first calculation unit, the following step: - collection of the second data by the second computing unit.
[0025] Data collection includes, for example, reading a sensor, etc.
[0026] Preferably, it is provided that the collection of the first data takes place at a first collection time which is a sum of the time of receipt of the reception of the synchronization signal by the second and / or third computing unit and the first time offset and / or that the collection of the second data takes place at a second collection time which is a sum of the time of receipt of the reception of the synchronization signal by the second and / or third computing unit of the second time offset.
[0027] Preferably, it is provided that the transmission of the first and / or second data by the second computing unit to the first computing unit takes place via exactly one data channel, more particularly a high-speed data bus.
[0028] The data channel preferably comprises an electrical interface.
[0029] Between the transmission and reception of the synchronization signal, a transmission of the synchronization signal can take place via the data channel and / or via a signal channel.
[0030] Preferably, it is provided that the steps of the method are executed several times, more particularly periodically.
[0031] Preferably, it is provided that the first and / or the second transmission time is adapted, more particularly to a latency time respectively of the third and / or the second calculation unit.
[0032] The invention also relates to a system with a first, a second and a third computing units, which are each designed to carry out a method according to the present invention.
[0033] The system preferably comprises several computing units all of whose data can be transmitted via a single data channel or electrical interface to a first computing unit.
[0034] The computing units are preferably connected to each other in a communicative manner, for example by cables, for example via pins.
[0035] Preferably, it is provided that the first, second and / or third computing unit each comprise or constitute a processor, more particularly a CPU, an FGPA and / or an ASIC.
[0036] More particularly, the second and / or third computing units may, for example, comprise or constitute an interface component, an input-output component, an FPGA and / or a specialized integrated circuit (from the English “application specified integrated circuit” (ASIC)). The second and / or third computing units may each comprise an electrical connection, for example for connecting a sensor.
[0037] Preferably, it is provided that the first, second and / or third computing unit are connected directly, i.e. respectively without an intermediate component and / or without another computing unit, i.e. at least once per pair via of an intermediate component and / or another computing unit, more particularly respectively via a data channel, more particularly a high-speed data bus.
[0038] The high-speed data bus can, for example, be a PCIexpress (from the English “Peripheral Component Interconnect Express” (PCIe)).
[0039] Preferably, the system is intended to be part of flight controls of an aircraft, more particularly of an airplane.
[0040] The invention also relates to a computer program which comprises instructions which cause the system according to the present invention to carry out the steps of the method according to the present invention.
[0041] The invention also relates to a computer-readable medium on which the computer program according to the present invention is recorded.
[0042] The computing units, the data channel and / or the signal channel preferably comprise or constitute a synchronized transmission path for the transmission of data, in which, more particularly, there is a possibility of optimizing a latency time, in which, more particularly, a possibility of optimizing a latency time by preparing the data at the latest possible time, more particularly by adapting a time offset. The system is for example an architecture which comprises transmission paths with several points.
[0043] Synchronous data transmission preferably takes place in order to minimize latency of data transmission.
[0044] The invention preferably has the following advantages: - preferably the lowest possible latency and the lowest possible jitter; - preferably, an adaptation to the amount of data to be transmitted takes place by an adaptation of a time shift; - preferably, there is a possibility of adapting the transmission time(s) at which a transmission takes place, more particularly depending on the respective computing unit; - preferably, compensation of the cable lengths, data channels and / or signal channels, which transmit the synchronization signal or the data and / or of a quantity of the data to be transmitted and thus of a duration of a preparation of the data to be transmitted, takes place; - preferably, there is a lower processing effort compared to a "star architecture", such as that shown for example in [Fig.3], in which several buses are controlled or processed by the first computing unit. This increases for example the performance of the first computing unit and reduces the execution time for data processing; - preferably, there is no limitation regarding the availability and / or number of data buses of the first computing unit, e.g. of the CPU; - preferably, flexible expansion of the system is possible, especially with further computing units, especially without changing a software architecture and / or software drivers.
[0045] All the features of the invention described herein may be combined with each other in any way or used in isolation from each other.
[0046] Other advantages, features and effects of the present invention result from the following description of preferred embodiments with reference to the figures in which identical or similar components are designated by the same reference numerals. The figures show: [Fig.l]: A flowchart of an embodiment of a method according to the present invention. [Fig.2]: A functional diagram of an embodiment of a system according to the present invention. [Fig.3]: a functional diagram of an embodiment of a system according to the state of the art.
[0047] In [Fig.l], a time-optimized sequence of an embodiment of the method according to the present invention is shown, in which a synchronization signal S is sent by a first computing unit to a second and a third computing unit and is received by the second and third computing units and in which data is transmitted by the third to the second computing unit and by the second computing unit to the first computing unit.
[0048] The diagram in [Fig.l] shows a time line represented by a horizontal arrow, on which the steps of the process S1 to S4 are written on lines.
[0049] The vertical arrows represent the times of sending the synchronization signals S by the first computing unit and the times of receiving the synchronization signals S by the second and third computing units.
[0050] The first computing unit is a master and the second and third computing units are slaves respectively.
[0051] The synchronization signal S is sent and received periodically.
[0052] At times t0, t0+1, t0+2, etc., 1, 2, etc. being numbers designating the different periods at which a synchronization signal S is sent, a synchronization signal S is sent and received.
[0053] As an example, a process flow for the first period takes place as follows: in step S1, a collection of first data takes place by the third computing unit at a first collection time, which is determined by an addition of the reception time t0 of the reception of the synchronization signal S by the third computing unit and a first time offset Offseti or is a sum of the reception time t0 of the reception of the synchronization signal S by the third computing unit and a first time offset Offseti.
[0054] The collection of the first data takes place over a first duration TS1.
[0055] In step S2, a collection of second data takes place by the second calculation unit at a second collection time, which is determined by an addition of the reception time L of the reception of the synchronization signal S by the second calculation unit and a second time offset Offset2 or is a sum of the reception time L of the reception of the synchronization signal S by the second calculation unit and a second time offset Offset2.
[0056] The collection of the second data takes place over a second duration TS2.
[0057] In step S3, a transmission or transfer of the first data of the third computing unit to the second computing unit.
[0058] The transmission of the first data from the third calculation unit to the second calculation unit takes place over a third duration TS3.
[0059] In step S4, a transmission or transfer of the first and / or second data from the second calculation unit to the first calculation unit takes place.
[0060] The transmission of the first and / or second data from the second calculation unit to the first calculation unit takes place over a fourth duration TS4.
[0061] At time T all the data are therefore present in the first calculation unit.
[0062] Between the start of the collection of the first data and time T, there is a latency time Latency b
[0063] Between the start of the collection of the second data and time T, there is a latency timeLatence2.
[0064] The latency times Latencei and Latencei depend for example on the computing units and the structure of the system or the transmission paths, etc.
[0065] The adaptation of the first time offset Offseti and / or the second time offset Offset2 thus makes it possible to shift and / or adapt or optimize the moment T.
[0066] The first period is followed by a second period, as can be seen in the representation of the durations TS1, TS2 and TS3 in the right-hand area of [Fig.l].
[0067] In [Fig.2], a basic or general structure of an embodiment of a system according to the present invention or its transmission paths is shown. The system is part of an FCC.
[0068] The system comprises a first computing unit 1 in the form of a CPU. The first computing unit may also be referred to as a central computing unit.
[0069] The system further comprises a second and a third computing unit 2 and 3 respectively in the form of an FGPA.
[0070] The system can optionally be extended with additional computing units 4, as shown by dotted boxes in [Fig.2]. These extensions allow additional FCC requirements to be met.
[0071] The first computing unit 1 is connected in a communicative manner with the second computing unit 2 and the second computing unit 2 is connected in a communicative manner with the third computing unit 3 respectively via a data channel represented by a double arrow in [Fig.2].
[0072] The optional computing units 4 can be connected in a communicative manner respectively with one of the computing units 2 or 3 via a data channel represented by a double arrow in [Fig. 2]. Several optional computing units 4 can thus be connected in a communicative manner with one of the computing units 2 or 3.
[0073] The first computing unit 1 is connected to each computing unit 2, 3 and optionally 4 via a signal channel SK, which is designed to transmit synchronization signals.
[0074] The synchronization signals may also be transmitted via the signal channel(s).
[0075] The first computing unit, as the communication master, provides all other computing units of the system with a synchronization signal. Depending on this synchronization signal, the respective data are prepared, for example collected and / or transmitted, at the required time.
Claims
Claims
1. Computer-implemented method for transmitting data, more particularly in flight controls, with the following steps: - sending a synchronization signal by a first computing unit; - receiving the synchronization signal by a second and / or a third computing unit at a reception time in each case; - transmitting first data from the third computing unit to the second computing unit, wherein the transmission of the first data takes place at a first transmission time, which depends on the respective reception time of the reception of the synchronization signal by the second and / or the third computing unit;- transmission of the first data and / or second data from the second computing unit to the first computing unit, wherein the transmission takes place at a second transmission time which depends on the respective reception time of the reception of the synchronization signal by the second and / or third computing unit.;
2. Computer-implemented method according to claim 1, characterized in that the first transmission time is a sum of the reception time of the reception of the synchronization signal by the second and / or third computing unit, a first time offset and / or a duration, more particularly of a collection of the first data and / or in that the second transmission time is the sum of the reception time of the reception of the synchronization signal by the second and / or third computing unit, a second time offset and / or a duration, more particularly of a collection of the second data.
3. A computer-implemented method according to claim 1 or 2, characterized in that the method comprises, before the transmission of the first data from the third computing unit to the second computing unit, the following step: - collection of the first data by the third computing unit.
4. A computer-implemented method according to one of the preceding claims, characterized in that the method comprises, before the transmission of the first and / or second data of the second computing unit to the first computing unit, the next step: - collection of the second data by the second computing unit.
5. Computer-implemented method according to one of claims 2 to 4, characterized in that the collection of the first data takes place at a first collection time which is a sum of the reception time of the reception of the synchronization signal by the second and / or the third computing unit and the first time offset and / or in that the collection of the second data takes place at a second collection time which is a sum of the reception time of the reception of the synchronization signal by the second and / or the third computing unit and the second time offset.
6. Computer-implemented method according to one of the preceding claims, characterized in that the transmission of the first and / or second data from the second computing unit to the first computing unit takes place via a single data channel, more particularly a high-speed data bus.
7. Computer-implemented method according to one of the preceding claims, characterized in that the steps of the method are executed several times, more particularly periodically.
8. Computer-implemented method according to one of the preceding claims, characterized in that the first and / or the second transmission time is adapted, more particularly to a latency time respectively of the third and / or the second computing unit.
9. System with a first, a second and a third computing units which are respectively designed to carry out a method according to one of the preceding claims.
10. System according to claim 9, characterized in that the first, second and / or third computing units respectively comprise or constitute a processor, more particularly a CPU, an FGPA and / or an ASIC.
11. System according to claim 9 or 10, characterized in that the first, second and / or third computing units are connected directly or indirectly, more particularly respectively via a data channel, more particularly a high-speed data bus.
12. System according to one of claims 9 to 11, characterized in that the system is part of flight controls of an aircraft, more particularly of an airplane.
13. A computer program comprising program code instructions for executing the steps of the method according to one of claims 1 to 8 when said program is executed on a computer.
14. A computer-readable medium on which the computer program according to claim 13 is recorded.