Junction field-effect transistor and associated manufacturing process

FR3152916A1Pending Publication Date: 2025-03-14INSTITUT NAT POLYTECHN DE GRENOBLE +3
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Application Number
FR2023009563
Authority / Receiving Office
FR · FR
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-09-12
Publication Date
2025-03-14

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Abstract

Title: Junction Field-Effect Transistor and Associated Manufacturing Method. The invention consists first of a junction field-effect transistor (FET) made exclusively of SiC, or "SiC JFET". It is preferably manufactured using a top-down approach and its fabrication is suitable for series production. The electrical performance of the proposed SiC JFET was evaluated in dry and liquid conditions. A proof of concept for the use of the proposed SiC JFET as a biosensor is validated by pH measurement. The proposed SiC JFET achieves sensitivities up to 495 mV / pH, almost 100 times greater than the theoretical Nernst limit. Therefore, it is suitable for various in vitro and in vivo biochemical sensing applications, as it meets the generally required performance characteristics such as sensitivity and chemical stability, particularly in the long term. Figure for abstract: Fig. 4
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Description

Title of the invention: Junction field effect transistor and associated manufacturing method Technical field

[0001] The present invention relates to the field of biosensors. It finds particularly advantageous application in the field of diagnostics. STATE OF THE ART

[0002] Silicon (Si)-based field-effect transistors have been intensively developed in recent years and have shown great promise for biochemical sensing applications based on label-free, real-time, selective, and highly sensitive electrical measurements. However, the poor biocompatibility and limited chemical inertness of Si are the main obstacles to the development and commercialization of field-effect transistor (FET)-based biosensors for long-term in vitro and in vivo applications.

[0003] More particularly, the limited reliability of Si-based field effect transistors hinders the use of these devices in long-term sensing applications, especially when the sensing environment is 'harsh', which is the case of the human body. Si in all its forms (nanowire, bulk form, etc.) does not meet the required reliability conditions because this material suffers from both a lack of long-term chemical stability, especially when placed in physiological environments, and a lack of biocompatibility. These shortcomings of Si-based biosensors can be tolerated when the biosensors are intended for single-use sensing applications, but not in the case of long-term sensing such as in vitro and in vivo sensing.

[0004] For example, much effort has been devoted to the development of Si-based hydrogen potential (pH) sensors for continuous in vivo monitoring. Si-based ion-sensitive field effect transistors have thus been developed which still fail today to meet the standards required for the intended applications. Thus, the replacement of Si by another material, possibly a semiconductor, inherently offering chemical robustness, electrical properties comparable to those of Si, as well as satisfactory biocompatibility appears today to be an absolute necessity.

[0005] In this regard, Silicon Carbide (SiC) appears to be an alternative material of choice, due to its excellent mechanical, electrical and chemical properties combined with its biocompatibility. It has indeed been shown that SiC has a chemical inertness greater than that of Si when immersed in physiological solutions, as well than greater biocompatibility than Si. In addition, the use of SiC also benefits from compatibility with Si micromachining techniques.

[0006] Thus, SiC is now expected to replace Si in the development of biosensors, due to its superior characteristics to Si, particularly for multi-purpose or long-term applications. Awais et al. have already been interested in this promising material and have studied the effect of pH on the transport characteristics of a field-effect transistor based on SiC nanowires (Cf. M. Awais, Habeeb Mousa, K. Teker, Effect of pH on transport characteristics of Silicon Carbide nanowire field-effect transistor (SiCNW-FET), Journal of Materials Science: Materials in Electronics, 32 (2021) 3431-3436).

[0007] This article reports the fabrication of a FET comprising SiC nanowires that have been transferred onto a SOI (silicon-on-insulator) substrate for pH measurement. The proposed fabrication method is part of a bottom-up approach since the SiC nanowires are transferred and then connected. This leads to problems of non-reproducibility of signals between the nanowires, which are never completely identical or connected in the same way.

[0008] Furthermore, it would be interesting to propose a method for manufacturing SiC-based FETs that can be implemented on a wafer scale in a homogeneous manner. This would help to reduce the risks of signal non-reproducibility.

[0009] An object of the present invention is therefore to propose a junction field effect transistor which makes it possible to overcome the shortcomings of the prior art and / or manufactured using a potentially full-plate process and making it possible to reduce, or even eliminate, the risks of non-reproducibility of the signals.

[0010] Other objects, features and advantages of the present invention will become apparent from the following description and accompanying drawings. It is understood that other advantages may be incorporated. SUMMARY

[0011] To achieve this objective, a first aspect relates to a junction field effect transistor comprising: a. A substrate based on silicon carbide (SiC) and having doping of a first type, b. On the substrate, a first crystalline layer based on SiC and having doping of a second type different from the first, c. On a first part of the first crystalline layer: i. at least one SiC-based crystalline channel having doping of the first type, ii. on a first end of each crystal channel, a contact ohmic source based on SiC and having doping of the first type, and üi. on a second end of each crystal channel, an ohmic drain contact based on SiC and having doping of the first type, d. On a second part of the first crystalline layer, adjacent to the first part, at least two ohmic contact recovery pads, e. Between each source ohmic contact and at least a first of said at least two ohmic contact recovery pads, at least one first conductive track extending over the first crystalline layer, and f. Between each ohmic drain contact and at least a second of said at least two ohmic contact recovery pads, different from said at least one first, at least one second conductive track extending over the first crystalline layer.

[0012] A second aspect of the invention relates to a method of manufacturing at least one junction field effect transistor, the method comprising the following steps: a. Providing a stack comprising: i. A substrate based on silicon carbide (SiC) and having doping of a first type, ii. On the substrate, a first crystalline layer based on SiC and having a doping of a second type different from the first, ii. On the first crystalline layer, a second crystalline layer based on SiC and having a doping of the first type, and iv. On the second crystalline layer, a third crystalline layer based on SiC and having doping of the first type, b. Deposit, on the third crystalline layer, a first electrically conductive layer, c. Etching, through the first electrically conductive layer serving as an etching mask, the third crystalline layer to expose a portion of the second crystalline layer and form at least one source ohmic contact and one drain ohmic contact, and d. Etching the first electrically conductive layer so as to form: i. at least two ohmic contact recovery pads, ii. between each source ohmic contact and at least a first of said at least two ohmic contact recovery pads, at least one first conductive track extending over the first crystalline layer, and üi. between each drain ohmic contact and at least a second of said at least two ohmic contact recovery pads, different from said at least one first, at least one second conductive track extending over the first crystalline layer, then e. Etch the exposed portion of the second crystal layer to form at least one crystal channel.

[0013] A third aspect of the invention relates to an ion-sensitive biosensor comprising at least one junction field effect transistor according to the first aspect of the invention.

[0014] A fourth aspect of the invention relates to a use of an ion-sensitive biosensor according to the third aspect of the invention for measuring the hydrogen potential (pH) of an analyte.

[0015] A junction field effect transistor (FET) made exclusively, or essentially, of SiC (hereinafter "SiC JFET") is thus provided. It can advantageously be manufactured using a top-down approach. The electrical performance of the SiC JFET according to the first aspect of the invention has been evaluated and is satisfactory, with a sensitivity going beyond the theoretical Nernst limit. Therefore, the SiC JFET according to the first aspect of the invention is suitable for use in various in vitro and in vivo biochemical detection applications, since it satisfies the performances generally required in this area such as sensitivity and chemical stability. BRIEF DESCRIPTION OF THE FIGURES

[0016] The aims, objects, as well as the characteristics and advantages of the invention will emerge more clearly from the detailed description of an embodiment thereof which is illustrated by the following accompanying drawings in which:

[0017] [Fig.l] [Fig.l] schematically represents a partial sectional view of a field effect transistor according to an embodiment of the first aspect of the invention and of a biosensor comprising said field effect transistor.

[0018] [Fig.2A][Fig.2B] Figures 2A and 2B are schematic representations of the protonation and deprotonation phenomena observable in a field effect transistor according to an embodiment of the first aspect of the invention, at the level of its electric double layer or EDL (for “electric double-layer” in English), depending on whether the analyte considered is at low pH ([Fig.2A]), for example less than 3, or at high pH ([Fig.2B]), for example greater than 8.

[0019] [Fig.3] [Fig.3] graphically represents the shift in the current-voltage transfer characteristics of a buffer solution in which a crystal channel having n-type doping of the field effect transistor according to an embodiment of the first aspect of the invention.

[0020] [Fig.4] [Fig.4] schematically represents a sectional view of a transistor with field effect according to another embodiment of the first aspect of the invention relative to that illustrated in [Fig.l].

[0021] [Fig.5] [Fig.5] schematically represents a perspective view of a field effect transistor according to another embodiment of the first aspect of the invention.

[0022] [Fig.6] [Fig.6] schematically represents a perspective view of a variant of the field effect transistor illustrated in [Fig.5].

[0023] [Fig.7] [Fig.7] graphically represents the pH sensitivity of a field effect transistor as illustrated in [Fig.l].

[0024] [Fig.8] [Fig.8] schematically represents a sectional view of a stack of SiC-based semiconductor layers initially provided for manufacturing a field effect transistor according to an embodiment of the first aspect of the invention by implementing a manufacturing method according to an embodiment of the second aspect of the invention.

[0025] The drawings are given as examples and are not limiting of the invention. They constitute schematic representations of principle intended to facilitate the understanding of the invention and are not necessarily on the scale of practical applications. In particular, the thicknesses of the different layers illustrated are not necessarily representative of reality. DETAILED DESCRIPTION

[0026] Before beginning a detailed review of embodiments of the invention, optional features which may possibly be used in combination or alternatively are set out below:

[0027] According to an example of the first aspect of the invention, the transistor further comprises, between the ends of each crystal channel or of several crystal channels, a wall, preferably based on PDMS, forming a receptacle for an analyte.

[0028] According to another example of the first aspect of the invention, alternative or complementary to the previous one, the transistor further comprises, between the ends of each crystalline channel or of several crystalline channels, walls, preferably based on PDMS, forming a fluidic circulation channel for an analyte.

[0029] According to an example of the second aspect of the invention, the exposed portion of the second crystalline layer is etched to form a plurality of parallel and mutually disjointed crystalline channels.

[0030] According to another example of the second aspect of the invention, alternative or complementary to the previous one, the method further comprises a step consisting of: a. Depositing a passivation layer on at least part of an outer periphery of the exposed part of the second crystalline layer.

[0031] According to an example of the third aspect of the invention, the biosensor comprises at least at least one analyte receiving area, each receiving area being located on an exposed surface of a crystal channel of at least one, preferably each, junction field effect transistor.

[0032] According to another example of the third aspect of the invention, alternative or complementary to the previous one, the biosensor further comprises a reference electrode intended to be at least partly immersed in an analyte.

[0033] A substrate, a film, a layer, “based” on a material A, is understood to mean a substrate, a film, a layer comprising this material A only or this material A and possibly other materials, for example alloying elements, impurities or doping elements.

[0034] In the present invention, n or p doping types may be indicated, for example in the figures. These dopings are non-limiting examples. The invention covers all embodiments in which the dopings are reversed. Thus, if an exemplary embodiment mentions a p or n doping for a layer, the present description then describes, implicitly at least, the inverse example in which the layer has an n or p doping, respectively.

[0035] The doping ranges, expressed in volumetric concentration, preferentially associated with the different types of doping indicated in the present application are as follows: a. p+ or n+ doping: greater than 1 x 1020 cm3, b. p+ or n+ doping: 1 x 1018 cm3 to 9 x 1019 cm3, c. p or n doping: 1 x 1017 cm3 to 1 x 1018 cm3, and d. p- or n- doping: 1 x 1015 to 9 x 1016.

[0036] The embodiments described below indicate “n-type or p-type” doping. An n-type doping comprises an n-, n, n+ or n++ doping, and a p-type doping comprises a p-, p, p+ or p++ doping. In this document, we will speak of doping to designate indifferently an n-type or p-type doping.

[0037] A parameter “substantially equal / greater / less than” a given value means that this parameter is equal / greater / less than the given value, plus or minus 20%, or even 10%, close to this value. A parameter “substantially between” two given values ​​means that this parameter is at least equal to the smallest given value, plus or minus 20%, or even 10%, close to this value, and at most equal to the largest given value, plus or minus 20%, or even 10%, close to this value.

[0038] With reference to Figures 1 and 4, a first aspect of the invention relates to a junction field effect transistor or JFET 1. The latter may constitute a biosensor 0 or be comprised by a biosensor 0.

[0039] For example, the JFET 1 according to the embodiment illustrated in [Fig.l] can be associated with a reference electrode 2 to constitute a biosensor 0. The reference electrode 2 is then intended to be at least partly immersed in a tested analyte 4. It is for example based on silver (Ag) and silver chloride (AgCl).

[0040] For example, the JFET 1 according to the embodiment illustrated in [Fig.4] can constitute a biosensor 0 while being associated or not with another element.

[0041] Still with reference to Figures 1 and 4, the proposed JFET 1 comprises a substrate 11, a first crystalline layer 12, at least one crystalline channel 13, a source ohmic contact 14 and a drain ohmic contact 15, all made from silicon carbide (SiC). The substrate 11 may be crystalline or amorphous. The first crystalline layer 12, each crystalline channel 13, the source ohmic contact 14 and the drain ohmic contact 15, or even the substrate 11, preferably have a hexagonal crystalline structure; it is customary to name the corresponding polytype “4H-SiC”. The substrate 11, the first crystalline layer 12, each crystalline channel 13, the source ohmic contact 14 and the drain ohmic contact 15 have dopings adapted, in a known manner, to the production of the junction of the JFET 1.Typically, the substrate 11 is crystalline and has n-type doping, and more particularly of volumetric concentration n+, for example equal to 1019 cm3; the first crystalline layer 12 has p-type doping, and more particularly of volumetric concentration p+, for example greater than 1019 cm3; each crystalline channel 13 has n-type doping, and more particularly of volumetric concentration n-, for example equal to 9 x 1016 cm3 or of volumetric concentration n, for example equal to 1.5 x 1017 cm3; the ohmic contacts 14 and 15 have n-type doping, and more particularly of volumetric concentration n+, for example equal to 1019 cm3. The doping types can however be reversed and the volumetric concentrations can be modified / adapted, preferably in the doping ranges indicated above.

[0042] The first crystalline layer 12 extends over the substrate 11.

[0043] On a first part 121 of the first crystalline layer 12, each crystalline channel 13 extends. On one respective of two ends 131 and 132 of each crystalline channel 13 extend: a. the source ohmic contact 14, and b. the drain ohmic contact 15.

[0044] On a second part 122 of the first crystalline layer 12, adjacent (or not superimposed) to the first part 121, extend at least two ohmic contact recovery pads 16 and 17. The latter may be made from at least one of Chromium, Nickel and Aluminum, or a mixture thereof.

[0045] Furthermore, and with reference to [Fig.5], between each source ohmic contact 14 and at least one first ohmic contact recovery pad 16, at least one first conductive track 18 extends over the first crystalline layer 12, and between each drain ohmic contact 15 and a second ohmic contact recovery pad 17, different from the first 16, at least one second conductive track 19 extends over the first crystalline layer 12. The conductive tracks 18 and 19 may be made from at least one of chromium, nickel and aluminum. The conductive tracks 18 and 19 may have: a. a thickness substantially between 100 and 200 qm, preferably between 100 and 150 qm, for example equal to 110 qm, and / or b. a width substantially between 0.8 and 15 qm, preferably between 8 and 12 qm, for example equal to 10 qm.

[0046] Thus, Figures 1 and 4 are schematic and partial cross-sectional representations of embodiments of the proposed JFET 1, which can advantageously be manufactured by implementing a top-down process by known and well-controlled technological steps, including industrially. More particularly, the proposed JFET 1, at least according to its two embodiments illustrated in Figures 1 and 4, can be manufactured from a stack 10, as illustrated in [Fig.8], comprising: a. A substrate 11 as introduced above, b. On the substrate 11, a first crystalline layer 12 as introduced above above, c. On the first crystalline layer 12, a second crystalline layer 130 based on SiC and having n-type doping, and more particularly of volumetric concentration n- (in the illustrated example) or n, intended to form, by implementing the method according to the second aspect of the invention, the crystalline channel(s) 13, and d. On the second crystalline layer 130, a third crystalline layer 140 based on SiC and having n-type doping, and more particularly n+ volumetric concentration, intended to form, by implementing the method according to the second aspect of the invention, the source 14 and drain 15 ohmic contacts.

[0047] It may therefore be a stack 10 of a structure of three epitaxial layers on a 4H-SiC substrate with n+ doping. The upper layer 140 of this stack may be heavily doped to form the ohmic contacts 14 and 15. Under this upper layer, a layer 130 with n- doping is intended to serve as a drain-source conduction channel 13 between a source ohmic contact 14 and a drain ohmic contact 15. Under the layer 130, and on the substrate 11, the layer 12 with p+ doping is intended to fulfill two functions: on the one hand that of the back gate of the JFET 1, on the other hand that of isolating each crystal channel 13 relative to the substrate 11, as well as the case possibly relative to any other devices, by forming two back-to-back junctions including a p+n- junction between the first crystalline layer 12 and each crystalline channel 13 and a p+n+ junction between the first crystalline layer 12 and the substrate 11.

[0048] In the embodiment illustrated in [Fig. 1], the reference electrode 2 forms an upper gate, which, in combination with the aforementioned rear gate, allows the biosensor 0 thus proposed to form a dual-gate ion-sensitive FET (or ISFET for "Ion-Sensitive FET"), or DGISFET (for "Dual-Gate ISFET" in English). Note, however, that the JFET 1 according to its embodiment illustrated in [Fig. 1] can be used in measurement configurations not requiring a reference electrode 2. In comparison, the JFET 1 according to the embodiment illustrated in [Fig. 4] forms an ISFET essentially based on SiC, and does not require a reference electrode 2 either.

[0049] Thickness values ​​of the different layers are indicated, for purely illustrative purposes, in Figures 1 and 4. More generally: a. The substrate 11 may have a thickness of between 200 and 300 qm, preferably between 230 and 250 qm; and / or b. The first crystalline layer 12 may have a thickness of between 1 and 3 qm, preferably between 2 and 2.5 qm; and / or c. The second crystalline layer 130 and / or each crystalline channel 13 may have a thickness of between 0.2 and 0.6 qm, preferably between 0.25 and 0.5 qm; and / or d. The third crystalline layer 140 and / or the source 14 and drain 15 ohmic contacts may have a thickness of between 0.4 and 0.8 qm, preferably between 0.45 and 0.55 qm.

[0050] The design of the JFET 1 according to the first aspect of the invention is illustrated in Figures 5 and 6 with more perspective than in Figures 1 and 4. The crystalline channels 13 appear there as microwires. Each microwire may typically have: a. a length substantially between 200 and 400 qm, preferably between 300 and 330 qm, for example equal to 300 qm and / or b. a thickness substantially between 0.2 and 0.6 qm, preferably between 0.25 and 0.5 qm, for example equal to 0.3 qm.

[0051] As regards the width of the microwires, it was chosen, for the purposes of the aforementioned proof of concept, to be equal to 0.8 qm, 1 qm and 1.3 qm, in order to test the influence of this parameter. However, the width of the microwires is not limited to these examples and can be substantially between 0.1 and 1.5 qm.

[0052] The detection mechanism of the JFET 1 according to the first aspect of the invention, as well as of the biosensor 0 which it constitutes or which comprises it, is similar to that of the ISFETs based on silicon (Si) known from the prior art. The variation in pH of the analyte 4, here typically a liquid electrolyte, comprising for example charged biomolecules, results in a variation in the surface charge in the manner illustrated in FIGS. 2A and 2B, which depends on the pH value of the analyte 4 and the pH of the point of zero charge of the surface oxide 41, which can be noted pHpzc (with the index “pzc” for “point of zero charge” in English). This can be explained by the protonation or deprotonation of the SiC / SiOx-OH groups on the surface of the native oxide 41 of the crystal channel 13, which depends on the pH of the analyte 4. Such protonation as well as deprotonation automatically leads to a certain rearrangement of the distribution of ions in strata in the analyte 4 and affects the electrical double layer (or EDL) of the JFET 1.This electrical double layer imposes a certain surface potential on the surface of the native oxide 41, which triggers the detection of the pH of the analyte 4 as in Si-based ISFETs known from the prior art. If the pH of the analyte 4 is lower than the pHpzc of the surface oxide 41, the surface is protonated (it is positively charged); more particularly, at low pH levels, the SiC-OH groups are protonated to SiC-OH2+, which results in a positive charge on the surface of the native oxide 41 and triggers an accumulation of electrons in the underlying crystal channel 13. If the pH of the analyte 4 is higher than the pHpzc of the surface oxide 41, the surface is deprotonated (it is negatively charged); more particularly, at high pH levels, SiC-OH groups are deprotonated to SiC-0, which results in a negative charge on the surface of the native oxide 41 and triggers a thinning of the depleted zone of the underlying crystal channel 13.Thus, the charge changes at the surface of the native oxide 41 and the depletion of the crystal channel 13 shift the transfer characteristic as illustrated in [Fig.3].

[0053] The manufacturing by the above-mentioned top-down process consists first of all in providing the stack 10 described above, then, as already mentioned above, in known and well-controlled technological steps, including industrially. These steps are described below in a succinct manner given their ordinary appearance for the person skilled in the art.

[0054] The first of these steps may consist of depositing, on the third crystalline layer 140, a first electrically conductive layer.

[0055] A next step may consist of etching, through the first electrically conductive layer serving as an etching mask, the third crystalline layer 140, previously deposited, to expose a portion of the second crystalline layer 130 and form at least one source ohmic contact 14 and one drain ohmic contact 15.

[0056] Another step, following the deposition of the first electrically conductive layer, may consist of etching the first electrically conductive layer so as to form: a. Said at least two ohmic contact recovery pads 16, 17, b. Between each source ohmic contact 14 and at least one first 16 of said at least two ohmic contact recovery pads 16, 17, at least one first conductive track 18 extending over the first crystalline layer 12, and c. Between each drain ohmic contact 15 and at least one second 17 of said at least two ohmic contact recovery pads 16, 17, different from said at least one first 16, at least one second conductive track 19 extending over the first crystalline layer 12.

[0057] The manufacturing method may then include etching the exposed portion of the second crystalline layer 130 to form each crystalline channel 13.

[0058] More particularly, the exposed portion of the second crystalline layer 130 may be etched to form a plurality of parallel and mutually disjointed crystalline channels 13, as illustrated in [Fig.5].

[0059] More particularly, the aforementioned steps may consist of depositing a metal pattern, for example based on Nickel, to serve as a plasma etching mask for etching the third crystalline layer 140 (and forming the ohmic contacts of source 14 and drain 15) and as ohmic contact metallization of the electrical interconnection lines, source and drain, and of the ohmic contact recovery pads 16, 17. After the plasma etching and a possible thermal annealing, a second metal pattern, for example based on Aluminum, may be deposited to serve as a plasma etching mask for defining the crystalline channel(s) in the second crystalline layer 130, and more particularly at the level of the previously exposed zone of this layer.

[0060] Furthermore, and with reference to [Fig.6], the surface of the JFET 1 as illustrated in [Fig.5], can advantageously be passivated, for example with a layer of silicon oxide 33, leaving free access to the pads 16 and 17 and to the crystal channels 13.

[0061] For the measurements, in particular of pH, carried out with the JFET 1 according to any of the embodiments of the first aspect of the invention to provide the aforementioned proof of concept, the JFET 1 was brought into contact with a mechanical probe station chuck through which the back gate potential, VBg (see for example [Fig.l]), is applied to the JFET 1. Two probes were used for the source and drain biasing.

[0062] For the pH measurements carried out, two configurations of the analyte 4 on the detection surface of the crystalline channel(s) 13 were tested: a static configuration, illustrated in [Fig.l], using a wall 31, for example based on PDMS, forming a receptacle for the analyte 4, and a dynamic configuration, illustrated in [Fig.4], using walls, for example based on PDMS, forming a (micro)fluidic channel 32 for circulation of the analyte 4. The dynamic configuration may more particularly involve, in combination with the (micro)fluidic channel 32, a potentially automated system for circulation, possibly continuously, of the analyte 4.

[0063] Among the main advantages linked to the dynamic configuration, there are: a. that of being able to maintain maximum stability of the electrical measurement installation, in particular through the stability of the probes, b. that of automatic cleaning of the detection surface, and c. that of being able to change the analyte 4 circulating in the microfluidic channel 32.

[0064] In the static configuration, the JFET 1 is integrated with a simple liquid container illustrated by the wall referenced 31 in [Fig.l] on top of the JFET 1. This container seals the biosensor 0 (in particular to avoid spills of analyte 4), prevents the analyte 4 from coming into contact with the pads 16 and 17, and allows a drop of analyte 4 to be deposited, for example using a (micro)pipette, and maintained on the detection surface, at least during the measurement. It is also more immediate, in this static configuration, to integrate the reference electrode 2, if necessary.

[0065] Thus, a JFET 1 exclusively, or essentially, made of SiC is proposed which can advantageously be designed and manufactured according to a top-down approach. Its manufacturing process is suitable for mass production. The electrical performances of the SiC JFET 1 according to the first aspect of the invention have been evaluated in dry and liquid medium. A proof of concept for the use of the SiC JFET 1 according to the first aspect of the invention as a biosensor is validated by pH measurement. The SiC JFET according to the first aspect of the invention achieves sensitivities of up to 495 mV / pH, i.e. almost 100 times higher than the theoretical Nernst limit. The high sensitivity obtained is justified in particular by the modeling of the capacitive coupling between the upper gate and the back gate.Therefore, the SiC JFET 1 according to the first aspect of the invention is suitable for use in various in-vitro and in-vivo biochemical detection applications, since it satisfies the performances generally required in this area such as sensitivity and chemical stability, in particular in the medium or long term. More particularly, the JFET 1 according to the first aspect of the invention is fully suitable for use as a biosensor sensitive to 0 ions for measuring the hydrogen potential (pH) of an analyte 4, in particular, but not only: . a. in-vivo in a biological environment or b. in vitro in an environment with a pH lower than 3 or higher than 8.

[0066] The invention is not limited to the embodiments previously described and extends to all embodiments covered by the claims.

Claims

Claims

1. A junction field effect transistor (1) comprising: • A substrate (11) based on silicon carbide (SiC) and having doping of a first type, • On the substrate (11), a first crystalline layer (12) based on SiC and having doping of a second type different from the first, • On a first part (121) of the first crystalline layer (12): i. at least one crystalline channel (13) based on SiC and having doping of the first type, ii. on a first end (131) of each crystal channel (13), an ohmic source contact (14) based on SiC and having doping of the first type, and iii. on a second end (132) of each crystalline channel (13), an ohmic drain contact (15) based on SiC and having doping of the first type, • On a second part (122) of the first layer crystalline (12), adjacent to the first part (121), at least two ohmic contact recovery pads (16, 17), • Between each source ohmic contact (14) and at least a first (16) of said at least two ohmic contact recovery pads (16, 17), at least one first conductive track (18) extending over the first crystalline layer (12), and • Between each ohmic drain contact (15) and at least one second (17) of said at least two ohmic contact recovery pads (16, 17), different from said at least one first (16), at least one second conductive track (19) extending over the first crystalline layer (12).

2. Transistor (1) according to claim 1, further comprising, between the ends of each crystal channel or several crystal channels (13), a wall (31), preferably based on PDMS, forming a receptacle for an analyte (4).

3. Transistor (1) according to claim 1, further comprising, between the ends (131, 132) of each crystal channel or of several crystal channels (13), walls, preferably based on PDMS, forming a fluidic channel (32) for circulation of an analyte (4).

4. A method of manufacturing at least one junction field effect transistor (1) comprising the following steps: • Provide a stack (10) comprising: i. A substrate (11) based on silicon carbide (SiC) and having doping of a first type, ii. On the substrate (11), a first crystalline layer (12) based on SiC and having a doping of a second type different from the first, iii. On the first crystalline layer (12), a second crystalline layer (130) based on SiC and having doping of the first type, and iv. On the second crystalline layer (130), a third crystalline layer (140) based on SiC and having doping of the first type, • Deposit, on the third crystalline layer (140), a first electrically conductive layer, • Etching, through the first electrically conductive layer serving as an etching mask, the third crystalline layer (140) to expose a portion of the second crystalline layer (130) and form at least one source ohmic contact (14) and one drain ohmic contact (15), and • Etch the first electrically conductive layer to form: i. at least two ohmic contact recovery pads (16, 17), ii. Between each source ohmic contact (14) and at least a first (16) of said at least two ohmic contact recovery pads (16, 17), at least one first conductive track (18) extending over the first crystalline layer (12), and iii. Between each drain ohmic contact (15) and at least one second (17) of said at least two ohmic contact recovery pads (16, 17), different from said at least one first (16), at least one second conductive track (19) extending over the first crystalline layer (12), then • Etch the exposed portion of the second crystalline layer (130) to form at least one crystalline channel (13).

5. A manufacturing method according to the preceding claim, wherein the exposed portion of the second crystalline layer (130) is etched to form a plurality of parallel and mutually disjoint crystalline channels (13).

6. Manufacturing method according to any one of the two preceding claims, further comprising a step consisting of: • Depositing a passivation layer (33) on at least a portion of an outer periphery of the exposed portion of the second etched crystalline layer (130).

7. An ion-sensitive biosensor (0) comprising at least one junction field effect transistor (1) according to any one of claims 1 to 5.

8. 1 d.

3. Ion-sensitive biosensor (0) according to the preceding claim, comprising at least one analyte receiving area (4), each receiving area being located on an exposed surface of a crystal channel (13) of at least one, preferably each, junction field effect transistor (1).

9. Ion-sensitive biosensor (0) according to one of the two preceding claims, further comprising a reference electrode (2) intended to be at least partly immersed in an analyte (4).

10. Use of an ion-sensitive biosensor (0) according to any one of claims 7 to 9, for measuring the hydrogen potential (pH) of an analyte (4), in particular in-vivo in a biological environment or in-vitro in an environment with a pH lower than 3 or higher than 8.

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