Method of manufacturing a substrate, and substrate

Abstract

The invention relates to a method for manufacturing a substrate, in which an adhesive layer 115 sandwiched between a handling substrate 100 and a piezoelectric substrate 101 is polymerized in one polymerization location, and, following the polymerization step, the heterostructure 107 is moved to another location. The method is characterized in that during the polymerization step, the heterostructure 107 is colder than an ambient temperature of the other location. The invention also relates to a substrate 119 comprising an adhesive layer 115 arranged in a sandwich between a handling substrate 100 and a piezoelectric substrate 101, characterized in that when the substrate 119 has a temperature between 20°C and 25°C, in particular between 20°C and 22°C, the adhesive layer 115 is in compression, in particular relative to the handling substrate 100 in such a way as to induce a curvature (BOW) of the substrate. Figure 1

Description

Title of the invention: Method for manufacturing a substrate, and substrate

[0001] The present invention relates to a method of manufacturing a substrate comprising a handling substrate and a piezoelectric substrate. The invention also relates to such a substrate.

[0002] It is known in the art to manufacture wafers, also called piezoelectric-on-insulator wafers, called POI according to the English acronym "piezo-on-insulator", by means of a manufacturing process for transferring a layer, this process is also known under the name "Smart Cut". The Smart Cut process provides for the use of an intermediate manufacturing substrate, called a donor substrate, which is a composite substrate comprising a piezoelectric substrate. The Smart Cut process comprises the implantation of ions, for example hydrogen, in the piezoelectric substrate of the donor substrate in order to generate a weakening zone along which a thin layer of piezoelectric material can be detached from the piezoelectric substrate of the donor substrate.

[0003] One type of donor substrate is manufactured using an adhesive layer sandwiched between a handling substrate and the piezoelectric substrate. The occurrence of defects such as cracks in the adhesive layer, or delamination areas at the adhesion interface, reduce the yield of the process. In particular, cracks in the adhesive layer can propagate into the piezoelectric substrate, and be transferred into the final POI following detachment of the thin layer.

[0004] In view of the above, the object of the present invention is to increase the yield of a known substrate manufacturing process, and in particular to reduce the occurrence of cracks during the manufacturing of the substrates.

[0005] The object of the invention is achieved by means of a method of manufacturing a substrate, comprising the steps of: - provide a manipulation substrate and a piezoelectric substrate; - applying an adhesive layer of a material, in particular liquid, photo-polymerizable on a surface of the handling substrate and / or on a surface of the piezoelectric substrate; - forming a heterostructure comprising the manipulation substrate, the piezoelectric substrate and the adhesive layer, the adhesive layer being sandwiched between the manipulation substrate and the piezoelectric substrate; - polymerizing the adhesive layer of the heterostructure in a polymerization location; And, - moving the heterostructure to another location following the polymerization step, characterized in that during the polymerization step, the heterostructure is colder than an ambient temperature of the other location.

[0006] The adhesive layer is thus polymerized and mechanically set at a first temperature. When the heterostructure is moved to the other location having an ambient temperature being at a second temperature higher than the first temperature, the handling substrate and the piezoelectric substrate then undergo thermal expansion. This thermal expansion induces mechanical stress, in particular compression, in the adhesive layer. Surprisingly, substrates manufactured according to this method are less likely to be compromised by the appearance of cracks in the adhesive layer.

[0007] According to one aspect of the method of the invention, the method may comprise a step of cooling the heterostructure before and / or during the polymerization step to obtain the heterostructure colder than the ambient temperature of the other location. The cooling step makes it possible to obtain the heterostructure colder than the ambient temperature of the other location. This cooling step may take place during and in conjunction with the polymerization step. The cooling step may also take place, for example, immediately upstream of the polymerization step. The cooling step may also be started upstream of the polymerization step and continued throughout the course of the polymerization step.

[0008] According to one aspect of the method of the invention, the cooling step may comprise a step of placing the handling substrate on a wafer support configured to be cooled. The placement of the handling substrate on the wafer support allows the cooling first of the handling substrate, as well as, by thermal conduction, of the adhesive layer and the piezoelectric substrate. Thus the volume to be cooled remains essentially limited to the substrate itself.

[0009] According to one aspect of the method of the invention, the wafer support may comprise an integrated cooling means. This further reduces the volume to be cooled and reduces thermal losses.

[0010] According to one aspect of the method of the invention, during the polymerization step, the heterostructure may be colder than an ambient temperature of the polymerization location. In this configuration of the method, the manufactured substrate may already undergo an additional thermal expansion called preliminary thermal expansion upstream of the movement to the other location. In particular, in this configuration of the method, the manufactured substrate undergoes the preliminary thermal expansion as soon as the cooling step is concluded and the substrate heats up to the ambient temperature of the location of polymerization, before being moved.

[0011] According to one aspect of the process of the invention, the ambient temperature of the polymerization site may be between 20°C and 25°C, in particular between 20°C and 22°C. Thus, a standard temperature of a clean room may be used.

[0012] According to one aspect of the method of the invention, the cooling step may comprise a step of reducing the ambient temperature of the polymerization location relative to the ambient temperature of the other location. By reducing the ambient temperature of the polymerization location, for example by controlling the temperature of a clean room in which the polymerization takes place, the cooling of the heterostructure may be faster and more uniform than, for example, by cooling only the wafer support.

[0013] According to one aspect of the method of the invention, the ambient temperature of the other location may be between 20°C and 25°C, in particular between 20°C and 22°C. Thus, a standard clean room temperature may be used for the other location.

[0014] According to one aspect of the method of the invention, the method may comprise, after the polymerization step, a step of thinning the heterostructure, in particular at the other location. A thinning step makes it possible to prepare the manufactured substrate for subsequent use, for example for application in a thin layer transfer process, for example of the Smart Cut type, on a support substrate having a coefficient of thermal expansion comparable to or equal to the handling substrate.

[0015] According to one aspect of the method of the invention, the thinning step may comprise a step of grinding, or sanding, the piezoelectric substrate. In particular, the thinning step may comprise a plurality of successive grinding steps, for example a first rough grinding step and a second finish grinding step. Such a thinning step may facilitate the adaptation of the raw piezoelectric substrate to a useful thickness for subsequent processing.

[0016] According to one aspect of the method of the invention, the thinning step may comprise a chemical-mechanical polishing step, or chemical-mechanical planarization, or CMP according to the acronym for "chemical-mechanical planarization" or "chemical-mechanical polishing". In particular, the CMP step may be carried out between a first grinding step and a second grinding step. Such a CMP step may facilitate the application of the substrate in a subsequent Smart Cut process.

[0017] According to one aspect of the method of the invention, during the polymerization step, the heterostructure may have a temperature at least 1°C cooler than the ambient temperature of the other location. In particular, during the polymerization step, the heterostructure may have a temperature 2°C to 15°C cooler, preferably 4°C to 8°C cooler, than the ambient temperature of the other location. place. With a cooler temperature of at least 1°C, sufficient mechanical stress, especially compression, can be observed in the adhesive layer, and / or the rate of cracking in the manufactured substrate is reduced.

[0018] According to one aspect of the method of the invention, during the polymerization step, the heterostructure may have a temperature of between 11°C and 21°C. In particular, during the polymerization step, the heterostructure may have a temperature of between 15°C and 18°C. In this configuration, the method may be operated in such a way as to obtain cooling relative to the ambient temperature of the other location and / or the ambient temperature of the polymerization location which may be maintained at a standard clean room temperature and making it possible to reduce the appearance of cracks.

[0019] According to one aspect of the method of the invention, the polymerization step is carried out in such a manner and the substrate is maintained under environmental conditions such that the polymerized adhesive layer is maintained in the compressed state until a layer of the piezoelectric substrate is transferred onto a support substrate.

[0020] According to a variant, after the polymerization step, a step of annealing the heterostructure can be carried out, in particular at a temperature above 90°C, in particular between 190°C and 210°C and this preferably for a duration of 30 minutes to 20 hours. This annealing makes it possible to consolidate the heterostructure while limiting delamination.

[0021] The invention also relates to a substrate comprising a handling substrate, a piezoelectric substrate and a polymerized adhesive layer, the polymerized adhesive layer being arranged in a sandwich between the handling substrate and the piezoelectric substrate. The inventive substrate is characterized in that when the substrate has a temperature between 20°C and 25°C, in particular between 20°C and 22°C, the adhesive layer is in compression. Such an arrangement of the adhesive layer ensures a substrate having a heterostructure which does not have cracks in the adhesive layer, or which at least has fewer cracks in the adhesive layer.

[0022] According to one aspect of the inventive substrate, when the substrate has said temperature, the adhesive layer may be in compression relative to the handling substrate. According to one aspect of the inventive substrate, when the substrate has said temperature, the adhesive layer may be in compression in such a way as to induce a curvature, or a BOW according to the English term, of the substrate.

[0023] According to one aspect of the inventive substrate, the induced curvature may be a positive curvature of at least 30 pm, when the piezoelectric substrate is positioned over the manipulation substrate, in particular when the manipulation substrate is positioned on a measurement reference plane.

[0024] According to one aspect of the inventive substrate, the induced curvature may be a curvature positive between 50 pm inclusive and 150 pm inclusive, preferably between 55 pm inclusive and 65 pm inclusive.

[0025] According to aspects of the method and substrate of the invention, the coefficient of thermal expansion of the handling substrate may be different from, in particular less than, the coefficient of thermal expansion of the piezoelectric substrate.

[0026] According to aspects of the method and the substrate of the invention, the handling substrate may be a substrate comprising, in particular based on, a material chosen from silicon, sapphire, aluminum nitride, silicon carbide, and gallium arsenide. These substrates are particularly suitable for handling in the context of a layer transfer method on a support substrate such as a Smart Cut method, since the same type of support substrate can be used, which reduces the problem linked to the difference in coefficient of thermal expansion between the piezoelectric material and the material of the support substrate.

[0027] According to aspects of the method and the substrate of the invention, the piezoelectric substrate is a substrate comprising, in particular based on, a material chosen from quartz, lithium tantalate, lithium niobate, aluminum nitride, gallium nitride, gallium orthophosphate, zinc oxide, lead zirconate titanate, barium titanate, langasite, langanite, and langatate. These piezoelectric substrates are desirable for manufacturing a POI by a layer transfer process, for example by a Smart Cut process.

[0028] The objects, features and advantages of the invention as set forth above will be more fully understood and appreciated by studying the following more detailed description of embodiments of the invention, with the aid of the accompanying drawings.

[0029] [Fig. 1] illustrates a method of manufacturing a substrate according to a first embodiment of the invention.

[0030] [Fig.2] illustrates a method of manufacturing a substrate according to a third embodiment of the invention.

[0031] The technical characteristics and associated advantages of the embodiments described below may be freely combined one by one or adapted to particular embodiments, provided that the spirit of the invention as described above is respected.

[0032] In the following, identical reference signs in the figures and the description are used to designate elements of the same nature. Unless otherwise explained in the text, the objects illustrated in the figures are neither to scale relative to each other, nor to scale in their Cartesian dimensions relative to each other.

[0033] A method of manufacturing a substrate according to a first embodiment of the invention is described with reference to [Fig.l].

[0034] The method begins with a first step A of providing a manufacturing substrate pulation 100 and a piezoelectric substrate 101. In this case, the manipulation substrate 100 is a solid silicon substrate and the piezoelectric substrate 101 is a lithium tantalate (LTO) substrate. This piezoelectric substrate 101 has a coefficient of thermal expansion between 9*10 6 K 1 and 16*10 6 K *, depending on the crystal direction. Thus, the piezoelectric substrate 101 has a coefficient of thermal expansion greater than the coefficient of thermal expansion of the manipulation substrate 100 which is of the order of 2.5*106 K1. The piezoelectric substrate 101 may have a thickness between 300 pm and 500 pm, preferably 350 pm, and the manipulation substrate may have a greater thickness, preferably at least 500 pm.

[0035] Alternatively, a manipulation substrate 100 based on sapphire, aluminum nitride, silicon carbide, or gallium arsenide may be chosen. In addition, as an alternative, a piezoelectric substrate 101 based on lithium niobate (LNO), aluminum nitride, gallium nitride, gallium orthophosphate, zinc oxide, lead zirconate titanate, barium titanate, langasite, langanite, or langatate may be chosen.

[0036] In a second step B, a liquid adhesive layer 103 of a photopolymerizable material is applied to a first exposed surface 105 of the silicon handling substrate 100. According to a non-limiting example, the adhesive layer 103 may be a layer of a material marketed under the reference “NOA 61” by the company NORLAND PRODUCTS. Other examples of “photo-resist” type material, in particular hydrocarbon polymer materials composed of no-volacs are also conceivable. Preferably, the adhesive layer 103 is applied to a thickness between 0.1 μm and 25 μm, preferably between 2 μm and 8 μm by centrifugal coating, or “spin coating” in English terminology.

[0037] Then, in a third step C, the piezoelectric substrate 101 is positioned on the handling substrate 100 provided with the liquid adhesive layer 103 so as to arrange the adhesive layer 103 in a sandwich between the handling substrate 100 and the piezoelectric substrate 101. Thus, a heterostructure 107 is formed composed of the handling substrate 100, the piezoelectric substrate 101 and the adhesive layer 103 arranged in a sandwich between the handling substrate 100 and the piezoelectric substrate 101. The heterostructure 107 has a temperature T1 corresponding to the ambient temperature of the place of formation of the heterostructure 107, for example a controlled ambient temperature between 20°C and 25°C. Preferably, the temperature T1 is between 20°C and 22°C, for example 21°C.

[0038] The heterostructure 107 is, according to a fourth step D, brought into a poly location merization having a temperature T2 and is placed there on a wafer support 109 in the polymerization location. The temperature T2 corresponds to the ambient temperature of the location of a (further) polymerization of the liquid adhesive layer 103. Preferably the temperature T2 is identical to Tl or within the range [Tl -1°C; Tl + 1°C]. For example, T2 may be controlled between 20° and 25°, preferably between 20°C and 22°C, for example at 21°C.

[0039] The wafer support 109, called "chuck" in English terminology, according to the present first embodiment of the invention is a wafer support 109 which can be cooled. Thus, the wafer support 109 comprises a cooling means 111, for example a system for circulating a cooling liquid, for example water, making it possible to reduce the temperature of the wafer support 109 relative to the ambient temperature of the environment of the wafer support 109. Preferably, the cooling liquid has a temperature between 10°C and 17°C.

[0040] The wafer support 109 is then at a temperature T3 lower than the temperature T2, which is the ambient temperature of the location where the wafer support 109 is located. The heterostructure 107 is placed on the wafer support 109 in such a way that a second surface 113, opposite the first surface 105, of the handling substrate 100 comes into mechanical and thermal contact with the wafer support 109. Preferably, the heterostructure 107 is placed on the wafer support 109 in such a way that the entire second surface 113 or at least the major part thereof is in mechanical and thermal contact with the wafer support 109.

[0041] Thus, the handling substrate 100, and by thermal conduction the entire heterostructure 107, have a temperature T4 reduced compared to the temperature of the polymerization site T2. Thus, for example, the heterostructure 107 can be cooled to a temperature T4 which is at least 1°C below the ambient temperature T2. Or, the heterostructure 107 can be cooled to the temperature T3 of the wafer support 109.

[0042] In the following step E, the liquid adhesive layer 103 is polymerized in the same place to become, at the end of the polymerization, a polymerized adhesive layer 115. In this embodiment, the liquid adhesive layer 103 is polymerized by irradiating it with an ultraviolet UV light flux. According to a non-limiting example, the adhesive layer 103 is irradiated with ultraviolet UV radiation 20 times for five seconds, for a total of 100 seconds. Preferably, the adhesive layer 103 can be irradiated with a power of 100 mW / cm2 and / or with an irradiation wavelength of 365 nm. At the end of step E, the adhesive layer 115 is polymerized. Generally, the wavelength is chosen according to the material of the adhesive layer 103 to be polymerized and the material that the light must pass through, here the LTO of the piezoelectric substrate 101.

[0043] In this embodiment, the wafer support 109 is kept cooled at the same temperature until the end of the fifth step E. Thus, the step of cooling the heterostructure 107 coincides with the fourth and fifth steps D and E. In alternative embodiments, the wafer support 109 is cooled only during the polymerization step E, or only during the step D upstream of the polymerization step E.

[0044] Then, in a sixth step F, the heterostructure 107 is moved to another location, for example to carry out another treatment of the heterostructure or to store it pending further treatment. The other location has an ambient temperature T5 which is higher than T4. Here, the temperature T5 may be identical to the temperature T1 and / or the temperature T2. Thus, the temperature T5 is controlled between 20°C and 25°C, preferably between 20°C and 22°C, for example at 21°C. Thus, the piezoelectric substrate 101, previously cooled to the temperature T3, ceases to be cooled by the wafer support 109, and takes on the ambient temperature T5 at the latest following arrival in the other location. The piezoelectric substrate 101 may also take on the ambient temperature T5 before arriving in the other location, for example if the temperature T5 is equivalent to the temperature T2.

[0045] The piezoelectric substrate 101 having a thermal expansion coefficient greater than the thermal expansion coefficient of the handling substrate 100, the piezoelectric substrate 101 expands more than the handling substrate 100. Thus, a mechanical stress is exerted on the adhesive layer 103 during the transition from T4 to T5. This mechanical stress can induce a compression of the adhesive layer 103 relative to the handling substrate 100. The mechanical stress can also induce a positive curvature B, also called BOW in the field of wafers in the semiconductor industry. Depending on the choice of the temperature T4 of the heterostructure 107 relative to the ambient temperature of the other location T5, BOW B values ​​of at least 30 pm, in particular between 50 pm and 100 pm are observed.

[0046] An example of subsequent processing is illustrated in step G. The heterostructure 107 is subjected to thinning to obtain a thinner piezoelectric substrate 103'. The thinning treatment is applied at the exposed surface 117 of the piezoelectric substrate 101 with the temperature T5. In this case, the thinning step G may comprise, successively, a first rough grinding, a chemical-mechanical polishing, a second finish grinding, and trimming. Preferably, the thickness may be reduced to a value between 10 μm and 50 μm, even more advantageously to a value between 20 μm and 30 μm.

[0047] The substrate 119 obtained at the end of step G comprises the handling substrate 100, the thinned piezoelectric substrate 101' and the polymerized adhesive layer 115, the adhesive layer 115 being arranged in a sandwich between the handling substrate 100 and the piezoelectric substrate 101'. When the substrate 119 is at the temperature T5, therefore typically between 20°C and 25°C, in particular between 20°C and 22°C, the adhesive layer 115 is in compression relative to the handling substrate 100, in particular in such a way as to induce a curvature (BOW) B of the substrate 119.

[0048] The substrate 119 corresponds to a second embodiment of the invention. The substrate 119 can in particular serve as a donor substrate, also called a pseudo-donor substrate (PSD), in the context of an implementation of a method for transferring a piezoelectric layer onto a support substrate, in particular made of silicon. Such a method is known as Smart Cut. During this type of method, a weakening zone is formed in the piezoelectric substrate 101' of the substrate 119, for example by implantation of atomic species, such as hydrogen or helium ions. Then, the free surface 117 of the piezoelectric substrate 101' is bonded by atomic force, also called molecular bonding, to the surface of a support substrate. After an input of energy, thermal and / or mechanical, the piezoelectric layer detaches from the rest of the substrate 119 to be transferred onto the support substrate.Alternatively, a dielectric layer, such as silicon oxide and / or silicon nitride, may be formed on the surface of the support substrate and / or the surface of the piezoelectric substrate prior to bonding to facilitate atomic force bonding.

[0049] A method for manufacturing a substrate according to a third embodiment of the invention is now described with reference to [Fig. 2]. The method of the third embodiment differs from the method of the first embodiment with respect to the way of cooling the heterostructure. That is, it differs with respect to the means of obtaining the heterostructure colder than an ambient temperature of the other place in which the heterostructure is moved after polymerization. The method of the third embodiment begins with a first step A' of providing a handling substrate 200 and a piezoelectric substrate 201. Here, step A' is identical to step A of the first embodiment, and the substrates 200, 201 are respectively identical to the substrates 100, 101.

[0050] Then, during a second step B', an adhesive layer 203 of a photopolymerizable material is applied to a first surface 205 of the piezoelectric substrate 201. Here, the adhesive layer 203 is applied to the surface 205 identically to the application of the adhesive layer 103 to the surface 105. According to a variant, the adhesive layer 203 can also be applied to the surface of the handling substrate 200 as in the first embodiment.

[0051] A heterostructure 207 is formed in a third step C by positioning the piezoelectric substrate 201 provided with the adhesive layer 203 on the handling substrate 200. Thus, the heterostructure 207 comprises the piezoelectric substrate 201, the handling substrate 200, and the adhesive layer 203 sandwiched between the handling substrate 200 and the piezoelectric substrate 201.

[0052] In a fourth step D', the heterostructure 207 is brought into a poly location polymerization 209 having a controlled ambient temperature Tl'. The temperature Tl' is kept lower than an ambient temperature of another location, in which the heterostructure 207 will be moved later following the polymerization step. Thus, here, the temperature Tl' is controlled at a temperature between 11°C and 21°C, in particular between 15°C and 18°C. The heterostructure 207, brought into the polymerization location having a controlled temperature Tl', then also takes on the temperature Tl'. Here the polymerization location 209 can be the interior of the device in which the polymerization will take place in the next step.

[0053] The heterostructure 207 is then polymerized, during a fifth step E', carried out here in a manner identical or corresponding to the polymerization of step E of the first embodiment, in particular using ultraviolet radiation UV. Thus, during the polymerization step E', the adhesive layer 203 is polymerized to become a polymerized adhesive layer 211. During the polymerization step E', the polymerization site 209 is maintained at room temperature T1'. Thus, a cooling step coincides with steps D' and E' to obtain the heterostructure 207.

[0054] In a sixth step F', the heterostructure 207 is moved to another location 213 having an ambient temperature T2' at the ambient temperature T2' of the polymerization location 209. Here, the ambient temperature T2' is between 20°C and 25°C, in particular between 20°C and 22°C. Furthermore, the ambient temperature T2' is at least 1°C higher than the cooled temperature T1'. In particular, the ambient temperature T1' is reduced, i.e. lower, by 2°C to 15°C, preferably by 4°C to 8°C, compared to the temperature T2'. According to a variant, it is also possible to keep the polymerization location 209 at the standard temperature of clean rooms, and the temperature of the other location 213 is increased to a higher temperature, for example by heating means.

[0055] Similar to the method of the first embodiment, during the sixth step F', the heterostructure 207 is no longer cooled and takes on the ambient temperature T2'. The divergence of thermal expansion between the handling substrate 200 and the piezoelectric substrate 201 generates the same mechanical stress, in particular compression, in the polymerized adhesive layer 211 as in the first embodiment. This compression strengthens the manufactured substrate so as to reduce its susceptibility to the appearance of cracks.

[0056] According to a seventh optional step G', the heterostructure 207 is subjected to a consolidation annealing to obtain the final substrate 215 manufactured by the method of the third embodiment. For this, the heterostructure 207 is placed in an oven 217 and heated to a temperature above 100°C, preferably to a temperature between 190°C and 210°C for a predetermined duration, typically between 30 min and 8 hours. A consolidation annealing can also be carried out in the method of the first embodiment.

[0057] After the annealing step, a thinning step such as step G of the first embodiment can also be carried out.

[0058] The final substrate 215 obtained at the end of step G', or where appropriate after thinning, comprises the handling substrate 200, the piezoelectric substrate 201 and the polymerized adhesive layer 211, the adhesive layer 211 being arranged in a sandwich between the handling substrate 200 and the piezoelectric substrate 201, thinned or not. When the final substrate 215 has a temperature between 20°C and 25°C, in particular between 20°C and 22°C, the adhesive layer 211 is in compression relative to the handling substrate 200, in particular in such a way as to induce a curvature (BOW) of the final substrate 215 manufactured. Thus, a final substrate 215 is obtained as in the second embodiment of the invention. The final substrate 215 can then also serve as a donor substrate in a transfer process as described above.

[0059] A statistical study carried out on the manufacturing process according to the first embodiment of the invention revealed a significant reduction in the rate of appearance of cracks in the manufactured PSDs. Thus, for a temperature T4 of 19°C without an annealing step and a temperature T5 of 21°C, a virtual absence of cracks is observed and for a process with an annealing step of 5 hours at 100°C, a virtual absence of cracks is observed for a temperature T4 between 15°C and 17°C.

[0060] Reference signs 100 handling substrate 101 piezoelectric substrate 103 adhesive layer 105 first surface of the handling substrate 107 heterostructure 109 plate holder 111 cooling medium 113 second surface of the handling substrate 115 polymerized adhesive layer 117 exposed surface of the piezoelectric substrate 119 PSD Tl ambient temperature of a heterostructure formation site T2 ambient temperature of a polymerization site T3 temperature of cooled wafer support T4 temperature of cooled heterostructure T5 temperature of other location 200 handling substrate 201 piezoelectric substrate 203 liquid adhesive layer 205 first surface of the handling substrate 207 hetero structure 209 polymerization location 211 polymerized adhesive layer 215 final substrate 217 oven Tl' ambient temperature of the place of formation of the heterostructure and polymerization T2' ambient temperature of the other location

Claims

Claims

1. A method of manufacturing a substrate, comprising the steps of: - providing a handling substrate (100, 200) and a piezoelectric substrate (101, 201); - applying an adhesive layer (103, 203) of a material, in particular liquid, photopolymerizable on a surface (105) of the handling substrate (100, 200) and / or on a surface (205) of the piezoelectric substrate (101, 201); - forming a heterostructure (107, 207) comprising the manipulation substrate (100, 200), the piezoelectric substrate (101, 201) and the adhesive layer (103, 203), the adhesive layer (103, 203) being sandwiched between the manipulation substrate (100, 200) and the piezoelectric substrate (101, 201); - polymerizing the adhesive layer (115, 211) of the heterostructure (107, 207) in a polymerization location (209); and, - moving the heterostructure (107, 207) to another location following the polymerization step;characterized in that during the polymerization step, the heterostructure (107, 207) is colder than an ambient temperature of the other location (T5, T2').;

2. Method according to claim 1, comprising a step of cooling the heterostructure (107, 207) before and / or during the polymerization step to obtain the heterostructure (107, 207) colder than the ambient temperature of the other location (T5, T2').

3. A method according to claim 2, the cooling step comprising a step of placing the handling substrate (100, 200) on a wafer carrier (109) configured to be cooled, in particular a wafer carrier (109) comprising integrated cooling means (111).

4. Method according to claim 3, wherein during the polymerization step, the heterostructure (107, 207) is colder than an ambient temperature of the polymerization location (T2, Tl'), in particular the ambient temperature of the polymerization location (T2, Tl') being between 20°C and 25°C, in particular between 20°C and 22°C.

5. A method according to claim 2 or 3, the cooling step comprising a step of reducing the ambient temperature of the polymerization location (TT) relative to the ambient temperature of the other place (T2').

6. Method according to one of claims 1 to 5, wherein the ambient temperature of the other location (T5, T2') is between 20°C and 25°C, in particular between 20°C and 22°C.

7. Method according to claim 1 to 6, comprising, after the polymerization step, a step of thinning the heterostructure (107, 207), in particular a step of grinding the piezoelectric substrate (101, 201) and / or a step of chemical mechanical polishing (CMP) of the piezoelectric substrate (107, 207) at the other location (209).

8. Method according to one of claims 1 to 7, wherein during the polymerization step, the heterostructure (107, 207) has a temperature at least 1°C colder, in particular 2°C to 15°C colder, preferably 4°C to 8°C colder than the ambient temperature of the other location (T5, T2').

9. Method according to one of claims 1 to 8, wherein during the polymerization step, the heterostructure (107, 207) has a temperature (T4) between 11°C and 21°C, in particular between 15°C and 18°C.

10. Method according to one of claims 1 to 9, comprising, after the polymerization step, a step of annealing the heterostructure (107, 207), in particular at a temperature above 90°C, in particular between 190°C and 210°C.

11. Method according to one of claims 1 to 10, wherein the coefficient of thermal expansion of the manipulation substrate (100, 200) is different from, in particular less than, the coefficient of thermal expansion of the piezoelectric substrate (101, 201).

12. Method according to one of claims 1 to 11, in which the handling substrate (100, 200) is a substrate comprising, in particular based on, a material chosen from silicon, sapphire, aluminum nitride, silicon carbide, and gallium arsenide.

13. Method according to one of claims 1 to 12, in which the piezoelectric substrate (101, 201) is a substrate comprising, in particular based on, a material chosen from quartz, lithium tantalate, lithium niobate, aluminum nitride, gallium nitride, gallium orthophosphate, zinc oxide, lead zirconate titanate, barium titanate, langasite, langanite, and langatate.

14. A substrate comprising a handling substrate (100, 200), a piezoelectric substrate (101, 201) and a polymerized adhesive layer (115), the polymerized adhesive layer (115) being sandwiched between the handling substrate (100, 200) and the piezoelectric substrate (101, 201), characterized in that when the substrate has a temperature between 20°C and 25°C, in particular between 20°C and 22°C, the polymerized adhesive layer (115) is in compression, in particular relative to the handling substrate (100, 200) in such a way as to induce a curvature (BOW) of the substrate.

15. Substrate according to claim 14 having, when the piezoelectric substrate is positioned over the manipulation substrate (100, 200), a positive curvature of at least 30 pm, preferably between 50 pm and 100 pm.

16. Substrate according to claim 14 or 15, wherein the coefficient of thermal expansion of the manipulation substrate (100, 200) is different from, in particular less than, the coefficient of thermal expansion of the piezoelectric substrate (101, 201).

17. Substrate according to one of claims 14 to 16, in which the handling substrate (100, 200) is a substrate comprising, in particular based on, a material chosen from silicon, sapphire, aluminum nitride, silicon carbide, and gallium arsenide.

18. Substrate according to one of claims 14 to 17, wherein the piezoelectric substrate (101, 201) is a substrate comprising, in particular based on, a material chosen from quartz, lithium tantalate, lithium niobate, aluminum nitride, gallium nitride, gallium orthophosphate, zinc oxide, lead zirconate titanate, barium titanate, langasite, langanite, and langatate.

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