Method for determining the temperature in the environment of a superconducting passive component
The method leverages kinetic inductance of superconducting materials to accurately measure temperature near quantum chips, addressing heat and thermalization issues, enabling precise temperature control in quantum computing systems.
Patent Information
- Authority / Receiving Office
- FR · FR
- Patent Type
- Patents
- Current Assignee / Owner
- COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Filing Date
- 2024-05-27
- Publication Date
- 2026-06-05
AI Technical Summary
The challenge in quantum computing systems is accurately measuring temperature near superconducting passive components within a cryostat due to heat generation and imperfect thermalization, leading to distorted readings, especially in the low-temperature range of a few mK to 10 K, where existing bulky apparatuses are not integrable.
A method using the kinetic inductance of superconducting passive components, such as NbN, NbTiN, or TiN, integrated into the interposer or chip layers, to determine temperature by measuring geometric and total inductance, and calculating temperature from kinetic inductance based on material properties and dimensions.
Enables precise, compact, and stable temperature measurement within the cryostat, facilitating effective temperature control and management by determining setpoint temperatures and regulating as needed, with sensitivity between 0.5Tc and Tc.
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Abstract
Description
Title of the invention: Method for determining the temperature in the environment of a passive superconducting component. Technical field
[0001] The invention relates to the technical field of temperature measurement and finds its application in temperature measurement in platforms comprising qubit arrays and their control electronics. The invention also relates to a method for temperature control in a cryostat, as well as to a system for determining the temperature in the environment of an assembly comprising at least one passive component.
[0002] Quantum computing based on qubits operating at low temperatures is used for the design of quantum computers. Quantum dots, or quantum chips, are used to trap individual charges and their associated spins, which are then used as qubits.
[0003] The proper functioning of these quantum chips relies on several technological aspects such as wiring and packaging. The complexity of packaging quantum chips lies essentially in the large number of input and output signals to be addressed and read, all within a cryostat, at temperatures ranging from a few mK to approximately 1 K.
[0004] This led to the development of CMOS (Complementary Metal-Oxide-Semiconductor) control cryo-electronics integrated close to the qubits in the cryostat. This also led to the design and fabrication of multi-chip assemblies in three-dimensional architectures to integrate both quantum and cryo-CMOS chips.
[0005] Fig. 1 illustrates an example of such a three-dimensional architecture for integrating both the quantum chip 1 and the control chip 2 (Cryo-CMOS chip), used for controlling and reading the signals transmitted by the quantum chip 1. In a general three-dimensional architecture, a structure called an "interposer" 3, for example silicon-based, has a dual function of mechanical support for the quantum chip 1 and the control chips 2, and of routing in order to connect the quantum chip 1 and the control chip 2.
[0006] The quantum chip 1 and the control chip 2 are mounted on the interposer 3 using a flip-chip technology. The control chips 2, connected to the quantum chip 1 via routing lines of the interposer 3, perform control functions such as signal multiplexing and signal reading. Passive components 4, such as resistors, inductors, and capacitors, are also integrated into the Interposer routing levels are used to provide alternative read capabilities. The interposer 3 is itself deposited on a substrate 5 or on a PCB. Those skilled in the art may refer to document [1], which describes in more detail the platform illustrated in [Fig. 1].
[0007] The passive components integrated with the routing tracks of the interposer 3, or in the last levels of the chips (or BEOL for Back-End Of Line; they constitute the last routing levels of the chip) are made with superconducting materials, the main property of which is to make the material perfectly and abruptly conductive of electricity below a so-called critical temperature.
[0008] Thus, using passive components integrated into superconducting materials allows:
[0009] - to increase the performance of passive components (quality factor);
[0010] - to eliminate the Joule effect;
[0011] - to limit thermal transport between the control chip 2 and the quantum chip 1.
[0012] The operating conditions of the system (the three-dimensional architecture) can vary from a few mK to 10 K, in order to operate below the critical temperature. The available space is very limited since the system is placed in a cryostat whose cooling capacity is limited by the volume to be cooled.
[0013] Thus, one of the problems currently encountered is the measurement of the temperature as close as possible to the chips and / or the interposer, in order to adjust the temperature of the cryostat if necessary.
[0014] Indeed, at these temperature ranges, it becomes difficult to determine whether the thermometer temperature is the same as that of the sample (the object being measured): the measurement can generate heat, and the thermalization between the thermometer and the sample is not perfect. This results in a distorted temperature reading, the discrepancy of which can be difficult to characterize.
[0015] Superconducting temperature fixed point devices provide a number of calibrated reference temperatures ranging from 10 mK to 7.2 K, by resistive measurement of the superconducting transition. These devices have limited temperature resolution, and it is necessary to add a bulky apparatus that cannot be directly integrated onto the sample being temperature measured.
[0016] There is therefore a need to provide a method for determining temperature that is easily integrable into an integrated circuit, with a stable measurement. Summary of the invention
[0017] An object of the invention is therefore a method for determining the temperature in the environment of an assembly comprising at least one passive component, the passive component being integrated into a single-layer or multi-layer assembly, comprising the steps of:
[0018] - determination of the geometric inductance of the passive component, from the dimensions of the passive component;
[0019] - measurement of the inductance of the passive component, called total inductance, the passive component being used in a temperature range such that it is in a superconducting state;
[0020] - determination of the kinetic inductance of the passive component, from the total inductance and the geometric inductance;
[0021] - determination of temperature from the kinetic inductance of the component.
[0022] Advantageously, the measurement of the total inductance is carried out by measuring the parameters S on at least one of the ports of the passive component.
[0023] Advantageously, the measurement of the total inductance is carried out by an impedance measurement across the terminals of the passive component.
[0024] Advantageously, the measurement of the total inductance is carried out by a measurement of the resonance frequency.
[0025] Advantageously, the passive component comprises a superconducting material selected from a group comprising: NbN, NbTiN, TiN, granular AlCu.
[0026] Advantageously, the passive component is a transmission line, the transmission line being integrated on a metallization level.
[0027] Advantageously, the passive component is a coil, the coil being integrated on at least two levels of metallization.
[0028] Advantageously, the passive component is integrated into the same substrate as a quantum chip or quantum chip control chip, so as to determine the temperature of the chip.
[0029] Advantageously, the assembly comprises a plurality of passive components, the passive components being made of different materials, the materials being determined according to the temperature range to be determined.
[0030] Advantageously, the assembly comprises a plurality of passive components, the passive components having different dimensions, the dimensions being determined according to the temperature range to be determined and the sensitivity sought.
[0031] Advantageously, the temperature range is between a so-called sensitivity temperature and the critical temperature of the material, the critical temperature corresponding to the temperature below which the material is in a superconducting state, the sensitivity temperature being lower than the critical temperature.
[0032] Advantageously, Ts = aTc, Tc corresponding to the critical temperature, Ts the sensitivity temperature, and 0.5 < a < 0.8.
[0033] The invention also relates to a method for controlling the temperature in a cryostat, comprising:
[0034] - the determination of a setpoint temperature for the cryostat;
[0035] - a temperature measurement in accordance with the aforementioned method;
[0036] - temperature regulation if the measured temperature is different from the setpoint temperature.
[0037] The invention also relates to a system for determining the temperature in the environment of an assembly comprising at least one passive component, the passive component being integrated into a single-layer or multi-layer assembly, the system comprising:
[0038] - a calculation unit, configured to determine the geometric inductance of the passive component, based on the dimensions of the passive component;
[0039] - a system for measuring the inductance of the passive component, called inductance total, the passive component being used in a temperature range such that it is in a superconducting state;
[0040] the computing unit being further configured for
[0041] - determine the kinetic inductance of the passive component, from the inductance total and geometric inductance;
[0042] - determine the temperature from the kinetic inductance of the component.
[0043] The invention also relates to a cryostat comprising the aforementioned system. Description of the figures
[0044] Other features, details and advantages of the invention will become apparent from the description made with reference to the accompanying drawings given by way of example.
[0045] Fig. 1, already described, illustrates the mounting of chips on an interposer.
[0046] Figure 2 illustrates an embodiment of integrating a passive component into a single-layer assembly.
[0047] Figure 3 illustrates an example of kinetic inductance curves as a function of temperature.
[0048] Figure 4 illustrates embodiments of integrating a passive component into a single-layer assembly.
[0049] Fig. 5 illustrates the integration steps of the passive component with a single layer of metallization.
[0050] Fig. 6 illustrates the integration steps of the passive component with two layers of metallization.
[0051] Figures 7 and 8 illustrate measurements obtained with the method according to the invention. Detailed description
[0052] The passive component 6 illustrated in [Fig. 2] is shown both schematically, viewed from above (to the right of the double arrow), and in more detail (to the left of the double arrow). The passive component 6 is shown here as a transmission line, comprising a first signal pad 61, a second signal pad 62, four ground pads (63-66), a signal track 67 connecting the two signal pads, and two ground tracks (68-69) surrounding the signal track 67. To the right of the double arrow, only the signal track 67 and the two ground tracks (68-69) are shown.
[0053] Fig. 2 also includes an example of integration of the passive component 6 (represented by the signal track 67 and by the two ground tracks 68-69) in a single-layer or multi-layer assembly 22. The passive component 6 is located in the environment of the quantum circuit 7, and / or the control circuit 8, and / or other integrated elements 9. The environment of the passive component 6 consists of the elements sharing the same substrate, or those which are electrically connected to the passive component.
[0054] The idea behind the invention is to use the superconducting properties of the passive component, in particular to use the kinetic inductance, to retrieve temperature information.
[0055] First step
[0056] To this end, the method according to the invention includes a first step of determining the geometric inductance of the passive component, from the dimensions of the passive component.
[0057] Let Ltotal be the total inductance of the passive component, Lkin its kinetic inductance, and Lgeom its geometric inductance.
[0058] The geometric inductance Lgeom is due to the geometry of the passive component; it is generated by the induced field of the component.
[0059] Since superconducting components have zero (or near-zero) resistivity below their critical temperature, electrons pass very rapidly through the metallic lattice of the component without collision. Due to their speed, the electrons acquire a certain inertia, which means that a change in speed can take time; the kinetic inductance corresponds to this difficulty in changing the electrons' speed.
[0060] The total inductance can be measured by one of the methods described below. The geometric inductance can be determined beforehand and does not vary from one measurement to another or as a function of external parameters such as temperature. Thus, it is not necessary to calculate the geometric inductance for each new temperature measurement, thereby reducing the process execution time. The calculation can be performed by a calculation unit or manually.
[0061] For a planar coil (for example, round spiral, square spiral, etc.), the geometric inductance Lgeom can be determined by the following formula: rc2\ Lgeom — ? (MP / + Cÿ) + C^p^-
[0062] corresponds to the permeability of free space.
[0063] N the number of turns
[0064] d{lvg the average diameter (^.
[0065] ? the fill rate
[0066] _ (dmlfdM) P~(dm^dJ
[0067] c1, c2, c1 and c4 are coefficients that depend on the shape of the planar coil. Those skilled in the art may refer to Table II of document [2], which indicates these coefficients as a function of the coil shape.
[0068] For a transmission line, the geometric inductance LgeOm can be determined by the following formula:
[0069] f(a Lgeom - 4
[0070] K corresponds to the elliptic integral of the first kind.
[0071]
[0072] corresponds to the permeability of free space.
[0073] VF corresponds to the width of the line, and S to the spacing between the line and the plane of mass. [°074] k=^
[0075] The geometric inductances of the transmission lines and coils can also be determined by formulas known to those skilled in the art.
[0076] For other types of passive components, the geometric inductance LgeOm can be determined according to formulas known to the person skilled in the art.
[0077] Second step
[0078] The second step in the temperature measurement process consists of measuring the total inductance of the passive component. The measurement can be carried out periodically or non-periodically, for example depending on the context of use of the quantum chip or the control chip.
[0079] According to a first embodiment, the measurement of the total inductance is carried out by measuring the parameters S on at least one of the ports of the passive component.
[0080] The measurement of the S parameters can be implemented using a vector network analyzer (or VNA). The network analyzer vector can be external to the single-layer or multi-layer assembly, or it can be integrated into it, which reduces the overall size of the structure.
[0081] By using only one port of the vector network analyzer, only the parameter can be measured. It corresponds to the ratio between the output voltage of the port and the input voltage of the port, also called the return loss. The admittance En can be deduced from S] ] by formulas known to those skilled in the art and described in particular in [3].
[0082]
[0083] Using two ports, for example the two signal pads of the transmission line, the input current and voltage, and the output current and voltage are measured, so as to determine the admittance E.
[0084] In particular, the admittance E is related to the total inductance Ltotal by the following formula:
[0085] ^^(1)
[0086] w = 2æ / , and f corresponds to the frequency of the signal generated at the input of one of the two ports. The frequency can be between 1 MHz and 50 GHz. During the admittance measurement, the passive component is in a superconducting state.
[0087] According to a second embodiment, the total inductance LMal can be measured by measuring the impedance across the passive component. The impedance can be measured with an impedance meter. The relationship between the measured impedance and the total inductance I^totai is as follows:
[0088] Z0 = R0 + jLtutalœ
[0089] The total inductance Ltutal is determined from the imaginary part of the impedance.
[0090] According to a third embodiment, the measurement of the total inductance is carried out by measuring the resonance frequency, using the natural resonance of the passive component.
[0091] If the natural resonance of the passive component is too high relative to the frequency band in which the measurement is performed, it may be necessary to add a capacitor, connected in parallel or in series with the passive component. In the case of a parallel connection, a maximum voltage occurs at resonance (maximum impedance at resonance). In a series connection, a maximum current occurs at resonance (minimum impedance).
[0092] Once the resonance frequency / 0 has been determined, the total inductance is determined by the following relation: / __0. ^ total f2 JG
[0093] C corresponds to the capacitance of the capacitor, or to the parasitic / intrinsic capacitance of the passive component, and w0 = ^f0-
[0094] Third step
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[0110] [YES]
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[0113] The process includes a third step of determining the kinetic inductance Lkin of the passive component, from the total inductance Ltota and the geometric inductance Lgeom, according to the following formula: ^kin - ^total " Lgeom It is recalled that the geometric inductance Lgeom is obtained from the dimensions of the passive component (without having to perform the calculations at each temperature measurement), and that the total inductance Ltotal is measured in accordance with the aforementioned embodiments. Fourth stage In a fourth step, the temperature of the component is determined from its kinetic inductance. The following formula relates the component temperature to the kinetic inductance (see document [4]): __i Lkin ~ w Avœ A (T) = Ao^fï^pT And A 0= 1.764^. R(r.+i) corresponds to the resistance per square 1 degree above the critical temperature Tc. fi corresponds to the reduced Planck constant. A(T) corresponds to the superconducting energy gap, that is, it is the minimum energy that must be supplied to the superconductor to break one of its Cooper pairs. The resistance per square degree above the critical temperature Tc and the superconducting energy gap are characteristics of the material constituting the passive component. These characteristics are easily measured on the directly integrated passive component, for example by measuring the resistance at different temperatures. kb corresponds to the Boltzmann constant. 1 and w correspond respectively to the length and width of the track (i.e. of the transmission line). Document [5] describes another formula that relates the component temperature to the kinetic inductance: ^kin — ( 2 ) w With XtAr) And ^2- h
[0114] corresponds to the magnetic penetration length.
[0115] corresponds to the thickness of the track when it is a transmission line.
[0116] corresponds to the permeability of free space.
[0117] °2 corresponds to the imaginary part of the complex conductivity.
[0118] corresponds to the conductivity in the normal state (non-superconductor).
[0119] The above-mentioned formulas are valid for Un) < 2A; if this condition is not met, the person skilled in the art may refer to the Mattis-Bardeen integral formula.
[0120] Thus, by determining the kinetic inductance using total inductance measurements, and knowing the characteristics of the material constituting the passive component and its dimensions, it is possible to trace back to the temperature information.
[0121] The method according to the invention makes it possible to carry out a measurement over a wide temperature range, which corresponds to the temperature range in which the passive component is in a superconducting state.
[0122] The computational steps can be carried out on a reprogrammable computing unit (a processor or a microcontroller for example) executing a program comprising a sequence of instructions, or on a dedicated computing machine (for example a set of logic gates such as an FPGA or an ASIC, or any other hardware module).
[0123] Figure 3 illustrates an example of a curve representing the kinetic inductance as a function of temperature, when the passive component is made of niobium nitride (NbN) or niobium (Nb). The dots represent measured values of the parameter S with a vector network analyzer, and the solid line represents the model. The critical temperature of niobium is approximately 9 K, and that of niobium nitride is approximately 14 K. Thus, the method allows the material of the passive component to be selected according to the desired temperature range. The passive component must remain in a superconducting state over the entire measured temperature range.
[0124] Preferably, the material chosen for the passive component is such that the temperature range to be measured is between a so-called sensitivity temperature and the critical temperature of the material. The sensitivity temperature is lower than the critical temperature. Indeed, the kinetic inductance is almost constant between 0 K and about half the critical temperature. Thus, the sensitivity of the temperature measurement is optimal between aTc and Tc, with 0.5 < a < 0.8.
[0125] The method according to the invention advantageously allows for an extended temperature range, using different materials and / or passive components of the same material but with different geometric dimensions. For example, the single-layer or multi-layer assembly may include a niobium passive component and a niobium nitride passive component, which allows for the performance of measurements between 3 and 14 K (between 3 and 9 K using the niobium passive component and between 5 and 14 K using the niobium nitride passive component).
[0126] Other superconducting materials can be considered, for example, titanium dioxide nitride (NbTiN, temperature range 3-12 K), titanium nitride (TiN, temperature range 2-5 K), or granular copper-aluminum alloy (AlCu, temperature range 1-2 K). These materials have the advantage of high kinetic inductance, which greatly facilitates the determination of the kinetic inductance value. Other materials may be suitable for implementing the invention.
[0127] Figure 4 illustrates examples of integrating passive components into a single-layer or multi-layer assembly, as shown in a cross-sectional view. The passive component 6 can be integrated onto the interposer 3, without being connected to the quantum chip 1 or the control chip 2 (configuration A). Alternatively, the passive component 6 can be integrated into the last metallization layers (BEOL) of the quantum chip 1 (configuration B) or into the last metallization layers (BEOL) of the control chip 2 (configuration D). In other embodiments, the passive component 6 can be integrated onto the interposer 3 and connected to the quantum chip 1 (configuration C), or connected to the control chip 2 (configuration E), via conductive traces 10. In another embodiment, the passive component can be integrated into the last metallization layers of the quantum chip 1, without an interposer.
[0128] The configuration depends essentially on the object of the measurement. For example, if the temperature measurement is to be carried out at the quantum chip level, it is preferable to adopt one of the configurations B or C.
[0129] Figure 5 illustrates examples of integration steps for the passive component with a single layer of metallization. This integration process is particularly suitable when the passive component is a transmission line.
[0130] A silicon substrate (wafer) 10 is oxidized to a certain thickness by heating in a furnace to form a layer of silicon dioxide 12 (step 1). The first metallization layer 13 is deposited onto the silicon dioxide layer 12 by a process including physical vapor deposition (PVD), chemical vapor deposition (CVD), and plasma-enhanced chemical vapor deposition (PECVD), without this list being exhaustive (step 2). By photolithography, a resin 14 is deposited to protect the metallization layer 13 in the desired locations (step 3). The unprotected metallization layer is etched by plasma-enhanced dry etching (step 4). The resin 14 is then removed (step 5).
[0131] Figure 6 illustrates examples of integrating the passive component with two metallization layers. This integration method is particularly suitable when the passive component is a coil (which can be integrated on more than two metallization layers, for example on four metallization layers).
[0132] The first five steps (l)-5) are identical to the case of integrating the passive component with a single metallization layer. At the end of step 5), the first metallization layer 15 is deposited. In the following step (step 6), a Damascus-type interconnecting layer is added (by chemical-mechanical polishing) to create vias 16 (for example, in titanium, titanium nitride, or tungsten). The fabrication of the second metallization layer 17 is identical to the first five steps, i.e., vapor deposition by plasma, photolithography, plasma-assisted dry etching, and resin removal. A protective layer of silicon nitride 18 is added by passivation, and openings 19 are created at the locations reserved for the contact pads, which removes the passivation layer (step 8).An Au-plated layer of "Under bump metallization" 20 (or UBM) is added, intended to be interposed between the multi-layer structure and the Indium solder pads 21, intended to make contact with the quantum chip or with the control chip (steps 9 and 10).
[0133] The integration of passive components is not limited to the aforementioned embodiments.
[0134] Thus, the passive component is completely integrated into the interposer (the integration would be similar to that at the level of the last metallization layers of one of the chips), which simplifies the manufacturing process. Furthermore, it can be integrated into small systems or systems that are difficult to access. The measurement is performed as close as possible to the points of interest (control chip, quantum chip).
[0135] The passive component is easy to manufacture because it has micrometer dimensions and a simple shape. The dimensions are constrained by the technology; nanometer dimensions could even be used, which would improve sensor integration. Moreover, this would have a beneficial effect on measurement quality, since the passive component has no resistance, and the kinetic inductance (on which the temperature measurement is based) increases with the thinness of the trace.
[0136] Fig. 7 illustrates different determinations of the total inductance as a function of temperature, for three different passive components (CPW E7 Nb, CPW E7 NbN and Ind A3 NbN). This figure illustrates the fact that the total inductance and its range of variation (sensitivity in inductance and temperature) can be adjusted by the geometry of the component and the choice of material.
[0137] Figure 8 illustrates the determination of temperature as a function of frequency, from parameters S. This figure illustrates the fact that the resonance frequency (maximum impedance in this case, cf. maximum between the dotted lines) varies with temperature.
[0138] The ability to accurately measure the temperature, as close as possible to the chips, makes it possible to implement effective temperature control and management in a cryostat, including:
[0139] - the determination of a setpoint temperature for the cryostat;
[0140] - a temperature measurement in accordance with the temperature measurement method as above;
[0141] - temperature regulation if the measured temperature is different from the setpoint temperature (i.e. if the measured value deviates from a certain threshold of the setpoint value).
[0142] References cited
[0143] [1] « Superconducting routing platform for large-scale intégration of quantum technologies » (Thomas et al., 2022 Mater. Quantum. Technol. 2, 035001)
[0144] [2] « Simple Accurate Expressions for Planar Spiral Inductances », Sunderarajan S. Mohan et al., IEEE Journal of Solid-State Circuits, vol. 34, no. 10, october 1999
[0145] [3] « Multiport conversions between S, Z, Y, h, ABCD, and T parameters », T. Reveyrand
[0146] [4] « Introduction to Superconductivity », Michael Tinkham
[0147] [5] « Photon-detecting superconducting resonators », Rami Barends
Claims
Demands
1. A method for determining the temperature in the environment of an assembly comprising at least one passive component (6), the passive component being integrated into a single-layer or multi-layer assembly (22), comprising the steps of: - determining the geometric inductance of the passive component (6), from the dimensions of the passive component (6); - measuring the inductance of the passive component (6), called the total inductance, the passive component (6) being used in a temperature range such that it is in a superconducting state; - determining the kinetic inductance of the passive component (6), from the total inductance and the geometric inductance; - determining the temperature from the kinetic inductance of the component.
2. A method according to claim 1, wherein the measurement of the total inductance is carried out by measuring the parameters S on at least one of the ports (61-66) of the passive component (6).
3. Method according to claim 1, wherein the measurement of the total inductance is carried out by an impedance measurement across the terminals (61-66) of the passive component (6).
4. A method according to claim 1, wherein the measurement of the total inductance is carried out by a measurement of the resonance frequency.
5. A method according to any one of the preceding claims, wherein the passive component (6) comprises a superconducting material selected from a group comprising: NbN, NbTiN, TiN, granular AlCu.
6. A method according to any one of the preceding claims, wherein the passive component (6) is a transmission line, the transmission line being integrated on a metallization level (13).
7. A method according to any one of claims 1 to 5, wherein the passive component (6) is a coil, the coil being integrated on at least two metallization levels (15, 16).
8. A method according to any one of the preceding claims, wherein the passive component is integrated into the same substrate as a quantum chip or quantum chip control chip, so as to determine the temperature of the chip.
9. A method according to any one of the preceding claims, wherein the assembly comprises a plurality of passive components, the passive components being made of different materials, the materials being determined according to the temperature range to be determined.
10. A method according to any one of the preceding claims, wherein the assembly comprises a plurality of passive components, the passive components having different dimensions, the dimensions being determined according to the temperature range to be determined and the sensitivity sought.
11. A method according to any one of the preceding claims, wherein the temperature range is between a so-called sensitivity temperature and the critical temperature of the material, the critical temperature being the temperature below which the material is in a superconducting state, the sensitivity temperature being lower than the critical temperature.
12. Method according to claim 11, wherein Ts = aTc, Tc corresponds to the critical temperature, Ts the sensitivity temperature, and 0.5 < a < 0.
8.
13. A method for controlling the temperature in a cryostat, comprising: - determining a setpoint temperature for the cryostat; - measuring the temperature in accordance with the method according to one of the preceding claims; - regulating the temperature if the measured temperature is different from the setpoint temperature.
14. 4 A system for determining the temperature in the environment of an assembly comprising at least one passive component, the passive component being integrated into a single-layer or multi-layer assembly, the system comprising: - a calculation unit, configured to determine the geometric inductance of the passive component, from the dimensions of the passive component; - a system for measuring the inductance of the passive component, called the total inductance, the passive component being used in a temperature range such that it is in a superconducting state; the calculation unit being further configured to - determine the kinetic inductance of the passive component, from the total inductance and the geometric inductance; 15 - determine the temperature from the kinetic inductance of the component.
15. Cryostat comprising a temperature determination system according to claim 14.