Encapsulation device and its manufacturing process

Abstract

The invention relates to an encapsulation device (1) comprising: - a substrate (2) having a mounting face for receiving a semiconductor chip (4) and comprising a plurality of metallic pads, - a semiconductor chip (4) attached to a first metallic pad, - connection means (5) electrically connecting the semiconductor chip (4) attached to the first metallic pad to a second metallic pad, - a wall (6) attached to a third metallic pad, said wall (6) surrounding the semiconductor chip (4) and the connection means (5) so as to form an enclosure around the semiconductor chip (4) and the connection means (5), - a polymeric substance (7) disposed at least within the enclosure and at least partially covering the semiconductor chip (4) and the connection means (5), wherein the wall (6) is metallic. The invention further relates to the method of manufacturing the encapsulation device.Figure 6.

Description

Title of the invention: Encapsulation device and its manufacturing process. Technical field

[0001] The invention relates to the technical field of semiconductor chips, and more particularly to semiconductor chip encapsulation devices and manufacturing processes for encapsulation devices. State of the art

[0002] Encapsulation is the process of covering an electronic chip or semiconductor chip with a protective material to protect it from physical and environmental damage while providing an interface for electrical connections. The encapsulation of electronic chips is a key step in the manufacture of an electronic component and influences both the reliability of the electronic component and its selling price.

[0003] With the rapid evolution of the semiconductor industry, the importance of encapsulation has continued to grow, becoming a crucial element in ensuring the proper functioning and reliability of electronic components in a variety of applications, ranging from consumer electronic devices to critical embedded systems.

[0004] Among the various encapsulation devices designed to house semiconductor components, particularly in the context of consumer applications, the plastic package is emerging as a widely used solution. This type of package offers a combination of physical and environmental protection for electronic chips while being economical to mass-produce. Thanks to its ability to withstand shocks, humidity, and other adverse conditions, the plastic package ensures the reliability and longevity of electronic components, which is essential in sectors such as consumer electronics, where devices must be both affordable and robust.Furthermore, plastic casings offer design flexibility, allowing easy integration into a variety of electronic products, from smartphones to smart home devices, thus contributing to the widespread adoption of semiconductor technology in modern society.

[0005] Electronic components with plastic housings are manufactured on high-volume assembly lines, several thousand to several million parts per day for some lines, which makes it possible to obtain a very low unit cost of components.

[0006] However, for the space sector, where applications use very few components and require chips with a specific design adapted to withstand space radiation, the range of electronic components available to the general public is not suitable. In the space sector, the on-demand manufacturing of small quantities of various types of components, requiring electronic chips capable of withstanding space radiation, is crucial. This is why unit encapsulation in ceramic packages is widely preferred to meet these specific requirements of the space market. The use of ceramic packages results in very high prices for electronic components compared to electronic components with plastic packages available to the general public.

[0007] However, the space sector is currently undergoing change and there is a need for electronic components that can withstand space radiation, are reliable, can be easily fixed to an electronic board, are robust and resistant to high temperatures, especially when fixed to a printed circuit board, and have a relatively low selling price and manufacturing cost. Summary of the invention

[0008] In order to address the problems presented above, the invention relates to an encapsulation device comprising: - a substrate having a mounting face intended to receive a semiconductor chip and comprising a plurality of metallic areas,

[0009] - a semiconductor chip fixed to a first metallic plate, - connection means electrically connecting the semiconductor chip attached to the first metallic pad to a second metallic pad, - a wall attached to a third metallic pad, said wall surrounding the semiconductor chip and the connection means so as to form an enclosure around the semiconductor chip and the connection means, - a polymeric substance disposed at least within the enclosure and covering at least partially the semiconductor chip and the connection means, device in which the wall comprises a metal.

[0010] Advantageously, the use of a wall that includes a metal ensures significant mechanical resistance, which increases the robustness and durability of the device.

[0011] The wall may be made of a metal.

[0012] Advantageously, the use of a wall made of a metal ensures significant mechanical resistance, which increases the robustness and durability of the device.

[0013] The metal can be chosen from the group including copper, a copper alloy, silver, aluminum or gold.

[0014] The connection means may include a connecting wire, in particular an aluminum connecting wire.

[0015] Advantageously, the aluminum wire connection has several advantages, including good electrical conductivity, corrosion resistance and the ability to be used in high temperature environments.

[0016] The first metal plate, the second metal plate and the third metal plate may be different from each other and may not be electrically connected on the substrate fixing face.

[0017] The polymeric substance disposed at least within the enclosure can completely cover the semiconductor chip and the connection means.

[0018] The polymeric substance may be a resin.

[0019] The polymeric substance may comprise one or more polymers.

[0020] The invention may further have one or more of the following features taken alone or in combination.

[0021] According to one characteristic, the metal is chosen from the group comprising copper, a copper alloy, silver, gold, steel, or aluminum.

[0022] Steel, copper, silver, gold, aluminum or copper alloy have the necessary mechanical strength to make the encapsulation device more robust and durable.

[0023] The wall can be made of a metal chosen from the group including copper, a copper alloy, silver, gold, steel, or aluminum.

[0024] According to one feature, the wall has a height relative to the fixing face that is greater than the height relative to the fixing face of an assembly consisting of the semiconductor chip and the connecting means, and the polymeric substance fills the enclosure up to a height less than or equal to the height of the wall.

[0025] This ensures that the polymeric substance covers the semiconductor chip and the connection means well in order to protect the semiconductor chip and the connection means from external disturbances.

[0026] The wall height can, for example, be 2.5 mm.

[0027] According to one feature, the semiconductor chip is fixed to the first metal area by a chip fastener, and the wall is fixed to the third metal area by a wall fastener, said chip fastener and said wall fastener being made from the same or the same material(s).

[0028] The chip attachment and the wall attachment can be made using the same attachment manufacturing process, for example such as that described below.

[0029] Advantageously, this makes it possible to reduce the materials used in the manufacture of the encapsulation device and thus obtain an economical encapsulation device.

[0030] According to one feature, said chip attachment and said wall attachment each comprise a composition selected from the following compositions: - sintering, and in particular silver sintering, - a solder comprising a tin-lead alloy, - a brazing alloy comprising tin-silver-copper, - a solder comprising a gold-tin alloy, - a solder containing pure tin.

[0031] Advantageously, silver sintering offers good thermal and electrical performance and allows reliable and robust fixation of the wall and semiconductor chip to the substrate.

[0032] According to one feature, the encapsulation device includes a hermetic zone which covers the external lateral faces of the wall and the substrate, and the face of the substrate opposite the fixing face.

[0033] The hermetic zone has a role in protecting the encapsulation device against elements external to the encapsulation device and any damage that may result from the manufacturing process of the encapsulation device.

[0034] The internal lateral faces of the wall are located on the side of the wall where the semiconductor chip is fixed.

[0035] By external lateral faces, we mean the lateral faces of the wall located on the side opposite the internal lateral faces.

[0036] According to one feature, the encapsulation device includes a sealed area that covers both the mounting face and the semiconductor chip fixed to the mounting face.

[0037] The sealed area protects the semiconductor chip against moisture, for example.

[0038] The invention further relates to a method for manufacturing the encapsulation device described above, comprising the following steps: - supplying the substrate, -attachment of the semiconductor chip to the first metal pad, - electrical connection of the semiconductor chip fixed to the first metal plate to the second metal plate by the connecting means, - fixing of the metal wall to the third metal plate such that said wall surrounds the semiconductor chip and the connecting means so as to form an enclosure around the semiconductor chip and the connecting means, - insertion of the polymeric substance into the enclosure so that the polymeric substance at least partially covers the semiconductor chip and the connection means.

[0039] According to one feature, the attachment of the semiconductor chip to the first metal area is done jointly with the attachment of the metal wall to the third metal area.

[0040] By "metallic wall" is meant the wall which comprises a metal or which is made of a metal.

[0041] Advantageously, when the attachment of the semiconductor chip to the first metal plate is done jointly with the attachment of the metal wall to the third metal plate, the manufacturing process becomes faster and more economical.

[0042] By jointly, it is meant that the attachment of the semiconductor chip to the first metal plate and the attachment of the metal wall to the third metal plate are carried out together, at the same time, in parallel with each other. In other words, the wall attachment and the chip attachment are performed simultaneously during the manufacturing process of the encapsulation device.

[0043] According to one feature, the attachment of the semiconductor chip to the first metal area and the attachment of the metal wall to the third metal area is done by brazing with a solder paste.

[0044] The soldering paste can be a gold-tin (SnAu), pure tin (Sn) or tin-lead (SnPb) or tin-silver-copper (SnAgCu) paste.

[0045] Advantageously, brazing allows the semiconductor chip and the wall to be fixed to the substrate in a robust, reliable and airtight manner.

[0046] According to one feature, the fixation of the semiconductor chip to the first metal area and the fixation of the metal wall to the third metal area is done by sintering a silver paste.

[0047] Advantageously, silver paste sintering allows the semiconductor chip and wall to be fixed to the substrate in a robust, reliable, airtight manner and ensures higher temperature resistance.

[0048] The invention will be described with reference to the accompanying figures, which are given for illustrative purposes only and are not drawn to scale. In the figures, the same numerical references designate the same elements. Brief description of the figures

[0049] [Fig-1] [Fig. 1] is a side view in cross-section of a substrate intended to receive a semiconductor chip.

[0050] [Fig.2] [Fig.2] is a top view of a substrate fixing face on which can be attached to the semiconductor chip.

[0051] [Fig.3] [Fig.3] is a top view of the face opposite the fixing face of [Fig.2],

[0052] [Fig.4a] [Fig.4a] is a side view in cross-section of the substrate of [Fig.1] on which fasteners have been deposited on the fixing face.

[0053] [Fig.4b] [Fig.4b] is a side view of the substrate of [Fig.4a] to which a wall and the semiconductor chip have been fixed on the fixing face.

[0054] [Fig.5a] [Fig.5a] is a side view in section of the substrate of [Fig.1] in which the chip has been connected to a metal pad on the mounting face.

[0055] [Fig.5b] [Fig.5b] is a side view in section of the substrate of [Fig.5a] in which the chip and the means of connection with the polymeric substance have been covered.

[0056] [Fig.6] [Fig.6] is a side view in cross-section of the substrate of Figures 4 and 5 which represents a hermetic zone and a sealed zone of the encapsulation device.

[0057] [Fig.7] [Fig.7] is a top view of a substrate fixing face for 20 components manufactured jointly.

[0058] [Fig.8a] [Fig.8a] is a top view of an example of a simple wall.

[0059] [Fig.8b] [Fig.8b] is a top view of an example of wall 6 with four imprints for a sorting and placement equipment nozzle.

[0060] [Fig.9] [Fig.9] is a top view of the mounting face of [Fig.7] which shows cutting lines for 20 components manufactured jointly. Detailed description

[0061] The invention relates primarily to an encapsulation device 1. The encapsulation device 1 comprises a substrate 2 like that of [Fig. 1] which has a mounting face 101 for receiving a semiconductor chip 4 and comprising a plurality of metallic areas p1, p2, p3. The substrate 2 may be made of ceramic. By substrate 2 is meant a printed circuit board substrate, also known as a PCB (Printed Circuit Board).

[0062] The substrate 2 may comprise a plurality of superimposed insulating layers and one or more metallic plates pl, p2, p3, p4, p5, pi formed on one or more of these insulating layers. The substrate 2 may comprise one or more internal metallic plates pi arranged within the substrate 2 between the mounting face 101 and the face opposite 102 to the mounting face 101 as shown in [Fig. 1].

[0063] The ceramic substrate 2 may have a coefficient of thermal expansion (CTE) that lies between that of printed circuit boards (~18 ppm / °C) and that of semiconductor chips (~3 ppm / °C). The ceramics are of the LTCC (Low Temperature Co-fired Ceramics) and HTCC (High Temperature Co-fired Ceramics) type. Co-fired ceramics), typically having a CTE between 5 and 13 ppm / °C, may be particularly suitable for the invention.

[0064] The metal plates pl, p2, p3 are shown in Figures 1 and 2. The metal plates pl, p2, p3 can be made of copper. Copper is a good electrical conductor, and the metal plates pl, p2, p3 thus provide electrical connection paths between different components fixed to the substrate 2. The first metal plate pl, the second metal plate p2, and the third metal plate p3 can be different from each other and may not be electrically connected to the mounting face 101 of the substrate 2. The metal plates pl, p2, p3, p4, p5, p1 can have a polygonal shape and, in particular, a rectangular shape suitable for receiving an electronic component such as an electronic chip, for example.

[0065] The encapsulation device 1 also includes a semiconductor chip 4 attached to a first metallic plate pl. In the context of the invention, the terms "electronic chip" and "semiconductor chip" refer to the same component. The semiconductor chip 4 may, for example, be a diode.

[0066] The semiconductor chip 4 can be attached to the first metal plate p1 by a chip fastener 10, and the wall 6 can be attached to the third metal plate p3 by a wall fastener 11. By "attached," it is understood that the semiconductor chip 4 is electrically connected to the first metal plate and is stationary relative to said first metal plate p1. The same applies to the wall 6 and the third metal plate p3.

[0067] The chip attachment 10 and the wall attachment 11 are shown in [Fig. 4a]. The chip attachment 10 and the wall attachment 11 can take the form of a metallic layer deposited on the metallic surfaces pl1, p2, p3 or fixed to the metallic surfaces pl1, p2, p3.

[0068] The chip attachment 10 and said wall attachment 11 can be made from the same material or the same material(s).

[0069] Said chip attachment 10 and said wall attachment 1 each comprise a composition selected from the following compositions: a sintering, and in particular a silver (Ag) sintering, a brazing comprising a tin-lead alloy (SnPb), a brazing comprising a tin-silver-copper alloy (SnAgCu), a brazing comprising a gold-tin alloy (SnAu), a brazing comprising pure tin (Sn).

[0070] Advantageously, manufacturing the chip attachment 10 and the wall attachment 11 from the same material reduces the materials used in the manufacture of the encapsulation device 1 and thus obtain an economical encapsulation device 1.

[0071] Advantageously, silver sintering offers good thermal and electrical performance and allows reliable and robust attachment of the wall 6 and the semiconductor chip 4 to the substrate 2.

[0072] The solder joints need to be remelted to perform the bonding function. Depending on the alloy used, the melting temperatures differ: for example, for SnPb, the melting temperature is approximately 185°C, and for SnAu the melting temperature is approximately 280°C.

[0073] Reflowing a solder joint can lead to problems such as gaps, where there is insufficient solder material to create a strong bond between the parts. Reflowing a solder joint can also cause unwanted flow, where the molten metal moves out of the intended area, potentially causing short circuits or other defects in the components.

[0074] Sintering does not require remelting the material, unlike soldering. This process uses metal powders, which are heated to create a strong bond without reaching the melting point of the materials involved. The process is similar to using glue, as the powder particles bond to each other under the effect of heat. However, to achieve a proper and durable bond, it is necessary to reach a temperature of approximately 250°C, which allows the particles to bond adequately while maintaining the shape and structure of the assembled components. Advantageously, the sintering process used is pressureless so as to avoid damaging the semiconductor chip 4.

[0075] The chip attachment 10 and said wall attachment 11 can be made of solder paste.

[0076] The semiconductor chip 4 can be placed on the first metal plate pl by a pick-and-place device. Solder paste can be deposited on the first metal plate pl and then heated to its melting point to fix the semiconductor chip 4 to the first metal plate pl. For example, the melting point can be 280°C if the solder paste comprises a gold-tin (SnAu) alloy. Alternatively, the melting point can be 185°C if the solder paste comprises a lead-tin (SnPb) alloy.

[0077] Preferably, the solder paste should be a high-temperature solder, for example the solder paste may include SnAu, in order to avoid having to remelt said solder paste when mounting the encapsulation device 1 on a printed circuit board.

[0078] According to one possibility, the solder paste may include lead.

[0079] According to another possibility, a lead-free solder paste can be used, for example SAC305 paste.

[0080] Alternatively or in addition, the chip attachment 10 and the wall attachment 11 can be made of a sintering paste.

[0081] The substrate 2 may include through-holes plated through the substrate, also called vias 20, which connect the internal metal areas pi to metal areas pl, p2, p3, p4, p5 on the surface of the substrate 2, as shown in [Fig. 1]. The vias 20 in the substrate 2 allow an electrical connection between the mounting face 101, which is intended to receive the semiconductor chip 4, and the face 102 opposite the mounting face 101 for connection with components external to the encapsulation device 1. The vias 20 provide an electrical path for electrical signals so that said electrical signals can flow freely between the mounting face 101 and the opposite face 102. [Fig. 2] shows the mounting face 101, and [Fig. 3] shows the face 102 opposite the mounting face 101.

[0082] The vias 20 can provide a thermal connection between the mounting face 101 and the opposite face 102 in order to allow the cooling of the semiconductor chip 4. The vias 20 can therefore have both a thermal and an electrical effect by allowing electrical connections between the different faces of the encapsulation device 1.

[0083] The encapsulation device 1 further includes connection means 5 for electrically connecting the semiconductor chip 4, fixed to the first metal plate p1, to a second metal plate p2. The connection via the connection means 5 provides the semiconductor chip 4 with a power supply. The connection means 5 may be an aluminum connecting wire. Advantageously, the aluminum wire connection offers several advantages, including good electrical conductivity, corrosion resistance, and the ability to be used in high-temperature environments.

[0084] The encapsulation device 1 further comprises a wall 6 fixed to a third metallic plate p3. An example of the wall 6 fixed to the substrate 2 is given in [Fig.4b].

[0085] The wall 6 may be made up of separate, unconnected elements. For example, the wall 6 may consist of four separate walls. Alternatively, the wall 6 may consist of a single element. The wall 6 may surround the semiconductor chip 4 and the connection means 5 so as to form an enclosure or cavity around the semiconductor chip 4 and the connection means 5. The enclosure or cavity must be configured to receive a polymeric substance such as a resin.

[0086] In the encapsulation device 1, the wall 6 comprises a metal.

[0087] Alternatively, the wall can be made of metal.

[0088] Advantageously, the use of a wall 6 which includes a metal ensures significant mechanical resistance, which increases the robustness and durability of the encapsulation device 1.

[0089] The metal can be chosen from the group including steel, copper, a copper alloy, aluminum, gold, or silver. Steel, copper, a copper alloy, aluminum, gold, and silver have the necessary mechanical strength to make the encapsulation device 1 more robust and durable.

[0090] The metal can also be any other metal which has a CTE close to the CTE of the ceramic and which is suitable to be fixed to the metal range p3 by means of the wall attachment material which can be the same as the semiconductor chip attachment material 4 which can for example be silver sintering.

[0091] The wall 6 can serve as a mold for receiving a polymeric substance 7 such as resin in order to encapsulate the semiconductor chip 4.

[0092] The encapsulation of the semiconductor chip 4 can be likened to a "Dam and FUI" process known to those skilled in the art, except that the wall 6 is fixed to the substrate 2 by the semiconductor chip attachment material 4, for example by soldering or silver sintering.

[0093] The wall 6 can be connected via the vias 20 to a connection pad (not shown in the figures) disposed on the opposite face 102 to the fixing face 101 for grounding the wall 6.

[0094] A polymeric substance 7, such as the resin, is disposed at least within the enclosure and at least partially covers the semiconductor chip 4 and the connection means 5 as shown in [Fig. 5b]. The polymeric substance 7 disposed at least within the enclosure can completely cover the semiconductor chip 4 and the connection means 5 in order to protect them against external disturbances to the encapsulation device 1.

[0095] The polymeric substance 7 may comprise one or more polymers. For example, a first polymer, for example considered flexible, i.e., with a low Young's modulus, for example having a Young's modulus of 50 MPa such as silicone, compared to a second polymer, may be deposited on and around the semiconductor chip 4 and around the fastening means 5 to at least partially cover the assembly consisting of the semiconductor chip 4 and the fastening means 5, and makes it possible to minimize mechanical stresses on the semiconductor chip 4, mechanical stresses which may be thermally generated by differences in material expansion. The polymeric substance 7 may also comprise a second polymer, having greater rigidity than the first polymer, and for example having a Young's modulus of 3000 MPa such as epoxy, and deposited on the first polymer to reinforce the encapsulation device. 1 vis-à-vis external aggressions to the encapsulation device 1 and to fill the cavity at least in part, and possibly completely, in other words to fill the cavity with polymeric substance 7 in such a way that the height of the polymeric substance 7 is less than or equal to the height of the wall 6 in order to avoid any overflow of the polymeric substance 7.

[0096] Depending on the materials and processes chosen, the encapsulation device 1 may include a hermetic zone 12 which covers the external lateral faces of the wall 6 and the substrate, and the face of the substrate opposite the fixing face 101 as shown in [Fig. 6]. For example, if the wall 6 is bonded to the substrate 2, the seal would not be satisfactory, whereas with brazing or silver sintering, the seal is improved.

[0097] The hermetic zone 12 has a role in protecting the encapsulation device 1 against elements external to the encapsulation device 1 and any damage that may result from the manufacturing process of the encapsulation device 1.

[0098] By internal lateral faces of the wall 6, we mean the lateral faces of the wall 6 located on the side where the semiconductor chip 4 is disposed.

[0099] By external lateral faces, we mean the lateral faces of the wall 6 located on the opposite side to the internal lateral faces.

[0100] Depending on the materials and processes chosen, the encapsulation device 1 may include a sealed area 13, also shown in [Fig.6], which covers both the mounting face 101 and the semiconductor chip 4 fixed to the mounting face 101.

[0101] The sealed area 13 protects the semiconductor chip 4 against moisture, for example.

[0102] Method for manufacturing the encapsulation device

[0103] The invention relates secondly to a method of manufacturing the encapsulation device 1 as described above.

[0104] The manufacturing process first includes a substrate supply step 2. During this step, the type of ceramic that can be used to fabricate substrate 2 must be selected. LTCC-type ceramics, typically having a CTE between 8 and 13 ppm / °C, may be particularly suitable. The ceramic can be selected based on its thermal and mechanical performance, as well as the routing rules associated with it.

[0105] Following the selection of the ceramic, it is possible to design the internal and external routing of the substrate 2. By external routing, we mean the way in which the metal plates p1, p2, p3, p4, p5 are arranged on the mounting face 101 and the opposite face 102. By internal routing, we mean the definition of a number of plates conductive pi within substrate 2 as well as the arrangement of vias 20, their dimensions and their number within substrate 2.

[0106] The definition of the internal and external routing, the number of conductive layers, and the dimensions and number of vias aims to obtain a ceramic which will have the lowest possible electrical and thermal resistance.

[0107] To minimize the cost of the ceramic, a finish of nickel-protected gold-plated metal surfaces (pi) should be chosen. The gold plating typically has a thickness of approximately 0.1 µm. This finish of the pi metal surfaces eliminates the need for deplating the solder areas while protecting the nickel from oxidation. An example of a three-layer ceramic substrate intended to receive a two-terminal power component, for example, a diode, is shown in Figures 1, 4a, 4b, 5a, 5b, and 6.

[0108] Advantageously, the described process is particularly interesting because it can be implemented simultaneously for several encapsulation devices. In other words, the described manufacturing process makes it possible to manufacture several encapsulation devices at once. This helps to reduce manufacturing costs. In this case, substrate 2 will be composed of a repetition of the motifs of the unit encapsulation device as shown in [Fig. 7].

[0109] Once the substrate 2 is supplied, it is possible to dimension the third metal plate p3 intended to receive the wall 6 and said wall 6 by choosing the height and thickness of said wall 6. The thickness of the wall 6 can for example be between 0.8 mm and 1.2 mm and the height H of the wall 6 can be between 2.3 mm and 2.7 mm, it being understood that these values ​​are given by way of example and that it is possible that the thickness of the wall 6 is less than 0.8 mm and that the height H of the wall 6 is less than 2.3 mm.

[0110] As can be seen in [Fig.6], the wall 6 has a height H relative to the mounting face 101 which is greater than the height relative to the mounting face 101 of an assembly consisting of the semiconductor chip 4 and the connection means 5, and the polymeric substance 7 fills the enclosure up to a height less than or equal to the height H of the wall 6. In the example of [Fig.6], the polymeric substance 7 completely covers the semiconductor chip 4 and the connection means 5.

[0111] The height H of the wall 6 must allow to contain polymeric substance 7 (such as the resin) in order to partially or totally cover the semiconductor chip 4 and must prevent an overflow of the polymeric substance 7 during a step of insertion of the polymeric substance 7 into the enclosure formed by the wall 6 around the semiconductor chip 4.

[0112] To fix the wall 6 to the substrate 2, the third metal plate p3 must allow for good gripping by the sorting and placement equipment. [Fig. 8a] presents a top view of an example of a simple wall 6 and [Fig.8b] presents a top view of an example of a wall 6 with four indentations 14 for a sorting and placement equipment nozzle.

[0113] Advantageously, the example in [Fig.8a] is simple to carry out and inexpensive.

[0114] Advantageously, the example of [Fig.8b] allows good gripping of wall 6 by the sorting and placement equipment.

[0115] The design of the wall 6 has a significant influence on the ease of implementation and the low cost of the manufacturing process described. A compromise must therefore be found regarding the material to be used for the wall 6, the technique for obtaining the wall 6 (which can be chosen from machining, cutting, stamping, molding, etc.), and the surface treatment of the wall 6. When the wall 6 is designed according to defined criteria, it can be attached to the third metal plate p3, in particular by applying solder paste by screen printing or any other suitable dispensing method and heating the assembly to a defined temperature. The heating temperature varies depending on the type of material used, for example, depending on the type of solder or the type of sintering, and in particular whether it is silver sintering. For silver sintering, the heating temperature can be between 250°C and 300°C.

[0116] According to another possibility, the wall 6 can be fixed to the third metal plate p3 by gluing. In all cases, the fixing of the wall 6 and the semiconductor chip 4 to the substrate 2 is done at the same time, that is to say jointly, during the same step.

[0117] The process also includes a step of attaching the semiconductor chip 4 to the first metal plate p1 and the wall 6 to the third metal plate p3. This is done by deposition of solder paste by screen printing or sintering paste by a dispensing method before attaching the semiconductor chip 4 and the wall 6. Several types of solder paste can be used, including a solder paste comprising an SnPb alloy, an SnAgCu alloy, or pure tin. However, to ensure high-temperature resistance of the encapsulation device 1, solder pastes with a sufficiently high melting point are required. For example, gold-tin solder paste with a melting point of approximately 280°C can be used.

[0118] The fixation (or transfer) of the semiconductor chip 4 and the wall 6 onto the substrate 2 can be automated by sorting and placement equipment to ensure precise placement of the semiconductor chip 4 and the wall 6, and also to reduce the manufacturing costs of the encapsulation device 1. After the transfer of the semiconductor chip 4 and the wall 6 onto The solder paste placed on the appropriate metal pads is melted. The resulting structure is shown in [Fig. 4b]. It is preferable that the semiconductor chip 4 be attached to the first metal pad p1 in conjunction with the attachment of the metal wall 6 to the third metal pad p3.

[0119] Advantageously, when the attachment of the semiconductor chip 4 to the first metal area pl is done jointly with the attachment of the metal wall 6 to the third metal area p3, the manufacturing process becomes faster and more economical.

[0120] By jointly, it is understood that the attachment of the semiconductor chip 4 to the first metal plate pl and the attachment of the metal wall 6 to the third metal plate p3 are done together, at the same time, in parallel with each other.

[0121] The attachment of the semiconductor chip 4 to the first metal area pl and the attachment of the metal wall 6 to the third metal area p3 can be done by brazing with a solder paste.

[0122] Advantageously, brazing with solder paste allows the semiconductor chip 4 and the wall 6 to be fixed to the substrate in a robust, reliable and airtight manner.

[0123] Alternatively, the attachment of the semiconductor chip 4 to the first metal area pl and the attachment of the metal wall 6 to the third metal area p3 can be done by sintering, and in particular by sintering a silver paste.

[0124] Advantageously, silver paste sintering allows the semiconductor chip 4 and the wall 6 to be fixed to the substrate in a robust, reliable, airtight manner and ensures higher temperature resistance than soldering.

[0125] Next, an electrical connection step is performed between the semiconductor chip 4, fixed to the first metal plate p1, and the second metal plate p2, using connection means 5. This connection step consists of electrically connecting the semiconductor chip 4 and the substrate 2 by means of wire bonding. The connection means 5 may include an aluminum wire. Advantageously, aluminum wire bonding offers several advantages, including good electrical conductivity, corrosion resistance, and the ability to be used in high-temperature environments.

[0126] After this step, we obtain the structure shown in [Fig.5a].

[0127] It should be noted that the attachment of the metal wall 6 to the third metal area p3 is done so that said wall 6 surrounds the semiconductor chip 4 and the connection means 5 to form an enclosure around the semiconductor chip 4 and the connection means 5. The enclosure or cavity formed is intended to receive the polymeric substance 7.

[0128] The polymeric substance 7 is then inserted into the enclosure so that the polymeric substance 7 at least partially covers the semiconductor chip 4 and the connection means 5.

[0129] The encapsulation principle here consists of filling the cavity or enclosure delimited by the wall 6 with the polymeric substance 7 in order to protect the semiconductor chip 4 from external disturbances. The choice of polymers in the polymeric substance 7 may depend on the characteristics of the semiconductor chip 4 and the final application of the manufactured electronic component. For an electronic component intended for high-voltage applications, a polymeric substance with high dielectric resistivity should be used. For power applications, a polymeric substance with good thermal conductivity is preferable. Tests can be carried out to determine the polymeric substance suitable for the semiconductor chip 4. Resin is an example of a polymeric substance used in the manufacturing process described. Following the insertion step of the polymeric substance 7, the structure shown in [Fig. 5b] is obtained.

[0130] In the case where several encapsulation devices are manufactured jointly using the same substrate 2, a cutting step of the group of encapsulation devices can be carried out to obtain the individual encapsulation devices. Before performing the cutting step, the substrate 2 can be varnished to electrically insulate the metallic areas on the surface of the substrate 2 and to reinforce the protection provided by the polymeric substance 7. Several cutting methods can be used. For example, the sawing method can be used. To obtain better cutting accuracy and a better surface finish of the ceramic, pressurized water jet or laser cutting methods can be considered. The cutting lines 15 are shown in [Fig. 9] on an example of a substrate comprising 20 components.

[0131] The manufacturing process described is advantageous compared to another manufacturing process resulting in a plastic-encapsulated semiconductor chip because, in the manufacturing process described, the semiconductor chip 4 is much better protected from the external environment since the area outside the wall 6 can be considered totally hermetic, for example forming the hermetic zone 12 as shown [Fig.6].

[0132] Only the area located inside the wall 6, forming for example the sealed zone 13 as shown [Fig. 6], cannot be considered hermetic. However, the protection provided by the polymeric substance and the possibility of varnishing can provide the level of sealing required for electronic applications, including in the space sector.

[0133] Therefore, this type of component can be called semi-hermetic or quasi-hermetic.

[0134] Another advantage of the manufacturing process described is that encapsulation devices manufactured with this process are less expensive than hermetic ceramic components because several components can be manufactured in parallel on the same substrate.

[0135] In addition, the manufacturing process described makes it possible to do away with a hermetic sealing step present in the manufacturing processes of the prior art, and its control contributes to reducing the cost price of the encapsulation device.

[0136] Furthermore, the use of a ceramic substrate for which the routing of internal metal pads and vias can be optimized makes it possible to obtain components with good thermal and electrical performance.

Claims

Demands

1. Encapsulation device (1) comprising: - a substrate (2) having a mounting face (101) for receiving a semiconductor chip (4) and comprising a plurality of metal plates (pl, p2, p3), - a semiconductor chip (4) attached to a first metal plate (pl), - connection means (5) electrically connecting the semiconductor chip (4) attached to the first metal plate (pl) to a second metal plate (p2), - a wall (6) attached to a third metal plate (p3), said wall (6) surrounding the semiconductor chip (4) and the connection means (5) so as to form an enclosure around the semiconductor chip (4) and the connection means (5), - a polymeric substance (7) disposed at least within the enclosure and at least partially covering the semiconductor chip (4) and the connection means (5), device in which the wall (6) comprises a metal.

2. Encapsulation device (1) according to claim 1 wherein the metal is selected from the group comprising copper, a copper alloy, silver, gold, steel, or aluminum.

3. Encapsulation device (1) according to any one of claims 1 or 2 wherein the wall (6) has a height (H) relative to the fixing face (101) which is greater than the height relative to the fixing face (101) of an assembly consisting of the semiconductor chip (4) and the connecting means (5), and the polymeric substance (7) fills the enclosure to a height less than or equal to the height (H) of the wall (6).

4. Encapsulation device (1) according to any one of the preceding claims, wherein the semiconductor chip (4) is fixed to the first metal area (pl) by a chip fastener (10), and the wall (6) is fixed to the third metal area (p3) by a wall fastener (11), said chip fastener (10) and said wall fastener (11) being made from the same material(s).

5. Encapsulation device (1) according to claim 4 in which said chip attachment (10) and said wall attachment (11) each comprise a composition selected from the following compositions: - a sinter, and in particular a silver sinter, - a braze comprising a tin-lead alloy, - a braze comprising a tin-silver-copper alloy, - a braze comprising a gold-tin alloy, - a braze comprising pure tin.

6. Encapsulation device (1) according to any one of the preceding claims comprising a hermetic zone (12) which covers the external lateral faces of the wall (6) and of the substrate, and the face of the substrate opposite the fixing face (101).

7. Encapsulation device (1) according to any one of the preceding claims comprising a sealed zone (13) which covers both the attachment face (101) and the semiconductor chip (4) fixed to the attachment face (101).

8. A method for manufacturing the encapsulation device (1) according to any one of the preceding claims comprising the following steps: - supplying the substrate (2), - attaching the semiconductor chip (4) to the first metal plate (pl), - electrically connecting the semiconductor chip (4) attached to the first metal plate (pl) to the second metal plate (p2) by means of the connecting means (5), - attaching the metal wall (6) to the third metal plate (p3) such that said wall (6) surrounds the semiconductor chip (4) and the connecting means (5) so as to form an enclosure around the semiconductor chip (4) and the connecting means (5), - inserting the polymeric substance (7) into the enclosure such that the polymeric substance (7) covers at least partially the semiconductor chip (4) and the connecting means (5).

9. Method according to claim 8 wherein the attachment of the semiconductor chip (4) to the first metal area (pl) is done jointly with the attachment of the metal wall (6) to the third metal area (p3).

10. A method according to any one of claims 8 or 9 wherein the attachment of the semiconductor chip (4) to the first metal area (pl) and the attachment of the metal wall (6) to the third metal area (p3) is done by brazing a solder paste.

11. A method according to any one of claims 8 or 9 wherein the attachment of the semiconductor chip (4) to the first metal area (pl) and the attachment of the metal wall (6) to the third metal area (p3) is done by sintering a silver paste.

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