Microcontroller

FR3168660A1Pending Publication Date: 2026-05-22STMICROELECTRONICS INT NV
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Patent Information

Authority / Receiving Office
FR · FR
Patent Type
Applications
Current Assignee / Owner
STMICROELECTRONICS INT NV
Filing Date
2024-11-15
Publication Date
2026-05-22

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Abstract

Microcontroller. This description relates to a microcontroller (200) comprising a memory (152); an error correction code calculation block (142) for this memory; a first register (SBS_CFGR2); and a first bit (202) which, when it has a first value and the first register (SBS_CFGR2) contains a second value (ECCL=1), prevents modification of the contents of the first register (SBS_CFGR2) until a given sequence is written to a second register (SBS_KEYR) of the microcontroller (200). Figure for the abbreviation: Fig. 2
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Claims

14. Microcontroller according to any one of claims 1 to 13, wherein said sequence corresponds to the writing of two keys in the second register (SBS_KEYR); or wherein the first register (SBS_CFGR2) includes said first bit; or wherein said memory (152) is a RAM-type memory.

15. A method of operating a microcontroller according to any one of claims 1 to 14, wherein, when the first bit is set to the first value and the first register (SBS_CFGR2) includes the second value (ECCL=1), this results in the prohibition of modifying the contents of the first register (SBS_CFGR2) until the given sequence is written to the second register (SBS_KEYR) of the microcontroller (200).