A system-on-a-chip device comprising a means for evaluating temperature based on the calculation frequency, a motor vehicle, and a method and program based on such a device.

Abstract

The invention relates to a system-on-a-chip device comprising: - at least one work computer (WC) on a substrate (PCB), performing calculations at a calculation frequency; - at least one temperature computer (TC) on said substrate (PCB); characterized in that said temperature computer (TC) is connected to said work computer (WC), and in that said temperature computer (TC) determines the temperature (TC) of said work computer (WC) as a function of the calculation frequency of said work computer (WC). The invention also relates to a motor vehicle, a method, and a program based on such a system. Figure 1

Description

Title of the invention: SYSTEM-ON-CHIP DEVICE COMPRISING A MEANS FOR EVALUATING Temperature as a function of calculation frequency, motor vehicle, process and program based on such a device

[0001] The invention relates to the field of devices and systems on chip, and more specifically to means of evaluating the temperature of these systems.

[0002] A system-on-chip (SoC) is commonly used in infotainment and autonomous driving applications that require intensive computing. The hardware resources and functionalities of the system-on-chip (e.g., CPU, GPU, NPU, safety island, etc.) are grouped in different areas on the system chip.

[0003] For features that have a high computing capacity (CPU, GPU, NPU), each can be composed of several cores.

[0004] During the execution of a computational task, due to heat loss, the functionalities (or the cores in the case where a functionality is composed of cores) experience a temperature rise. Thus, they can heat each other by conduction.

[0005] To prevent physical damage to the computer functions, their operating temperature is limited by integrated thermal protection. For this purpose, on-chip sensors are implemented for temperature measurement. There may be several sensors in a signal core. For a given core, the integrated thermal protection takes into account the maximum values ​​of the different sensors.

[0006] Prior art has proposed temperature-sensitive scheduling for integrated CPU-GPU platforms, in which the thermal imbalance between the CPU function and the GPU function is taken into account in the design of the task scheduler to achieve efficient power management.

[0007] Unfortunately, the CPU-GPU system model mentioned in the prior art uses an estimation of the CPU and GPU power dissipation for different types of tasks to predict the temperature. This estimation involves measuring current and voltage at the feature level (CPU, GPU). This measurement is a task often performed by system-on-chip suppliers, but is not feasible. from the users' perspective, particularly when the system-on-a-chip does not include the dedicated function.

[0008] Furthermore, depending on the system-on-chip technology, for the same task, the dissipation of a feature may vary with temperature due to leakage current. The impact of temperature is not mentioned in existing work.

[0009] Furthermore, in addition to the difficulty of measurement, post-calculation is required to deduce the power. Moreover, the study only considers the maximum value of the on-chip sensor for a single core but ignores the thermal gradient, which is also a relevant factor for reliability.

[0010] Moreover, the prior art study does not take into account the thermal dispersion induced by the quality of the material and the manufacturing process, in the prediction model.

[0011] An objective of the present invention is to remedy the defects of the prior art, and in particular to propose a simplified solution allowing to obtain an accurate estimation of the temperature taking into account the heat dissipation.

[0012] To achieve this objective, the invention proposes a system-on-a-chip device comprising: - at least one work computer on a medium, performing calculations according to a calculation frequency; - at least one temperature calculator on said medium; characterized in that said temperature calculator is connected to said working calculator, and in that said temperature calculator determines the temperature of said working calculator as a function of the calculation frequency of said working calculator.

[0013] Advantageously, the invention makes it possible to accurately determine the temperature of on-chip sensors, or even to predict it in the preferred embodiment. The advantages of predicting the matrix sensor are as follows: - to allow thermal planning to avoid reaching the thermal protection; - to enable analysis of the impact of the thermal gradient on the degradation behavior of the system on chip (e.g., voltage offset).

[0014] Furthermore, the calculation frequency of the functionality is used as a variable instead of energy consumption. In this invention, heat dissipation due to quality and process is taken into account.

[0015] Furthermore, the approach proposed by the invention can be easily used by system-on-chip users.

[0016] In addition, the invention preferably proposes an algorithm that can validate the model or decide to collect measurement data for the improvement of the model.

[0017] Preferably, the system-on-chip device further comprises a temperature prediction model enabling the prediction of the temperature of said working computer as a function of the calculation frequency of said working computer, and in that said model is loaded into said temperature computer so that said temperature computer predicts said temperature as a function of said frequency.

[0018] This makes it possible to predict the temperature and to assign the tasks of the work computers according to the predictions.

[0019] Preferably, the system-on-chip device comprises several work computers, each performing calculations at a calculation frequency, characterized in that said temperature computer determines the temperature of each work computer as a function of the calculation frequency of said work computer.

[0020] This allows for a prediction specific to each work computer at its precise location.

[0021] Preferably, the system-on-chip device further includes a means for determining a thermal gradient of the medium from information from said temperature calculator.

[0022] This allows for an overview of temperatures across the entire support.

[0023] Preferably, said temperature calculator implements the following formula: T DS ~ ?CD*®CS ~ Pc ^Oefftrans^c^ ' Pcd is the dissipation power of the core; Fc is the calculation frequency of the core; is a thermal resistance matrix between the work computer and the temperature computer; and Coejftnms is the coefficient vector that converts the working frequency into core power dissipation.

[0024] This allows for an accurate estimation of the predicted temperature.

[0025] Preferably, the system-on-chip device further comprises at least one temperature sensor on the support, the temperature sensor being connected to said temperature calculator.

[0026] This allows the prediction to be confirmed or based on the current measurement. It also allows the model to be validated.

[0027] The invention further relates to a motor vehicle comprising a system-on-a-chip device according to the invention.

[0028] Another object of the invention relates to a method for evaluating the temperature of a system-on-a-chip device according to the invention, characterized in that it comprises the following steps: - a work calculation stage in which work calculations are performed according to a calculation frequency using at least one work calculator; - a temperature calculation step in which the temperature of said working calculator is determined as a function of the calculation frequency.

[0029] Preferably, the temperature calculation step uses a temperature prediction model to predict the temperature of said working computer as a function of the calculation frequency of said working computer.

[0030] The invention also relates to a computer program comprising program code instructions for executing the steps of the temperature evaluation process according to the invention, when said program is running on a computer.

[0031] The invention will be further detailed by describing non-limiting embodiments, and based on the accompanying figures illustrating variants of the invention, including: - [Fig.1] schematically illustrates the system-on-chip device according to a preferred embodiment of the invention; - [Fig.2] schematically illustrates an algorithm for validating the temperature prediction model of the device in [Fig.1].

[0032] In this invention, a mathematical model is proposed to predict the temperature of sensors integrated into the system-on-chip characteristics (CPU, GPU, etc.) for a given workload.

[0033] The model uses the operating frequency of the system-on-chip (SOC) features (CPU, GPU, etc.) as inputs to deduce the temperature. The invention enables a temperature-sensitive scheduling strategy that can maximize the availability of SOC functions.

[0034] Existing work only considers the maximum temperature value of the various sensors of a function / core. The invention predicts all the values ​​of the on-chip sensors.

[0035] This information can be used to predict the thermal gradient of a function. The thermal gradient is a key damage factor that can induce physical degradation of the system-on-chip and lead to behavior such as voltage shift and increased leakage current. However, this impact has never been studied.

[0036] Some existing work has predicted the temperature of system-on-chip functions based on the energy consumption of the functions in terms of input data. However, Consumption of functions is difficult, if not impossible, to achieve for system-on-a-chip users.

[0037] The invention uses the working frequency as input data, which facilitates its implementation.

[0038] Furthermore, existing work does not take into account the impact of quality and process-induced dispersion on the accuracy of the prediction model. For low-content nanofoil technology, material quality and process-induced dispersion on heat dissipation are not negligible.

[0039] This invention provides an algorithm for validating the calibrated offline model. If necessary, training data can be collected. This data can be used to improve the model.

[0040] The advantage of the invention is that system-on-chip users can predict all the temperature sensor values ​​of the system-on-chip functionalities (CPU, GPU, etc.) without depending on the suppliers of these systems.

[0041] This prediction enables task planning based on the user-side temperature of the system-on-chip. Furthermore, this prediction allows for in-depth analysis of the impact of the thermal gradient on the degradation behavior of the system-on-chip.

[0042] The invention proposes an algorithm that validates the calibrated model offline and, under the necessary conditions, collects training data for model improvement.

[0043] The system comprises two parts illustrated in [Fig.1].

[0044] Part 1 relates to the offline characterization of the system-on-chip for predicting the sensor values. This part comprises four steps illustrated at the top of [Fig. 1].

[0045] The first step 1.1 is the extraction of the data sensor mapping information (reference DE): this step consists of obtaining this information from the sensor S and its corresponding function. For example, for the system-on-chip in [Fig. 1], the content is summarized in the following table (Table 1). Functionality Sensor Number PCIe 10 PCIe 22 SAIL 51 SAIL 53 GPU 17 GPU 18 GPU 19 SAIL 52 NSP1 45 NSPO 29 NSPO 30 NSPO 31 VIDEO 20 AOSS 24 AOSS 37 AOSS 0 AOSS 12 DDRSS 35 DDRSS 48 AUDIO 8 CPUO2 3 CPUO2 15 CPUO3 4 CPUO3 16 CPU12 27 NSP1 46 NSP1 47 GPU 5 GPU 6 GPU 7 SAIL 50 NSP1 32 NSP1 33 NSP1 34 NSPO 42 NSPO 43 NSPO 44 CPU12 40 CPU28 28 CPU41 41 Other 11 Other 23 Other 36 Other 49 CAMSS 9 CAMSS 21 CPUO0 1 CPUO0 13 CPUO1 2 CPUO1 14 CPU 10 25 CPU 10 38 CPU 11 26

[0046] Table 1: Extraction of sensor mapping data

[0047] The second step, 2.2, is the development of the experimental design (reference BU). This step aims to develop such a design based on the number of computing cores. For example, for Table 1, there are 12 computing cores. The experimental design can be a full fractal design.

[0048] For example, below (Table 2) is a complete two-level factorial test plan for the 12 computing cores. Level 1 is the core in so-called IDLE condition and Level 2 is the core operating at maximum frequency. This plan will provide 4096 test cases.

[0049] Experimental case 2A (number of computing cores) Case CPU 00 ICPU 01 ICPU 10 CPU 11 CPU 02 CPU 03 ICPU 12 CPU 13 DK 0 DK 1 SAIL GP U 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 1 1 1 1 1 1 1 1 1 1 3 1 2 1 1 1 1 1 1 1 1 1 1 4 2 2 1 1 1 1 1 1 1 1 1 1 5 1 1 2 1 1 1 I 1 1 1 1 1 6 2 1 2 1 1 1 1 1 1 1 1 1 7 1 2 2 1 1 1 1 1 1 1 1 1 8 2 2 2 1 1 1 1 1 1 1 1 1 9 1 1 1 2 1 1 1 1 1 1 1 1 10 2 1 1 2 1 1 1 1 1 1 1 1 11 1 2 1 2 1 1 1 1 1 1 1 1 12 2 2 1 2 1 1 1 1 1 1 1 1 13 1 1 2 2 1 1 1 1 1 1 1 1 14 2 1 2 2 1 1 1 1 1 1 1 1 15 1 2 2 2 1 1 1 1 1 1 1 1 16 2 2 2 2 1 1 1 1 1 1 1 1 17 1 1 1 1 2 1 1 1 1 1 1 1 18 2 1 1 1 2 1 1 1 1 1 1 1 1 19 1 2 1 1 2 1 1 1 1 1 1 1 20 2 2 1 1 2 1 1 1 1 1 1 1 21 1 1 2 1 2 1 1 1 1 1 1 1 22 2 1 2 1 2 1 1 1 1 1 1 1 23 1 2 2 1 2 1 1 1 1 1 1 1 24 2 2 2 1 2 1 1 1 1 1 1 1 25 1 1 1 2 2 1 1 1 1 1 1 1

[0050] Table 2: 2-level experimental design of 12 factors

[0051] The third step 1.3 is the execution of the experiment according to the experimental plan (reference RL). This step consists of carrying out the experiments and recording the temperature curves as a function of time as in [Fig.1].

[0052] The fourth step 1.4 is the processing of data to deduce the prediction parameters from the sensor values ​​(reference PR0). In this step, the invention proposes to use the operating frequency of a core to predict its temperature.

[0053] The invention proposes the following model for predicting data from the sensor on chip with the heart's working frequency as input.

[0054] The stabilized self-heating of the chip sensor is as follows: A Tds = PcD*®CS “ Pc f tran^^CS Equation 1 Or : Pcd is the dissipation power of the core; Fc is the heart rate calculation rate; is the thermal resistance matrix between the core and the sensor; and Coef / tram is a vector of coefficients that converts the working frequency into power dissipation of the core.

[0055] This matrix has a size corresponding to the "number of cores multiplied by the number of sensors". This matrix is ​​linked to the material and the system-on-chip architecture; and each element it contains is an unknown parameter to be solved: Qci DSI ®C1 DSy Ô cs = L®CxD51 ÜCxDSy.

[0056] This vector is material-related, and each element of the vector varies according to the ambient operating temperature (Tamb). The ambient temperature can be considered the same as the temperature of the printed circuit board (PCB) or the stable average temperature of the sensor S when all cores are inactive.

[0057] With the above understanding, the coefficient Coefft is modeled with Equation 2: C OCf f tra / is = Acore ^^ï^Pcore 'amb core ) Equation 2 Or ^^core ^corc are as follows. a — raa ] ^core ~ ​​L ^core [ • • • ^core x Pcore — [ ^core 1 • ■ • ^core x^ c —F cc ] core — [ '-'core 1 • ■ • ^core x

[0058] The ambient temperature can be determined by measurement. The three vectors Acore, Bcore, and Ccore have a size of "Ix number of cores". They relate to the properties of the materials, and each element that composes them is an unknown to be solved.

[0059] Finally, the Coefest coefficient is a vector of size corresponding to the "number of cores" for a given ambient temperature.

[0060] The heart rate calculation frequency (Fc) is calculated as follows: F r = Freo ,... Freq ct ^core 1 * cor ex A TCids\ Cl DS y Cx DS I A TcxDSy This is a core operating frequency vector of size corresponding to the "number of cores xl".

[0061] With equation 1, the temperature difference A TDS is a matrix of size corresponding to the number of cores multiplied by the number of sensors, with: Equation 3

[0062] In this model, for a given ambient working temperature, the number of unknown parameters is much lower than the number of measurement curves, which is also the number of test cases.

[0063] For the example in Table 1, at room temperature, there are 4096 measured data points and 636 unknowns to solve. For example, the measured result of test case #256 is shown below. Many available algorithms allow this type of parameter adjustment (tools / commands available in Matlab, Python, etc.).

[0064] The parameters and the model can be flashed onto a memory so that the system on chip can use them for the prediction of the on-chip sensors.

[0065] In step 2, the UFS (Universal Flash Storage) loads (Id) the offline calibrated model into the system-on-chip's RAM, and the CPU retrieves the model for temperature prediction. Sv represents the backups to the UFS flash storage. For a task to be scheduled (PL) at time t, the temperature values ​​from the sensors are calculated in the CPU (Tc) and stored in RAM.

[0066] On the task scheduler, which takes into account the predicted temperature (Tc) at time t, the workload can be evaluated on different CO computing cores. During task execution at time t, the measurements from the on-chip sensors (measured temperature TM) are read by the CPU, which compares the measurement with the predicted value (Tc) stored in RAM. The decision to validate the model is made based on a prediction error err ([Fig. 2]). If the model is not validated, the data will be collected (Coll) from RAM and stored in UFS flash storage. Otherwise, the model is confirmed (Conf). The data includes the sensor values ​​and the operating frequency of the corresponding core. The data can be used to improve the model offline.

[0067] One could consider using an embedded machine learning model, which can be trained with the described data (output temperature sensor values ​​and input core loading frequency). The problem with this variant is the use of the computing resource, which is already heavily taxed.

[0068] The invention further relates to a temperature evaluation method and a corresponding program. The program can be loaded into the memory of a motor vehicle control unit such as a temperature computer or a general computer.

Claims

Demands

1. System-on-chip device comprising: - at least one work computer (WC) on a substrate (PCB), performing calculations according to a calculation frequency; - at least one temperature computer (CPU) on said substrate (PCB); characterized in that said temperature computer (CPU) is connected to said work computer (WC), and in that said temperature computer (CPU) determines the temperature (Tc) of said work computer (WC) as a function of the calculation frequency of said work computer (WC).

2. System-on-chip device according to claim 1, characterized in that it further comprises a temperature prediction model for predicting the temperature (Tc) of said working computer (CO) as a function of the calculation frequency of said working computer (CO), and in that said model is loaded into said temperature computer (CPU) so that said temperature computer (CPU) predicts said temperature as a function of said frequency.

3. System-on-chip device according to any one of claims 1 to 2, comprising several work computers (WC), each performing calculations at a calculation frequency, characterized in that said temperature computer (CPU) determines the temperature of each work computer (WC) as a function of the calculation frequency of said work computer (WC).

4. System-on-chip device according to any one of claims 1 to 3, further comprising a means for determining a thermal gradient of the medium from information from said temperature calculator (CPU).

5. System-on-a-chip device according to any one of claims 1 to 4, characterized in that said temperature calculator (CPU) implements the following formula: A Tœ = PcB*&cs = Fc: Pcd is the dissipation power of the core; Fc is the calculation frequency of the core; is the thermal resistance matrix between the work computer (CO) and the temperature calculator (CPU); and Coef ft is the vector of coefficients that converts the working frequency into the core's power dissipation.

6. System-on-chip device according to any one of claims 1 to 5, further comprising at least one temperature sensor (S) on the carrier, the temperature sensor (S) being connected to said temperature computer (CPU).

7. Motor vehicle comprising system-on-a-chip device according to any one of claims 1 to 6.

8. A method for evaluating the temperature of a system-on-chip device according to any one of claims 1 to 6, characterized in that it comprises the following steps: - a work calculation step in which work calculations are performed at a calculation frequency using at least one work computer (WC); - a temperature calculation step in which the temperature (Tc) of said work computer (WC) is determined as a function of the calculation frequency.

9. Temperature evaluation method according to claim 8, characterized in that the temperature calculation step uses a temperature prediction model enabling the prediction of the temperature (Tc) of said working computer (CO) as a function of the calculation frequency of said working computer (CO).

10. Computer program comprising program code instructions for performing the steps of the temperature evaluation process according to any one of claims 8 to 9, when said program is running on a computer.

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