Electronic circuit protected against analysis

FR3170057A1Pending Publication Date: 2026-06-19IDEMIA FRANCE SAS

Patent Information

Authority / Receiving Office
FR · FR
Patent Type
Applications
Current Assignee / Owner
IDEMIA FRANCE SAS
Filing Date
2024-12-16
Publication Date
2026-06-19
Patent Text Reader

Abstract

The present invention relates to an electronic circuit composed of a plurality of logic gates characterized in that: - at least a part of the plurality of logic gates is divided into a plurality of groups of logic gates; - each group of logic gates is powered by a voltage randomly selected from a set of at least two available voltages; and - a new random selection of the voltages powering the groups of logic gates is performed between two uses of the circuit. [Fig. 1]
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