Intermediate system and method for measuring voltages on power transistors

Abstract

The voltage UDS between the drain D and the source S of a power transistor 1 is measured using an intermediate system 2. The voltage may of the transistor’s ON state, OFF state, or a transient when th

Description

The present invention relates to devices and methods for measuring the output voltage of power transistors during operation. The intermediate system according to the present invention, in combination with known measuring instruments, is configured to measure the output voltage Uds between a drain (D-drain) and a source (S-source) of a power transistor in the ON state, in the OFF state, and in transients when the transistor transitions from the OFF state to the ON state and vice versa. For example, the measurement of voltage Uds in combination with the measurement of current Ids allows the calculation of the resistance between the D-drain and the S-source in the ON state Rds-on, which is important information for the operation of a power transistor, especially at high switching frequencies between ON and OFF states. In addition, the voltage Uds in the ON state is an important indicator of the performance of the transistor, which can change as the transistor ages; for example, if the voltage Uds is low, as at the beginning of the transistor's lifetime, it can be concluded that the transistor is still working well, but if this voltage Uds increases with time, this is an indication of degradation of the transistor's performance. The rate of change in the voltage Uds between switchovers, and in particular between switchover from the OFF state to the ON state, is also important for the performance of the power transistor in individual applications such as an electric motor driver or a power stage driver, since slow switchover, i.e. a slow decrease in the voltage Udsduring this switchover, results in losses of the power transistor. The problem of measuring the output voltage Uds of power transistors is that the value of the voltage Uds varies greatly between the ON and OFF states. Typically, the voltage Uds in the ON state is between 0.1 V and 10 V, and in the OFF state between 100 V and 1000 V; depending on the type of power transistor. In order to measure the voltage Uds in the ON state with sufficient accuracy, a sensitive measuring instrument, e.g. a spectrum analyser, is required, but it is too sensitive to measure the voltage Uds in the OFF state. Therefore, an additional intermediate measuring system is required, which is inserted between the power transistor to be measured and the measuring instrument. The measuring instrument can be well-known types of oscilloscope, signal analyser or spectrum analyser. The desirable characteristics of an intermediate measuring system are that it allows the measurement of the voltage Uds across the power transistor with the same measuring instruments over the entire voltage range, i.e. in the ON, OFF state and intermediate states, and to cause the least possible disturbance to the measurement in terms of amplitude distortion or time delay of the measured signal, including that it is desirable that the output resistance of the intermediate measuring system be small, for example in the order of 50 Q, as this is the generally accepted standard for measuring instruments. Prior art discloses systems that allow the measurement of Uds. For example, in the paper “On-state voltage measurement of fast switching power semiconductors” by Mattia Guacci, Dominik Bortis, Johann W. Kolar, published in CPSS Transactions on Power Electronics and Applications, Vol. 3, No. 2, June 2018, the solution is disclosed that the voltage Uds is limited by an intermediate circuit at high values, i.e. Uds in the ON state is measured at the output of the intermediate circuit with known measuring instruments with sufficient accuracy, and in the OFF state, when Uds is high, there is no high voltage at the output of the intermediate circuit, i.e. the measuring instrument is not overloaded. A disadvantage of this intermediate circuit is that it only provides an accurate measurement of Uds in the ON state, but not in the OFF state, not even during switchovers. A voltage probe for oscilloscopes is commercially available from Tektronix, which allows the measurement of the voltage Uds above 1000 V, i.e. at least nominally allows the measurement in both ON and OFF states, but it has drawbacks: it does not have a linear response, especially in the ON state measurement range, and it has a high output resistance, in the range of 1 MO, and only gives adequate results using measuring instruments having such an input resistance, i.e. 1 MQ, and an extremely low input capacitance, in the order of tens of pF, whereas most measuring instruments do not have such characteristics, e.g. most signal analysers. The use of measuring instruments with different characteristics in the Tektronix probe has, of course, a very unfavourable impact on the accuracy of measurements. An intermediate system according to the present invention, connected between the power transistor to be measured measuring instrument, modifies or amplifies the voltage Uds signal of the power transistor in such a way that the modified signal contains information about the original voltage Uds signal and is at the same time sufficiently robust to be measured by various known measuring instruments in both ON and OFF states and over the entire switching characteristic of the power transistor. The intermediate system according to the present invention comprises the following subsystems, which normally follow each other from the power transistor to be measured to the measuring outputs: a resistive divider, an active impedance converter, and in a preferred embodiment, a cutting subsystem and an active voltage amplifier. The intermediate system has two outputs, a high-voltage (HV) output on the active impedance converter and, in the preferred embodiment, a low-voltage (NV) output on the active voltage amplifier. In the following, the present invention will be explained by way of embodiments and illustrated in the following figures: Figure 1 is a schematic representation of a measured power transistor 1 of an intermediate system 2 with subsystems 3, 4, 5, 6 and outputs HV and LV. Figure 2 shows an embodiment of a resistive divider 3 with resistors R1 and R2. Figure 3 shows an embodiment of a NiCr resistive divider 3. Figure 4 shows an embodiment of an active impedance converter 4 with a high-voltage output HV. Figure 5 shows an embodiment of a cutting subsystem 5. Figure 6 shows an embodiment of an active voltage amplifier 6. Figure 7 shows three graphs of voltage characteristics as a function of time at the high-voltage output HV during a transition between the OFF state to the ON state for three embodiments: graph a when no capacitor C1 and no diode D2 are used in the active impedance converter; graph b when a capacitor C1 is used and no diode D2 is used; and graph c when both a capacitor C1 and a diode D2 are used. The high-voltage output HV is connected to a voltage measuring instrument, such as various types of spectrum analysers, signal analysers via analogue-to-digital converters, oscilloscopes, which measure mainly the voltage in the OFF state, the characteristics of the switchovers, especially the OFF-ON switchover, and the characteristics of these states, such as delays, voltage rise and fall times, and other switchover anomalies. The low-voltage output LV is connected to a measuring instrument, such as various types of signal analysers or spectrum analysers, which primarily measure the voltage in the ON state. The resistive divider 3 is formed in known ways and generally consists of two resistors R1 and R2, as shown in Figure 2. It is configured to linearly reduce the measured voltage Uds by a certain factor, for example by a factor of 100. By reducing the voltage, further subsystems of the intermediate system are made to operate at lower voltages, which, among other things, improves the timing characteristic of the whole intermediate system, since rapid changes of larger voltage ranges result in larger time delays contributed to the measurement by each of the subsystems. Typically, the voltage reduction factor on the resistive divider 3 is selected from a range of 50 to 200, preferably 80 to 120, most preferably the reduction factor equals 100. It is important for the resistive divider 3 according to the present invention to be able to withstand high voltages, i.e. to have a sufficiently high breakdown voltage, and to have minimum parasitic capacitances and inductances, as these would distort the measurement, for example in terms of delay in the measured signal or distortion of the shape of the measured signal (overshoot, undershoot). In addition, the resistance of the resistors in the resistive divider 3 may not vary with temperature, as such variations would introduce additional errors in the measurement. It is desirable that the resistive divider 3 have minimum parasitic inductance and minimum parasitic capacitance in order to operate as an ideal resistive divider in the frequency range up to 100 MHz, which is relevant for the measurement of the characteristic of power transistors. The lower the maximum frequency of the relevant frequency range to be measured, the less demanding the characteristics of the resistive divider 3 are in terms of parasitic capacitance and inductance. For the frequency range up to 100 MHz, an example of a still acceptable parasitic capacitance of the resistive divider 3 is about 0.1 pF. In the embodiment shown in Figure 3, the resistive divider 3 with a reduction factor of 100 is made of thin-film resistors implemented as a trace of NiCr alloy on a silicon oxide substrate on a silicon wafer. The silicon oxide has a high breakdown voltage strength. The NiCr alloy has a very stable resistance as a function of temperature, which is desirable in the specific application. It is a single resistive trace having three terminals, with the middle terminal (shown in Figure 3, top right) delimiting the resistive trace representing the resistor R1 from the resistive trace representing the resistor R2. The width of the resistive trace in this embodiment is 1.5 pm for the resistive traces of both resistors R1 and R2. The length of the resistive trace representing the resistor R1 is 10296 pm and is routed in a pattern of several connected sections, namely the first section on the left-hand side oriented upwards, followed by a parallel section oriented downwards, and so on to the end of the resistor R1, as shown in Figure 3. In this way, the individual contributions of the electric and magnetic fields due to the current in opposite directions through the individual adjacent sections of the resistive divider cancel each other out to a sufficient extent, which for this embodiment sufficiently eliminates the parasitic capacitances and inductances of the resistive divider 3. The length of the resistive trace representing the resistor R2 is 104 pm, thus achieving the desired voltage reduction factor. If the resistors used in the resistive divider 3 have too high resistance, this will increase the parasitic capacitances and inductances. However, if the resistance is too low, this increases the current and heat release, which is not desirable. In the embodiment shown in Figure 3, the resistance of R1 + R2 is in the range of a few MQ, specifically 3 MQ. An active impedance converter 4, an embodiment of which is shown in Figure 4, in an intermediate system 2 according to the present invention, is configured to amplify a signal in such a way that the voltage at its output is substantially equal to the voltage at its input, the phase of the signal not being reversed in the preferred embodiment. Between the output of the active impedance converter and the high-voltage output HV a resistor R3 is connected, the resistance of which determines the output resistance of the high-voltage output HV. Typically, the value of R3 is in the range of a few tens of Q, preferably 50 £1 The active impedance converter 4 is preferably formed using an operational amplifier OA1 as shown in Figure 4. The high-voltage output HV is suitable for measuring voltage mainly in the OFF state and the above-mentioned transient characteristics with standard measuring instruments such as spectrum analysers, signal analysers via analogue-to-digital converters, oscilloscopes, since the above-mentioned measuring instruments with their input resistance (standard 50 0) will not have a significant negative impact on the accuracy of the measurement. In the preferred embodiment shown in Figure 4, the active impedance converter 4 further comprises a capacitor C1 coupled to the input of the active impedance converter 4, and hence to the input (+) of the operational amplifier OA1, and a diode D2 coupled to the output (-) of the operational amplifier OA1. These two additional elements speed up the response of the active impedance converter 4 in case of abrupt changes in the measured voltage, as shown in graphs a, b and c in Figure 7. The typical value of the capacitor C1 is about 1.1 pF, and in a further preferred embodiment, this capacitor C1 is adjustable, which allows us to calibrate the active impedance converter 4, thus eliminating the negative effects of parasitic capacitance and inductance due to the printed circuit board architecture in the active impedance converter 4. The aforementioned calibration of the active impedance converter 4 is particularly important in applications where the transient characteristics of the measured power transistor are measured during switchovers from the OFF to ON state and / or vice versa. In one of possible embodiments, a Schottky diode is used for diode D2, which has a very fast switchover action. Graphs a, b and c in Figure 7 show the voltage characteristic at the high-voltage output HV during the transition between the OFF and ON states, when the maximum voltage UdsOFF in the OFF state drops to the minimum voltage UdsON in the ON state. The abscissa axis of the graph shows the time, namely 80 ns per section, with the whole axis divided into ten sections. Graph a shows the voltage response of the active impedance converter 4 measured at the high-voltage output HV, at which said capacitor C1 and said diode D2 have not been used, where a significant delay can be seen, which is the result of the operating characteristics of the operational amplifier OA1. Graph b shows the voltage response of the active impedance converter 4, in which the capacitor C1 but no diode D2 are used, which achieves a sufficiently fast voltage response, but due to the use of the capacitor 01 a significant undershoot in the voltage response occurs, namely the voltage at the output of the active impedance converter 4 drops below the true measured voltage UdsON in the ON state. Graph c shows the voltage response of the active impedance converter 4, in which both the capacitor C1 and the diode D2 are used, wherein the diode D2 significantly reduces the undershoot. A cutting subsystem 5, an embodiment of which is shown in Figure 5, is connected in an intermediate system 2 to the output of the active impedance converter 4. In the intermediate system 2 according to the present invention, the cutting subsystem 5 is intended to cut off all voltages higher than a certain pre-set value Umax and thereby to pre-prepare the measured signal from the output of the active impedance converter 4, which still contains the entire voltage characteristic, from the maximum voltage UdsOFF in the OFF state to the minimum voltage UdsON in the ON state, for a detailed voltage measurement in the ON state. The voltage Udsin the ON state, as mentioned above, is one of the essential operating characteristics of the power transistor 1. The cutting subsystem 5, in combination with the active voltage amplifier 6, is therefore intended to prepare the measured signal for accurate measurement by conventional precision measuring instruments, such as various types of signal analysers or spectrum analysers, in the low-voltage range, in particular forthe measurement of the voltage Uds in the ON state. Too high voltages would overload such measuring instruments. The cutting subsystem 5 may be implemented in known ways and, in the embodiment shown in Figure 5, consists of a resistor R4 and a diode D1. In the embodiment, where the intermediate system 2 measures the voltage Uds of the power transistor 1, which is 1200 V in the OFF state and 20 V in the ON state, this measured voltage will be reduced by a factor of 100 downstream of the resistive divider 3, i.e. the measured voltage in the OFF state will be 12 V and in the ON state 0.2 V. Since the low-voltage output LV is intended for a detailed voltage measurement in the ON state, the cutting subsystem 5 will have a pre-set cutting voltage Umax a certain percentage higher than the expected measured voltage in the ON state, in the specific case 20% higher, i.e. the cutting voltage Umax will be equal to 0.24 V. The cutting subsystem 5 may introduce a certain delay in the measured signal, depending on the amount of the cutting voltage Umax. It is desirable that the time constant, which is the product of the resistance R4 and the capacitance Cdi of the diode D1 (R4 x Cdi), is less than 20 ps. In the intermediate system 2 according to the present invention, the delay problem is partially solved by reducing the measured voltage by the resistive divider 3, since the relevant measured voltage in the ON state, by which the cutting voltage Umax is determined, is lower by a factor of the resistive divider 3, and thus Umax is also lower. The signal at the output of the cutting subsystem 5 is further amplified by an active voltage amplifier 6 to make it suitable for measurement by said measuring instruments, in particular to make the best possible use of the measuring range of said measuring instruments to measure the measuring signal corresponding to the voltage Uds in the ON state. The active voltage amplifier 6 also reduces the output resistance at the low-voltage output LV compared to the output resistance of the cutting subsystem 5, which has a higher output resistance, which would adversely affect the measurement by said conventional precision measuring instruments if measured directly at the output of the cutting subsystem 5. The active voltage amplifier 6 is configured in known ways, for example, Figure 6 shows an embodiment with the operational amplifier OA2 combined with two resistors R5 and R6, where the ratio (R5+R6) / R5 determines the gain of the operational amplifier OA2 as well as the overall active voltage amplifiers. In an embodiment, when the operational amplifier OA2 in the circuit shown or the active voltage amplifier 6 amplify the measured signal by a factor of 10x, the ratio R5 / R6 = 1 / 9. Typically, the voltage gain factor of the active voltage amplifier 6 is selected from the range 5 to 20, preferably 8 to 12, more preferably 9.9 to 10.1. The output resistance of the low-voltage output LV is determined by a resistor R7 which is connected between the output of the operational amplifier OA2 and the low-voltage output LV, and is typically in the range of a few tens of Q, preferably 50 Q, since the standard input resistance of the measuring instruments to be used on the low-voltage output LV is also 50 Q. In a preferred embodiment, a diode D3 is connected to the output of the operational amplifier OA2, as shown in Figure 6, to correct for any undershoots in the measured voltage at the low-voltage output LV. The method according to the present invention is intended to adjust the output voltage Uds signal on the power transistor (1), wherein the method comprises: a. a linear voltage reduction in the output voltage Uds signal by a reduction factor, b. impedance adjustment of the signal to achieve a suitable low output resistance, preferably 50 Ohms, for measuring the voltage of the high-voltage measured signal with a standard measuring instrument. As mentioned above, the reduction factor is typically selected from the range 50 to 200, preferably 80 to 120, the reduction factor is even more preferably equal to 100. As may be deduced from the above explanations of the intermediate system 2, step a is performed at the resistive divider 3 and step b at the active impedance converter 4. The high-voltage measured signal is measured using said measuring instruments at the high-voltage output HV. All of the above explanations relating to the intermediate system 2 also apply, mutatis mutandis, to the method according to the present invention. In a preferred embodiment of the method according to the present invention, the method comprises two further signal adaptation steps: c. cutting signal voltages higher than the pre-set cutting voltage Umax, d. voltage amplification of the signal by an amplification factor, and impedance adjustment of the signal to achieve a suitably low output resistance, preferably 50 Ohms, for measuring the low-voltage measured signal voltage with a standard measuring instrument. As mentioned above, the gain factor is typically selected from the range 5 to 20, preferably 8 to 12, more preferably 9.9 to 10.1. As is clear from the above explanations of the intermediate system 2, step c. is performed on the cutting subsystem 5 and step d. is performed on the active voltage amplifier 6. The low-voltage measured signal is measured using said measuring instruments at the low-voltage output LV. 25 01 24

Claims

1. An intermediate system (2) for measuring voltage Uds between a drain (D) and a source (S) of a power transistor (1), which is connected between the drain (D) of the power transistor (1) and a measuring instrument, characterised by comprising:a resistive divider (3) connected to the power transistor (1) to be measured,an active impedance converter (4) connected to the output of the resistive divider (3), and a high-voltage output (HV) for connection to the measuring instruments for voltage measuring, wherein a resistor (R3) is connected between the output of the active impedance converter (4) and the high-voltage output (H) to determine the output resistance of the high-voltage output (HV),a cutting subsystem (5) connected to the output of the active impedance converter (4), andan active voltage amplifier (6) connected to the output of the cutting subsystem (5) with cutting voltage Umax, and a low-voltage output (LV) for connection to the voltage measuring instruments, wherein a resistor (R7) connected upstream of the low-voltage output (LV) determines the output resistance of the low-voltage output (LV).

2. The intermediate system (2) according to claim 1, characterized in that the resistive divider (3) is formed as a trace of NiCr alloy on a silicon oxide substrate on a silicon wafer.

3. The intermediate system (2) according to claims 1 to 2, characterized in that the active impedance converter (4) is formed using an operational amplifier (OA1).

4. The intermediate system (2) according to claims 1 to 3, characterized in that the active impedance converter (4) further comprises a capacitor (C1) coupled to the input of the active impedance converter (4) and a diode (D2) coupled to the output of the active impedance converter (4).

5. The intermediate system (2) according to claims 1 to 4, characterized in that the cutting subsystem (5) is formed using a resistor (R4) and a diode (D1).

6. The intermediate system (2) according to claims 1 to 5, characterized in that the active voltage amplifier (6) is formed using an operational amplifier (OA2) and a combination of resistors (R5) and (R6), the ratio of which determines the voltage gain factor of the active voltage amplifier (6).

7. The intermediate system (2) according to claim 6, characterized in that the active voltage amplifier (6) comprises a diode (D3) coupled to the output of the operational amplifier (OA2).8 A method for adjusting a signal of measured voltage Uds on a power transistor (1), characterisedin that the method comprises:a. a linear voltage reduction in the measured signal by a reduction factor,b. impedance adjustment of the measured signal to achieve a suitable low output resistance, for measuring the voltage of the measured signal with a standard measuring instrument,c. cutting signal voltages higher than the pre-set cutting voltage Umax,d. voltage amplification of the signal by an amplification factor, and impedance adjustment of the signal to achieve a suitably low output resistance, for measuring the measured signal voltage with a standard measuring instrument.

9. The method according to claim 8, characterized in that the reduction factor is selected from the range 50 to 200, preferably 80 to 120, the reduction factor is even more preferably equal to 100.

10. The method according to claims 8 to 9, characterized in that the amplification factor is selected from the range 5 to 20, preferably 8 to 12, more preferably 9.9 to 10.1.25 01 24

Images