Topology derivation method for double grounded inverter

Abstract

A topology derivation method for a double grounded inverter includes: determining a quantity of nodes and a quantity of switches in a topology of a double grounded inverter, where the quantity of nodes is greater than or equal to three. The switch is inserting based on the node to construct a simplest undirected graph, where the simplest undirected graph includes at least an inverting structure containing three of the nodes and two of the switches. At least two inductors and a capacitor are inserted into the simplest undirected graph, with the two inductors inserted into the inverting structure. Based on a double grounded characteristic circuit, a negative terminal of an input power source and a negative terminal of an output load to a common ground are on the same node. A double grounded inverter may eliminate common-mode leakage current. The arrangement may be used to with a non-isolated inverter for a photovoltaic system.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of inverters, and in particular, to a topology derivation method for a double grounded inverter. BACKGROUND

[0002] A non-isolated inverter system is widely used due to its advantages of a simple structure, a low7 cost, a low7 energy7 loss, and a high overall efficiency. However, due to a lack of effective isolation, a direct-to-ground capacitor of a photovoltaic cell panel can generate a common-mode leakage current, which can cause conducted noise and harmonic current interference, and even threaten personal safety. Experts and scholars worldwide have conducted a series of effective studies on how to suppress a common-mode leakage current of a non-isolated inverter. Common methods for suppressing the common-mode leakage current include improving a modulation technique, adding a switching device, adding a filter, improving a control method, and the like. However, the above methods are susceptible to parameter changes of a direct-to-ground parasitic capacitor of an input pow7er source and a circuit.

[0003] In recent years, with gradually deepened research on a leakage current of a photovoltaic inverter, some scholars have proposed a double grounded topology structure. This structure allows connection of a negative terminal of a direct current (DC) input and a neutral point of an alternating current (AC) output, w7hich is equivalent to directly short-circuiting a direct-to-ground parasitic capacitor of a photovoltaic module. In theory, this can completely eliminate the common-mode leakage current. However, there is no theoretical reasoning model. Therefore, it is necessary7 to study a theoretical system to derive the double grounded inverter. SUMMARY

[0004] In order to overcome defects of the prior art, the present disclosure provides a topology derivation method for a double grounded inverter, aiming to solve a topology derivation problem of a double grounded inverter, so as to derive a plurality of types of double grounded inverter circuits. 10005] In order to achieve the above objective, the present disclosure provides a topology derivation method for a double grounded inverter, including following steps:

[0006] (1) determining a quantity of nodes and a quantity of switches in a topology of a double grounded inverter, where the quantity of nodes is greater than or equal to 3;

[0007] (2) inserting the switch based on the node to construct a simplest undirected graph, where the simplest undirected graph includes at least an inverting structure containing three of the nodes and two of the switches, and one of the three nodes (which is denoted as a node A) is connected to the other two nodes (which are denoted as nodes B and C) through the switches respectively;

[0008] (3 ) inserting at least two inductors into the simplest undirected graph, with the two inductors inserted into the inverting structure; and obtaining two nodes between the node A and the node B, as well as between the node A and the node C, with the two inductors inserted between the connected nodes and separated by one of the switches;

[0009] (4) inserting a capacitor into the simplest undirected graph, where if the inductor is on a same branch as the switch, the capacitor needs to be inserted, and one terminal of the capacitor is located between the inductor and the switch, and the other terminal of the capacitor is connected to another one of the nodes; if the two switches are on one branch, the capacitor also needs to be inserted, and the one terminal of the capacitor is located between the two switches, and the other terminal of the capacitor connected to the another one of the nodes; the capacitor is inserted to ensure that the switch and the inductor are not connected in series on one branch; the inductor on an input side or the inductor on an output side is not short-circuited within one cycle; and the capacitor is also connected in parallel to two ends of an output load to filter an output voltage, and

[0010] (5) based on a double grounded character Stic circuit, setting that a negative terminal of an input power source and a negative terminal of the output load have a common ground and are on a same node.

[0011] Further, the simplest undirected graph is a diagram in which the inductor is short-circuited, the input power source, the output load, and the capacitor are removed, and there are only the switch and the node in a circuit, and a solid line is used to represent a switch position; when the simplest undirected graph contains three nodes, no loop is allowed; and when the simplest undirected graph contains at least three nodes, an output node, an adjacent node of the output node, and a common ground node do not form a loop.

[0012] Further, the insertion of the inductor into the inverting structure in the step (3) is classified into two cases: in a first case, a node A! is obtained between the node A and the node C, where one terminal of a first inductor is connected to the node A, and the other terminal of the first inductor is connected to the node A', and a node B' is obtained between the node B and the node A, where one terminal of a second inductor is connected to the node B, and the other terminal of the second inductor is connected to the node B'; and in a second case, a node A" is obtained between the node A and the node B, w'here the one terminal of the first inductor is connected to the node A, and the other terminal of the first inductor is connected to the node A", and a node C is obtained between the node C and the node A, where the one terminal of the second inductor is connected to the node C, anti the other terminal of the second inductor is connected to the node C.

[0013] Further, when the simplest undirected graph contains more than three nodes, an extra node is located between the node A and the node B, between two ends of the node A and the node B, between the node A and the node C, or between two ends of the node A and the node C.

[0014] Further, in the step (3), when the simplest undirected graph contains another node besides the inverting structure, positions and a quantity of the inductors inserted are related to the node and the switch; if the node is connected to M switches, it is necessary to divide the node into M nodes; the inductor is inserted between the nodes to ensure that there is only one inductor on an obtained branch; and the inductor on the input side or the inductor on the output side is not short-circuited within the one cycle.

[0015] The present disclosure has following beneficial effects:

[0016] According to the topology derivation method for a double grounded inverter provided in the present disclosure, a double grounded inverter circuit with two, three, four, or more switches can be derived. Thi s has a profound impact on topology research of a double grounded inverter. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] FIG. 1 is a schematic flowchart of a topology derivation method for a double grounded inverter according to an embodiment of the present disclosure,

[0018] FIG. 2 is a schematic structural diagram of an inverting structure and an inductor inserted into the inverting structure according to an embodiment of the present disclosure;

[0019] FIG. 3 is a schematic structural diagram of a simplest undirected graph with four nodes according to an embodiment of the present disclosure;

[0020] FIG. 4 is a schematic diagram of a topological circuit of a double grounded inverter with two switches, two inductors, and two capacitors according to an embodiment of the present disclosure,

[0021] FIG. 5 is a schematic diagram of a topological circuit of a double grounded inverter with three switches, three inductors, and three capacitors according to an embodiment of the present disclosure; and

[0022] FIG. 6 is a schematic diagram of a topological circuit of a double grounded inverter with four switches, three inductors, and three capacitors according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0023] To make the objectives, technical solutions, and advantages of the present disclosure clearer, the present disclosure is further described below' with reference to the accompanying drawings. The described embodiments should not be construed as a limitation to the present disclosure. All other embodiments obtained by a person of ordinary skill in the art without creative efforts shall fall within the protection scope of the present disclosure.

[0024] In the following description, "some embodiments" or "one or more embodiments" means a subset of all possible embodiments. However, it can be understood that "some embodiments" or "one or more embodiments" may be a same subset or different subsets of all the possible embodiments and may be combined with each other provided that no conflict exists,

[0025] In the following description, the terms "first" and "second" are merely intended to distinguish between similar objects but do not indicate a specific order of the objects. It can be understood that if allowed, "first" and "second" may be interchanged in a specific order or sequence to enable the described embodiments of the present disclosure to be practiced in a sequence other than that illustrated or described herein.

[0026] Unless otherwise defined, all technical and scientific terms used in the specification have same meanings as commonly understood by those skilled in the technical field of the present disclosure. The terms used in the specification are merely intended to describe the embodiments of the present disclosure, rather than to limit the present disclosure.

[0027] As shown in FIG. L the present disclosure provides a topology derivation method for a double grounded inverter, including following steps:

[0028] S101: Determine a quantity of nodes and a quantity of switches in a topology of a double grounded inverter, where the quantity of nodes is greater than or equal to 3.

[0029] Firstly, it is necessary to determine the quantity of nodes and the quantity of switches in the topology of the to-be-derived double grounded inverter, and the double grounded inverter at least is of three-node and two-switch structure.

[0030] SI02: Insert the switch based on the node to construct a simplest undirected graph, where the simplest undirected graph includes at least an inverting structure containing three of the nodes and two of the switches, and one of the three nodes (which is denoted as a node A) is connected to the other tw?o nodes (which are denoted as nodes B and C) through the switches respectively.

[0031] The simplest undirected graph is a diagram in which an inductor is short-circuited, an input power source, an output load, and a capacitor are removed, and there are only the switch and the node in a circuit, and a solid line is used to represent a switch position. For A nodes, there are a total of c2 J possible switch positions. The simplest undirected graph is formed by inserting the switch based on the node.

[0032] Based on characteristics of a current and a voltage that flow through an inverter switch, the inverter switch may be an uncontrollable switch, for example, a diode; or may be a controllable switch, for example, a device that bears a single-phase voltage and a single-phase current, a device that bears a single-phase voltage and a bidirectional current, a device that bears a bidirectional voltage and a single-phase current, or a device that bears a bidirectional voltage and a bidirectional current.

[0033] The simplest undirected graph is screened by using the inverting structure to obtain a simplest undirected graph containing an inverter circuit. The inverting structure structurally has three nodes and two switches. Therefore, the simplest undirected graph includes at least the inverting structure 4 containing the three nodes and the two switches, as shown in FIG. 2. The simplest undirected graph is composed of the three nodes and the two switches, including the node A, the node B, the node C, a first switch Si, and a second switch S2. The first switch Si is located between the node A and the node C. The second switch S2 is located between the node A and the node B.

[0034] When there are more than three nodes, an extra node is located between the node A and the node B, between two ends of the node A and the node B, between the node A and the node C, or between two ends of the node A and the node C. A possible structure of a simplest undirected graph with four nodes is shown in FIG. 3.

[0035] When the simplest undirected graph contains three nodes, no loop is allowed. When the simplest undirected graph contains at least three nodes, an output node, an adjacent node of the output node, and a common ground node cannot form a loop.

[0036] SI 03: Insert at least two inductors into the simplest undirected graph, with the two inductors inserted into the inverting structure; and obtain two nodes between the node A and the node B, as vrell as between the node A and the node C, with the two inductors inserted between the connected nodes and separated by one of the switches.

[0037] Two structures shown in FIG. 2 are obtained by inserting the two inductors into the inverting structure in the simplest undirected graph, separating the two inductors by the one of the switches, representing the switch position by using the solid line, and representing the inductor by using a dotted line. In a first case, a node A' is obtained between the node A and the node C, where one terminal of a first inductor is connected to the node A, and the other terminal of the first inductor is connected to the node A'; and a node B' is obtained between the node B and the node A, where one terminal of a second inductor is connected to the node B, and the other terminal of the second inductor is connected to the node B‘. In a second case, a node A” is obtained between the node A and the node B, where the one terminal of the first inductor is connected to the node A, and the other terminal of the first inductor is connected to the node A"; and a node C! is obtained between the node C and the node A, where the one terminal of the second inductor is connected to the node C, and the other terminal of the second inductor is connected to the node C.

[0038] When the simplest undirected graph contains another node besides the inverting structure, positions and a quantity of the inductors inserted are related to the node and the switch. If the node is connected to M switches, it is necessary to divide the node into M nodes. The inductor is inserted between the nodes to ensure that there is only one inductor on an obtained branch. The inductor on an input side or the inductor on an output side cannot be short-circuited within one cycle.

[0039] SI04: Insert the capacitor into the simplest undirected graph, where if the inductor is on a same branch as the switch, the capacitor needs to be inserted, and one terminal of the capacitor is located between the inductor and the switch, and the other terminal of the capacitor is connected to another one of the nodes; if the two switches are on one branch, the capacitor also needs to be inserted, and the one terminal of the capacitor is located between the two switches, and the other terminal of the capacitor is connected to the another one of the nodes; the capacitor is inserted to ensure that the switch and the inductor are not connected in series on one branch; the inductor on the input side or the inductor on the output side cannot be short-circuited within the one cycle; and the capacitor connected in parallel to the output load to filter an output voltage also needs to be included at two ends of the output load.

[0040] When the inductor is on the same branch as the switch, the one terminal of the capacitor is inserted between the inductor and the switch, and the other terminal of the capacitor is connected to the another one of the nodes in the circuit. When the two switches are on the one branch, the one terminal of the capacitor is inserted between the two switches, and the other terminal of the capacitor is connected to the another one of the nodes in the circuit. In the simplest undirected graph with the at least three nodes, except for the output node and the common ground node, if a node is only connected to another node in the simplest undirected graph, after the inductor is inserted, the one terminal of the capacitor needs to be connected to the node or a node obtained by dividing the node, and the other terminal of the capacitor needs to be connected to another node. Capacitors cannot be connected in parallel. There should be no direct parallel connection between the switch and the capacitor. A quantity of capacitors is related to a quantity of inductors. Regardless of how many capacitors there are in the circuit, one capacitor is connected in parallel to the output load by default to filter the output voltage.

[0041] S105: Based on a double grounded characteristic circuit, set a negative terminal of the input power source and a negative terminal of the output load to a common ground and so are on the same node.

[0042] According to the above steps, a double grounded inverter circuit with two, three, four, or more switches can be derived. Two circuits with two switches, two circuits with third switches, and two circuits with four switches are provided in the embodiments. A circuit with two switches, two inductors, and two capacitors is shown in FIG. 4. A circuit with three switches, three inductors, and three capacitors is shown in FIG. 5. A circuit with four switches, three inductors, and three capacitors is shown in FIG. 6.

[0043] The above description of the disclosed embodiments enables those skilled in the art to achieve or use the present disclosure. Various modifications to these embodiments are readily apparent to those skilled in the art, and the generic principles defined herein may be practiced in other embodiments without departing from the spirit or scope of the present disclosure. Accordingly, the embodiments of the present disclosure will not be limited to these embodiments shown herein, but are to fall within the widest scope consistent with the principles and novel features disclosed herein.

[0044] Example I. A topology derivation method for a double grounded inverter, comprising following steps: (1) determining a quantity of nodes and a quantity of switches in a topology of a double grounded inverter, wherein the quantity of nodes is greater than or equal to 3; (2) inserting the switch based on the node to construct a simplest undirected graph, wherein the simplest undirected graph comprises at least an inverting structure containing three of the nodes and two of the switches, and one of the three nodes (which is denoted as a node A) is connected to the other tw'O nodes (which are denoted as nodes B and C) through the switches respectively; (3) inserting at least two inductors into the simplest undirected graph, with the two inductors inserted into the inverting structure; and obtaining two nodes between the node A and the node B, as well as between the node A and the node C, with the two inductors inserted between the connected nodes and separated by one of the switches; (4) inserting a capacitor into the simplest undirected graph, wherein if the inductor is on a same branch as the switch, the capacitor is inserted, and one terminal of the capacitor is located between the inductor and the switch, and the other terminal of the capacitor is connected to another one of the nodes; if the two switches are on one branch, the capacitor is inserted, and the one terminal of the capacitor is located between the two switches, and the other terminal of the capacitor is connected to the another one of the nodes; the capacitor is inserted to ensure that the switch and the inductor are not connected in series on one branch; the inductor on an input, side or the inductor on an output side is not short-circuited within one cycle; and the capacitor is also connected in parallel to two ends of an output load to filter an output voltage; and (5) based on a double grounded characteristic circuit, setting that a negative terminal of an input power source and a negative terminal of the output load have a common ground and are on a same node.

[0045] Example 2. The topology derivation method for a double grounded inverter according to Example 1, wherein the simplest undirected graph is a diagram in which the inductor is short-circuited, die input power source, the output load, and the capacitor are removed, and there are only the switch and the node in a circuit, and a solid line is used to represent a switch position; when the simplest undirected graph contains three nodes, no loop is allowed; and when the simplest undirected graph contains at least three nodes, an output node, an adjacent node of the output node, and a common ground node do not form a loop.

[0046] Example 3. The topology derivation method for a double grounded inverter according to Example 1, wherein the insertion of the inductor into the inverting structure in the step (3) is classified into two cases: in a first case, a node A' is obtained between the node A and the node C, wherein one terminal of a first inductor is connected to the node A, and the other terminal of the first inductor is connected to the node A’, and a node B' is obtained between the node B and the node A, wherein one terminal of a second inductor is connected to the node B, and the other terminal of the second inductor is connected to the node B'; and in a second case, a node A" is obtained between the node A and the node B, wherein the one terminal of the first inductor is connected to the node A, and the other terminal of the first inductor is connected to the node A", and a node C is obtained between the node C and the node A, wherein the one terminal of the second inductor is connected to the node C, and the other terminal of the second inductor is connected to the node C.

[0047] Example 4. The topology derivation method for a double grounded inverter according to Example 1, wherein when the simplest undirected graph contains more than three nodes, an extra node is located between the node A and the node B, between two ends of the node A and the node B, between the node A and the node C, or between two ends of the node A and the node C.

[0048] Example 5. The topology derivation method for a double grounded inverter according to example 1, wherein in the step (3), when the simplest undirected graph contains another node besides the inverting structure, positions and a quantity of the inductors inserted are related to the node and the switch, if the node is connected to M switches, the node is divided into M nodes; the inductor is inserted between the nodes to ensure that there is only one inductor on an obtained branch; and the inductor on the input side or the inductor on the output side is not short-circuited within the one cycle.

Claims

S CLAIMED IS:

1. A topology derivation method for a double grounded inverter, comprising following steps:(1) determining a quantity of nodes and a quantity of switches in a topology of a double grounded inverter, wherein the quantity of nodes is greater than or equal to 3;(2) inserting a switch of the quantity of switches based on a node of the quantity of nodes to construct a simplest undirected graph, wherein the simplest undirected graph comprises at least an inverting structure comprising three nodes of the quantity of nodes and two switches of the quantity of switches, wherein one of the three nodes, node A, is connected to the other two nodes, node B and node C, through the quantity of switches, respectively,wherein the simplest undirected graph is a diagram in which the inductor is short-circuited, the input power source, the output load, and the capacitor are removed, and there is only the switch and the node in a circuit, wherein a solid line represents a switch position:when the simplest undirected graph contains three nodes, no loop is allowed; andwhen the simplest undirected graph contains at least three nodes, an output node, an adjacent node of the output node, and a common ground node do not form a loop;(3) inserting at least two inductors into the simplest undirected graph, with the two inductors inserted into the inverting structure; and obtaining two nodes of the quantity of nodes between the node A and the node B and between the node A and the node C, with the two inductors inserted between node A and node B and node A and node C and separated by one of the switches of the quantity of switches;(4) inserting a capacitor into the simplest undirected graph, wherein: if an inductor of the at least two inductors is on a same branch as a switch of the quantity of switches, the capacitor is inserted, and one terminal of the capacitor is located between the inductor of the at least two inductors and the switch of the quantity of switches, and the other terminal of the capacitor is connected to a node of the quantity of nodes; if two switches of the quantity of switches are on a same branch, the capacitor is inserted, and the one terminal of the capacitor is located between the two switches, and the other terminal of the capacitor is connected to the node of the quantity of nodes; the capacitor is inserted to ensure that the switch and the inductor are not connected in series on the same branch; the inductor on an input side or the inductor on an output side is not short-circuited within one cycle; and the capacitor is connected in parallel to two ends of an output load to filter an output voltage; and(5) based on a double grounded characteristic circuit, setting a negative terminal of an input power source and a negative terminal of the output load to a common ground and on the same node of the quantity of nodes.

2. The topology derivation method for a double grounded inverter according to claim 1, wherein the insertion of the inductor into the inverting structure in step (3) comprises either:obtaining a node A' between the node A and the node C, wherein one terminal of a first inductor is connected to the node A, and the other terminal of the first inductor is connected to the node A', and a node B' is obtained between the node B and the node A, wherein one terminal of a second inductor is connected to the node B, and the other terminal of the second inductor is connected to the node B'; orobtaining a node A" between the node A and the node B, wherein the one terminal of the first inductor is connected to the node A, and the other terminal of the first inductor is connected to the node A", and a node C' is obtained between the node C and the node A, wherein the one terminal of the second inductor is connected to the node C, and the other terminal of the second inductor is connected to the node C.

3. The topology derivation method for a double grounded inverter according to claim 1, wherein when the simplest undirected graph contains more than three nodes, an extra node is located between the node A and the node B, between two ends of the node A and the node B, between the node A and the node C, or between two ends of the node A and the node C.

4. The topology derivation method for a double grounded inverter according to claim 1, wherein in step (3), when the simplest undirected graph contains another node besides the inverting structure, positions of the inserted inductors and a quantity of the inserted inductors are related to the node and the switch;if the node is connected to AT switches, the node is divided into A / nodes;the inductor is inserted between the nodes to ensure that there is only one inductor on an obtained branch; andthe inductor on the input side or the inductor on the output side is not short-circuited within the one cycle.

Images