A method for generating input polynomial coefficients

Abstract

A computer-implemented method for generating input polynomial coefficients for use by a signal generator in a quantum control system. The signal generator is configured to generate an output signal which approximates a desired signal using fixed-point arithmetic and the input polynomial coefficients. The desired signal is segmented into a plurality of segments, the desired signal having one or more signal values in each segment. The method comprises, for each segment of the plurality of segments, obtaining one or more initial trial polynomial coefficients, and providing the one or more initial trial polynomial coefficients to an optimisation algorithm to generate the input polynomial coefficients. The optimisation algorithm comprises minimising a difference between the one or more signal values of the desired signal and one or more approximated signal values generated using an approximation function. The approximation function approximates the one or more signal values of the desired signal using the one or more initial trial polynomial coefficients and the fixed-point arithmetic used by the signal generator.

Description

This disclosure relates to generating input polynomial coefficients, and in particular to methods and associated systems for generating input polynomial coefficients for use by a signal generator. Background Although they have become exponentially faster over the preceding decades, the "classical" computers of today are effectively limited to solving the same classes of problems as the first digital computers developed during the mid-twentieth century. In contrast, by exploiting the peculiarities of quantum physics, "quantum" computers promise to solve problems that are intractable on classical computers, such as factoring large numbers and simulating quantum systems. Control signals such as radiofrequency (RF) pulses are important tools for controlling quantum systems, and for performing the quantum operations required for realising quantum computers. Many, if not all, quantum computing architectures are controlled via RF pulses. Control over parameters such as the time-dependent amplitude, phase and frequency of the RF pulse is important to attain maximal efficiency and to mitigate errors. For signals comprising a large array of data, it is untenable to load the time resolved pulse parameters into a memory of the control electronics as a time indexed array. Interpolation techniques such as cubic spline interpolation can be used to address this issue. Spline interpolation is a technique which involves dividing a desired signal into segments. The desired signal can be approximated within each segment using an interpolating polynomial, which in turn can be defined using one or more polynomial coefficients. However, the control electronics are typically configured to use fixed-point arithmetic. For example, the control electronics may comprise memory elements configured to store numbers in a particular fixed-point representation. This can lead to truncation errors when signals are generated on the control hardware. Since the algorithms used to generate the signal values using the polynomial coefficients are typically iterative in nature, the errors introduced by truncation are cumulative. This can lead to errors between desired signal values and the actual signal values generated by the control electronics. This is sub-optimal, not least because accurate pulse generation is invaluable for controlling quantum systems. The present invention seeks to address these and other disadvantages encountered in the prior art by providing an improved method for generating input polynomial coefficients for use by a signal generator, for example a signal generator which forms part of a quantum control system. Summary According to a first aspect of the invention, there is provided a computer-implemented method for generating input polynomial coefficients for use by a signal generator in a quantum control system. The signal generator is configured to generate an output signal which approximates a desired signal using fixed-point arithmetic and the input polynomial coefficients. The desired signal is segmented into a plurality of segments, the desired signal having one or more signal values in each segment. The method comprises, for each segment of the plurality of segments, obtaining one or more initial trial polynomial coefficients, and providing the one or more initial trial polynomial coefficients to an optimisation algorithm to generate the input polynomial coefficients. The optimisation algorithm comprises minimising a difference between the one or more signal values of the desired signal and one or more approximated signal values generated using an approximation function. The approximation function approximates the one or more signal values of the desired signal using the one or more initial trial polynomial coefficients and the fixed-point arithmetic used by the signal generator. Most prior hardware used to generate signals for use in a quantum control system stores and / or manipulates data in a fixed-point representation. Generating a signal on fixed-point hardware that accurately represents the desired signal is difficult due to the fixed-point nature of the hardware. By using an optimisation algorithm that minimises a difference between the one or more signal values of the desired signal and one or more approximated signal values generated using an approximation function, the present method improves the signal accuracy of the one or more approximated signal values compared to when using existing approaches. Further, by using an approximation function that approximates the one or more signal values of the desired signal using one or more initial trial polynomial coefficients and the fixed-point arithmetic used by the signal generator, the present method generates improved input polynomial coefficients which are particularly well-adapted for use in a signal generator, such as a signal generator in a quantum control system. By taking into account the fixed-point arithmetic used by the signal generator, in other words by taking into account the technical considerations of the internal functioning of the signal generator in this way, a resulting generated signal can be made significantly more accurate. This improved accuracy is of particular value since it leads to improved fidelity of quantum operations when using the one or more approximated signal values to control qubits in a quantum control system. Optionally, the optimisation algorithm comprises adjusting the initial trial polynomial coefficients to minimise the difference between the one or more signal values and the one or more approximated signal values. Optionally, adjusting the initial trial polynomial coefficients comprises iteratively updating trial polynomial coefficients, starting with the initial trial polynomial coefficients. Optionally, the method may further comprise iteratively updating the trial polynomial coefficients until a stopping criterion is reached. Optionally, iteratively updating the trial polynomial coefficients comprises performing an optimisation routine comprises generating, using the approximation function and the initial trial polynomial coefficients, one or more initial approximated signal values (step i). The method further comprises calculating a difference between the one or more signal values and the one or more initial approximated signal values (step ii). The method further comprises generating new trial polynomial coefficients based on the difference calculated at (ii) (step iii). The method further comprises generating, using the approximation function and the new trial polynomial coefficients generated at (iii), one or more new approximated signal values (step iv). The method further comprises calculating a difference between the one or more signal values and the one or more new approximated signal values generated at (iv) (step v). The method further comprises generating new trial polynomial coefficients based on the difference calculated at (v) (step vi). The method further comprises performing steps (iv), (v), and (vi) until the stopping criterion is reached. Optionally, the difference between the one or more signal values and the one or more approximated signal values is defined in a cost function, wherein iteratively updating the one or more trial polynomial coefficients comprises minimising the cost function. A cost function is a function that measures the difference between a desired function and a fitted function to that desired function Optionally, the method may further comprise providing the one or more input polynomial coefficients to the signal generator. Optionally, the signal generator is a pulse shaper, and the output signal is for shaping a pulse. Optionally, shaping the pulse comprises one of modulating an amplitude, phase or frequency of a control pulse. Optionally, the one or more signal values of the desired signal in each segment are represented in a floatingpoint representation. Optionally, obtaining one or more initial trial polynomial coefficients comprises generating the one or more initial trial polynomial coefficients for each segment using a first fitting algorithm. Optionally, the first fitting algorithm is a cubic spline fitting algorithm. Optionally, each trial polynomial coefficient is iteratively updated within a range, wherein the range is based on the corresponding initial trial polynomial coefficient. Optionally, the one or more input polynomial coefficients for a particular segment define an interpolating polynomial that approximates the desired signal within the particular segment. Optionally, the method may further comprise generating, by the signal generator, the output signal using the input polynomial coefficients. Optionally, the signal generator comprises one or more memory elements configured to store numbers in a fixed-point representation with a particular number of significant figures. Generating the output signal comprises retrieving, from one or more memory elements, the one or more input polynomial coefficients for each segment in the plurality of segments. The method further comprise generating at least one value of the signal for each segment using one or more iterative algorithms based on the retrieved one or more input polynomial coefficients. According to a second aspect of the invention, there is provided a system comprising one or more processors configured to perform any of the above methods, or any of the methods disclosed herein. Optionally, the system may further comprise a signal generator, the signal generator being configured to generate the output signal using the input polynomial coefficients. According to a third aspect of the invention, there is provided a computer readable medium comprising computer-executable instructions which, when executed by one or more processors, cause the one or more processors to perform any of the above methods, or any of the methods disclosed herein. Figures Specific embodiments are now described, by way of example only, with reference to the drawings, in which: Figure 1 depicts a graph of a desired pulse segmented into a plurality of segments; Figure 2a depicts a graph of the desired pulse of fig. 1 and a fit to the desired pulse using floating point arithmetic; Figure 2b is a graph depicting the error between the desired pulse and the fit using floating point arithmetic; Figure 3a is a graph depicting the desired pulse of fig. land fig. 2a and a fit to the desired pulse using fixed-point arithmetic; Figure 3b is a graph depicting the error between the desired pulse and the fit to the desired pulse using fixed-point arithmetic; Figure 4 depicts a method according to the present disclosure; Figure 5 depicts a method according to the present disclosure; Figure 6a depicts a graph of the desired pulse of fig. 1, fig. 2a, and fig. 3a and a fit to the desired pulse using a method according to the present disclosure; Figure 6b depicts a graph of the error between the desired pulse and the fit to the desired pulse using the method according to the present disclosure; Figure 7 depicts a logic diagram for Bowler's algorithm; Figure 8 depicts a structure of an apparatus for generating a signal according to the present disclosure; Figure 9 depicts a computer architecture which may be used to perform the method of the present disclosure; Figure 10 depicts a computer-readable medium according to the present disclosure. Detailed Description In overview, and without limitation, the application discloses a method for generating input polynomial coefficients for use by a signal generator, for example a signal generator which forms part of a quantum control system. The signal generator may be a hardware component which is configured to generate an output signal which approximates a desired signal using fixed-point arithmetic and the input polynomial coefficients. Generating the signal based on polynomial coefficients is beneficial since it avoids the need to load a large data array representing the full desired signal into a memory of the signal generator. However, the hardware imposes a requirement to use fixed-point arithmetic. In prior methods, this need to use fixed-point arithmetic would result in a truncation error associated with converting the polynomial coefficients from their ideal floating-point representation. Using these prior methods, therefore, can result in significant differences between the desired signal and the output signal. Instead, in the present method, input polynomial coefficients are generated using an optimisation algorithm which takes into account the fixed-point arithmetic used by the signal generator. In this way, the resulting output signal generated by the signal generator more closely matches the desired signal. In particular, the optimisation algorithm involves the use of an approximation function which approximates the signal values of the desired signal using the same fixed-point arithmetic as will be used by the signal generator. Improved accuracy of signal generation is useful in many areas of application, for example in a quantum control system, where errors between the output and the desired signal can create unwanted frequency components which adversely affect the fidelity of quantum operations. Fig. 1 is a graph that depicts a desired signal 100. The desired signal 100 takes the form of a pulse, in particular a Gaussian-like pulse. The desired signal may take the form of a pulse and can be defined by a function, and the words pulse, signal, and function may be used interchangeably herein. The x axis depicts duration in a unit clock cycles. The y axis depicts an amplitude displayed in the form of 16 bit integer values. Fig. 1 depicts how a desired signal 100 can be segmented into segments llOa-h for the purpose of a fitting algorithm, such as polynomial spline interpolation. The desired signal 100 is split into segments llOa-h, with boundaries denoted by vertical dashed lines. The graph depicts a desired signal 100 split into 8 segments, however the number of segments may be increased or reduced according to the requirements of the particular implementation. In general, the accuracy of the fitting increases with the number of segments, but increasing the number of segments requires more memory. Once a fitting algorithm has been used, each segment llOa-h will be associated with one or more polynomial coefficients which define an interpolating polynomial. An interpolating polynomial defines a function within a particular segment, with the goal of the fitting algorithm to ensure the fitted interpolating polynomial matches the desired signal within that segment as closely as possible. The skilled person will be familiar with fitting algorithms based on interpolating techniques, however a short description of a particular technique is provided to give context to the present application. The desired pulse 100 may be reconstructed using interpolation methods, such as spline interpolation. An example of a suitable interpolation technique is cubic spline interpolation. Cubic spline interpolation can be used to represent an arbitrary, smooth, continuous function defined over a domain. The desired function is segmented into a plurality of segments llOa-h, where each segment 110 may satisfy continuity at the segment boundary in amplitude and first derivative. This may also be extended to second derivatives. The function within each segment is described by an interpolating polynomial with a plurality of coefficients, which for cubic spline interpolation is a cubic polynomial. In the depicted example, each segment is associated with stored coefficients a, b, c and d which define a cubic function of the form: y(t) = a + bt + ct2 + dt3 (1) y(t) may be an amplitude of the function within the segment with a variable parameter t. y(t) may represent any relevant quantity associated with the function, for example amplitude or phase, t may represent any relevant quantity that varies with the function, for example time, such as in unit clock cycles, or spatial dimensions. Although cubic spline interpolation is described herein, any fitting algorithm may be used, such as any polynomial spline interpolation. For example, if instead quadratic spline interpolation is used, there may only be three stored coefficients for the quadratic function within each segment. In the optimisation algorithms described herein, the value of the lowest order polynomial coefficient is fixed. For example, from equation 1, the value of the polynomial coefficient a will be fixed for each segment. The value of the polynomial coefficient a can be fixed in each segment to a value such as the ending value of the signal in the previously calculated segment. The other polynomial coefficients b, c and d are treated as variables that can be optimised for each segment. Here, the desired signal 100 has a duration of 800 clock cycles and each segment of the 8 segments has a duration of 100 clock cycles. Each segment is associated with polynomial coefficients which define the cubic function in that segment, for example coefficients a, b, c and d.The standard fit to the desired pulse in each segment using cubic spline interpolation is displayed as a solid line and denoted by the label 'Generated pulse', showing a 36-bit representation. For the depicted example desired signal 100, the variable parameter is time and therefore each segment 110a-h has a length measurable in time. The sum of the lengths of each segment llOa-h equals the total duration of the desired signal 100. The depicted desired signal 100 is a Gaussian pulse, however the desired signal 100 may take other forms, for example a trigonometric function. The desired signal 100 may be a complicated signal, be symmetric or asymmetric. Fig. 2a is a graph which takes a similar form as fig. la, and depicts a desired signal. The desired signal 200 is split into six segments 202a-f. The segment boundaries are again depicted by dashed vertical lines. The desired signal within two example segments, 202b and 202e, is labelled as 200b and 200e respectively. The standard fit to the desired pulse, using cubic spline interpolation, is displayed as a solid line and denoted by the label 'Generated pulse'. The standard fit, i.e. the interpolating polynomial, within each of segment 202b and 202e is labelled in fig. 2a as 210b and 210e respectively. The fitting algorithm used to generate the polynomial coefficients within each segments is a known algorithm according to the state of the art. This type of algorithm may be described as a "first fitting algorithm" herein. A standard gradient-based minimisation algorithm has been used to fit interpolating polynomials to each segment. In particular, the scipy.CubicSpline module in python has been used to fit functions to the cubic spline segments using floating-point arithmetic. In floating-point arithmetic, operations and coefficients can be carried out and stored at an extremely high level of accuracy with close to negligible errors. Therefore, as would be expected, the desired signal and depicted standard fit are very similar to one another and are hard to distinguish on the graph. In fig. 2a, the curves shown by standard cubic spline interpolation look similar to the desired signal, however the difference between the two is quantitatively shown in fig. 2b. Fig. 2b depicts the scaled absolute amplitude errors from the spline fit. The x-axis of fig. 2b is the same as in fig. 2a, i.e. it depicts a variable parameter time in a unit of clock cycles. The segment boundaries are depicted in fig.2b in the same manner as they are depicted in fig. 2a. The y-axis depicts a percentage error between the desired signal 200 and the interpolating polynomial 210 in each segment 202a-f. As can be appreciated from the depicted example, the use of a curve fitting algorithm which uses floatingpoint arithmetic can result in a fit with minimal errors. The errors in each segment llOa-f are rarely much more than 1 %. The overall, fitted envelope looks hardly distinguishable from the desired envelope. However, as will be seen, when implemented on fixed-point hardware, these standard fitting practices generate larger deviations between the output signal and the desired signal, as described below. Fig. 3a is a graph taking a similar form as the graph depicted in fig. 2a. The axes are identical to those of the graph depicted in fig. 2a. Fig. 3a depicts the same desired signal 300 as depicted in fig. 2a. The desired signal 300 is segmented by segments 302a-f. Fig. 3b is a graph taking a similar form as fig. 2b, and depicts the error within each segment 302a-f between the desired signal 300 and the generated / fitted signal 310. The fitted signal 310 may herein be referred to as a 'quantisation-unaware' fit. Fig. 3a is an example of a pulse produced with a standard cubic spline fitting using fixed-point arithmetic, in contrast with fig. 2a that depicts a fitting using floating-point arithmetic. The fixed-point arithmetic is the same arithmetic as may be used, for example, on a signal generator such as a pulse shaper. The signal generator may comprise a field programmable gate array (FPGA), for example. The fitted curve 310 shown in fig. 3a can be thought of as the output envelope that would be produced by signal generating hardware. The fitting algorithm used to generate the polynomial coefficients within each segment is a known algorithm according to the state of the art. Fig. 3b depicts the quantisation errors resulting from this fitting. From fig. 3a alone it is possible to appreciate, by comparison with fig. 2a, that the errors between the desired signal 300 and the output signal 310 are more significant. Fig. 3b shows the absolute percentage errors arising between the shape of the analytical desired pulse shape 300 and the shape of the fitted curves 310. The errors are significant, at up to almost 10% of the pulse amplitude value, towards the segment boundaries. The maximum and average least squares errors read: 9.38 % and 2.02 %, respectively. As can be seen in fig. 3a, the amplitude even becomes negative at points, which would lead to a truncation to zero on the signal generating hardware. The errors associated with this known method of generating coefficients, and the associated interpolating polynomials, for each segment of a desired signal are particularly problematic when they are used to generate a signal for use in a quantum control system. The errors may create unwanted frequency components which adversely affect the fidelity of quantum operations. A way to mitigate these errors is to reduce the individual segment length and use more segments to represent the pulse, however this reduces the compression factor and increases the memory load of the pulse representation which is undesirable. Increasing the length of the bit representation of the coefficients has the same undesirable effect and cannot be used to entirely mitigate the effects of the accumulated errors once the number of clock cycles per segment becomes large enough. Many optimisation algorithms which may be used to generate an output signal based on the interpolating coefficients for each segment are iterative and / or recursive in nature. Herein, these terms may be used interchangeably. Such optimisation algorithms typically comprise adjusting initial trial polynomial coefficients to minimise a difference between values of the desired signal and approximated signal values generated using an approximation function. The iterative nature of these algorithms can cause errors to compound when using fixed-point arithmetic. The algorithm used to generate the curve 310 depicted in fig. 3a comprised a recursive algorithm, and in particular a fixed-point recursive sum (labelled as 'Generated pulse'). With a 36-bit representation, which already exceeds the standard 32-bit precision which is usually implemented on FPGA block RAMS, for segment lengths exceeding 100 or more rounds of addition the accumulated errors become very significant, as shown. Specifically, an iterative algorithm referred to herein as "Bowler's algorithm" was used to generate the curve 310 (Bowler, R., 'Coherent Transport in Multi-electrode Trap Array', University of Colorado, 2015, pages 93-94). Bowler's algorithm may be used to calculate values of polynomial functions using four sub-functions a,p, y and 8. The sub-functions a,p,y and 6 are associated with the polynomial coefficients a, b, c and d that describe the polynomial function in a segment of the desired signal. The sub-functions a, p, y and 8 are linear combinations of the polynomial coefficients a, b, c and d for each segment. The sub-functions a, p, y and 6 vary with a variable parameter t, and hence equivalently can be written as a(t),p(t),y(t) and 8(P). Bowler's algorithm will be discussed later in more detail with respect to fig. 7. Each segment may contain a total memory load of 8x(3x36+16) bits which must be stored and loaded in memory. To provide more detail on error generation, it should be noted that the sub-functions a, p, y and 8 are in fixed-point bit representation, not floating-point. This implies that there is a truncation error associated with converting the sub-functions from their ideal fixed-point representation, depending on the bit-level accuracy of the hardware representation of the coefficients. This truncation leads to a total quantisation error etotal on the values of the signal in a segment when going from a floating-point to a fixed-point representation of the relevant sub-functions: n(n+l; nfn+lKn+2: etotal - ea0+n‘ +--— ey0 +----$----eS0 (2) Here 6j denotes the quantisation errors associated with the i-th sub-function and n denotes the number of clock cycles per segment. Similarly, n is also equal to the number of additions per segment in Bowler's algorithm. The accumulated errors in the pulse representation depend strongly on the number of sum operations n performed per segment. A larger number of additions per segment, leads to better compression factors, but also leads to a corresponding increase in the accumulated errors which are proportional to n up to the third order, in this example. For extremely large values of n, the error in quantising 6 thus starts dominating and becomes untenable for a smooth pulse. To address the problems with prior methods described above, the present application discloses an improved method for generating input polynomial coefficients for use by a signal generator such as a signal generator in a quantum control system. The fitting takes into account the fixed-point arithmetic used by the signal generator, and therefore takes into account the quantisation errors which would otherwise be introduced. The polynomial generation method described herein can therefore be described as a "quantisation aware" fitting technique. At a high level, the present method seeks to mitigate the errors introduced by prior techniques by using a two-stage fitting process: 1. Fit the desired function with a standard fitting algorithm, e.g. a cubic spline fitting algorithm, which works with floating-point arithmetic, to be represented with a certain number of segments. The skilled person will be familiar with methods of performing this fitting. 2. Use the coefficients obtained by the first fitting algorithm as the starting point for a second fitting algorithm / optimisation algorithm which incorporates the fixed-point accuracy of a signal generator and which will be used to generate the signal. The first step is optional and seeks to provide the second fitting algorithm with a suitable starting point. The second step can be described as a simulation of the algorithm to be implemented on fixed-point hardware, such as Bowler's algorithm. Specifically the algorithm to be implemented on fixed-point hardware should be simulated to the level of the numerical accuracy given by the hardware representation of the cubic polynomial coefficients for each segment. The polynomial coefficient a may be kept fixed for all segments, because its representation as a fixed-point number does not contribute to the accumulation of errors over several cycles, for example of recursive addition. The first value of the sub-function a used for each segment is equal to a, hence <z(0) = a for each segment. As known by the skilled person, a cost function is a function that measures the difference between a desired function and a fitted function to that desired function. In optimisation algorithms, a cost function is minimised. Taking into account the quantisation-aware fitting, a suitable cost function to be minimised is: (3) Here, y, denotes the exact floating-point value of the desired pulse at any value i and y^pi denotes the simulated fixed-point fp value of the pulse using fixed-point arithmetic, j describes the segment index, and therefore bj, Cj, dj denote the polynomial coefficients in the jth segment, n denotes the number of recursive additions per segments, or similarly the number ofclock cycles per segment. The amplitude values ofy-^ may be associated with fixed-point arithmetic on the hardware of the signal generator, for example an FPGA or other type of integrated circuit (IC). Equation 3 above is separately minimised for each segment for the polynomial coefficients b, c, d using an optimisation method. The optimisation method may not rely on calculating derivatives of the input function. A non-exhaustive list of optimisation approaches are: simulated annealing, pattern search, grid search, particle swarm optimisation, Bayesian optimisation or particle evolution. The latter has been implemented with a particularly good trade-off between speed and accuracy. The values of the polynomial coefficients b, c, d from step 1 of the fitting process are used as starting values for step 2 of the fitting process. Step 1 of the fitting process yields values of the polynomial coefficients b, c, d that are close to the optimal values for the desired signal, even after truncation. As the values of the polynomial coefficients b, c, d from step 1 are already close to the optimal values, the range of values of b, c, d used in step 2 of the fitting process can be greatly reduced. The values of the polynomial coefficients b, c, d from step 1 of the fitting process may define the centre of the bound. The constrained ranges of the polynomial coefficients b, c, d found in step 1 of the fitting process may greatly speed up step 2 of the fitting process. As step 1 of the fitting process is used to speed up step 2, step 1 is not an essential step for gaining optimised polynomial coefficients at the end of step 2 of the fitting algorithm. Instead of step 1, initial trial coefficients for step 2 can be estimated. Using estimated values instead of step 1, however, may result in step 2 taking longer to compute. Additionally, the ranges of the polynomial coefficients b, c, d are adapted such that their relative ranges are inversely proportional to their individual contributions to the error function of the quantisation aware fitting associated. The total error function etotal for each segment is described as follows: ^totat = ea + n-€b + n2ec + n3ed (4) Here, e denotes the error on each polynomial coefficient a, b, c, d and n denotes the total number of clock cycles per segment. It is notable that the highest order of n in equation 4 is the highest order of the cubic polynomial, herein described, for each segment. Therefore, if different fitting functions are used to fit to the desired signal, this error function may vary. Specifically, if a higher or lower order of spline interpolation is used, for example quadratic or quartic spline interpolation, respectively, the highest order of n in equation 4 may vary. In an example where one or more polynomial coefficients are kept fixed during the optimisation, the error term / s associated with the one or more polynomial coefficients may not contribute to the total error. For example, in the case where the polynomial coefficient a is fixed during optimisation, etotai may not include the term ea, due to this error being zero or close to zero. Increasing the total number of clock cycles per segment n leads to a greater compression factor. Therefore maximising n is desirable, provided the total error function etotal for each segment remains low enough. The polynomial coefficients which contribute most significantly to the total error function etotal for each segment depend on the value of t. For small values of t, lower order coefficients dominate the error. For higher values of t, higher order coefficients dominate the error. Fig. 4 depicts a method 400 according to the present disclosure. At a high level, block 410 corresponds with "step 1" described above. However, as previously discussed, block 410 may not be the step 1 described previously. Original estimates may be given as initial trial polynomial coefficients, instead of calculating them using the fitting algorithm in step 1. Block 415 corresponds with "step 2" described above. The method 400 is a method for generating input polynomial coefficients for use by a signal generator, such as the signal generator 800 described later herein with reference to fig. 8. The signal generator is configured to generate an output signal which approximates a desired signal, such as the desired signals described above with respect to figs. 1, 2a, and 3a. The desired signal is segmented into a plurality of segments, where the desired signal has one or more signal values in each of these segments. The signal generator uses fixed-point arithmetic and the input polynomial coefficients to generate the output signal. Steps 410, 415 and 420 may be performed on a general-purpose computer or processor, such as the processor 102 described with respect to fig. 9. Step 425 may be performed by a signal generator such as the signal generator 800 described with respect to fig. 8 and which may form part of the programmable logic unit 103 described with respect to fig. 9. The method 400 describes the method as would be applied to a particular segment of the desired signal. The method 400 would be performed for each segment of a desired signal. For example, steps 410 and 415 may be performed for each segment of the desired signal, and each of the generated input polynomial coefficients for each segment could be provided to the signal generator at step 420. At step 410, one or more initial trial polynomial coefficients are obtained for a particular segment of the desired signal. The initial trial polynomial coefficients may have already been generated using a first fitting algorithm, and may be retrieved from memory, for example. Alternatively the method 400 may comprise actively calculating the one or more initial trial polynomial coefficients using the first fitting algorithm. As described above, the first fitting algorithm may be a cubic spline fitting algorithm. The first fitting algorithm uses floating-point precision. The initial trial polynomial coefficients may be polynomial coefficients b, c and d , and optionally a, as described above. A purpose of obtaining one or more initial trial polynomial coefficients is to provide a sensible starting point for the optimisation algorithm employed at step 415. In an example, the one or more initial trial polynomials provided by the first fitting algorithm may be denoted as ainitial, binitial, cinitial and dinitial. The initial trial polynomial coefficients obtained at step 410 may also provide a range within which the trial polynomial coefficients can be adjusted by the optimisation algorithm employed at step 415. Therefore, step 410 improves the efficiency and speed of the method 400, and makes efficient use of computer resources. At step 415, the one or more initial trial polynomial coefficients are provided to an optimisation algorithm to generate input polynomial coefficients, i.e. polynomial coefficients which are suitable for being inputted to a signal generator. The optimisation algorithm comprises minimising a difference between the one or more signal values of the desired signal within the segment, and one or more approximated signal values generated using an approximation function. For example, the optimisation algorithm may comprise adjusting the trial polynomial coefficients, starting with the initial trial coefficients obtained at step 410, to minimise the difference between the one or more desired signal values and the one or more approximated signal values. Adjusting the initial trial polynomial coefficients in this way may comprise iteratively updating trial polynomial coefficients, starting with the initial trial polynomial coefficients, for example until a stopping criterion is reached. An example implementation of this type of optimisation algorithm is described in more detail with respect to fig. 5. As described above, each trial polynomial coefficient may be iteratively adjusted and / or updated within a range which is based on the corresponding initial trial polynomial coefficient obtained at step 410. For example, the trial polynomial coefficient for coefficient b may be adjusted, starting with binitial, within a range of binitiai + 1.5* binitial. The trial polynomial coefficient for coefficient c may be adjusted, starting with Cinitial' withing a range of cinitial + 1.5* clnitlal. The trial polynomial coefficient for coefficient d may be adjusted, starting with dinitiaL, within a range of dinitiai + 1.5* dtnltiai. This range is provided as an example and should be adjusted based on the particular implementation. Advantageously, the approximation function used as part of the optimisation method within step 415 approximates the one or more signal values of the desired signal using the fixed-point arithmetic used by the signal generator which will eventually be used to generate the signal. The one or more signal values of the desired signal may be represented in their exact, floating-point representation. The resulting polynomial coefficients generated at step 415 therefore takes into account the arithmetic used by the hardware. As a result, the signal generated by the hardware using the 'quantisation-aware' polynomial coefficients is more accurate. It will therefore be appreciated that the design of the method is motivated by the way in which the hardware will function when generating the signal. By exploiting the known properties of the signal generator in this way, it is possible to improve the accuracy of the generated signal when compared to the desired signal within each segment. Optionally, at step 420, the input polynomial coefficients are provided to the signal generator, and / or parameters based on the input polynomial coefficients are provided to the signal generator. The input polynomial coefficients may take the form a, b, c, d, and the parameters, which may be suitable for inputting into an iterative algorithm for generating the output signal, may take the form a0,p0,Y0,80. Further optionally at step 425, an output signal is generated that approximates the desired signal. The output signal may be generated using the input polynomial coefficients and / or using the parameters generated based on the input polynomial coefficients. The signal generator may be a pulse shaper, and the output signal may be for shaping a pulse such as a control pulse of a quantum control system. Shaping the pulse may involve, for example, modulating an amplitude, phase or frequency of the control pulse. As will be described later with respect to fig. 8, the signal generator comprises one or more memory elements configured to store numbers in a fixed-point representation. The fixed-point representation means that numbers are stored to, or with, a particular number of digits in their fractional part i.e. a fixed number of digits after a decimal point. Generating the output signal may comprise retrieving, from these memory elements, the one or more input polynomial coefficients for each segment of the desired signal, and generating values of the signal for each segment using one or more iterative algorithms based on the retrieved one or more input polynomial coefficients. The "fixed-point" arithmetic used at step 415 takes into account the fact that the accuracy of the initial polynomial coefficients, and each trial polynomial value at the end of each iteration, will be limited by the fixed-point representation used by the memory elements of the signal generator. Fig. 5 depicts a method 500 according to the present disclosure. Method 500 is a more specific implementation of steps 410 and 415 of method 400, with step 510 corresponding broadly with step 410 and steps 515 to 545 providing an overview of how an optimisation algorithm may be applied within step 415. As with method 400, the method 500 focuses on steps applied to a particular segment of the overall desired signal, and in use some or all of these steps would be performed for multiple, e.g. all, segments of the desired signal. At step 510, one or more initial trial polynomial coefficients are generated using a first fitting algorithm. This first fitting algorithm may be any standard gradient-based minimisation algorithm suitable for fitting interpolating polynomials to a segment and thereby generating trial polynomial coefficients. As discussed above, the scipy.CubicSpline module in python is a suitable algorithm to be used for fitting functions to the cubic spline segments using floating-point arithmetic. At step 515, one or more initial approximate signal values are generated using an approximation function and the initial trial polynomial coefficients. This is the starting point for the optimisation algorithm and may be described as the initialisation phase of the optimisation algorithm. With reference to equation 3 above, a suitable approximation function may take the form: yiM(.bj-cj-dj') (5) The approximation function seeks to approximate the signal values within a segment of the desired signal. In other words, the approximation function seeks to generate an interpolating polynomial that closely matches the desired signal within a particular segment. The approximation function is a function of one or more trial polynomial coefficients b, c, and d, and at step 515 is used to generate one or more initial approximate signal values using the initial trial polynomial coefficients generated at step 510. As described above, the approximation function uses the fixed-point arithmetic which will be used by a signal generator. At step 520, a difference is calculated between the one or more signal values of the desired signal and the one or more initial approximated signal values generated by the approximation function at step 515. In other words, the 'actual' signal values, which may be represented in exact floating-point representation, are compared to the approximated signal values generated at step 515. Step 520 may comprise evaluating the cost function defined in equation (3) above, which involves evaluating the cost function based on the approximated values generated by the approximation function. The calculated difference provides a measure of how closely a signal generated by the signal generator will match the desired signal within a particular segment if the signal generator were to generate the signal using the current trial polynomial coefficients. At step 525, new trial polynomial coefficients are generated based on the calculated difference. The trial polynomial coefficients are updated using the chosen optimisation algorithm. The algorithm determines how much and in which direction to adjust the trial polynomial coefficients to improve the match between the desired signal values and the approximated signal values. Generating the new trial polynomial coefficients based on the calculated difference may comprise, for example, updating the new trial polynomial coefficients based on the evaluated cost function. The initial trial polynomial coefficients may be adjusted within a predefined range to form the new polynomial trial coefficients where, for each particular polynomial coefficient b, c, or d the range is based on the corresponding initial trial polynomial coefficient generated at step 510. At step 530, the approximation function is used to generate one or more new approximated signal values for the segment based on the new trial polynomial coefficients in a manner similar to that described above with respect to step 515. At step 535 a difference is calculated between the one or more signal values and the one or more new approximated signal values in a manner similar to that described above with respect to step 520. Again, the cost function may be evaluated. At step 540, it is determined whether a stopping criterion is met. For example, the iterative algorithm may be stopped after a certain number of iterations have been reached, or when the calculated difference between signal values and approximated values is below an absolute or threshold value. If the stopping criterion has not been met, the process returns to step 525 and the iterative process continues in a manner that would be understood by the skilled person. If the stopping criterion is met, then the optimisation algorithm outputs trial polynomial coefficients at step 545 as the "input polynomial coefficients" referred to in step 415. The outputted trial polynomial coefficients may be the current values of the polynomial coefficients, i.e. the coefficients generated during the final iteration. Or they may be the best, or 'optimal' polynomial coefficients found during the iteration process. The current values of the polynomial coefficients may also be the best polynomial coefficients found in the current number of iterations. The optimal or 'best' polynomial coefficients may be those for which the difference calculated at step 535 is the least. Method 500 provides a high-level overview of how an optimisation algorithm might be employed in methods of the present disclosure. The skilled person will be familiar with optimisation algorithms and, based on the present disclosure, will understand how an approximation function that takes into account the fixed-point arithmetic of a signal generator could be used within any number of optimisation algorithms, such as simulated annealing, pattern search, grid search, particle swarm optimisation, Bayesian optimisation or particle evolution. Fig. 6a is a graph taking a similar form as the graph depicted in fig. 3a. The axes are identical to those of the graph depicted in fig. 3a. Fig. 6a depicts the same desired signal as depicted in fig. 3a. The desired signal is segmented into 6 segments, separated by segment boundaries. Fig. 6b is a graph taking a similar form as fig. 3b, however fig. 6a depicts the error within each segment between the desired signal and the signal generated using method 400. Fig. 6a depicts an example of a pulse produced using a quantisation-aware fitting method, for example step 2 as previously discussed. This is in contrast with fig. 3a, that depicts a quantisation-unaware fitting method. Using this quantisation-aware fitting method, the effects of the errors arising from the quantisation of the coefficients on the fixed-point harder can be significantly mitigated. Qualitatively, the spline interpolated signal in fig. 6a has a much improved fit with respect to the desired signal, compared to the spline interpolated signal in fig. 3a. The quantitative difference between the spline interpolated signal and the desired signal is shown in fig. 6b. Fig. 6b depicts the quantisation errors resulting from the quantisation-aware fitting. The errors are much improved compared to the quantisation-unaware fitting, shown in fig. 3b. In this example, the quantisation-aware fitting method has improved the errors by an approximate order of magnitude compared to the quantisation-unaware fitting method shown in fig. 3b. The maximum and average least squares errors read: 0.679 % and 0.164 %, respectively. These errors are much improved compared to the respective 9.38 % and 2.02 % in fig. 3b. This significant improvement in error metrics demonstrates the improved accuracy of applying the method 400. This allows the generation of both extremely accurate and highly compressed pulses, with a low memory overhead. It is also noteworthy that, in this example, the quantisation-aware fit as shown in fig. 6b achieves a better fit, and lower errors, than with the standard curve fitting and fixed-point representation as shown in fig. 2b. Use of the method 400 in fitting to a desired signal, may then produce a better signal than when using standard curve fitting techniques and fixed-point representation. As an illustrative example, the coefficients of the second segment of fig. 6a (in floating-point representation) are as follows: a =0.02774630204476883, 6=0.00042421544583426006, c=1.7890091222397207e-05, d=4.339466036638305e-08. These polynomial coefficients differ from those shown in fig. 3a, where ¢1=0.02774630204476883,6=0.0009722032837209542, c=9.969666315873952e-06, d=2.8016659356767302e-08. Note here that the value of a is the same for both fig. 6a and fig. 3a as a has been fixed to this value. This difference is due to the incorporation of the fixed-point algorithm into the fitting routine. These examples of coefficient values are given to a certain number of significant figures and may be expressed to a different level of precision. An example of an iterative algorithm that can be used to generate the signal on hardware, e.g. at step 425 of method 400, is Bowler's algorithm. This algorithm is used to generate values of the signal on hardware, and therefore is the algorithm that is simulated at step 415 of method 400. However, other algorithms may be used instead of Bowler's algorithm. Bowler's algorithm comprises a plurality of addition and / or subtraction steps. This is, for example, opposed to calculating the mathematical description of a cubic function as previously described, which includes multiplications as well as additions. Multiplications may be much more time-consuming operations than using additions on hardware, such as FPGAs. For example, when controlling signals for use in a quantum control system, the difference in the time it takes to perform a multiplication compared to an addition may become a significant factor and possibly bottleneck the preparation, manipulation, or read-out of qubit-states. It is therefore beneficial to generate values of the signal on hardware using algorithms such as Bowler's algorithm, that only use additions or subtractions. Bowler's algorithm is a deconstruction of a polynomial function using only recursive additions, or subtractions as described later. For calculating a value of a polynomial function, Bowler's algorithm uses four sub-functions a, p,y and 6. These sub-functions a, p, y and S vary with the variable parameter t, and hence can be written as a(t),p(t),y(t) and 8(t), respectively, however the short-hand notation is used herein for simplicity. As previously described, these sub-functions a, p, y and 3 are associated with the polynomial coefficients a, b, c and d that describe the polynomial function in a segment of the desired signal. For example, the sub-functions a, p, y and 8 may be linear combinations of the polynomial coefficients a, b, c and d. In order to reconstruct a cubic function with coefficients a, b, c and d, Bowler's algorithm iteratively adds sub-functions a,p,y and 6 as described below. The parameters for the first iteration are the following combinations of a, b, c and d: a(0) = a P (0) = 6 — c + d y(0) = 2c — d 5(0) = 6d. (6) To compute y(t) = a + bt + ct2 + dt3 on hardware such as an FPGA, y(t) can be expressed as: y(t) = a(t) when t = 0 y(t) = a(t -1)+ / ?(t -1) + y(t -1) + S(t — 1) when t >0, (7) where the sub-functions used for the iterations of the algorithm are: y(t) = y(t -1) + 5(0) P(t) = p(t — 1) + y(t) a(t) = a(t -1)+ p(t) 8(t) = 5(0). (8) Therefore stored polynomial coefficients may be used as inputs into the sub-functions of an iterative Bowler's algorithm in order to calculate values of the signal y(t) using additions instead of multiplications. For calculating values of a cubic polynomial, Bowler's algorithm may comprise 5 addition operations. This number of addition operations may vary depending on the order of polynomial function. It is also notable that the 5 addition operations needed to calculate the value of a cubic polynomial may be reduced to 3 addition operations by using the recursive definitions of p and y. The value of y(t) may actually be equal to a using the following expansion: a(t) = a(t -1)+ P(t) = a(t -1)+ p(t -1) + y(t) = a(t — 1)+ p(t — 1) + y(t — 1) + 5(0) = y(t). (9) Therefore, y(t) may only need to be calculated using 3 additions, y(t) = a(t -1) + P(t -1) + y(t -1) + 5(0), instead of 5 additions. This reduction in the number of additions needed to calculate the value of the signal may result in an even quicker computation of the value of the signal compared to the standard Bowler's algorithm. Fig. 7 depicts an implementation of Bowler's algorithm 700 in flow logic. The shapes, such as trapezia, circles and rectangles in fig. 7 depict logical operations. The lines in fig. 7 show inputs to or outputs of the logical operations. The general flow of the diagram in fig. 7 is interpreted from left to right. Fig. 7 depicts an implementation of Bowler's algorithm 700, which uses 3 adders instead of the conventional 5 adders, using equation 9 above. Bowler's algorithm 700 may be used to iteratively sum combinations of polynomial coefficients to produce values of the signal y(t). Bowler's algorithm 700 may be implemented in logic using polynomial coefficients, adders and logic gates. The iterative nature of Bowler's algorithm 700 is demonstrated by the three circular loops A,B,C in fig. 7. The subfunctions used in fig. 7 are the sub-functions used in equation 9. Multiplexers 702a,b,c may be used to select the input used for the addition step at the adders 704a,b,c. For example, in the loop A of fig. 7, the input to the multiplexer 702a may either be y(0) or y(t). The output of the multiplexer 702a may then be either one of the two inputs to the multiplexer 702a, for example the output may be either y(0) or y(t). Each of the adders 704a,b,c are used to add two inputs. For example, the two inputs to the adder 704a in loop A are either 5(0) and y(0), or 5(0) and y(t). The two inputs to each of the adders 704a,b,c are summed by the adder 704a,b,c to give a single output value. The output value of the adder 704a,b,c is used as an input to the corresponding memory register 706a,b,c. The memory register 706a,b,c is used to store the input value to the memory register 706a,b,c. For example, in loop A, the memory register 706a may store the output of the addition operation of the adder 704a. The output of the memory register 706a,b,c is the same as the input to the memory register 706a,b,c, when the output is requested. For example, the output of the memory register 706a is shown in loop A as y(t). The output of the memory registers 706a and 706b may be used as an input to the next loop, B and C, respectively. Alternatively the output may be used as an input to perform the same loop again, due to the iterative nature of the Bowler's algorithm. The output of the memory register in the last loop, for example loop C in fig. 7, may be used as an input to perform the same loop again. This output may also be the value of the signal y(t), when the algorithm is finished. The implementation of Bowler's algorithm in fig. 7 shows an iterative algorithm using only addition operations. This may be beneficial in comparison to any method that may be used to generate values of the signal using multiplications or divisions, as well as or instead of additions or subtractions, for example. An adapted version of the Bowler's algorithm shown in fig. 7 may also be used, for example using iterative differences as opposed to iterative additions. The components shown in fig. 7 are multiplexers, adders and memory elements, however other suitable elements may be used in addition to or instead of these components when implementing Bowler's algorithm or any other relevant algorithm. There may be more or fewer of each component in the implementation. Fig. 7 demonstrates the iterative structure of each version of Bowler's algorithm using 3 iterative loops, A, B and C in fig. 7. Although fewer operations may be beneficial for reducing runtime on hardware, more or fewer adders / subtractors may be used in the implementation of Bowler's algorithm or any other similar iterative algorithm. Having a larger or smaller number of adders / subtractors would result in more iterative loops being added to the logic flow diagram in fig. 7. Fig. 8 depicts a pulse shaper 800 according to the present disclosure. The term "pulse shaper" may be used interchangeably with terms such as "signal generator" or any other relevant term that may be used to describe an instrument that can generate, shape or modify a pulse. The pulse shaper 800 is used to generate a signal for use in a quantum control system. The pulse shaper 800 comprises an Avalon® interface 802, a multiplexer 804, a block random access memory (BRAM) unit 806, memory elements such as registers 810a,b, digital signal processing (DSP) blocks 808, and a finite state machine 812. The Avalon® interface 802 is configured for allowing the communication between the apparatus 800 and software or other devices. The Avalon® interface 802 is a lightweight memory mapped protocol that is used to read from and / or write to software processes and control off-chip devices. In use, the Avalon® interface 802 takes multiple inputs from software or other devices and provides them to the pulse shaper 800. In fig. 8, the Avalon® interface 802 has three inputs named avs_write, writedata and avs_address. The inputs to the Avalon® interface 802 can then be used for further operations on the Avalon® interface 802. The finite state machine 812 is configured to control the operations of the pulse shaper 800 using control logic. Specifically, the finite state machine 812 is configured for generating trigger pulses that control the components on the pulse shaper 800. The finite state machine 812 is configured to ensure the continuous flow of data in the pipeline. The finite state machine 812 is connected to the various components on the pulse shaper 800. In fig. 8, the finite state machine 812 has three inputs start_pulse, start_addr and seg_num. The finite state machine 812 enters different states, for example a 'start state' and an 'idle state', depending on the input received, such that trigger pulses can be sent to or delayed to the various components on the pulse shaper 800. An efficient pipeline structure can be implemented on the pulse shaper 800 in order to maximise throughput of the pulse shaper 800. An efficient pipeline structure would continuously process data, without causing latency overhead. By using sub-functions for the next segment at the correct time, such that the pipeline is never empty, data is continuously processed. Efficiently implementing a pipelined structure can result in data being produced at the clock rate of the pulse shaper. The finite state machine 812 outputs trigger pulses in order to efficiently control the pipeline structure. The data output from the Avalon® interface 802 is used as an input to the multiplexer 804. The multiplexer 804 is a configured outputs to be sent to the BRAM 806. The multiplexer 804 in fig. 8 has one input from the Avalon® interface 802. The multiplexer 804 is shown to have four outputs in fig. 8. The four outputs are the sub-functions to be used in Bowler's algorithm, for example a(0), / 3(0),y(0) and 5(0). The control logic 812 is used to control which of the four outputs are given by the multiplexer 804 at any one time. Specifically, the control logic 812 can control which parameters are transferred into memory from an AVS (Adaptive Voltage Scaling) bus. The data output from the multiplexer 804 is used as an input to the BRAM 806. The BRAM 806 is a type of random access memory embedded in systems, such as FPGAs, for data storage. The BRAM 806 can be allocated to store data. In fig. 8, the BRAM 806 is being used to store sub-functions describing the segmented data. In fig. 8, four inputs to the BRAM 806 shows the four different sub-functions that can be inputted into the BRAM 806 at one time. The data output from the BRAM 806 is used as an input to the memory register 810a. The use of registers in the pulse shaper 800 and therefore also in the DSP blocks 808 is useful for implementing a pipeline structure and therefore maximising the throughput of the pulse shaper 800. The BRAM 806 is used as a longer term storage than the memory registers 810a, 810b. For example, the BRAM 806 may store data for the length of an entire quantum experiment. The data output from the memory register 810a is used as an input to a DSP block 808. In fig. 8 there are three DPS blocks 808, each defining a loop in Bowler's algorithm, as shown in fig. 7. The DSP blocks 808 are dedicated digital signal processing units configured for arithmetic operations. DSP blocks 808 are advantageous because of the ability to run operations at a higher clock speed compared to, for example, simple logic implementations. Specifically, in fig. 8, the DSP blocks 808 are DSP48 units. The final value of the algorithm is passed to and stored in the memory register 810b. The values of the signal are then passed out of the pulse shaper 800, as shown by pulse out in fig. 8. The apparatus described herein is a pulse shaper 800, however more generally the depicted apparatus may be a signal generator or any other relevant hardware for modifying or generating a signal. The pulse shaper 800 may be part of relevant hardware, such as a signal generator. There may also be more or fewer of each component on the pulse shaper 800, or they may be arranged in a different structure. The algorithm implemented on the DSP blocks 808 may be Bowler's algorithm or any other iterative algorithm. The pulse shaper 800 may instead have different relevant inputs and / or outputs. The pulse shaper 800 may form part of a quantum control system, comprising a quantum computer comprising one or more qubits. In this system, the pulse shaper 800 is configured to receive a control pulse from a pulse generator, and shape it using a generated signal. Appropriately shaped control pulses can drive the qubits to the desired quantum states. The present disclosure relates, in part, to shaping control pulses for use in a quantum control system. An example of a quantum control system is the classical interface 101 of a quantum computer. Such control pulses are transmitted from a classical interface of a quantum computer to a quantum processing unit (QPU) of the quantum computer. A quantum computer is a machine that uses the properties of quantum physics to perform computations. An exemplary quantum computer 100 is illustrated in schematic form in fig. 9. The quantum computer 100 comprises a classical interface 101 and a QPU 104. The classical interface 101 is the portion of the quantum computer 100 that handles user inputs (e.g. quantum circuits / programs) and generates and sends digital control signals (QDIG) to the QPU 104. The QPU 104 is the portion of the quantum computer 100 which manipulates qubits to create quantum states and perform quantum operations by leveraging low-level control signals (QLOW) that are generated based on the digital control signals. The classical interface 101 comprises a classical processing unit in the form of a conventional central processing unit (CPU or Cl.CPU) 102, and a classical programmable logic unit (Cl.PROG) 103, which may be a field-programmable gate array (FPGA), a complex programmable logic device (CPLD), a structured applicationspecific integrated circuit (structed ASIC), a custom-made digital signal processor (DSP) or similar. The CPU 102 and programmable logic unit 103 are communicatively coupled to each other, e.g. directly or via a traditional bus or similar. The programmable logic unit 103 may comprise, or take the form of, the pulse shaper 800 depicted in fig. 8. The QPU 104 comprises in-fridge logic (QLOG) 105 and a quantum system (QSYS) 106 with a plurality of qubits. The in-fridge logic 105 converts the digital control signals received from the classical interface 101 (more specifically, received from the programmable logic unit 103 of the classical interface 101) into the low-level control signals which are used to manipulate the qubits to perform quantum computations with the quantum system 106. It should be noted that the quantum computer 900 illustrated in fig. 9 is merely exemplary, and other configurations having additional components, fewer components, or functionally equivalent components are also envisaged. The QPU may be based on any suitable quantum computing architecture, such as photonicbased, semiconducting, superconducting, ion-traps, neutral atoms etc. The various methods described herein may be implemented by a computer program, which may be run on CPU 102, for example, or any other suitable processing device. The computer program may include computer code arranged to instruct a computer to perform the functions of one or more of the various methods described above. The computer program and / or the code for performing such methods may be provided to an apparatus, such as a computer, on one or more computer readable media or, more generally, a computer program product. The computer readable media may be transitory or non-transitory. The one or more computer readable media could be, for example, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, or a propagation medium for data transmission, for example for downloading the code over the Internet. Alternatively, the one or more computer readable media could take the form of one or more physical computer readable media such as semiconductor or solid state memory, magnetic tape, a removable computer diskette, a random access memory (RAM), a read-only memory (ROM), a rigid magnetic disc, and an optical disk, such as a CD-ROM, CD-R / W or DVD. In an implementation, the modules, components and other features described herein can be implemented as discrete components or integrated in the functionality of hardware components such as ASICS, FPGAs, DSPs or similar devices. In addition, the modules and components can be implemented as firmware or functional circuitry within hardware devices. Further, the modules and components can be implemented in any combination of hardware devices and software components, or only in software (e.g., code stored or otherwise embodied in a machine-readable medium or in a transmission medium). Unless specifically stated otherwise, as apparent from the following discussion, it is appreciated that throughout the description, discussions utilizing terms such as "receiving", "determining", "comparing ", "enabling", "maintaining," "identifying," or the like, refer to the actions and processes of a computer system, or similar electronic computing device, that manipulates and transforms data represented as physical (electronic) quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system memories or registers or other such information storage, transmission or display devices. Fig. 10 depicts a computer-readable medium 1000 according to the present disclosure. The various methods described above may be implemented by a computer program. The computer program may include computer code (e.g. instructions) 1010 arranged to instruct a computer to perform the functions of one or more of the various methods described above. The steps of the methods described above may be performed in any suitable order. The computer program and / or the code 1010 for performing such methods may be provided to an apparatus, such as a computer, on one or more computer readable media or, more generally, a computer program product, depicted in Fig. 10. The computer readable media may be transitory or non-transitory. The one or more computer readable media 1000 could be, for example, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, or a propagation medium for data transmission, for example for downloading the code over the Internet. Alternatively, the one or more computer readable media could take the form of one or more physical computer readable media such as semiconductor or solid state memory, magnetic tape, a removable computer diskette, a random access memory (RAM), a read-only memory (ROM), a rigid magnetic disc, and an optical disk, such as a CD-ROM, CD-R / W or DVD. It will be understood that the above description of specific embodiments is by way of example only and is not intended to limit the scope of the present disclosure. Many modifications of the described embodiments, some of which are now described, are envisaged and intended to be within the scope of the present disclosure. While the method has been described mostly in relation to pulses and signals segmented into 6 segments, it should be appreciated that any suitable number of segments may be used. Similarly, while the method has been primarily described in relation to cubic spline interpolation, the skilled person will understand that other interpolation techniques may be used to generate values of the signal on hardware. Other examples of spline interpolation are, for example, quadratic spline interpolation or quartic spline interpolation. The graphs included in the present application all depict desired signals which are Gaussian-like. This type of signal / pulse is common in quantum control systems, but the present method is not limited to this type of pulse. While the methods herein have mostly been described for compressing the pulse amplitude, the methods analogously work for the phase envelope. It is to be understood that the above description is intended to be illustrative, and not restrictive. Many other implementations will be apparent to those of skill in the art upon reading and understanding the above description. Although the present disclosure has been described with reference to specific example implementations, it will be recognized that the disclosure is not limited to the implementations described, but can be practiced with modification and alteration within the spirit and scope of the appended claims. Accordingly, the specification and drawings are to be regarded in an illustrative sense rather than a restrictive sense. The scope of the disclosure should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.

Claims

1. A computer-implemented method for generating input polynomial coefficients for use by a signal generator in a quantum control system, wherein:the signal generator is configured to generate an output signal which approximates a desired signal using fixed-point arithmetic and the input polynomial coefficients; andwherein the desired signal is segmented into a plurality of segments, the desired signal having one or more signal values in each segment;the method comprising, for each segment of the plurality of segments:obtaining one or more initial trial polynomial coefficients; andproviding the one or more initial trial polynomial coefficients to an optimisation algorithm to generate the input polynomial coefficients;wherein the optimisation algorithm comprises minimising a difference between the one or more signal values of the desired signal and one or more approximated signal values generated using an approximation function;wherein the approximation function approximates the one or more signal values of the desired signal using the one or more initial trial polynomial coefficients and the fixed-point arithmetic used by the signal generator.

2. The method of claim 1, wherein the optimisation algorithm comprises adjusting the initial trial polynomial coefficients to minimise the difference between the one or more signal values and the one or more approximated signal values.

3. The method of claim 2, wherein adjusting the initial trial polynomial coefficients comprises iteratively updating trial polynomial coefficients, starting with the initial trial polynomial coefficients.

4. The method of any preceding claim, further comprising iteratively updating the trial polynomial coefficients until a stopping criterion is reached.

5. The method of claim 4, wherein iteratively updating the trial polynomial coefficients comprises performing an optimisation routine comprising:(i) generating, using the approximation function and the initial trial polynomial coefficients, one or more initial approximated signal values;(ii) calculating a difference between the one or more signal values and the one or more initial approximated signal values;(iii) generating new trial polynomial coefficients based on the difference calculated at 00;(iv) generating, using the approximation function and the new trial polynomial coefficients generated at (iii), one or more new approximated signal values;(v) calculating a difference between the one or more signal values and the one or more new approximated signal values generated at (iv);(vl) generating new trial polynomial coefficients based on the difference calculated at (v); andperforming steps (iv), (v), and (vi) until the stopping criterion is reached.

6. The method of any preceding claim, wherein the difference between the one or more signal values and the one or more approximated signal values is defined in a cost function, wherein iteratively updating the one or more trial polynomial coefficients comprises minimising the cost function.

7. The method of any preceding claim, further comprising providing the one or more input polynomialcoefficients to the signal generator.

8. The method of any preceding claim, wherein the signal generator is a pulse shaper, and the output signal is for shaping a pulse.

9. The method of claim 8, wherein shaping the pulse comprises one of modulating an amplitude, phase or frequency of a control pulse.

10. The method of any preceding claim, wherein the one or more signal values of the desired signal in each segment are represented in a floating-point representation.

11. The method of any preceding claim, wherein obtaining one or more initial trial polynomial coefficients comprises generating the one or more initial trial polynomial coefficients for each segment using a first fitting algorithm.

12. The method of claim 11, wherein the first fitting algorithm is a cubic spline fitting algorithm.

13. The method of any preceding claim, wherein each trial polynomial coefficient is iteratively updated within a range, wherein the range is based on the corresponding initial trial polynomial coefficient.

14. The method of any preceding claim, wherein the one or more input polynomial coefficients for a particular segment define an interpolating polynomial that approximates the desired signal within the particular segment.

15. The method of any preceding claim, further comprising generating, by the signal generator, the output signal using the input polynomial coefficients.

16. The method of claim 15, wherein the signal generator comprises one or more memory elements configured to store numbers in a fixed-point representation with a particular number of significant figures, andwherein generating the output signal comprises:retrieving, from one or more memory elements, the one or more input polynomial coefficients for each segment in the plurality of segments; andgenerating at least one value of the signal for each segment using one or more iterative algorithms based on the retrieved one or more input polynomial coefficients.

17. A system comprising one or more processors configured to perform the method of any preceding claim.

18. The system of claim 17 further comprising the signal generator, the signal generator being configured to generate the output signal using the input polynomial coefficients.

19. A computer readable medium comprising computer-executable instructions which, when executed by one or more processors, cause the one or more processors to perform the method of any of claims 1 to 15.

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