High frequency AC-DC converter

Abstract

An aspect of the disclosure provides a high frequency AC to DC (HFAC-DC) converter stage for converting a high frequency AC (HFAC) voltage, obtained from a power bus of an HFAC power distribution syst

Description

[0001] High Frequency AC-DC Converter

[0002] Field of Invention

[0003] The present invention relates to high frequency power conversion, in particular to an AC- DC converter for a high frequency AC (HFAC) system.

[0004] Background

[0005] Conventional mains electricity supply is usually provided as AC, with a frequency of 47- 63 Hz, depending on the jurisdiction. However, AC power at this frequency carries a danger of electrocution. In addition, power may be dissipated and lost as it is transferred from the AC mains supply to a DC load.

[0006] High Frequency AC (HFAC) power distribution systems are systems which deliver power at frequencies greater than the normal mains electrically supply, and typically refers to systems for the delivery of power at multi kHz frequencies. Several advantages have been found to be associated with HFAC systems, including the ability to meet loads at different voltage, and more straightforward electrical isolation through the ability to use using compact high frequency transformers. In addition, HFAC systems can offer improved dynamic system response and reduction of acoustic noise, in comparison to power supply at standard mains frequencies.

[0007] Rectifiers are used in many applications to convert alternating current from an AC power distribution system into direct current in order to power a DC load. Full wave rectifiers aim to provide this conversion over the entire AC cycle. Centre-tapped full wave rectifiers include a transformer secondary winding which is arranged to inductively couple to a primary winding connected to an AC power source. The transformer secondary winding is tapped at its midpoint, with each end of the winding typically connected to a diode, and both diodes commonly connected to a DC load that is also connected to the centre tapping. In this arrangement, current flows through one of the two diodes depending on the polarity of the input AC, such that DC power is provided more or less continuously to the DC load during both the positive and negative halves of the input AC cycle. In active or synchronous rectification, these diodes are replaced with transistors such as MOSFETS. Normal semiconductor diodes have a fixed voltage drop, which is typically in the region of around 0.5 to 1 volts. In contrast active rectification elements behave as resistances which can have much lower voltage drops, leading to improved efficiency. However, these elements may still dissipate power, particularly during switching operations.

[0008] Summary

[0009] Aspects of the disclosure are set out in the independent claims and optional features are set out in the dependent claims. Aspects of the disclosure may be provided in conjunction with each other and features of one aspect may be applied to other aspects.

[0010] Embodiments of the disclosure may use active rectification elements in a high frequency AC to DC converter, where said elements are controlled based on the input HFAC power in order to reduce switching power losses and harmonic distortion.

[0011] An aspect of the disclosure provides a high frequency AC to DC (HFAC-DC) converter stage for converting a high frequency AC (HFAC) voltage, obtained from a power bus of an HFAC power distribution system to a DC voltage for powering a DC load, the HFAC- DC converter comprising: a secondary winding arranged for inductive coupling to a primary winding of a preceding converter stage, the preceding converter stage being configured for connection to the HFAC power distribution system; a rectifier connected to receive high frequency AC electrical energy from the secondary winding, the rectifier comprising a plurality of active rectification elements which are switchable to convert the HFAC electrical energy into DC electrical energy for powering the DC load; and a gate drive winding connected to provide an alternating control signal to the rectifier for controlling the active rectification elements, using HFAC electrical energy obtained from said power distribution bus.

[0012] The alternating control signal may be based on a signal derived from the HFAC voltage of the HFAC power distribution system, and a DC bias.

[0013] The DC bias may be equal to a turn-on and / or a turn-off threshold of the active rectification elements.

[0014] The HFAC-DC converter stage may further comprise a biasing circuit, which may be connected to add the DC bias to the signal derived from the HFAC power distribution system.

[0015] The biasing circuit may be connected to adjust the DC bias based on the current drawn by the load. The load may be a constant voltage load. Additionally or alternatively, the load may be a constant current load.

[0016] The biasing circuit may be configured to adjust the DC bias so that the voltage at a control terminal of the active rectification elements is at least the threshold voltage.

[0017] The biasing circuit may be configured to regulate or change the bias voltage in response to a change in the load current. For example, the biasing circuit may be configured to increase the bias voltage in response to an increase in the load current.

[0018] The gate drive winding may be arranged for inductive coupling to the primary winding of the preceding converter stage.

[0019] The HFAC-DC converter stage and the preceding converter stage may together provide an HFAC-DC converter. The gate drive winding may be arranged for inductive coupling to the primary winding in a transformer, e.g. a power transformer of the HFAC-DC converter.

[0020] The primary winding of the preceding converter stage may be a first primary winding. The HFAC-DC converter stage may comprise a second primary winding. The gate drive winding may instead be arranged for inductive coupling to the second primary winding. The preceding converter stage may be connected, e.g. electrically coupled to, the power bus of the HFAC distribution system.

[0021] The secondary winding may be a centre tapped winding. The biasing circuit may comprise an amplifier arranged to add the DC bias to the centre tap voltage.

[0022] The biasing circuit may comprise an energy store arranged to charge when the centre tap voltage, e.g. of the secondary winding, is greater than 0V and to discharge when the centre tap voltage is less than 0V.

[0023] The gate drive winding may be connected to provide the alternating control voltage to a control terminal of a first active rectification element of the rectifier and to a control terminal of a second active rectification element of the rectifier. Each end of the gate drive winding may be connected to the control terminal of a corresponding one of the active rectification elements.

[0024] The gate drive winding may be arranged in a centre tap configuration, wherein the centre tap of the gate drive winding is connected to the biasing circuit. Alternatively, the biasing circuit may be connected to at least one of the ends of the gate drive winding. For example, the biasing circuit may be connected to a connection point along the connection between one of the ends of the gate drive winding and the corresponding control terminal of an active rectification element.

[0025] The active rectification elements may be MOSFETs. The MOSFETs may be silicon MOSFETs. Alternatively the active rectification elements may be GANFETs.

[0026] The biasing circuit may comprise a transistor. It will be appreciated that a transistor may be any device comprising a control terminal and two main terminals, where the control terminal is controllable / operable (e.g. upon application of a voltage) to control (e.g. vary) the impedance (or conductivity) between the two main terminals. It will be appreciated in the context of the present disclosure that one or both of the main terminals may be considered an output terminal of the transistor, for example the output terminal may be collector or emitter of a BJT, or the source or drain of an FET. The control terminal may correspond to the base of a BJT, or the gate of an FET.

[0027] The transistor of the biasing circuit may be a BJT, e.g. an NPN BJT. An output terminal, e.g. collector terminal, of the transistor may be coupled to the gate drive winding, e.g. to the centre tap of the gate drive winding. The transistor may be configured to act as an amplifier, e.g. to amplify the signal at its control terminal.

[0028] The biasing circuit may be arranged to provide feedback biasing of the transistor. For example, the biasing circuit may be arranged to provide dual feedback biasing of the transistor. This may provide a more stable DC bias to the transistor, and may also provide a more stable DC bias adjustment, for example when the load current changes. This in turn may provide a more stable DC bias to the gate drive winding, e.g. to the centre tap thereof.

[0029] The biasing circuit may comprise a first input coupled to a first connection point and a second input coupled to a second connection point. The first connection point and the second connection point may each be arranged on the DC output power line, for example between the secondary winding and a DC output of the HFAC-DC converter stage.

[0030] The first input and the second input may be coupled to a control terminal of the transistor, for example the base terminal of the transistor, e.g. BJT.

[0031] A reactive component, e.g. inductor, may be arranged between the secondary winding and the DC output of the HFAC-DC converter stage. The first connection point may be arranged between the secondary winding and the inductor, and the second connection point may be arranged between the inductor and the DC output of the HFAC-DC converter stage. The signal from the DC output power line upon which the DC bias may be at least partially based may be derived from the second connection point.

[0032] The DC bias may also be based on a signal from a DC output power line of the HFAC- DC converter stage, e.g. the signal at a point between the centre tap of the secondary winding and a DC output of the HFAC-DC converter stage. For example, the DC bias may be based on a combination of the signal from the DC output power line and the output of the transistor. The output of the transistor and the signal from the DC output power line may be combined at a third connection point. The third connection point may be coupled to the output of the transistor, to the DC output power line (for example at the second connection point), and to the gate drive winding (for example the centre tap of the gate drive winding). A resistor may be connected between the DC output power line (for example at the second connection point) and the third connection point.

[0033] The arrangements described above may provide the dual feedback biasing of the transistor.

[0034] An HFAC-DC converter may comprise the HFAC-DC converter stage and the preceding converter stage.

[0035] The HFAC-DC converter may comprise a transformer, for inductively coupling the secondary winding and / or the gate drive winding to the primary winding. The HFAC-DC converter may further comprise the primary winding of the preceding converter stage. The HFAC-DC converter may comprise a first stage comprising the primary winding, and a second stage comprising the secondary winding and / or the gate drive winding. The second stage may comprise the biasing circuit. The first stage may comprise one or more (e.g. 2) connection points, for connecting the primary winding to a HFAC power bus.

[0036] Another aspect of the disclosure provides an apparatus comprising the HFAC-DC converter and an electronic device comprising the DC load connected to be powered by DC electrical energy from the converter.

[0037] Another aspect of the disclosure provides a system comprising: an HFAC-DC converter stage, such as any of those described above, and a preceding converter stage for coupling to a power distribution bus carrying input HFAC energy; wherein preceding converter stage comprises a primary winding arranged for inductive coupling with the secondary winding of the HFAC-DC converter stage.

[0038] The preceding converter stage may comprise a power factor correction circuit configured to reduce the phase angle between the input voltage and input current of the input HFAC energy. This may provide an improved power factor, e.g. improved transfer of power to the HFAC-DC converter stage. The power factor correction circuit may comprise at least one capacitor and at least one inductor. For example, the power factor correction circuit may comprise a first capacitor, a first inductor, and a second capacitor. The capacitor may be connected between the first capacitor and the second capacitor. The power correction circuit may be coupled or arranged for coupling between an output connection of the power distribution bus and a return connection of the power distribution bus.

[0039] The preceding converter stage may comprise a resonant tank circuit, e.g. LC circuit. The resonant tank circuit may comprise a capacitor and an inductor, for example it may comprise the second capacitor and a second inductor. The capacitor and the inductor may be arranged in parallel with one another between the input and the output of the circuit. The input winding may be connected between the output connection of the power distribution bus and the return connection of the power distribution bus, and may be arranged in parallel with the capacitor and the inductor.

[0040] The system may further comprise the power distribution bus. The power distribution bus may be configured to operate as a voltage bus, and / or as a current bus.

[0041] The HFAC-DC converter stage may be secured to the power distribution bus such that its secondary winding is arranged for inductive coupling with the primary winding.

[0042] The system may comprise a plurality of HFAC-DC converter stages, and a corresponding plurality of preceding converter stages, each HFAC-DC converter connectable to provide DC electrical energy from its rectifier to a respective corresponding one of a plurality of electronic devices. Each HFAC-DC converter stage may be configured to inductively couple to a corresponding one of the preceding converter stage, e.g. each secondary winding may be configured to inductively couple to a primary winding of the corresponding preceding converter stage.

[0043] Another aspect of the disclosure provides a system comprising: a plurality of HFAC-DC converter stages each connectable to provide DC electrical energy from its rectifier to a respective corresponding one of a plurality of electronic devices, the system further comprising: a power distribution bus, carrying HFAC energy, wherein each of the plurality of HFAC-DC converters is secured to the power distribution bus such that its secondary winding and / or its gate drive winding are arranged for inductive coupling with the power distribution bus.

[0044] The power distribution bus may comprise a plurality of preceding converter stages, wherein each of the preceding converter stages are coupled to the power distribution bus, and wherein each of the plurality of HFAC-DC converter stages is arranged for inductive coupling with the power distribution bus via a corresponding one of the preceding converter stages.

[0045] Brief Description of Drawings

[0046] Embodiments of the disclosure will now be described, by way of example only, with reference to the accompanying drawings, in which:

[0047] Figure 1 is a circuit diagram of an example HFAC to DC converter having a biasing circuit;

[0048] Figure 2a shows a series of graphs illustrating how various parameters associated with a rectifier without a biasing circuit vary over time;

[0049] Figure 2b shows a series of graphs illustrating how various parameters associated with a rectifier with a biasing circuit vary over time;

[0050] Figure 3 is a circuit diagram of a specific implementation of the converter of Figure 1 ;

[0051] Figure 4 is a circuit diagram of another example HFAC to DC converter;

[0052] Figure 5 is a circuit diagram of an example HFAC to DC converter;

[0053] Figure 6 shows a series of graphs illustrating how various parameters associated with a biasing circuit vary over time;

[0054] Figure 7 shows a series of graphs illustrating how a DC bias varies over time at different output loads.

[0055] In the drawings like reference numerals are used to indicate like elements.

[0056] Specific Description

[0057] Described below with reference to the figures are examples of High Frequency AC (HFAC) to DC converters which can convert an input HFAC supply into DC power for powering a DC load. These converters include centre tapped full wave rectifiers, implemented with active rectification elements, such as voltage controlled impedances., examples of which include MOSFETS or GANFETS. Such impedances can be controlled to provide active (synchronous) rectification. The rectification elements may be controlled by a control voltage obtained from a further winding (termed a “gate winding” herein) coupled inductively to the input HFAC supply. Because the control voltage is based on a signal derived from inductive coupling with the HFAC supply to be rectified, the rectification elements can be controlled to turn on and off at the relevant periods in (e.g. in synchrony with) the cycle of that HFAC supply. The converter also includes a biasing circuit which provides a DC bias to the control signal, this may set the DC level of the control voltage to a turn-on or turn-of threshold of the active rectification elements. The biasing circuit may be arranged so that the DC bias self-adjusts based on the size of the DC load.

[0058] Figure 1 illustrates a first example of an HFAC to DC converter 100. The converter 100 comprises a first stage 102 and a second stage 104, inductively coupled together as discussed in more detail below. The converter 100 may therefore be considered as a system comprising the first stage 102 and the second stage 104. The first stage 102 comprises a pair of connection points (indicated by Vbus_out, Vbus_rtn) for connection to a voltage bus of an HFAC power supply. The first stage 102 may comprise, e.g. be in the form of a series-parallel resonant tank. In particular, the first stage 102 comprises a first capacitor 106, a first inductor 108 and a parallel resonant tank circuit 103 connected together in series between the connection points. The parallel resonant tank circuit 103 comprises a second capacitor 110, an inductor 112 and a primary winding 114 for a transformer arranged in parallel to one another. The first stage 102 thus provides a series-parallel resonant tank. This tank may be configured such that it is tuned to (or close to) the frequency of the HFAC bus voltage, so that the input power factor is maximised, the total harmonic distortion (THD) of the HFAC voltage bus is minimized, and the power efficiency is maximized. The first stage 102 comprises a power factor correction circuit. In particular, the first capacitor 106, first inductor 108, and second capacitor 110 together form a power factor correction circuit (PFC). The PFC is configured to reduce the phase angle between the input voltage and input current of the input HFAC energy at the primary winding. This in turn may provide improved transfer of power to the second stage 104.

[0059] A transformer 111 is provided comprising the primary winding 114 arranged on a first side of a core 116, and a secondary winding 118 and a gate drive winding 120, both arranged on the opposite side of the core 116, as part of the second stage 104 of the HFAC to DC converter 100. Both the secondary winding 118 and the gate drive winding 120 are arranged for inductive coupling to the primary winding 114. The secondary winding 118 is a centre tapped winding, with a centre tapping 128 arranged at the centre of its induction coils.

[0060] A first end of the secondary winding 118 is coupled to a first active rectification element 122a, which in this example is in the form of a MOSFET comprising source, drain and gate terminals. In particular, the first end of the secondary winding 118 is connected to the drain terminal of the MOSFET 122a. Similarly, a second end of the secondary winding 118 is coupled to a second active rectification element 122b, in particular to the drain connection of a second MOSFET 122b. The source terminals of each of the first MOSFET 122a and the second MOSFET 122b are coupled to a reference voltage, e.g. ground 126.

[0061] A pair of diodes, in particular Zener diodes, 124a, 124b are provided, each arranged in parallel to a corresponding one of the MOSFETs 122a, 122b. In particular, the diode 124a is connected between the drain terminal of the MOSFET 122a and the reference voltage, and the diode 124b is connected between the drain terminal of the MOSFET 122b and the reference voltage. Each of the diodes 124a, 124b are arranged to protect their associated MOSFET 122a, 122b, for example to protect the MOSFETs 122a, 122b from being damaged during overvoltage transients.

[0062] The centre tap 128 of the secondary winding 118 is arranged to provide a DC output voltage VoutDC at an output 132 of the HFAC-DC converter. In particular, an DC output voltage is provided between an output of the circuit 132 and the reference voltage. As such, DC power VoutDC is provided to a DC load that may be connected between the output 132 and the reference voltage. An inductor 136 is arranged on the output line between the centre tap 128 and the circuit output 132. Due to the action of the active rectification elements, 122a, 122b a substantially constant DC power is provided to the DC load during both halves of the input high frequency AC cycle. An energy store, e.g. capacitor, 134, is arranged between the circuit output line and the reference voltage.

[0063] The gate drive winding 120 of the second stage 104 is also a centre tapped winding. This gate drive winding 120 is also inductively coupled to the primary winding 114 of the first stage 102. The output at a first end of the gate drive winding 102 is coupled to the gate terminal of the first active rectification element 122a. The output at a second end of the gate drive winding 102 is coupled to the gate terminal of the second active rectification element 122b. The gate drive winding 120 is thus coupled to provide control signals to turn on or off the first and second active rectification elements 122a, 122b at different points in the AC cycle, based on the HFAC signal derived from the first stage 102. The gate drive winding 120 is inductively coupled to the input HFAC signal, and so is configured to turn each element 122a, 122b on and off alternately as current starts to conduct through the gate drive winding 120. Specifically, the gate drive winding 120 may switch on and thus allow current to flow between source and drain of a first one of the active rectification elements 122a, 122b when the input HFAC is positive, and switch on the other active rectification element 122b, 122a (and switch off the first) when the input HFAC is negative. In this way a substantially constant DC voltage may be provided at the output 132, with reduced power loss in comparison to standard diodes due to the much lower voltage drop across the active rectification elements.

[0064] The second stage 104 further comprises a biasing circuit 140 that is connected between the output DC power line (at one or more points between the secondary winding centre tap 128 and output 132) and the reference voltage. The biasing circuit 140 comprises a first connection point 181 connected to a point 170 on the output DC power line that is positioned between the secondary winding centre tap 128 and the circuit output 132. The biasing circuit 140 also comprises a second connection point 183 connected to a point Vet on the output DC power line that is arranged between point 170 and the secondary winding centre tap 128. The inductor 136 is arranged on the output DC power line between the point 170 and the point Vet. The biasing circuit further comprises a reference voltage connection 185, connected to the reference voltage point, which is 0V in this example. The biasing circuit 140 comprises a DC output 180 that is connected to the centre tap 130 of the gate drive winding 120. The biasing circuit 140 is configured to provide a DC bias voltage, Vbias at output 180, which is connected to bias the gate drive winding 120.

[0065] The biasing circuit 140 may act to reduce switching losses in the active rectification elements 122a, 122b. In circuits without such a biasing circuit, power losses may still be incurred by the active rectification elements 122a, 122b due to the switching operation. Figure 2a shows a series of graphs generated by simulation, which illustrate power losses during active rectification, absent the presence of the biasing circuit 140. In particular, Figure 2a illustrates how various parameters vary over time during active rectification. The lowermost graph shows how the gate-source voltage of active rectification element 122a varies over time. The active rectification element has an associated threshold voltage, which is defined as the minimum gate-source voltage that is needed to create a conducting path between the source and drain terminals. In the lowermost graph of Figure 2a, the time at which the polarity of the input HFAC power signal switches from positive to negative is indicated by a first vertical line. At this time, the gate-source voltage of the active rectification element 122a (indicated by the lower horizontal line) is less than its threshold voltage. It is not until the gate-source voltage reaches the threshold voltage, indicated by the upper horizontal line, at a later time indicated by the second vertical line, that a conduction path is provided through the element 122a from source to drain. In this period between the time the input polarity is switched, and the switch-on time of the rectification element, power is lost as indicated by the upper three graphs of Figure 2a. In particular, in the examples shown in the figures, the active rectification elements 122a, 122b are MOSFETs, and in the period bounded by the two vertical lines in Figure 2a due at least in part due to parasitic body diode current flowing in the MOSFETs. The second-from-bottom graph shows the current flowing into the rectification element, and the second-from-top graph shows the sourcedrain voltage across the rectification element. The upper-most graph illustrates the magnitude of the product of these two values and thus indicates the power loss incurred in the rectification element. As shown, due to a non-zero source-drain voltage across the element during current flow, power is lost in the period before the threshold voltage is reached. It will be understood that corresponding behaviour is also observed in the second active rectification element 122b.

[0066] It is therefore desirable to reduce the time taken to switch on and / or off the active rectification elements 122a, 122b. To this end the converter 100 shown in Figure 1 comprises the biasing circuit 140. The biasing circuit 140 is connected to the centre tap 130 of the gate drive winding 120, and thus acts to add a DC bias to the control signals discussed above that are provided to the gate terminals of the active rectification elements 122a, 122b. In particular, the DC bias provided by the biasing circuit 140 acts to increase the gate-source voltage of the active rectification elements, so that the DC bias provided by the biasing circuit (indicated as node Vbias in Fig. 1) is continuously at or very close to the turn-on and / or turn-off threshold of the active rectification elements 122a, 122b. Therefore, throughout the input AC cycle, the DC offset level of the gatesource voltage of the rectification elements 122a, 122b is raised from 0V to a DC level that is always at least at or very close to the turn-on and / or turn-off threshold voltage. This means that, during operation of the converter 100, the active rectification elements 122a, 122b can be turned on very quickly without entering or dwelling in the parasitic “body diode conduction” region of operation of the rectification elements122a,b. This in turn may minimise the switching losses incurred by the active rectification elements 122a, 122b. Figure 2b illustrates the same parameters as Figure 2a, but in a circuit in which the biasing circuit 140 is connected as shown in Figure 1. As shown in the bottom graph, the gate-source voltage at the time (indicated by the first vertical line) at which the polarity of the input HFAC voltage is reversed is approximately 2V, which in this example is very close to the turn-on / off voltage of the rectification element. Therefore, the period from this point until the rectification element is switched on (indicated by the second vertical line), during which power is lost, is much reduced. As with Figure 2a, in Figure 2b the current, voltage, and power loss in this period are also shown, and indicate much lower switching power losses due to the reduction in switch-on time.

[0067] An example structure and function of the biasing circuit 140 will now be described with reference to Figure 3. It will be appreciated that the specific arrangement of the biasing circuit 140 shown in Figure 3 (and in Figures 4 & 5) is merely exemplary, and that the DC bias (Vbias) by other analogue or digital circuits and / or control elements. In some other examples the functionality of the biasing circuit 140 may be provided by a general purpose processor, may comprise digital logic, such as field programmable gate arrays, FPGA, application specific integrated circuits, ASIC, a digital signal processor, DSP, or any other appropriate hardware.

[0068] As discussed above, the biasing circuit 140 is arranged to provide a biasing voltage, indicated at node Vbias, which is coupled to the centre tap 130 of the gate drive winding 120. With reference to Figure 3, the biasing circuit 140 comprises a transistor 148. In particular, the output 180 of the biasing circuit is connected to the collector terminal of the transistor 148, which in this example is a bipolar junction transistor. As such, the DC bias Vbias is based on an output voltage from the transistor 148. The signal from the collector terminal of the transistor 148 is combined with a signal from the DC output power line at a connection point 172. In particular, the connection point 172 is connected to the output DC power line at point 170. A resistor 174 is connected between the point 170 and the connection point 172. The transistor 148 is configured to act as an amplifier, in particular to amplify the signal received at its base terminal to provide the amplified DC bias voltage Vbias. The biasing circuit further comprises a capacitor 152 that is connected between a point 175 (arranged between the connection point 172 of the biasing circuit and the centre tap 130 of the gate drive winding 120), and the reference voltage. A resistor 162 is also connected between the point 175 and the reference voltage, in parallel to the capacitor 152.

[0069] The emitter terminal of the transistor 148 is connected to the reference voltage via an optional diode 150, which will increase the bias voltage Vbias with respect to the reference voltage. The transistor 148 is controlled by a base-emitter voltage Vbase, which is amplified by the transistor 148. A capacitor 142 is connected between base terminal of the transistor 148 and the reference voltage such that the control voltage that is provided to the base terminal (Vbase) is based on the operation of the capacitor 142.

[0070] The capacitor 142 of the biasing circuit 140 is further connected to the point Vet on the DC output power line. An n-p-n bipolar junction transistor 144, and an optional diode 146, are connected between the point Vet and the capacitor 142, and arranged to enable current only to flow from the capacitor 142 to the node Vet. The transistor 144 is connected to function as a diode. The transistor 144 is optional and may be substituted for another diode or omitted in other examples. The capacitor 142 is also connected between the reference voltage and connection point 170 on the output power line, wherein the inductor 136 is connected between point Vet and the point 170 on the output line. A resistor 158 is connected between the capacitor 142 and the point 170. In this arrangement the capacitor 142 is connected to charge whenever node Vet rises above 0V, and to discharge through the diode 146 when Vet falls to 0V.

[0071] This in turn provides a control voltage Vbase which biases the transistor 148 to operate in its linear region, and thereby to adjust the biasing voltage Vbias. In particular, the transistor 148 is connected to adjust Vbias so that the DC offset voltage of the active rectification element drive signals remains continuously at the turn-on / off threshold voltage of the active rectification elements 122a, 122b. The arrangement described thus provides the reduction in power losses described above with reference to Figure 2b. The biasing circuit may comprise a first input coupled to a first connection point and a second input coupled to a second connection point. The first connection point and the second connection point may each be arranged on the DC output power line, for example between the secondary winding and a DC output of the HFAC-DC converter stage.

[0072] The first input and the second input may be coupled to a control terminal of the transistor, for example the base terminal of the transistor, e.g. BJT.

[0073] A reactive component, e.g. inductor, may be arranged between the secondary winding and the DC output of the HFAC-DC converter stage. The first connection point may be arranged between the secondary winding and the inductor, and the second connection point may be arranged between the inductor and the DC output of the HFAC-DC converter stage. The signal from the DC output power line upon which the DC bias may be at least partially based may be derived from the second connection point.

[0074] The DC bias may also be based on a signal from a DC output power line of the HFAC- DC converter stage, e.g. the signal at a point between the centre tap of the secondary winding and a DC output of the HFAC-DC converter stage. For example, the DC bias may be based on a combination of the signal from the DC output power line and the output of the transistor. The output of the transistor and the signal from the DC output power line may be combined at a third connection point. The third connection point may be coupled to the output of the transistor, to the DC output power line (for example at the second connection point), and to the gate drive winding (for example the centre tap of the gate drive winding). A resistor may be connected between the DC output power line (for example at the second connection point) and the third connection point.

[0075] The biasing circuit 170 shown in Figure 3 can be considered to comprise a first input coupled to a first connection point Vet and a second input coupled to a second connection point 170. The first connection point Vet and the second connection point 170 are each arranged on the DC output power line between the secondary winding 118 and VoutDC, which is the DC output of the HFAC-DC converter stage 104.

[0076] The first input and the second input are coupled to the control terminal, e.g. base, of the transistor 148.

[0077] The inductor 136 is arranged between the secondary winding 118 and VoutDC, with the first connection point Vet arranged between the secondary winding 118 and the inductor 136, and the second connection point 170 arranged between the inductor 136 and VoutDC.

[0078] The base terminal of the transistor 148 is thus connected to both point Vet and point 170 on the output power line. This exemplary configuration thus provides one example by which the biasing circuit 140 is configured to provide dual feedback biasing of the transistor 148, for example when the HFAC-DC is in operation.

[0079] The DC bias (Vbias) is based on an output e.g. of the transistor 148 (e.g. collector terminal) and also on a signal from a DC output power line of the HFAC-DC converter stage, e.g. the signal at second connection point 170. As shown in Figure 3, the output of the transistor 148 and the signal from the DC output power line (derived from second connection point 170) is combined at a third connection point 172. The third connection point 172 is coupled to the output of the transistor 148 and to the DC output power line (for example at the second connection point 170. The third connection point 172 is also coupled to the centre tap 130 of the gate drive winding 120. A resistor 174 is connected between the second connection point 170 and the third connection point 172 in the Figure 3 example.

[0080] Figure 4 illustrates another example of an HFAC to DC converter 100. In this example, the first stage 102, the biasing circuit 140 and the 122a, 122b rectification elements are arranged as described above in relation to Figure 1 , and so are not described again here. In this example, the primary winding 114 of the first stage 102 is inductively coupled only to the secondary winding 118, in the first transformer 111. For inductive coupling to the gate drive winding 120, a second primary winding 142 is provided as part of the second stage 104. In particular, the second primary winding 142 is arranged between the two outer output legs of the secondary winding 118. The second primary winding 142 is inductively coupled to the gate drive winding 120 about a core 117 in a second transformer 113. The second stage 104 is otherwise arranged in the same as described above in relation to the example shown in Figure 1 , to provide the reduction in power loss described with reference to Figures 2a and 2b.

[0081] A third example of an HFAC to DC converter 100 is illustrated in Figure 5. In this example, the first stage 102 is arranged as described above in relation to Figure 1. The second stage 104 is arranged substantially as described above in relation to Figure 2. In particular, the gate drive winding 150 is inductively coupled to a second primary winding 142 in a second transformer 113 that is part of the second stage, as in the Figure 2 example. In this example, the gate drive winding 150 is not a centre tapped winding. Instead, in this example, the biasing circuit 140 is connected to a connection point 135 arranged on the connection between one of the outputs of the gate drive winding 150 and the gate terminal of one of the active rectification elements (the second rectification element 122b in Figure 4). The DC bias described above in relation to Figure 1 is thus provided from the biasing circuit 140 to the gate drive control signals (gate-source voltages) of the active rectification elements 122a, 122b via this connection point 135, rather than via a centre tapping of the gate drive winding as is shown in Figures 1 or 2, to provide the same effect.

[0082] Each of the examples described above may provide a substantially constant DC bias to reduce the switching losses in the active rectification elements. Figure 6 illustrates the change in several variables of the converter over time. The switching period discussed above in relation to Figures 2a and 2b is shown between a pair of vertical lines. In particular, the upper graph illustrates how the voltage at node Vet shown in Figures 1 , 3, and 4 varies over time. The second to fourth graphs illustrate, respectively, how the voltage at node Vbase, the current through the diode 146 and the current through resistor 174 vary over time. The lowermost graph shows how the DC bias Vbias varies over time. The total variation of the DC bias over the AC cycle was found to be very small, in the order of 10'5V. The biasing circuit 140 in the examples described above is arranged so that the DC bias Vbias is inherently adjusted based on the load current - i.e. the current drawn by a load connected to the output 132 of the converter. In particular, with increased load current, the output voltage drops. The drain current ID through the active rectification elements 122a, 122b also varies based on the current drawn by the load. Increased drain current ID, results in higher switching losses. It is therefore beneficial in such circumstances to have an increased DC bias voltage Vbias so that, in addition to a reduction in the body diode conduction time as described above with reference to figures 2a & 2b, a reduced on-state resistance Rds(on) condition is available as soon as possible during the transition of the rectification elements’ 122a, 122b drain current from 0A to full conduction. Similarly, during the turn-off process of rectification elements 122a, 122b, it may be beneficial to provide a higher DC bias Vbias in order to extend this reduced lower on-state resistance Rds(on) condition for as long as possible during the transition period between full conduction and 0A of the rectification elements’ 122a, 122b.

[0083] In the examples shown, the reduction in output voltage with increased load current causes a reduction in the voltage Vbase, which in turn increases the DC bias Vbias. An example of this is illustrated in Figure 7. In particular, Figure 7 illustrates an example of how the output voltage VoutDC, the voltage Vbase, and the DC bias Vbias may vary over time. As shown, the biasing circuit is arranged so that a variation in the output voltage provides a corresponding variation in Vbase, and an inverse variation to the DC bias. Thus the circuits shown may automatically increase the DC bias Vbias in response to an increase in load current, thereby further reducing power losses in the active rectification elements 122a, 122b.

[0084] In the examples above, the active rectification elements have been described as MOSFETs. In some examples the MOSFETs are silicon MOSFETs. However, other switching elements may be used to provide the same functionality, for example other FETs such as GANFETs. In other examples, other classes of transistor may be used.

[0085] Similarly, transistors 144, 148, are shows as n-p-n BJTs. However, in other examples other switching elements, e.g. other types of transistor, may be used to provide the functionality of these elements.

[0086] The converter 100 has been illustrated and described as comprising several capacitors 106, 110, 134, 142, 152. However, it will be appreciated that these are merely exemplary and that alternative forms energy stores may be used to provide the same function.

[0087] It will be appreciated from the discussion above that the embodiments shown in the Figures are merely exemplary, and include features which may be generalised, removed or replaced as described herein and as set out in the claims. With reference to the drawings in general, it will be appreciated that schematic functional block diagrams are used to indicate functionality of systems and apparatus described herein. It will be appreciated however that the functionality need not be divided in this way, and should not be taken to imply any particular structure of hardware other than that described and claimed below. The function of one or more of the elements shown in the drawings may be further subdivided, and / or distributed throughout apparatus of the disclosure. In some embodiments the function of one or more elements shown in the drawings may be integrated into a single functional unit.

[0088] The above embodiments are to be understood as illustrative examples. Further embodiments are envisaged. It is to be understood that any feature described in relation to any one embodiment may be used alone, or in combination with other features described, and may also be used in combination with one or more features of any other of the embodiments, or any combination of any other of the embodiments. Furthermore, equivalents and modifications not described above may also be employed without departing from the scope of the invention, which is defined in the accompanying claims.

Claims

CLAIMS:

1. A high frequency AC to DC (HFAC-DC) converter stage for converting a high frequency AC (HFAC) voltage, obtained from a power bus of an HFAC power distribution system to a DC voltage for powering a DC load, the HFAC-DC converter comprising: a secondary winding arranged for inductive coupling to a primary winding of a preceding converter stage, the preceding converter stage being configured for connection to the HFAC power distribution system; a rectifier connected to receive high frequency AC electrical energy from the secondary winding, the rectifier comprising a plurality of active rectification elements which are switchable to convert the HFAC electrical energy into DC electrical energy for powering the DC load; and a gate drive winding connected to provide an alternating control signal to the rectifier for controlling the active rectification elements, using HFAC electrical energy obtained from said power distribution bus.

2. The HFAC-DC converter stage of claim 1 , wherein the alternating control signal is based on a signal derived from the HFAC voltage of the HFAC power distribution system, and a DC bias.

3. The HFAC-DC converter stage of claim 2, wherein the DC bias is equal to a turn-on and / or a turn-off threshold of the active rectification elements.

4. The HFAC-DC converter stage of claim 2 or 3, further comprising a biasing circuit connected to add the DC bias to the signal derived from the HFAC power distribution system.

5. The HFAC-DC converter stage of claim 4, wherein the biasing circuit is connected to adjust the DC bias based on the current drawn by the load6. The HFAC-DC converter stage of claim 4 or 5, wherein the biasing circuit is configured to adjust the DC bias so that the voltage at a control terminal of the active rectification elements is at least the threshold voltage.

7. The HFAC-DC converter stage of any of claims 4 to 6, wherein the biasing circuit is configured to regulate or change the bias voltage in response to a change in the load current.

8. The HFAC-DC converter stage of any preceding claim, wherein the gate drive winding is arranged for inductive coupling to the primary winding of the preceding converter stage.

9. The HFAC-DC converter stage of any of claims 1 to 7, wherein the primary winding of the preceding converter stage is a first primary winding, and wherein the HFAC-DC converter stage comprises a second primary winding, wherein the gate drive winding is arranged for inductive coupling to the second primary winding.

10. The HFAC-DC converter stage of any preceding claim as dependent upon claim 4, wherein the secondary winding is a centre tapped winding.

11. The HFAC-DC converter stage of claim 10 wherein the biasing circuit comprises an energy store arranged to charge when the centre tap voltage of the secondary winding is greater than 0V and to discharge when the centre tap voltage is less than 0V.

12. The HFAC-DC converter stage of any preceding claim, wherein the gate drive winding is connected to provide the alternating control voltage to a control terminal of a first active rectification element of the rectifier and to a control terminal of a second active rectification element of the rectifier.

13. The HFAC-DC converter stage of claim 4 or any claim dependent thereon, wherein the gate drive winding is arranged in a centre tap configuration, wherein the centre tap of the gate drive winding is connected to the biasing circuit.

14. The HFAC-DC converter stage of any preceding claim, wherein the active rectification elements are MOSFETs.

15. The HFAC-DC converter stage of claim 4 or any claim dependent thereon, wherein the biasing circuit comprises a transistor, and wherein the DC bias is based on an output of the transistor.

16. The HFAC-DC converter stage of claim 15, wherein the biasing circuit is arranged to provide feedback biasing, e.g. dual feedback biasing, of the transistor.

17. The HFAC-DC converter stage of claim 4 or any claim dependent thereon, wherein the biasing circuit comprises a first input coupled to a first connection point and a second input coupled to a second connection point, wherein the first connection point and the second connection point are each arranged between the secondary winding and a DC output of the HFAC-DC converter stage.

18. The HFAC-DC converter stage of claim 17 as dependent on claim 15 or 16, wherein the first input and the second input are coupled to a control terminal of the transistor.

19. The HFAC-DC converter stage of claim 17 or 18, wherein an inductor is arranged between the secondary winding and the DC output of the HFAC-DC converter stage, and wherein the first connection point is arranged between the secondary winding and the inductor, and the second connection point is arranged between the inductor and the DC output of the HFAC-DC converter stage.

20. An apparatus comprising the HFAC-DC converter stage of any preceding claim, and an electronic device comprising the DC load connected to be powered by DC electrical energy from the converter.21 . A system comprising: an HFAC-DC converter stage according to any of claims 1 to 19; and a preceding converter stage for coupling to a power distribution bus carrying input HFAC energy; wherein preceding converter stage comprises a primary winding arranged for inductive coupling with the secondary winding of the HFAC-DC converter stage.

22. The system of claim 21 , wherein the preceding converter stage comprises a power factor correction circuit configured to reduce the phase angle between the input voltage and input current of the input HFAC energy.

23. The system of claim 21 or claim 22, wherein the preceding converter stage comprises a resonant tank circuit.

24. The system of any of claims 21 to 23, further comprising the power distribution bus.

25. The system of any of claims 21 to 24, wherein the HFAC-DC converter stage is secured to the power distribution bus such that its secondary winding is arranged for inductive coupling with the primary winding.

26. The system of any of claims 21 to 25, comprising a plurality of HFAC-DC converter stages according to any of claims 1 to 19, and a corresponding plurality of preceding converter stages, each HFAC-DC converter connectable to provide DC electrical energy from its rectifier to a respective corresponding one of a plurality of electronic devices.

27. A system comprising: a plurality of HFAC-DC converter stages according to any of claims 1 to 19, each connectable to provide DC electrical energy from its rectifier to a respective corresponding one of a plurality of electronic devices, the system further comprising: a power distribution bus, carrying HFAC energy, wherein each of the plurality of HFAC-DC converter stages is secured to the power distribution bus such that its secondary winding is arranged for inductive coupling with the power distribution bus.

28. The system of claim 27, wherein power distribution bus comprises a plurality of preceding converter stages, wherein each of the preceding converter stages are coupled to the power distribution bus, and wherein each of the plurality of converter stages according to any of claims 1 to 14 are arranged for inductive coupling with the power distribution bus via a corresponding one of the preceding converter stages.

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