Multilayer printed circuit board
Patent Information
- Application Number
- JP2022120997
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2021-07-29
- Filing Date
- 2022-07-28
- Publication Date
- 2025-01-31
- Estimated Expiration
- 2042-07-28
AI Technical Summary
Single-layer printed circuit boards are not compatible with modern radars that require numerous electronic components due to volume constraints, and multilayer boards face issues with parasitic electromagnetic radiation from counterbores, leading to manufacturing complexity and reduced yield.
A multilayer printed circuit board design with counterbores that include metal pads to block parasitic electromagnetic radiation, using a manufacturing process that avoids resin filling and additional metallization steps, preserving the initial conductive layer thickness and improving yield.
The design effectively blocks parasitic electromagnetic radiation, reduces manufacturing complexity, and enhances yield, allowing for improved integration of electronic components in compact radar systems.
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Abstract
Description
[Technical Field]
[0001] The present invention relates generally to printed circuit boards for electronic systems, and more particularly to multilayer printed circuit boards and processes for manufacturing multilayer printed circuit boards. [Background technology]
[0002] Electronic systems traditionally implement complex processing operations that affect the volume and power consumption of the system. For example, the operation of radar-type electronic systems is generally based on generated electromagnetic signals that are transmitted through space by a transmitting module equipped with a dedicated antenna. The radar further includes a receiving module intended to detect the electromagnetic signals reflected by a target, and a processing module intended to determine information about the target, such as its position and the speed of its movement, based on the detected signals.
[0003] Radars can be fixed on the ground, deployed on board ground vehicles or ships or boats, or airborne by aircraft. In either case, radars must meet many constraints, especially those related to volume. Specifically, for example, in the field of AESA radars (AESA stands for Active Electronically Scanned Array), functionality is becoming increasingly integrated within the antenna portion of the radar. Initially limited to microwave functions (transmission and reception of signals and auxiliary functions), the antenna portion of the radar is now expected to host an ever-increasing proportion of digital processing operations applied to the signals. In addition, radars must be capable of implementing more and more functions to accommodate targets of interest that are becoming smaller and / or more maneuverable.
[0004] To meet volumetric constraints within radars, it is known to use one or more single-layer printed circuit boards, each containing multiple electronic components. The electronic components of a given printed circuit board are electrically connected by electrical tracks and according to a given circuit diagram to perform electronic functions on various signals required for radar operation. Such electronic functions include, for example and without limitation, signal generation, filtering, modulation, and frequency translation. Thus, the electrical signals carried by the electrical tracks of the single-layer printed circuit board can have various forms (digital or analog), various frequencies (baseband and radio frequency signals), and / or various powers. However, the dimensions of the single-layer printed circuit board are strongly related to the number and length of the electrical tracks connecting the various electronic components disposed on the single-layer printed circuit board. As a result, single-layer printed circuit boards are not compatible with current radars, which incorporate numerous electronic functions requiring numerous electronic components.
[0005] To mitigate the limitations associated with the use of single-layer printed circuit boards in radar, it is known to use multilayer printed circuit boards that include a stack of multiple layers (two surface layers and one or more internal layers). In this case, electronic components can be connected to other electronic components by electrical tracks created within one or more layers of the multilayer printed circuit board. To accomplish this, metallized holes are typically used to ensure electrical connections between the various layers of the multilayer printed circuit board. Metallized through-holes, for example, can be used to electrically connect all layers of the multilayer printed circuit board. It is also known to use metallized counterbore holes to electrically connect one of the two surface layers to one or more internal layers. Counterbore holes are typically created from metallized through-holes by removing unused or non-useful metallization that causes certain phenomena that result in reflections and / or distortions of useful signals. However, in certain cases, counterbore holes can be a source of parasitic electromagnetic radiation that can locally degrade the operation of certain electronic components utilized in the multilayer printed circuit board.
[0006] One known solution for preventing parasitic electromagnetic radiation is shown in FIG. 1. This known solution involves filling each counterbore hole with a non-conductive resin and then sealing the filled counterbore hole with metallization deposited using a process similar to that used to create metal interconnect tracks between surface-mounted electronic components. However, this known solution is complex to implement and significantly reduces the manufacturing yield of multilayer printed circuit boards. Specifically, the resin filler can easily penetrate into other types of metallized holes, such as metallized through-holes, thus requiring additional steps to remove the resin from them. Furthermore, creating a sealed metallization requires an additional metal layer to be deposited on the surface layer of the multilayer printed circuit board, which results in a larger final metallization thickness and reduces thinning and etching tolerances. Summary of the Invention [Problem to be solved by the invention]
[0007] Therefore, a need exists for improved multilayer printed circuit boards. [Means for solving the problem]
[0008] To this end, the present invention provides a multilayer printed circuit board intended for connecting electronic components, comprising a stack of multiple conductive layers, the conductive layers including two surface layers and one or more internal layers, the separation between two adjacent conductive layers being ensured by an electrically insulating layer, the printed circuit board including one or more counterbore holes, each configured to electrically connect one of the two surface layers to one or more internal layers, and including a portion with metallization that opens onto one of the two surface layers and a portion without metallization that opens onto the other surface layer, the portion with metallization and the portion without metallization of the counterbore hole extending in a direction perpendicular to the layer stacking plane. Advantageously, the multilayer printed circuit board further includes one or more metal pads, each metal pad being bonded to one of the two surface layers in such a way as to conceal the portion without metallization of the corresponding counterbore hole.
[0009] In one embodiment, parasitic electromagnetic radiation tends to form inside the counterbore, and the metal pad may be selected to at least partially block the propagation of the parasitic electromagnetic radiation from the counterbore.
[0010] In another embodiment, parasitic electromagnetic radiation tends to penetrate into the counterbore, and the metal pad may be selected to at least partially block the propagation of parasitic electromagnetic radiation into the counterbore.
[0011] Advantageously, the geometrical characteristics of the metal pads may be selected according to one or more characteristics of the parasitic electromagnetic radiation that tends to be formed in and / or penetrate into the corresponding counterbore.
[0012] As a variant, the electrical properties of the metal pads may be selected depending on one or more properties of the parasitic electromagnetic radiation that tends to form in and / or penetrate into the corresponding counterbore.
[0013] In one embodiment, the metal pads may be identical.
[0014] In another embodiment, the metal pad may be a passive component that does not require a power source.
[0015] There is also provided a process for manufacturing a multilayer printed circuit board and adding components, the multilayer printed circuit board being intended to connect electronic components. Advantageously, the process comprises: - producing a stack of a plurality of conductive layers, the conductive layers including two surface layers and one or more internal layers, the separation between two adjacent conductive layers being ensured by an insulating layer, - creating an electrical connection between the conductive layers by one or more metallized through holes; - converting at least one metallized through hole into a counterbore, the counterbore including a portion with metallization that is open on one of two surface layers and a portion without metallization that is open on the other surface layer, the portion with metallization and the portion without metallization of the counterbore extending in a direction perpendicular to the layer stacking plane; - generating electrical tracks and connection pads on at least one of the two surface layers; Includes.
[0016] Advantageously, the process for manufacturing a multilayer printed circuit board and adding components comprises: - bonding one or more metal pads to one or both surface layers, each metal pad being bonded in such a way as to conceal the portion of the corresponding counterbore that does not have metallization; - bonding one or more electronic components to connection pads belonging to one or both surface layers; It may further include:
[0017] Other features and advantages of the present invention will become apparent from the following description and figures. [Brief explanation of the drawings]
[0018] [Figure 1]1 shows a counterbore according to a prior art solution; [Figure 2] 1 illustrates a multilayer printed circuit board according to an embodiment of the present invention. [Figure 3] 1 illustrates a process for manufacturing a multilayer printed circuit board and adding components according to an embodiment of the present invention. [Figure 4A] 3 illustrates steps performed to bond metal pads to surface layers of a multilayer printed circuit board according to an embodiment of the present invention. [Figure 4B] 3 illustrates steps performed to bond metal pads to surface layers of a multilayer printed circuit board according to an embodiment of the present invention. [Figure 4C] 3 illustrates steps performed to bond metal pads to surface layers of a multilayer printed circuit board according to an embodiment of the present invention. [Figure 5A] 1 shows the steps used to create counterbore holes and through holes according to prior art solutions; [Figure 5B] 1 shows the steps used to create counterbore holes and through holes according to prior art solutions; [Figure 5C] 1 shows the steps used to create counterbore holes and through holes according to prior art solutions; [Figure 5D] 1 shows the steps used to create counterbore holes and through holes according to prior art solutions; [Figure 5E] 1 shows the steps used to create counterbore holes and through holes according to prior art solutions; [Figure 5F] 1 shows the steps used to create counterbore holes and through holes according to prior art solutions; [Figure 5G] 1 shows the steps used to create counterbore holes and through holes according to prior art solutions; [Figure 6A] 1 illustrates the steps used to create counterbore holes and through holes according to an embodiment of the present invention. [Figure 6B]1 illustrates the steps used to create counterbore holes and through holes according to an embodiment of the present invention. [Figure 6C] 1 illustrates the steps used to create counterbore holes and through holes according to an embodiment of the present invention. [Figure 6D] 1 illustrates the steps used to create counterbore holes and through holes according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0019] The multilayer printed circuit board 10 according to various embodiments of the present invention is intended to electrically connect electronic components 304 and enable these electronic components to exchange electrical signals of various forms (digital or analog), various frequencies (baseband and radio frequency signals), and / or various powers.
[0020] 2 shows a multilayer printed circuit board 10 according to an embodiment of the present invention. The multilayer printed circuit board 10 comprises a stack of multiple conductive layers 100, where the separation between two adjacent conductive layers 100 is ensured by an electrical insulating layer 120 based on one or more insulating materials. The conductive layers 100 comprise two surface layers 101 and one or more internal layers 102. Furthermore, each of the conductive layers 100 comprises a set of electrical tracks 302 intended to connect electronic components 304 added, i.e., soldered, to one or more conductive layers 100 of the multilayer printed circuit board 10. The multilayer printed circuit board 10 further comprises one or more connection holes 200, also called vias, that allow electrical connections to be made between the various conductive layers 100 of the multilayer printed circuit board 10. For example, the electrical tracks 302, in cooperation with the connection holes 200, allow an electrical connection to be made between two electronic components 304 added to a given layer of the multilayer printed circuit board 10 or to two different layers. Furthermore, the multilayer printed circuit board 10 includes at least one counterbore 202. The counterbore 202 allows one of two surface layers 101 to be connected to one or more internal layers 102, and for this purpose includes a portion 2021 with metallization that passes vertically through the conductive layer 100 to be connected and opens onto, i.e., terminates on, the target surface layer 101. The counterbore 202 further includes a portion 2022 without metallization that passes through the other conductive layer 100 and opens onto the other surface layer 101. From an industrial point of view, the counterbore 202 can be obtained by first producing a metallized through-hole 201 whose inner surface is completely metallized, i.e., covered with metal, before one portion of the inner metallization is removed in a direction perpendicular to the layer stacking plane. In an embodiment of the present invention, the multilayer printed circuit board 10 further includes one or more metal pads 301. Each of the metal pads 301 is added to one of the two surface layers 101 so as to conceal the metallization-free portion 2022 of the corresponding counterbore 202. Each metal pad 301 is an insulated metal pad capable of blocking parasitic electromagnetic radiation.
[0021] Each layer of the multilayer printed circuit board 10 further includes connection pads 303, for example, corresponding to the termination of the electrical tracks 302 of the corresponding conductive layer 100. The connection pads 303 may be drilled for the purpose of creating an electrical connection between two or more conductive layers 100 by way of vias or for making electrical connections between electronic components 304. Alternatively, the connection pads 303 may not be drilled, but rather may be intended for soldering surface-mounted electronic components 304.
[0022] In embodiments of the present invention, parasitic electromagnetic radiation tends to form inside the counterbore holes 202. A source of such parasitic electromagnetic radiation may be, for example and without limitation, the metallized portion 2021 of the counterbore hole 202, which may function as an antenna radiating electromagnetic waves passing therethrough. In such embodiments of the present invention, the metal pad 301 concealing the counterbore hole 202 is selected to at least partially block the propagation of such parasitic electromagnetic radiation from the corresponding counterbore hole 202. Advantageously, each metal pad 301 utilized within the multilayer printed circuit board 10 is selected to completely block the propagation of parasitic electromagnetic radiation from the corresponding counterbore hole 202.
[0023] In other embodiments of the present invention, parasitic electromagnetic radiation tends to form outside of the counterbore 202. In such embodiments of the present invention, the metal pad 301 concealing the counterbore 202 is selected to at least partially block the penetration of such parasitic electromagnetic radiation into the corresponding counterbore 202.
[0024] Advantageously, the metal pads 301 concealing the countersunk holes 202 of the multilayer printed circuit board 10 may be identical, i.e., the metal pads 301 may have the same geometric characteristics and, specifically, the same thickness, where the thickness is measured perpendicular to the layer stacking plane.
[0025] In embodiments of the present invention, the geometric characteristics of the metal pad 301 that conceals the counterbore 202 may be selected according to one or more characteristics of the parasitic electromagnetic radiation that tends to form within or outside the corresponding counterbore 202. For example, the thickness of the metal pad 301 may be several times greater, and typically one hundred times greater, than the skin depth associated with the parasitic electromagnetic radiation of interest, where the skin depth depends on the frequency of the parasitic electromagnetic radiation of interest.
[0026] In other embodiments of the present invention, the electrical properties of the metal pads 301 concealing the counterbore holes 202 may be selected in response to one or more properties of parasitic electromagnetic radiation that tends to form within or outside the corresponding counterbore holes 202. Such electrical properties include, for example and without limitation, the electrical conductivity of the metal pads 301.
[0027] Advantageously, the metal pads 301 concealing the counterbore holes 202 of the multilayer printed circuit board 10 are passive components that do not require a power source. Furthermore, the metal pads 301 added to one of the two surface layers 101 of the multilayer printed circuit board 10 can be electrically isolated from all other metal pads 301 added to the same surface layer 101.
[0028] In embodiments of the present invention, the one or more metal pads 301 may each be uniform in terms of chemical composition, i.e., comprised of a single chemical element, which may be a metal such as copper or aluminum. Alternatively, the one or more metal pads 301 may each be comprised of an alloy of multiple chemical elements.
[0029] 3 illustrates a process for manufacturing a multilayer printed circuit board 10 and adding components according to an embodiment of the present invention. The manufacturing process includes a first phase, which includes manufacturing the multilayer printed circuit board 10, and a second phase, which includes adding metal pads 301 and electronic components 304 to the thus manufactured multilayer printed circuit board 10. The first phase includes steps 51-54, and the second phase includes steps 55 and 56, which are described below. The manufacturing process according to various embodiments of the present invention is applicable to printed circuit boards having any number of conductive layers 100, which is typically four or more.
[0030] In step 51, a stack of multiple conductive layers 100 is produced, where the separation between two adjacent conductive layers 100 is ensured by an insulating layer 120 based on one or more insulating materials. The conductive layers 100 include two surface layers 101 and one or more internal layers 102. Each conductive layer 100, and more specifically each internal layer 102, can include a set of electrical tracks 302 and a set of connection pads 303 pre-generated according to a given circuit diagram. Step 51 can further include creating electrical connections between the internal layers 102 by one or more buried holes and creating electrical connections between the surface layer 101 and the internal layer 102 by one or more blind holes. Typically, buried holes or blind holes are obtained by creating metallized through-holes within a sub-laminate of the conductive layers 100. For example, a sub-laminate of the buried-hole conductive layers 100 includes only the internal conductive layer 102 and its electrical insulating layer 120 of the multilayer printed circuit board 10.
[0031] In step 52, electrical connections between the conductive layers 100 are created by one or more metallized through holes 201. Creating the metallized through holes 201 involves drilling holes through all of the populated layers before depositing a layer of metal, such as copper, inside the holes. The metallized through holes 201 specifically allow all of the populated conductive layers 100, and specifically the two surface layers 101, to be electrically connected.
[0032] In step 53, one or more metallized through holes 201 are converted into one or more counterbore holes 202 by removing, i.e., stripping, the non-useful metallization in a direction perpendicular to the stacking plane. The counterbore holes 202 thus comprise a portion 2021 with metallization that passes vertically through the conductive layer 100 to be connected and opens onto one of the two surface layers 101. The counterbore holes 202 further comprise a portion 2022 without metallization that passes through the other conductive layer 100 and opens onto the other surface layer 101. It should be noted that the counterbore holes 202 according to embodiments of the present invention are empty, i.e., they are not filled with any resin plug as described with respect to prior art solutions.
[0033] In step 54, electrical tracks 302 and connection pads 303 are created on one or both surface layers 101 of the multilayer printed circuit board 10.
[0034] In step 55, metal pads 301 are bonded, i.e., firmly fixed or added, to one or both surface layers 101 so as to conceal the metallization-free portion 2022 of each counterbore 202. The metal pads 301 may all be identical. Alternatively, at least two metal pads 301 may differ in terms of geometrical and / or electrical properties.
[0035] In step 56, electronic components 304 are bonded to connection pads 303 created on one or both of the surface layers 101. Those skilled in the art will understand that steps 55 and 56 can be performed in parallel or sequentially in time.
[0036] 4A, 4B, and 4C illustrate the steps (step 55 described above) performed to bond a metal pad 301 to one of the two surface layers 101 of the multilayer printed circuit board 10. More precisely, FIG. 4A illustrates a first step involving depositing solder paste on a metal portion of the surface layer 101 intended to accommodate the metal pad 301, which in this case may be, for example and without limitation, a connection pad 303. FIG. 4B illustrates a second step involving placing the metal pad 301 on a previously prepared metal portion of the surface layer 101. This second step can be performed manually or automatically using a surface-mount component (SMC) placement machine. FIG. 4C illustrates a third soldering step involving firmly fixing the metal pad 301 to the surface layer 101 of the multilayer printed circuit board 10. The soldering step can be performed using a reflow soldering technique. Furthermore, the deposition (first step) and reflow (third step) of the solder paste can be performed simultaneously on the metal pads 301 and the electronic components 304 .
[0037] Figures 5A, 5B, 5C, 5D, 5E, 5F, and 5G illustrate the creation of counterbore holes 202 and metallized through-holes 201 in multilayer printed circuit board 10 according to prior art solutions. Prior art solutions include filling counterbore holes 202 with a non-conductive resin before closing counterbore holes 202 with metallization. Figures 6A, 6B, 6C, and 6D illustrate the steps required to create counterbore holes 202 and metallized through-holes 201 according to an embodiment of the present invention.
[0038] 5A and 6A correspond in particular to the drilling and metallization steps that allow the counterbore 202 to be prepared by creating the metallized through-hole 201. More precisely, Fig. 6A shows that the creation of the counterbore and the creation of the metallized through-hole 201 can, according to an embodiment of the invention, begin in the same manufacturing step with the creation of the two metallized through-holes 201. Furthermore, Fig. 5A shows that prior art solutions do not provide such parallelism in the creation of the metallized through-hole 201 and the counterbore 202.
[0039] 5B and 6B correspond to a counterbore step that involves creating a counterbore 202 from the metallized through-hole 201. This results in removing a portion of the metallization of the metallized through-hole 201 in a direction perpendicular to the layer stacking plane.
[0040] FIG. 5C corresponds to the filling step implemented in the prior art solution, which in this case comprises completely filling the counterbore thus obtained with a non-conductive resin.
[0041] FIG. 5D corresponds to a planarization step implemented in a prior art solution, which in this case involves planarizing the two surface layers 101 of the multilayer printed circuit board 10.
[0042] 5E shows a deposition step implemented in a prior art solution, which in this case comprises depositing a conductive layer 100 on two previously planarized surface layers 101. The deposition step specifically allows the counterbore 202 to be concealed in order to prevent parasitic electromagnetic radiation from propagating from and / or penetrating into the counterbore 202. FIG. 5E also shows another implementation of the drilling and metallization step (similar steps are described with reference to FIG. 6A) for producing a metallized through-hole 201. According to prior art solutions, the metallized through-hole 201 can only be produced after the counterbore 202 has been filled and plugged. This makes it possible to avoid filling the metallized through-hole 201 with a non-conductive resin.
[0043] 5F shows an etching step implemented in a prior art solution, which in this case involves creating electrical tracks 302 and / or connection pads 303 on one or both surface layers 101. The etching step in particular enables the metallization that hides the respective counterbore holes 202 to be electrically isolated.
[0044] 5G shows the step of adding electronic components 304 implemented in prior art solutions, which in this case includes bonding the electronic components 304 to one or both surface layers 101. More precisely, each electronic component 304 can be bonded to two or more dedicated connection pads 303.
[0045] Figure 6C corresponds to an etching step that includes creating electrical tracks 302 and / or connection pads 303 on one or both surface layers 101, in which case this etching step directly follows the previous manufacturing step according to an embodiment of the present invention.
[0046] 6D corresponds to the step of adding electrical components, which includes bonding an electronic component 304 to one or both surface layers 101. The electronic component 304 bonded in this step includes a metal pad 301 intended to conceal the counterbore 202. Thus, the metal pad 301 can be bonded to the surface layer 101 in a manner similar to any other surface-mount electronic component 304.
[0047] Therefore, embodiments of the present invention allow electrical isolation of counterbore holes 202 to be achieved with fewer manufacturing steps than prior art solutions, and therefore ensure a relatively good manufacturing yield. Furthermore, embodiments of the present invention allow electrical isolation of counterbore holes 202 without requiring such counterbore holes 202 to be filled with a non-conductive resin. This allows, for example, weight reduction to be achieved. Furthermore, unlike prior art solutions that require the additional step of depositing a conductive layer 100 ( FIG. 5E ) on one or more surface layers 101 to hide the counterbore holes 202, embodiments of the present invention allow the initial thickness of the conductive surface layer 100 to be retained, which allows improvements in terms of etching precision and in terms of weight.
[0048] The present invention is not limited to the embodiments described above as non-limiting examples. In particular, the present invention is not limited to the example electronic systems mentioned in this description. The present invention encompasses any variant embodiments that may occur to those skilled in the art. [Explanation of symbols]
[0049] 10 Multilayer printed circuit board 100 conductive layer 101 Surface layer 102 Inner layer 120 Electrical insulating layer 200 connection hole 201 through hole 202 Counterbore 301 Metal Pad 302 Electric Truck 303 Connection Pad 304 Electronic Components 2021 Parts with metallization 2022 Parts without metallization
Claims
1. A multilayer printed circuit board (10) intended to connect electronic components (304), comprising a stack of a plurality of conductive layers (100), said conductive layers (100) comprising two surface layers (101) and one or more internal layers (102), the separation between two adjacent conductive layers (100) being ensured by an electrically insulating layer (120), said printed circuit board comprising one or more counterbores (202), each counterbored hole (202) being configured to electrically connect one of said two surface layers (101) to one or more internal layers (102) and opening onto one of said two surface layers (101). A multilayer printed circuit board (10) comprising a portion (2021) having metallization and a portion (2022) having no metallization and open on the other surface layer (101), the portion (2021) having metallization and the portion (2022) having no metallization of the counterbore (202) extending in a direction perpendicular to the layer stacking plane, the multilayer printed circuit board (10) further comprising one or more metal pads (301), each metal pad (301) being bonded to one of the two surface layers (101) so as to conceal the portion (2022) having no metallization of the corresponding counterbore (202).
2. 2. The multilayer printed circuit board (10) of claim 1, characterized in that parasitic electromagnetic radiation tends to form inside the countersunk holes (202) and the metal pads (301) are selected to at least partially block the propagation of the parasitic electromagnetic radiation from the countersunk holes (202).
3. 3. The multilayer printed circuit board (10) of claim 1 or 2, characterized in that parasitic electromagnetic radiation has a tendency to penetrate into the countersunk hole (202) and the metal pad (301) is selected to at least partially block the propagation of the parasitic electromagnetic radiation into the countersunk hole (202).
4. 3. The multilayer printed circuit board (10) of claim 2, characterized in that the geometric characteristics of the metal pads (301) are selected in response to one or more characteristics of the parasitic electromagnetic radiation that tends to be formed in and / or penetrate into the corresponding countersunk holes (202).
5. 3. The multilayer printed circuit board (10) of claim 2, characterized in that the electrical characteristics of the metal pads (301) are selected in response to one or more characteristics of the parasitic electromagnetic radiation that tends to be formed in and / or penetrate into the corresponding countersunk holes (202).
6. The multilayer printed circuit board (10) of claim 1, wherein said metal pads (301) are identical.
7. The multilayer printed circuit board (10) of claim 1, wherein the metal pad (301) is a passive component that does not require a power source.
8. A process for manufacturing and adding components to a multi-layer printed circuit board (10), the multi-layer printed circuit board (10) intended to connect electronic components (304), comprising: - creating (51) a stack of several conductive layers (100), said conductive layers (100) comprising two surface layers (101) and one or more internal layers (102), the separation between two adjacent conductive layers (100) being ensured by an insulating layer (120); - creating (52) an electrical connection between said conductive layers (100) by means of one or more metallized through holes (201); - a step (53) of converting at least one metallized through hole (201) into a counterbore (202) without filling said counterbore (202) with a resin plug, said counterbore (202) comprising a portion with metallization (2021) opening onto one of said two surface layers (101) and a portion without metallization (2022) opening onto the other surface layer (101), said portion with metallization (2021) and said portion without metallization (2022) of the counterbore (202) extending in a direction perpendicular to the layer stacking plane, - creating (54) electrical tracks (302) and connection pads (303) on at least one of said two surface layers (101); A process comprising:
9. - bonding (55) one or more metal pads (301) to one or both surface layers (101), each metal pad (301) being bonded in such a way as to hide the portion (2022) of the corresponding counterbore (202) that does not carry said metallization, - bonding (56) one or more electronic components (304) to the connection pads (303) belonging to one or both surface layers (101); The process for manufacturing and adding components to a multi-layer printed circuit board (10) according to claim 8, further comprising: