Method and device for adapting temperature of semiconductor component

Abstract

To provide a method and a device for adapting temperatures of semiconductor components connected in parallel and / or in series.SOLUTION: A device for adapting temperatures of semiconductor components includes a first semiconductor component 10, a second semiconductor component 20, temperature sensors T1, T2, and an evaluation unit 40. The evaluation unit ascertains a first temperature of the first semiconductor component, and a second temperature of the second semiconductor component, calculates a first temperature deviation representing a deviation of the first temperature from a reference temperature, and a second temperature deviation representing a deviation of the second temperature from the reference temperature, and adapts a first gate voltage of the first semiconductor component and a second gate voltage of the second semiconductor component until the first temperature deviation and the second temperature deviation are smaller than or equal to a predetermined maximum allowable temperature deviation from the reference temperature. The adaptation of the gate voltage of each semiconductor component takes place only when a predetermined allowable control range for the respective gate voltage is not exceeded, and when the first temperature and / or the second temperature is greater than the reference temperature.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a method for adjusting the temperature of a semiconductor device and a temperature adjustment device for a semiconductor device.

Background Art

[0002] In a power semiconductor module, a plurality of semiconductors are often connected in parallel. The more uniformly these semiconductors are utilized, the higher the performance of the component having these semiconductors. This performance is calculated by the current that can flow through the semiconductor, and thus, if one of the semiconductors in the component exceeds its operating limit, the performance of that component has already reached its limit. This operating limit is due to the maximum junction temperature of the hottest semiconductor. It is preferable that the temperature of each semiconductor is measured individually.

[0003] Deviations regarding the performance or conduction loss of individual semiconductors are caused on the one hand by the semiconductor manufacturing process. On the other hand, they are caused by the respective structure, connection technology, and the influence of deterioration. Therefore, in the prior art, such tolerances are considered during the design of the semiconductor, and each design margin directly affects the cost and utilization of the device.

Summary of the Invention

Means for Solving the Problems

[0004] According to a first aspect of the present invention, a method for adjusting the temperature of a semiconductor device is proposed. In the first step of the method according to the present invention, a first temperature of a first semiconductor element and a second temperature of a second semiconductor element are identified, wherein the first and second temperatures are preferably related to the junction temperatures of the semiconductor elements. The identification step shown herein and the method steps described below are carried out using, for example, an evaluation unit according to the present invention that can receive and / or calculate temperature-related information relating to the first and second semiconductor elements. The first and second temperatures are detected, for example, by temperature sensors assigned to each semiconductor element. For this purpose, the temperature sensors are preferably connected to the evaluation unit according to the present invention by information processing technology. The first and second semiconductor elements are, for example, power semiconductors such as SiCMOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), or different (power) semiconductors or (power) semiconductor modules, respectively.

[0005] In the second step of the method according to the present invention, a first temperature deviation representing a first temperature deviation from a reference temperature and a second temperature deviation representing a second temperature deviation from a reference temperature are calculated. In a third step of the method according to the present invention, the first gate voltage of the first semiconductor element and / or the second gate voltage of the second semiconductor element are adjusted so that the first and second temperature deviations are less than or equal to a predetermined maximum allowable temperature deviation from the reference temperature, the adjustment of the gate voltages being suitable for the change in power loss of each semiconductor element. Each gate voltage is adjusted only if it does not exceed a predetermined allowable control range of the gate voltage (e.g., obtained from the semiconductor element's datasheet) and if the first temperature and / or the second temperature are greater than the reference temperature.

[0006] By adjusting the gate voltages according to the present invention, it is advantageous to increase the service life of semiconductor devices, particularly those affected by manufacturing tolerances, or to adjust them to match those tolerances. Furthermore, it becomes possible to reduce the temperature-related design margin of semiconductor devices, thereby reducing manufacturing costs.

[0007] In general, the method according to the present invention can be used for a larger number of semiconductor devices, and it should be noted that it is not limited to the two semiconductor devices described above, for example. That is, the method according to the present invention can advantageously be used to match and adjust the temperature and / or service life of, for example, three, four or more semiconductor devices.

[0008] Furthermore, the method according to the present invention can be applied to semiconductor elements connected in parallel and / or in series. The cited claims illustrate preferred improved forms of the present invention.

[0009] The reference temperature is a predetermined absolute temperature, which can be set, for example, statically or dynamically. Static setting is performed, for example, based on the characteristic quantities of the semiconductor device and / or the field of use of the semiconductor device and the associated expected boundary conditions (e.g., ambient temperature range). Dynamic setting is performed, preferably iteratively and / or taking into account the current measured quantities of the semiconductor device and / or the current operating conditions and / or the current boundary conditions, so that a context-adjusted, preferably context-optimally adjusted, reference temperature is always available. Alternatively, the reference temperature is a relative temperature to a first temperature and a second temperature, in particular the average value of the first temperature and the second temperature, but not limited to averaging as an exclusive means of canceling out the two temperature values. The relative reference temperature is advantageously determined after the first temperature and the second temperature have been determined, so that subsequent method steps for calculating each temperature deviation from the reference temperature are always performed based on the currently determined reference temperature. However, to reduce the measurement and / or calculation process, it is also conceivable to newly calculate the reference temperature less frequently than the determination of the first and second temperatures.

[0010] In a particularly advantageous embodiment of the present invention, the first and second semiconductor elements are parallel-connected semiconductor elements used particularly for high-power switching. Each semiconductor element is, for example, an individual voltage-transfer semiconductor such as a SiCMOSFET, or a different semiconductor. Alternatively, each semiconductor element is configured as a semiconductor module (particularly a power module) having a plurality of (particularly parallel-connected) individual voltage-transfer semiconductors. Temperature and / or service life matching adjustments for each semiconductor element can be applied accordingly both between individual semiconductors and between the plurality of semiconductor modules.

[0011] Advantageously, the first and second temperatures are determined by a temperature sensor and / or a thermosensitive parameter and / or a temperature observer, respectively. The key here is that the temperature of each semiconductor element can be determined separately from each other with the required precision.

[0012] In a further advantageous embodiment of the present invention, the order in which the gate voltages of each semiconductor element are adjusted is set according to the level of their respective temperature deviations, with the gate voltage of the semiconductor element having the largest temperature deviation being adjusted first. Alternatively or additionally, after each gate voltage has been adjusted, at least one gate voltage of the semiconductor element is approximately equivalent to a predetermined maximum allowable gate voltage of each semiconductor element. This minimizes the total power loss for all semiconductor elements involved in the method according to the present invention when adjusting the temperature deviations of each semiconductor element simultaneously.

[0013] Advantageously, the first gate voltage of the first semiconductor element and / or the second gate voltage of the second semiconductor element are continuously adjusted by a predetermined voltage stroke (which may be a positive or negative voltage stroke relative to the current gate voltage). Such continuous adjustment is achieved by iteratively performing the method according to the present invention, which is performed, for example, at predetermined and / or dynamically adjusted time intervals during each operating cycle. Alternatively or additionally, iterative performance is performed in response to the occurrence of a predetermined event. Alternatively or additionally, the first gate voltage of the first semiconductor element and / or the second gate voltage of the second semiconductor element are adjusted based on the current gate voltage or based on a predetermined maximum allowable gate voltage of each semiconductor element.

[0014] Alternatively or additionally, each voltage stroke can be set according to the level of influence that the gate voltage change has on the respective channel resistance of the semiconductor element, and / or according to the level of the respective temperature deviation from the reference temperature (for example, a larger stroke is used when the deviation is large). In connection with this, it is also conceivable to adjust the given voltage stroke according to further boundary conditions. Furthermore, it is also possible to use individually adjusted voltage strokes for each semiconductor element.

[0015] Advantageously, the gate voltage is set at the start of each operating cycle of each semiconductor device based on a predetermined gate voltage value and / or based on the history of gate voltage values ​​from at least one previous operating cycle. Alternatively or additionally, each gate voltage is set based on the remaining service life of each semiconductor device and / or based on current boundary conditions. Boundary conditions include, for example, the current temperature of the semiconductor device and / or the current temperature of the cooling water used to cool the semiconductor device.

[0016] In a further advantageous embodiment of the present invention, the method further comprises determining the remaining service life of each semiconductor element based on the temperature deviation history of each semiconductor element, and taking into consideration the remaining service life when adjusting the gate voltage and / or setting the reference temperature and / or setting the maximum allowable temperature deviation from the reference temperature. This makes it possible, for example, to alleviate the load on semiconductor elements with a short remaining service life.

[0017] According to a second aspect of the present invention, a temperature control device for semiconductor elements is proposed. This device comprises a first semiconductor element, a second semiconductor element, a first gate driver, a second gate driver, and an evaluation unit. The first and second semiconductor elements are, for example, power semiconductors such as SiCMOSFETs, or different semiconductors or semiconductor modules, respectively. The evaluation unit is formed as, for example, an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Grid Array), a processor, a digital signal processor, a microcontroller, etc., and is configured to determine a first temperature of the first semiconductor element and a second temperature of the second semiconductor element. The first and second temperatures are determined directly and / or indirectly, for example, by their respective temperature sensors and / or based on temperature-sensitive parameters and / or based on temperature observers, as described above. When temperature sensors are used to determine the temperature of each semiconductor element, the temperature sensors are, for example, locally and thermally directly coupled to each semiconductor element. Alternatively or additionally, the temperature of each semiconductor element may be determined via a temperature sensor placed in a coolant circuit for cooling each semiconductor element. The evaluation unit is further configured to calculate a first temperature deviation representing a first temperature deviation from a reference temperature and a second temperature deviation representing a second temperature deviation from the reference temperature. Furthermore, the evaluation unit is configured such that a first gate driver adjusts the first gate voltage of a first semiconductor element and / or a second gate driver adjusts the second gate voltage of a second semiconductor element until the first and second temperature deviations are less than or equal to a predetermined maximum allowable temperature deviation from the reference temperature, the adjustment of the gate voltages being suitable for changes in the power loss of each semiconductor element. Furthermore, each gate voltage is adjusted only if it does not exceed a predetermined allowable control range for each gate voltage, and only if the first and / or second temperatures are greater than the reference temperature.It should be noted that the evaluation unit, the first gate driver, and the second gate driver may be separate components or common integrated components configured, for example, based on a single ASIC. The features, combinations of features, and the resulting advantages clearly correspond to those described in relation to the first embodiment of the invention; therefore, please refer to the above description to avoid repetition. [Brief explanation of the drawing]

[0018] Embodiments of the present invention will be described in detail below with reference to the attached drawings. [Figure 1] This is a circuit diagram of an exemplary embodiment of the apparatus according to the present invention. [Figure 2a] This is the result of an initial implementation of the method according to the present invention. [Figure 2b] This is the result of further implementation of the method according to the present invention. [Modes for carrying out the invention]

[0019] Figure 1 is a circuit diagram of an exemplary embodiment of the apparatus according to the present invention. The apparatus has a first MOSFET 10, a second MOSFET 20, and a third MOSFET 30, the control input section (i.e., its gate terminals) of which are electrically connected to the corresponding gate drivers 50, 52, and 54 of the respective MOSFETs 10, 20, and 30. The gate drivers 50, 52, and 54 are connected to an evaluation unit 40 by information processing technology, which is configured here as an ASIC and is configured to independently drive and control the gate drivers 50, 52, and 54 to adjust the respective gate voltages Vg1, Vg2, and Vg3 of the respective MOSFETs 10, 20, and 30 by connecting to the gate drivers 50, 52, and 54.

[0020] The apparatus according to the present invention is connected to MOSFETs 10, 20, and 30 and is configured to switch an externally supplied load current i that can flow between the first terminal 60 and the second terminal 65 of the apparatus according to the present invention.

[0021] Furthermore, the device according to the present invention has first temperature sensors T1, second temperature sensors T2, and third temperature sensors T3 that are thermally coupled to the corresponding MOSFETs 10, 20, 30, respectively.

[0022] Based on the above configuration, the evaluation unit 40 identifies the first, second, and third temperatures of the respective MOSFETs 10, 20, 30, and calculates a first temperature deviation representing the deviation of the first temperature from the reference temperature, a second temperature deviation representing the deviation of the second temperature from the reference temperature, and a third temperature deviation representing the deviation of the third temperature from the reference temperature. In this case, the reference temperature is calculated as the average value of the measured first temperature, second temperature, and third temperature.

[0023] Furthermore, based on the above configuration, the evaluation unit 40 adjusts the first gate voltage Vg1 of the first MOSFET 10 and / or the second gate voltage Vg2 of the second MOSFET 20 and / or the third gate voltage Vg3 of the third MOSFET 30 until the first temperature deviation, the second temperature deviation, and the third temperature deviation are below a predetermined maximum allowable temperature deviation from the reference temperature. The adjustment of the gate voltages Vg1, Vg2, Vg3 is suitable for changes in the power losses of the respective MOSFETs 10, 20, 30, and the adjustment of the respective gate voltages Vg1, Vg2, Vg3 is performed only when the predetermined allowable control range of the gate voltages Vg1, Vg2, Vg3 is not exceeded and when the first temperature and / or the second temperature and / or the third temperature is greater than the reference temperature.

[0024] FIG. 2a shows the results of the initial execution of the method according to the present invention. The black circles represent the results of identifying the respective gate voltages Vg1, Vg2, Vg3 for a plurality of parallel-connected MOSFETs 10, 20, 30 by the method according to the present invention described above. The respective gate voltages Vg1, Vg2, Vg3 correspond to the respective MOSFETs 10, 20, 30 shown on the horizontal axis.

[0025] Before the first execution of the method according to the present invention, all MOSFETs 10, 20, 30 were driven and controlled by a predetermined standard gate voltage value Vgstd that is between a predetermined maximum gate voltage Vgmax and a predetermined minimum gate voltage Vgmin. This value is indicated by an unfilled circle within the visible range. During the drive control of MOSFETs 10, 20, 30 using the method according to the present invention, there is an unacceptable high temperature deviation from a predetermined reference temperature of MOSFETs 10, 20, 30.

[0026] Therefore, in the first execution of the method according to the present invention, the gates of MOSFETs 10, 20, 30 having the highest excess value of the temperature value with respect to the reference temperature are driven and controlled by the maximum gate voltage Vgmax. In this case, since the first MOSFET 10 corresponds to this largest temperature deviation, first the current gate voltage Vg1 of the first MOSFET 10 is adjusted accordingly. As a result, the channel resistance of the first MOSFET 10 decreases, and the power loss generated by the first MOSFET 10 is minimized, whereby the temperature deviation from the reference value decreases over time.

[0027] The gate voltages of the second MOSFET 20 and the third MOSFET 30 are not yet adjusted during the first execution of the method according to the present invention because the order of adjustment is based on the level of each temperature deviation. Therefore, their gate voltages Vg2, Vg3 are still the predetermined standard gate voltage Vgstd. The horizontal axis also shows the time sequence of the adjustment process of each voltage value Vg1, Vg2, Vg3 in addition to each MOSFET 10, 20, 30.

[0028] Figure 2b shows the result of a further execution of the method according to the present invention. Therefore, Figure 2b represents the time range after the time range represented by Figure 2a. To avoid repetition, only the differences from Figure 2a will be described below.

[0029] Figure 2b shows that, in a further implementation of the method according to the present invention, in addition to further adjustment of the first gate voltage Vg1, adjustments were also made to the second gate voltage Vg2 and the third gate voltage Vg3. The adjustments to the gate voltages Vg1, Vg2, and Vg3 are made stepwise, taking into account a predetermined voltage stroke determined according to their respective initial temperature deviations.

[0030] By adjusting the first gate voltage Vg1, the second gate voltage Vg2, and the third gate voltage Vg3, it is achieved that the temperatures of all MOSFETs 10, 20, and 30 are within the maximum allowable temperature deviation relative to the reference temperature, while at the same time, the individual temperatures of MOSFETs 10, 20, and 30 best approximate each other. Therefore, since the temperature load on each MOSFET 10, 20, and 30 becomes uniform, it is expected that their individual service lives will be approximate, and consequently, an increase in the overall service life and high performance of the circuit formed by MOSFETs 10, 20, and 30 is expected.

Claims

1. A method for adjusting the temperature of a semiconductor element (10, 20), comprising: - determining a first temperature of the first semiconductor element (10) and a second temperature of the second semiconductor element (20); calculating a first temperature deviation representative of the deviation of said first temperature from a reference temperature and a second temperature deviation representative of the deviation of said second temperature from said reference temperature; adjusting a first gate voltage (Vg1) of the first semiconductor element (10) and / or adjusting a second gate voltage (Vg2) of the second semiconductor element (20) until the first temperature deviation and the second temperature deviation are equal to or less than a predetermined maximum allowable temperature deviation from the reference temperature, wherein the adjustment of the gate voltages (Vg1, Vg2) is adapted to a change in the power loss of the respective semiconductor element (10, 20); The adjustment of each of the gate voltages (Vg1, Vg2) is as follows: - if the predetermined allowable control range of the gate voltages (Vg1, Vg2) is not exceeded, and - only if said first temperature and / or said second temperature is greater than said reference temperature, method.

2. The reference temperature is - at a given absolute temperature, a relative temperature to the first and second temperatures, in particular the average value of the first and second temperatures, The method of claim 1.

3. The first semiconductor element (10) and the second semiconductor element (20) are - parallel-connected semiconductor elements (10, 20), and / or - individual voltage transfer semiconductors or semiconductor modules each having a number of individual voltage transfer semiconductors, The method of claim 1.

4. The first temperature and the second temperature are respectively temperature sensors (T1, T2), and / or temperature-sensitive parameters, and / or - temperature observer, Identified by The method of claim 1.

5. the order in which the gate voltages (Vg1, Vg2) of the respective semiconductor elements (10, 20) are adjusted is determined according to the level of the respective temperature deviation, with the gate voltage (Vg1, Vg2) of the semiconductor element (10, 20) with the greatest temperature deviation being adjusted first; and / or after the respective gate voltages (Vg1, Vg2) have been adjusted, at least one gate voltage (Vg1, Vg2) of the semiconductor element (10, 20) corresponds approximately to a predetermined maximum allowable gate voltage (Vgmax) of the respective semiconductor element (10, 20); The method of claim 1.

6. The first gate voltage (Vg1) of the first semiconductor element (10) and / or the second gate voltage (Vg2) of the second semiconductor element (20) are - continuously adjusted by a predetermined voltage stroke, and / or - adjusted based on the current gate voltage (Vg1, Vg2) or based on a predetermined maximum allowable gate voltage (Vgmax) of said respective semiconductor element (10, 20); The method of claim 1.

7. The voltage stroke is - depending on the level of influence that a change in gate voltage has on the channel resistance of each of said semiconductor components (10, 20); and / or - set according to the level of the respective temperature deviation from said reference temperature, The method of claim 6.

8. At the start of each operating cycle of each of the semiconductor devices (10, 20), the gate voltages (Vg1, Vg2) are: based on a predetermined gate voltage value, and / or based on a history of gate voltage values ​​from at least one previous operating cycle; and / or based on the remaining useful life of each of said semiconductor elements (10, 20), and / or - set based on the current boundary conditions, The method of claim 1.

9. - determining the remaining useful life of each of said semiconductor elements (10, 20) based on the history of temperature deviations of said respective semiconductor elements (10, 20); taking into account the remaining useful life of each of the gate electrodes when adjusting the gate voltages (Vg1, Vg2), and / or when setting the reference temperature, and / or when setting the maximum allowable temperature deviation from the reference temperature; The method of claim 1.

10. A temperature adjustment device for a semiconductor element (10, 20), a first semiconductor element (10), a second semiconductor element (20), a first gate driver (50), a second gate driver (52), an evaluation unit (40), said evaluation unit (40) - determining a first temperature of the first semiconductor element (10) and a second temperature of the second semiconductor element (20); calculating a first temperature deviation representing the deviation of said first temperature from a reference temperature and a second temperature deviation representing the deviation of said second temperature from said reference temperature; - adjusting a first gate voltage (Vg1) of the first semiconductor element (10) and / or adjusting a second gate voltage (Vg2) of the second semiconductor element (20) until the first temperature deviation and the second temperature deviation are equal to or less than a predetermined maximum allowable temperature deviation from the reference temperature, wherein the adjustment of the gate voltages (Vg1, Vg2) is adapted to a change in the power dissipation of the respective semiconductor element (10, 20); The adjustment of the respective gate voltages (Vg1, Vg2) is - the predetermined allowable control range of the respective gate voltages (Vg1, Vg2) is not exceeded, and - only if said first temperature and / or said second temperature is greater than said reference temperature, Device.

Images