Image sensor

Abstract

To provide an image sensor.SOLUTION: An image sensor includes a pixel, a rear side anti-reflective layer on the pixel, a color filter on the rear side anti-reflective layer, a color filter cover layer on the color filter, a passivation layer on the color filter cover layer, a microlens on the passivation layer, a first capping layer on the microlens, and a second capping layer on the first capping layer.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The present invention relates to an image sensor, and more particularly to a complementary metal-oxide semiconductor (CMOS) image sensor. [Background technology]

[0002] Image sensors, such as CMOS image sensors, which capture images and convert them into electrical signals, can be used in consumer electronics devices such as digital cameras, cell phone cameras, and portable camcorders, as well as cameras mounted on automobiles, security devices, and robots.

[0003] The image sensor includes a plurality of pixels that are two-dimensionally arranged, and as the performance and integration of the image sensor increases, the size of the plurality of pixels decreases. Summary of the Invention [Problem to be solved by the invention]

[0004] The problem that the present invention seeks to solve is to provide an image sensor with improved image quality and reduced size. [Means for solving the problem]

[0005] In order to solve the above-mentioned problems, the technical idea of ​​the present invention provides an image sensor comprising: a pixel; a back anti-reflective layer disposed on the pixel; a color filter disposed on the back anti-reflective layer; a color filter cover layer disposed on the color filter; a passivation layer disposed on the color filter cover layer; a microlens disposed on the passivation layer; a first capping layer disposed on the microlens; and a second capping layer disposed on the first capping layer.

[0006] In order to solve the above-mentioned problems, another technical idea of ​​the present invention provides an image sensor including: a first pixel; a second pixel horizontally spaced apart from the first pixel; a pixel separating structure disposed between the first pixel and the second pixel; a back anti-reflective layer disposed on the first pixel, the second pixel, and the pixel separating structure; a color filter disposed on the back anti-reflective layer, the color filter including a first color filter disposed on the first pixel and a second color filter disposed on the second pixel; a color filter cover layer disposed on the color filter; a passivation layer disposed on the color filter cover layer; a microlens disposed on the passivation layer; a first capping layer disposed on the microlens; and a second capping layer disposed on the first capping layer, wherein the color filter cover layer is conformally coated on the color filter.

[0007] In order to achieve the above object, yet another technical idea of ​​the present invention provides an image sensor including: a first pixel; a second pixel disposed horizontally apart from the first pixel; a pixel separating structure disposed between the first pixel and the second pixel; a first back anti-reflective layer disposed on the first pixel, the second pixel, and the pixel separating structure; a fence disposed on the first back anti-reflective layer and aligned with the pixel separating structure; a second back anti-reflective layer on the first back anti-reflective layer and the fence; a color filter disposed on the second back anti-reflective layer, the color filter including a first color filter disposed on the first pixel and a second color filter disposed on the second pixel; a color filter cover layer disposed on the color filter; a passivation layer disposed on the color filter cover layer; a microlens disposed on the passivation layer; a first capping layer disposed on the microlens; and a second capping layer disposed on the first capping layer, Effect of the Invention

[0008] Since the image sensor according to the present invention includes a color filter cover layer disposed on the color filter, the thickness of the passivation layer can be reduced and the size can be reduced.

[0009] Since the image sensor according to the present invention includes a double capping layer on the microlens, it can protect the microlens against external contamination, and the image quality and reliability can be improved. [Brief description of the drawings]

[0010] [Figure 1] 1 is a schematic block diagram of an image sensor according to an embodiment of the present invention; [Diagram 2]2 is a circuit diagram of a pixel included in an image sensor according to an embodiment of the present invention. [Diagram 3] 1 is a plan view showing the layout of an image sensor according to an embodiment of the present invention; [Figure 4] 4 is a cross-sectional view of the image sensor taken along line AA' in FIG. [Diagram 5] 5 is a close-up view of the image sensor in region C of FIG. 4 according to one embodiment of the present invention. [Figure 6] 1 is a cross-sectional view of an image sensor according to one embodiment of the present invention; [Figure 7A] 1A to 1C are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment of the present invention. [Figure 7B] 1A to 1C are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment of the present invention. [Figure 7C] 1A to 1C are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment of the present invention. [Figure 7D] 1A to 1C are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment of the present invention. [Figure 7E] 1A to 1C are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment of the present invention. [Figure 7F] 1A to 1C are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment of the present invention. [Figure 7G] 1A to 1C are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment of the present invention. [Figure 8A] 1A to 1C are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment of the present invention. [Figure 8B] 1A to 1C are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment of the present invention. [Figure 9] 1 is a block diagram showing a configuration of an image sensor according to an embodiment of the present invention; [Figure 10] 1 is a diagram illustrating the configuration of a camera using an image sensor according to an embodiment of the present invention. [Figure 11]1 is a block diagram of an imaging system including an image sensor according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The same reference numerals are used to refer to the same elements in the drawings, and redundant description thereof will be omitted.

[0012] FIG. 1 is a schematic block diagram of an image sensor according to one embodiment of the present invention.

[0013] 1, the image sensor 100 is also a stacked type image sensor including a first substrate 2 and a second substrate 7. The image sensor 100 is also a CMOS image sensor. The technical ideas of the present invention described with reference to FIGS. 2 to 8B are mainly applicable to the first substrate 2.

[0014] The image sensor 100 may be constructed by stacking and bonding a first substrate 2 on a second substrate 7. The first substrate 2 also serves as a sensor substrate including pixel circuits. The second substrate 7 has a logic circuit formed thereon for driving the pixel circuits, and also serves as a support substrate for supporting the first substrate 2. The first substrate 2 and the second substrate 7 are electrically connected to each other.

[0015] More specifically, a pixel array region 4 in which unit pixels PX (or unit pixels) including photoelectric conversion regions are regularly arranged two-dimensionally is provided on the first substrate 2. In the pixel array region 4, pixel driving lines 5 are wired in the row direction, and vertical signal lines 6 are wired in the column direction.

[0016] One unit pixel PX is arranged in a state of being connected to one pixel drive line 5 and one vertical signal line 6. Each unit pixel PX may be provided with a photoelectric conversion unit, and a pixel circuit constituted by a charge storage unit, a transistor, for example, a MOS (metal oxide semiconductor) transistor, and / or a capacitance element.

[0017] The second substrate 7 may be provided with logic circuits such as a vertical drive circuit 8 for driving each unit pixel PX provided on the first substrate 2, a column signal processing circuit 9, a horizontal drive circuit 11, and a system control circuit 13. The image sensor 100 outputs a voltage Vout (output voltage) via the horizontal drive circuit 11.

[0018] FIG. 2 is a circuit diagram of a pixel included in an image sensor according to one embodiment of the present invention.

[0019] 2, a plurality of pixels PX are arranged in a matrix or array in the image sensor 100. Each of the pixels PX includes a transmission transistor TX and logic transistors RX, SX, and DX.

[0020] The logic transistors RX, SX, and DX include a reset transistor RX, a selection transistor SX, and a drive transistor DX (or a source follower transistor). The reset transistor RX includes a reset gate RG, the selection transistor SX includes a selection gate SG, and the transmission transistor TX includes a transmission gate TG.

[0021] Each of the pixels PX includes a photoelectric conversion element PD and a floating diffusion region FD. The photoelectric conversion element PD also corresponds to the photoelectric conversion region described in Figures 3 to 8B. The photoelectric conversion element PD can generate and accumulate photocharges in proportion to the amount of incident light from the outside, and a photodiode, a phototransistor, a photogate, a pinned photodiode (PPD), or a combination thereof can be used.

[0022] The transmission transistor TX may be operated by a transmission control signal transmitted to the transmission gate TG. The transmission gate TG may transmit charges generated in the photoelectric conversion element PD to the floating diffusion region FD. The floating diffusion region FD may transmit and cumulatively store the charges generated in the photoelectric conversion element PD. The charges generated in the photoelectric conversion element PD may be transmitted to and accumulated in the floating diffusion region FD by the transmission transistor TX. The drive transistor DX may be controlled according to the amount of photocharges accumulated in the floating diffusion region FD.

[0023] The reset transistor RX can periodically reset the charge stored in the floating diffusion region FD. The reset transistor RX can be operated by a reset control signal transmitted through a reset gate RG. The drain electrode of the reset transistor RX is connected to the floating diffusion region FD, and the source electrode is connected to a power supply voltage VDD.

[0024] When the reset transistor RX is turned on by the reset control signal, the power supply voltage VDD connected to the source electrode of the reset transistor RX is transferred to the floating diffusion region FD. When the reset transistor RX is turned on, charges accumulated in the floating diffusion region FD are discharged and the floating diffusion region FD is reset. The reset transistor RX can reset the voltage of the floating diffusion region FD to the power supply voltage VDD.

[0025] The drive transistor DX is connected to a current source (not shown) located outside the pixels PX and functions as a source follower buffer amplifier. The drive transistor DX amplifies the charge stored in the floating diffusion region FD and transmits it to the selection transistor SX. The drive transistor DX amplifies the potential change in the floating diffusion region FD and outputs it as an output voltage Vout.

[0026] The selection transistor SX can select a plurality of pixels PX in units of a row. The selection transistor SX can select a unit pixel by a selection control signal transmitted to a selection gate SG. When the selection transistor SX is turned on, a power supply voltage VDD is transmitted to a source electrode of the selection transistor SX. The selection transistor SX is operated by the selection control signal and can perform a switching operation and an addressing operation. When the selection control signal is applied to the selection transistor SX, the selection transistor SX can output an output voltage Vout connected to the unit pixel.

[0027] Fig. 3 is a plan view of an image sensor according to an embodiment of the present invention. Fig. 4 is a cross-sectional view of the image sensor taken along line A-A' in Fig. 3. Fig. 5 is an enlarged view of an image sensor in region C in Fig. 4 according to an embodiment of the present invention. For convenience, Fig. 3 exemplarily illustrates only first to fourth pixels PX1, PX2, PX3, and PX4n on pixel separating structure 150.

[0028] 2 to 5, the image sensor 100 also includes a substrate 110, a photoelectric conversion region 120, a transmission gate TG, a front structure 130, a supporting substrate 140, a pixel separating structure 150, a first back anti-reflective layer 162, a fence 163, a second back anti-reflective layer 164, a barrier metal layer 166, a third back anti-reflective layer 161, a color filter cover layer 165, a passivation layer 167, a color filter 170, a microlens 180, a first capping layer 191 and a second capping layer 192. The substrate 110 in FIGS. 3 to 5 also corresponds to the first substrate 2 in FIG. 1, and the supporting substrate 140 in FIGS. 3 to 5 also corresponds to the second substrate 7 in FIG. 1.

[0029] The substrate 110 includes a first surface 110F1 and a second surface 110F2. In an exemplary embodiment, the substrate 110 may include a semiconductor material such as a group IV semiconductor material, a group III-V semiconductor material, or a group II-VI semiconductor material. The group IV semiconductor material may include, for example, silicon (Si), germanium (Ge), or silicon (Si)·germanium (Ge). The group III-V semiconductor material may include, for example, gallium arsenide (GaAs), indium phosphide (InP), gallium phosphide (GaP), indium arsenide (InAs), indium antimony (InSb), or indium gallium arsenide (InGaAs). The group II-VI semiconductor material may include, for example, zinc telluride (ZnTe) or cadmium sulfide (CdS).

[0030] The substrate 110 includes a P-type semiconductor substrate. For example, the substrate 110 is a P-type silicon substrate. In an exemplary embodiment, the substrate 110 includes a P-type bulk substrate and a P-type or N-type epilayer grown thereon. In other embodiments, the substrate 110 can include an N-type bulk substrate and a P-type or N-type epilayer grown thereon. Alternatively, the substrate 110 can be an organic plastic substrate.

[0031] The photoelectric conversion region 120 is disposed in the substrate 110. In the photoelectric conversion region 120, an optical signal is converted into an electrical signal. The photoelectric conversion region 120 includes a photodiode region (not shown) and a well region (not shown) formed inside the substrate 110. The photoelectric conversion region 120 is also an impurity region doped with impurities of a conductivity type opposite to that of the substrate 110.

[0032] The transmission gate TG is disposed in the substrate 110. The transmission gate TG extends from the first surface 110F1 of the substrate 110 into the substrate 110. The transmission gate TG is also a part of a transmission transistor TX (see FIG. 2). On the first surface 110F1 of the substrate 110, for example, a transmission transistor TX configured to transmit charges generated in the photoelectric conversion region 120 to the floating diffusion region FD, a reset transistor RX configured to periodically reset the charges stored in the floating diffusion region FD, a drive transistor DX configured to act as a source follower buffer amplifier and buffer a signal according to the charges stored in the floating diffusion region, and a selection transistor SX configured to act as a switching and addressing transistor for selecting a plurality of pixels PX are formed.

[0033] Although not shown in FIG. 4, an isolation layer (not shown) defining an active region (not shown) and a floating diffusion region FD may be further formed on the first surface 110F1 of the substrate 110.

[0034] The photoelectric conversion region 120, the transmission gate TG, the plurality of transistors, and the floating diffusion region may form a pixel PX. The components of the pixel PX will be described in more detail below with reference to FIG.

[0035] The pixels PX are arranged two-dimensionally. For example, the second pixel PX2 and the third pixel PX3 are spaced apart from the first pixel PX1 in a first horizontal direction (X direction), and the fourth pixel PX4 is spaced apart from the third pixel PX3 in a second horizontal direction (Y direction). The fourth pixel PX4 is spaced apart from the second pixel PX2 in a diagonal direction (D direction). In some embodiments, the first horizontal direction (X direction) is perpendicular to the second horizontal direction (Y direction). In some embodiments, the diagonal direction (D direction) is oblique to the first horizontal direction (X direction) and the second horizontal direction (Y direction). In some embodiments, the diagonal direction (D direction) forms an angle of 45° with the first horizontal direction (X direction) and the second horizontal direction (Y direction). However, in other embodiments, the diagonal direction (D direction) may form an angle different from the first horizontal direction (X direction) and the second horizontal direction (Y direction).

[0036] The pixel separating structure 150 penetrates the substrate 110 and can physically and electrically separate one pixel PX from an adjacent pixel PX, for example, the third pixel PX3 from the second pixel PX2, and the third pixel PX3 from the fourth pixel PX4. In a plan view, the pixel separating structure 150 is also arranged in a mesh or grid shape. That is, the pixel separating structure 150 extends between a plurality of pixels PX. For example, the pixel separating structure 150 extends between the first pixel PX1 and the second pixel PX2, between the first pixel PX1 and the third pixel PX3, between the second pixel PX2 and the fourth pixel PX4, and between the third pixel PX3 and the fourth pixel PX4. As shown in FIG. 4, the pixel separating structure 150 extends from the first surface 110F1 to the second surface 110F2 of the substrate 110.

[0037] The pixel separating structure 150 includes a conductive layer 152 and an insulating liner 154. The conductive layer 152 and the insulating liner 154 may each penetrate the substrate 110 from the first side 110F1 to the second side 110F2 of the substrate 110. The insulating liner 154 may be disposed between the substrate 110 and the conductive layer 152 and electrically isolate the conductive layer 152 from the substrate 110. In an exemplary embodiment, the conductive layer 152 may include a conductive material such as polysilicon or a metal. The insulating liner 154 may include a metal oxide such as hafnium oxide, aluminum oxide, or tantalum oxide, in which case the insulating liner 154 may act as a negative fixed charge layer. In other embodiments, the insulating liner 154 may also include an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0038] A front side structure 130 is disposed on the first surface 110F1 of the substrate 110. The front side structure 130 includes a wiring layer 134 and an insulating layer 136. The insulating layer 136 can electrically isolate the wiring layer 134 from the first surface 110F1 of the substrate 110.

[0039] The wiring layer 134 is electrically coupled to the transistors on the first surface 110F1 of the substrate 110. The wiring layer 134 may include tungsten, aluminum, copper, tungsten silicide, titanium silicide, tungsten nitride, titanium nitride, doped polysilicon, etc. The insulating layer 136 may include an insulating material such as silicon oxide, silicon nitride, silicon oxynitride, a low-k material, etc. The low dielectric material may include, but is not limited to, at least one of, for example, FOX (Flowable Oxide), TOSZ (Torene Silazene), USG (Undoped Silica Glass), BSG (Borosilica Glass), PSG (Phosphosilica Glass), BPSG (Borophosphosilica Glass), PETEOS (Plasma Enhanced Tetra Ethyl Ortho Silicate), FSG (Fluoride Silicate Glass), CDO (Carbon Doped Silicon Oxide), xerogel, aerogel, amorphous fluorinated carbon, OSG (Organo Silicate Glass), parylene, bis-benzocyclobutene (BCB), silk, polyimide, porous polymer materials, and combinations thereof.

[0040] Optionally, a support substrate 140 is disposed on the front structure 130. An adhesive member (not shown) may be further disposed between the support substrate 140 and the front structure 130.

[0041] The first back antireflective layer 162 is disposed on the second surface 110F2 of the substrate 110. That is, the first back antireflective layer 162 is disposed on all of the pixels PX and the pixel separating structure 150. In some embodiments, the first back antireflective layer 162 also includes hafnium oxide. In other embodiments, the first back antireflective layer 162 includes silicon nitride (SiN), aluminum oxide (Al 2 O 3 ), zirconium oxide (ZrO 2 ), tantalum oxide (Ta2 O 5 ), titanium dioxide (TiO 2 ), lanthanum oxide (La 2 O 3 ), praseodymium oxide (Pr 2 O 3 ), cerium oxide (CeO 2 ), neodymium oxide (Nd 2 O 3 ), promethium oxide (Pm 2 O 3 ), samarium oxide (Sm 2 O 3 ), europium oxide (Eu 2 O 3 ), gadolinium oxide (Gd 2 O 3 ), terbium oxide (Tb 2 O 3 ), dysprosium oxide (Dy 2 O 3 ), Holmium oxide (Ho 2 O 3 ), thulium oxide (Tm 2 O 3 ), ytterbium oxide (Yb 2 O 3 ), lutetium oxide (Lu 2 O 3 ) or yttrium oxide (Y 2 O 3 ).

[0042] The fence 163 is disposed on the first back anti-reflective layer 162. The fence 163 overlaps with the pixel separating structure 150 in the vertical direction (Z direction) in a plan view. That is, the fence 163 extends along between the pixels PX in a plan view. For example, in a plan view, the fence 163 extends between the first pixel PX1 and the second pixel PX2, between the first pixel PX1 and the third pixel PX3, between the second pixel PX2 and the fourth pixel PX4, and between the third pixel PX3 and the fourth pixel PX4.

[0043] In some embodiments, the fence 163 also includes a low refractive index material. For example, the low refractive index material can have a refractive index greater than about 1.0 and less than or equal to about 1.4. In exemplary embodiments, the low refractive index material can include polymethylmethacrylate (PMMA), silicon acrylate, cellulose acetate butyrate (CAB), silica, or fluoro-silicon acrylate (FSA). For example, the low refractive index material can be silica (SiO x ) The particles may comprise a dispersed polymeric material.

[0044] When the fence 163 includes a low refractive index material having a relatively low refractive index, light incident toward the fence 163 is totally reflected and directed toward the center of the pixel PX. The fence 163 can prevent light obliquely incident inside the color filter 170 arranged on one pixel PX from entering the color filter 170 arranged on an adjacent pixel PX, thereby preventing crosstalk between multiple pixels PX.

[0045] The second back surface antireflective layer 164 is disposed on the first back surface antireflective layer 162 and the fence 163. That is, the second back surface antireflective layer 164 can cover the first back surface antireflective layer 162 and the fence 163. Specifically, the second back surface antireflective layer 164 is disposed on the upper surface of the first back surface antireflective layer 162, the side surface of the fence 163, and the upper surface of the fence 163.

[0046] The second back antireflective layer 164 also includes silicon oxide in some embodiments. In other embodiments, the second back antireflective layer 164 includes silicon nitride (SiN), hafnium oxide (HfO 2 ), aluminum oxide (Al 2 O 3 ), zirconium oxide (ZrO 2 ), tantalum oxide (Ta 2 O 5 ), titanium dioxide (TiO 2), lanthanum oxide (La 2 O 3 ), praseodymium oxide (Pr 2 O 3 ), cerium oxide (CeO 2 ), neodymium oxide (Nd 2 O 3 ), promethium oxide (Pm 2 O 3 ), samarium oxide (Sm 2 O 3 ), europium oxide (Eu 2 O 3 ), gadolinium oxide (Gd 2 O 3 ), terbium oxide (Tb 2 O 3 ), dysprosium oxide (Dy 2 O 3 ), Holmium oxide (Ho 2 O 3 ), thulium oxide (Tm 2 O 3 ), ytterbium oxide (Yb 2 O 3 ), lutetium oxide (Lu 2 O 3 ) or yttrium oxide (Y 2 O 3 ).

[0047] A barrier metal layer 166 is disposed on the underside of fence 163. That is, barrier metal layer 166 is disposed between fence 163 and first back surface antireflective layer 162. In some embodiments, barrier metal layer 166 also includes a barrier metal such as titanium nitride.

[0048] The third back antireflective layer 161 is disposed between the first back antireflective layer 162 and the pixel PX, and between the first back antireflective layer 162 and the pixel separating structure 150. That is, the third back antireflective layer 161 is disposed between the first back antireflective layer 162 and the substrate 110. In some embodiments, the third back antireflective layer 161 also includes aluminum oxide, for example. In other embodiments, the third back antireflective layer 161 is formed of silicon nitride (SiN), hafnium oxide (HfO 2 ), zirconium oxide (ZrO 2 ), tantalum oxide (Ta 2 O 5 ), titanium dioxide (TiO 2 ), lanthanum oxide (La 2 O 3 ), praseodymium oxide (Pr 2 O 3 ), cerium oxide (CeO 2 ), neodymium oxide (Nd 2 O 3 ), promethium oxide (Pm 2 O 3 ), samarium oxide (Sm 2 O 3 ), europium oxide (Eu 2 O 3 ), gadolinium oxide (Gd 2 O 3 ), terbium oxide (Tb 2 O 3 ), dysprosium oxide (Dy 2 O 3 ), Holmium oxide (Ho 2 O 3 ), thulium oxide (Tm 2 O 3 ), ytterbium oxide (Yb 2 O 3 ), lutetium oxide (Lu 2 O 3 ) or yttrium oxide (Y 2 O 3 ).

[0049] The color filter cover layer 165 is disposed to cover a portion of the top surface and side surfaces of each of the plurality of color filters 170. For example, the color filter cover layer 165 is disposed to conformally cover a portion of the top surface and side surfaces of each of the plurality of color filters 170. The color filter cover layer 165 can protect the plurality of color filters 170. In some embodiments, the color filter cover layer 165 also includes silicon oxide and / or aluminum oxide. In other embodiments, the color filter cover layer 165 is formed of silicon nitride (SiN), hafnium oxide (HfO 2 ), aluminum oxide (Al 2 O 3 ), zirconium oxide (ZrO 2 ), tantalum oxide (Ta 2 O 5 ), titanium dioxide (TiO 2 ), lanthanum oxide (La 2 O 3 ), praseodymium oxide (Pr 2 O 3 ), cerium oxide (CeO 2 ), neodymium oxide (Nd 2 O 3 ), promethium oxide (Pm 2 O 3 ), samarium oxide (Sm 2 O 3 ), europium oxide (Eu 2 O 3 ), gadolinium oxide (Gd 2 O 3 ), terbium oxide (Tb 2 O 3 ), dysprosium oxide (Dy 2 O 3 ), Holmium oxide (Ho 2 O 3 ), thulium oxide (Tm 2 O 3 ), Ytterbium oxide (Yb 2 O 3 ), lutetium oxide (Lu 2 O 3 ) or yttrium oxide (Y 2 O 3). A first thickness T1, which is the thickness of the color filter cover layer 165 in the vertical direction (Z direction), is, for example, about 5 nm to about 35 nm. The color filter cover layer 165 can have the same first thickness T1 regardless of the thickness of each of the multiple color filters 170 in the vertical direction (Z direction). Also, a first width W1, which is the width of the color filter cover layer 165 in the first horizontal direction (X direction), is, for example, about 5 nm to about 35 nm.

[0050] The passivation layer 167 is disposed on the second back surface anti-reflective layer 164 and the color filter cover layer 165. The passivation layer 167 can protect the first back surface anti-reflective layer 162, the fence 163, the second back surface anti-reflective layer 164, and the color filter cover layer 165. In some embodiments, the passivation layer 167 also includes a resin-based material, such as a styrene-based resin, an acrylic-based resin, a styrene-acrylic copolymer resin, or a siloxane-based resin. The thickness of the passivation layer 167 in the vertical direction (Z direction) also varies depending on the thickness of each of the multiple color filters 170 in the vertical direction (Z direction). For example, the thickness of the passivation layer 167 in the vertical direction (Z direction) is also the second to fourth thicknesses T2, T3, and T4. For example, the second thickness T2 can be between about 50 nm and about 200 nm, the third thickness T3 can be between about 100 nm and 250 nm, and the fourth thickness T4 can be less than or equal to about 50 nm. The lower surface of the passivation layer 167 has a step, and the upper surface of the passivation layer 167 is generally flat.

[0051] The color filters 170 are disposed on the passivation layer 167 and are also separated from each other by the fence 163. In a plan view, the color filters 170 are disposed to correspond to the pixels PX. The color filters 170 may be, for example, a combination of a green filter, a blue filter, and a red filter. In another embodiment, the color filters 170 may be, for example, a combination of cyan, magenta, or yellow.

[0052] The color filters 170 include a first color filter 170-1, a second color filter 170-2, and a third color filter 170-3, each including different filters. For example, the first color filter 170-1 is a green filter, the second color filter 170-2 is a blue filter, and the third color filter 170-3 is a red filter. However, this is merely an example, and the filter combinations of the first to third color filters 170-1, 170-2, and 170-3 may be variously modified. The lower surfaces of the color filters 170 may be located at the same vertical level, and the upper surfaces of the color filters 170 may be located at different vertical levels.

[0053] According to an embodiment of the present invention, the red filter is the thickest, and the green filter is thicker than the blue filter but thinner than the red filter. For example, the blue filter is the thinnest. However, the relationship between the thicknesses of the red filter, the green filter, and the blue filter is not limited thereto and may be variously modified.

[0054] According to an embodiment of the present invention, the third color filter 170-3 has the thickest vertical (Z-direction) thickness, and the second color filter 170-2 has the thinnest vertical (Z-direction) thickness. Therefore, the vertical (Z-direction) thickness of the passivation layer 167 disposed on the third color filter 170-3 is the fourth thickness T4, which is also the thinnest vertical (Z-direction) thickness of the passivation layer 167. In addition, the vertical (Z-direction) thickness of the passivation layer 167 disposed on the second color filter 170-2 is the third thickness T3, which is also the thickest vertical (Z-direction) thickness of the passivation layer 167.

[0055] The microlens 180 is disposed on the color filter 170 and the passivation layer 167. In a plan view, the microlens 180 is disposed to correspond to the pixel PX. The microlens 180 is also transparent. For example, the microlens 180 may have a transmittance of 90% or more for light in the visible light region. The light in the visible light region may have a wavelength of about 380 nm to about 770 nm. In one embodiment of the present invention, the microlens 180 may be formed by reflowing a photoresist. For example, the microlens 180 may include a high refractive index material having a refractive index of about 1.7 or more. In another embodiment, the microlens 180 may be formed of a resin-based material such as a styrene-based resin, an acrylic-based resin, a styrene-acrylic copolymer resin, or a siloxane-based resin. The microlens 180 collects incident light, and the collected light is incident on the photoelectric conversion region 120 through the color filter 170. The microlens 180 can have a fifth thickness T5, which is a thickness in the vertical direction (Z direction). The fifth thickness T5 can also range from about 200 nm to about 500 nm.

[0056] A first capping layer 191 is disposed on the microlenses 180, and a second capping layer 192 is disposed on the first capping layer 191. The second capping layer 192 is formed conformally covering the first capping layer 191. The second capping layer 192 is conformally applied on the first capping layer 191, and can easily protect a trough structure caused by the plurality of microlenses 180 having a curved structure. Therefore, the second capping layer 192 can easily protect the image sensor 100 from external contamination. The second capping layer 192 can have a sixth thickness T6, which is a thickness in a vertical direction (Z direction). The sixth thickness T6 can range from about 5 nm to about 35 nm.

[0057] In some embodiments, the first capping layer 191 also includes a porous material. In some embodiments, the second capping layer 192 also includes silicon oxide and / or aluminum oxide. In other embodiments, the second capping layer 192 also includes silicon nitride (SiN), hafnium oxide (HfO 2 ), zirconium oxide (ZrO 2 ), tantalum oxide (Ta 2 O 5 ), titanium dioxide (TiO 2 ), lanthanum oxide (La 2 O 3 ), praseodymium oxide (Pr 2 O 3 ), cerium oxide (CeO 2 ), neodymium oxide (Nd 2 O 3 ), promethium oxide (Pm 2 O 3 ), samarium oxide (Sm 2 O 3 ), europium oxide (Eu 2 O 3 ), gadolinium oxide (Gd 2 O 3 ), terbium oxide (Tb 2 O 3 ), dysprosium oxide (Dy 2 O 3 ), Holmium oxide (Ho 2 O 3 ), thulium oxide (Tm 2 O 3 ), Ytterbium oxide (Yb 2 O 3 ), lutetium oxide (Lu 2 O 3 ) or yttrium oxide (Y 2 O 3 ).

[0058] For example, the density of the second capping layer 192 is higher than the density of the first capping layer 191. That is, the second capping layer 192 includes a denser material than the first capping layer 191.

[0059] A typical image sensor does not include a color filter cover layer and instead includes a relatively thick passivation layer, which means that the image sensor is relatively thick, and therefore the size of a semiconductor package including the image sensor is relatively large. Also, the color filter is vulnerable to contamination due to the relative lack of a structure for protecting the color filter.

[0060] The image sensor 100 of the present invention includes the color filter cover layer 165 applied on the color filter 170, and therefore can protect the color filter 170 from contamination and have relatively high reliability. In addition, since the color filter cover layer 165 is disposed, the thickness of the passivation layer 167 in the vertical direction (Z direction) can be relatively reduced, and the size of the semiconductor package including the image sensor 100 can be relatively reduced.

[0061] Furthermore, the image sensor 100 of the present invention includes a double capping layer, which can effectively protect the microlens 180 from external contamination. In particular, the second capping layer 192 is conformally coated on the microlens 180 and the first capping layer 191, and can protect even the valley portion of the microlens 180. Therefore, crosstalk of the image sensor 100 can be reduced, and image quality can be improved.

[0062] Fig. 6 is a cross-sectional view of an image sensor according to an embodiment of the present invention. Hereinafter, differences between the image sensor 100 described with reference to Figs. 3 to 5 and the image sensor 100a shown in Fig. 6 will be described.

[0063] 6, image sensor 100a includes a pixel separating structure 150a instead of pixel separating structure 150 (see FIG. 4). Pixel separating structure 150a does not extend completely through substrate 110. Specifically, pixel separating structure 150a extends from second surface 110F2 of substrate 110 into substrate 110, but does not reach first surface 110F1 of substrate 110.

[0064] Also, image sensor 100a includes a transmission gate TGa instead of transmission gate TG (see FIG. 4). Transmission gate TGa is formed on first face 110F1 of substrate 110 and is not recessed into substrate 110.

[0065] 7A to 7G are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment of the present invention, which correspond to the cross-sectional view taken along line A-A' in FIG.

[0066] 7A, a substrate 110 having a first surface 110F1 and a second surface 110F2 opposite to each other is prepared. A mask pattern (not shown) is formed on the first surface 110F1 of the substrate 110, and a portion of the substrate 110 is removed from the first surface 110F1 of the substrate 110 using the mask pattern to form a trench 150T.

[0067] Next, an insulating liner 154 and a conductive layer 152 are sequentially formed in the trench 150T, and the portions of the insulating liner 154 and the conductive layer 152 located on the first surface 110F1 of the substrate 110 are removed by a planarization process or the like, thereby forming a pixel separating structure 150 in the trench 150T.

[0068] Next, a photoelectric conversion region 120 including a photodiode region (not shown) and a well region (not shown) is formed by an ion implantation process from the first surface 110F1 of the substrate 110. For example, the photodiode region is formed by doping with an N-type impurity, and the well region is formed by doping with a P-type impurity.

[0069] 7B, a transmission gate TG is formed extending from a first surface 110F1 of the substrate 110 into the substrate 110, and an ion implantation process is performed on a portion of the first surface 110F1 of the substrate 110 to form a floating diffusion region (not shown) and an active region (not shown), thereby forming first to third pixels PX1, PX2, and PX3.

[0070] Then, a front structure 130 is formed on the first surface 110F1 of the substrate 110. By repeatedly performing steps of forming a conductive layer (not shown) on the first surface 110F1 of the substrate 110, patterning the conductive layer, and forming an insulating layer (not shown) to cover the patterned conductive layer, a wiring layer 134 and an insulating layer 136 can be formed on the substrate 110. Then, a support substrate 140 can be attached on the insulating layer 136.

[0071] 7C, the substrate 110 may be turned upside down so that the second surface 110F2 of the substrate 110 faces upward. Then, a portion of the substrate 110 may be removed from the second surface 110F2 of the substrate 110 by a planarization process such as a chemical mechanical polishing (CMP) process or an etch-back process until the conductive layer 152 is exposed. As a result of the removal process, the vertical level of the second surface 110F2 of the substrate 110 is lowered. At this time, one pixel PX surrounded by the pixel separating structure 150 may be physically and electrically separated from the adjacent pixels PX.

[0072] 7D, a third back anti-reflective layer 161, a first back anti-reflective layer 162, a barrier metal layer 166, a fence 163, a second back anti-reflective layer 164, and a plurality of color filters 170 are sequentially formed on a second surface 110F2 of a substrate 110. In some embodiments, the third back anti-reflective layer 161 is formed of aluminum oxide, the first back anti-reflective layer 162 is formed of hafnium oxide, the second back anti-reflective layer 164 is formed of silicon oxide, the barrier metal layer 166 is formed of titanium nitride, and the fence 163 is formed of a low refractive index material. The second back anti-reflective layer 164 is formed by a deposition method with high directivity such as evaporation.

[0073] 7E, a color filter cover layer 165 and a preliminary passivation layer 167p may be formed on the plurality of color filters 170. The color filter cover layer 165 may be conformally formed on the plurality of color filters 170. For example, the color filter cover layer 165 may include an oxide. For example, the color filter cover layer 165 may include a silicon oxide and / or an aluminum oxide. The color filter cover layer 165 may be formed on the color filters 170 by atomic layer deposition (ALD). In another embodiment, the color filter cover layer 165 may also be formed on the color filters 170 by chemical vapor deposition (CVD) and / or molecular vapor deposition (MVD).

[0074] A preliminary passivation layer 167p is formed on the color filter cover layer 165 and the second rear anti-reflection layer 164. The preliminary passivation layer 167p may be formed of a resin-based material such as a styrene-based resin, an acrylic-based resin, a styrene-acrylic copolymer resin, or a siloxane-based resin.

[0075] 7F, the upper surface of the preliminary passivation layer 167p (see FIG. 7E) is etched to form the passivation layer 167. A portion of the upper surface of the preliminary passivation layer 167p (see FIG. 7E) may be removed by a planarization process such as a CMP process or an etch-back process.

[0076] The color filter cover layer 165 made of oxide can act as an etch stop layer when etching the preliminary passivation layer 167p (see FIG. 7E), so there is no need to form an additional etch stop layer, which simplifies the manufacturing process and saves manufacturing costs and time.

[0077] Referring to FIG. 7G, a microlens material layer (not shown) is formed on the color filter 170 and the passivation layer 167, and a mask pattern (not shown) is formed on the microlens material layer.

[0078] Then, a reflow process is performed to deform the mask pattern into a hemispherical shape. In an exemplary embodiment, the reflow process is performed at a temperature of about 100° C. to 200° C. for a few seconds to several tens of minutes, but is not limited thereto. Then, the microlens material layer is etched using the mask pattern as an etching mask to form the microlenses 180.

[0079] Then, a first capping layer 191 and a second capping layer 192 are formed on the microlens 180. In this way, the image sensor 100 shown in FIG.

[0080] 8A and 8B are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment of the present invention.

[0081] 8A, a substrate 110 having a first surface 110F1 and a second surface 110F2 opposite to each other is prepared. A mask pattern (not shown) is formed on the second surface 110F2 of the substrate 110, and a portion of the substrate 110 is removed from the second surface 110F2 of the substrate 110 using the mask pattern to form a trench 150Ta.

[0082] Next, an insulating liner 154 and a conductive layer 152 are sequentially formed in the trench 150Ta, and the insulating liner 154 and the conductive layer 152 portions disposed on the second surface 110F2 of the substrate 110 are removed by a planarization process or the like, thereby forming a pixel separating structure 150a in the trench 150Ta.

[0083] Next, a photoelectric conversion region 120 including a photodiode region (not shown) and a well region (not shown) is formed by an ion implantation process from the first surface 110F1 of the substrate 110. For example, the photodiode region is formed by doping with an N-type impurity, and the well region is formed by doping with a P-type impurity.

[0084] 8B, a transmission gate TGa is formed on a first surface 110F1 of the substrate 110, and an ion implantation process is performed on a portion of the first surface 110F1 of the substrate 110 to form a floating diffusion region (not shown) and an active region (not shown), thereby forming pixels PX1, PX2, and PX3.

[0085] Then, a front structure 130 is formed on the first surface 110F1 of the substrate 110. By repeatedly performing steps of forming a conductive layer (not shown) on the first surface 110F1 of the substrate 110, patterning the conductive layer, and forming an insulating layer (not shown) to cover the patterned conductive layer, a wiring layer 134 and an insulating layer 136 can be formed on the substrate 110. Then, a support substrate 140 can be attached on the insulating layer 136.

[0086] 7D to 7G, the third back anti-reflective layer 161, the first back anti-reflective layer 162, the barrier metal layer 166, the fence 163, the second back anti-reflective layer 164, the passivation layer 167, the color filter 170, the color filter cover layer 165, the microlens 180, the first capping layer 191 and the second capping layer 192 are formed, thereby completing the image sensor 100a shown in FIG.

[0087] FIG. 9 is a block diagram showing a configuration of an image sensor according to an embodiment of the present invention.

[0088] 9, the image sensor 210 also includes a pixel array 211, a controller 213, a row driver 212, and a pixel signal processor 214. The image sensor 210 includes at least one of the image sensors 100 and 100a described above.

[0089] The pixel array 211 includes a plurality of unit pixels arranged two-dimensionally, and each unit pixel includes a photoelectric conversion element. The photoelectric conversion element absorbs light to generate electric charges, and an electric signal (output voltage) based on the generated electric charges is provided to the pixel signal processor 214 via a vertical signal line. The unit pixels included in the pixel array 211 can provide output voltages one at a time in row units.

[0090] Thus, the unit pixels belonging to one row of the pixel array 211 are simultaneously activated by a selection signal output by the row driver 212. The unit pixels belonging to the selected row can provide an output voltage based on the absorbed light to the output line of the corresponding column.

[0091] The controller 213 may control the row driver 212 to cause the pixel array 211 to absorb light and accumulate charges, or to temporarily store the accumulated charges, and output an electrical signal based on the stored charges to the outside of the pixel array 211. The controller 213 may also control the pixel signal processor 214 to measure an output voltage provided by the pixel array 211.

[0092] The pixel signal processing unit 214 also includes a correlated double sampler (CDS) 216, an analog-to-digital converter (ADC) 218, and a buffer 220. The correlated double sampler 216 may sample and hold an output voltage provided by the pixel array 211. The correlated double sampler 216 may double sample a specific noise level and a level according to the generated output voltage, and output a level corresponding to the difference. The correlated double sampler 216 may also receive a ramp signal generated by a ramp signal generator 222, compare the ramp signals, and output a comparison result. The analog-to-digital converter 218 may convert an analog signal corresponding to the level received from the correlated double sampler 216 into a digital signal. The buffer 220 latches the digital signal, and the latched signals may be sequentially output to the outside of the image sensor 210 and transferred to an image processor (not shown).

[0093] FIG. 10 is a diagram showing the configuration of a camera using an image sensor according to an embodiment of the present invention.

[0094] Referring to FIG. 10, a camera 230 includes an image sensor 210, an optical system 231 that guides incident light to a light receiving sensor portion of the image sensor 210, a shutter device 232, a driving circuit 234 that drives the image sensor 210, and a signal processing circuit 236 that processes an output signal from the image sensor 210.

[0095] The image sensor 210 includes at least one of the image sensors 100 and 100a described above. An optical system 231 including an optical lens focuses image light from a subject, i.e., incident light, on the imaging surface of the image sensor 210. As a result, signal charges are accumulated in the image sensor 210 for a certain period of time.

[0096] The optical system 231 may be an optical lens system composed of a plurality of optical lenses. The shutter device 232 controls a light irradiation period and a light blocking period for the image sensor 210. The drive circuit 234 supplies drive signals to the image sensor 210 and the shutter device 232, and controls the signal output operation of the image sensor 210 to the signal processing circuit 236 and the shutter operation of the shutter device 232 by the supplied drive signals or timing signals.

[0097] The drive circuit 234 transmits signals from the image sensor 210 to the signal processing circuit 236 by supplying drive signals or timing signals. The signal processing circuit 236 performs various signal processing on the signals transmitted from the image sensor 210. The image (video) signals that have undergone signal processing are stored in a storage medium such as a memory or are output to a monitor.

[0098] FIG. 11 is a block diagram of an imaging system including an image sensor according to one embodiment of the present invention.

[0099] 11, the imaging system 310 is a system that processes an output image of the image sensor 210. The image sensor 210 includes at least one of the image sensors 100 and 100a described above. The imaging system 310 may be any kind of electrical and electronic system equipped with the image sensor 210, such as a computer system, a camera system, a scanner, an image security system, etc.

[0100] A processor-based imaging system 310, such as a computer system, includes a processor 320, such as a microprocessor or central processing unit (CPU), which can communicate with input / output (I / O) elements 330 via a bus 305. A CD ROM drive 350, a port 360, and a random access memory (RAM) 340 are connected to the processor 320 via the bus 305 to exchange data and generate an output image related to the data from the image sensor 210.

[0101] The port 360 is also a port that can couple a video card, a sound card, a memory card, a USB device, etc., or communicate data with other systems. The image sensor 210 may be integrated with a processor, such as a CPU, a digital signal processor (DSP), or a microprocessor, or may be integrated with a memory. Of course, in some cases, the image sensor 210 is integrated with a processor on a separate chip. The imaging system 310 is also a system block diagram of a digital device, such as a camera phone or a digital camera.

[0102] The present invention has been described above with reference to the embodiments shown in the drawings, but these are merely illustrative, and those skilled in the art will appreciate that various modifications, substitutions and equivalent embodiments are possible therefrom. It should be understood that the above-described embodiments are illustrative in all respects and are not limiting. The true technical scope of the present invention should be determined by the technical spirit of the claims. [Explanation of symbols]

[0103] 100,100a image sensor 110 Substrate 110F1 1st page 110F2 2nd side 120 Photoelectric conversion area 130 Front structure 134 Wiring layer 136 Insulating Layer 140 Support substrate 150 pixel isolation structure 152 Conductive layer 154 Insulating Liner 161 Third back anti-reflection layer 162 1st back anti-reflection layer 163 Fence 164 2nd back anti-reflection layer 165 Color filter cover layer 166 Barrier Metal Layer 167 Passivation Layer 170 Color Filter 180 Micro Lens 191 First Capping Layer 192 Second Capping Layer TG Transmission Gate

Claims

1. A substrate having a first surface and a second surface facing the first surface; The first photoelectric conversion element (PD) on the substrate and; The second PD in the aforementioned substrate and; The blue filter on the first PD, the blue filter includes an upper surface of the blue filter and a lower surface facing the upper surface; A green filter on the second PD, the green filter including an upper surface and a lower surface opposite the upper surface; A fence located between the blue filter and the green filter, and overlapping the separation structure in the vertical direction; A first layer on the upper surface of the blue filter and the upper surface of the green filter, the first layer covering at least a portion of the side surface of at least one of the blue filter and the green filter; The second layer on the first layer; Multiple microlenses on the second layer; An image sensor having, The lower surface of the green filter is spaced apart from the second surface of the substrate. The upper surfaces of the blue filter and the green filter are located at different vertical levels. The image sensor is configured to receive light on the second surface of the substrate. Image sensor.

2. The third PD in the substrate; The red filter on the third PD, the red filter includes an upper surface of the red filter and a lower surface facing the upper surface, and Furthermore, it has, The first layer is located on the upper surface of the red filter, The image sensor according to claim 1.

3. The image sensor according to claim 2, wherein the first layer covers at least a portion of the side surface of the third color filter.

4. The image sensor according to claim 1, wherein the first layer covers the sides of the blue filter and the green filter.

5. The image sensor according to claim 1, wherein the first layer is located between the blue filter, the green filter, and the second layer.

6. A substrate having a first surface and a second surface facing the first surface; The first photoelectric conversion element (PD) on the substrate and; The second PD in the aforementioned substrate and; A first color filter on the first PD, the first color filter including the upper surface of the first color filter and the lower surface facing the upper surface; A second color filter on the second PD, the second color filter including an upper surface and a lower surface opposite the upper surface; A fence located between the first color filter and the second color filter, which overlaps the separation structure in the vertical direction; A first layer on the upper surface of the first color filter and the upper surface of the second color filter, the first layer covering at least a portion of the side surface of at least one of the first color filter and the second color filter; The second layer on the first layer; Multiple microlenses on the second layer; An image sensor having, The upper surfaces of the first color filter and the second color filter are located at different vertical levels. The image sensor is configured to receive light on the second surface of the substrate. Image sensor.

7. The image sensor according to claim 6, wherein the fence is configured to block the propagation of light between adjacent pixels.

8. The image sensor according to claim 11, wherein the first layer comprises silicon oxide.

9. A substrate having a first surface and a second surface facing the first surface; The first photoelectric conversion element (PD) on the substrate and; The second PD in the aforementioned substrate and; The third PD in the aforementioned substrate and; The blue filter on the first PD, the blue filter includes an upper surface of the blue filter and a lower surface facing the upper surface; A green filter on the second PD, the green filter including an upper surface and a lower surface opposite the upper surface; A red filter on the third PD, the red filter including an upper surface and a lower surface opposite the upper surface; A fence located between the blue filter and the green filter, and overlapping the separation structure in the vertical direction; A first layer on the upper surface of the blue filter, the green filter, and the red filter, wherein the first layer covers at least a portion of the side surface of at least one of the first color filter, the second color filter, and the third color filter; The second layer on the first layer; Multiple microlenses on the second layer; An image sensor having, The upper surfaces of the blue filter, the green filter, and the red filter are located at different vertical levels. The height of the second layer on the second PD in the first direction is greater than the height of the second layer on the third PD in the first direction. The image sensor is configured to receive light on the second surface of the substrate. Image sensor.

Images