Reference current source

Abstract

To provide a reference current source capable of supplying a stable reference current against a change in ambient temperature.SOLUTION: A reference current source 100 includes: a reference voltage circuit 110 which generates a reference voltage Vref; a voltage division circuit 130 which divides the reference voltage Vref and outputs a divided voltage Vdiv; and an output MOS transistor 140 which supplies a reference current Iref when the divided voltage Vdiv is applied to a gate terminal 140G. The reference voltage circuit 110 includes: a depletion type MOS transistor 111; and an enhancement type MOS transistor 112 which has the same conductive type and impurity concentration as a channel 111c of the enhancement type MOS transistor and different Fermi level from that of a gate electrode 111g. The voltage division circuit 130 outputs the divided voltage Vdiv in a voltage range of 0 V or higher and lower than a cross point X to the gate terminal 140G of the output MOS transistor 140.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present invention relates to a reference current source. [Background technology]

[0002] Mobile devices, wearable devices, and other such devices are used in a variety of locations and climates, and so they are required to operate stably even in changing operating environments. Many of the semiconductor chips mounted on such devices are equipped with analog circuits, to which a reference current output from a reference current source is supplied as a bias current.

[0003] Some reference current sources supply a reference current by converting a reference voltage generated by a reference voltage circuit into a current using an element equipped with a highly accurate resistor. Various proposals have been made for such reference current sources with the aim of supplying a stable reference current.

[0004] For example, a reference current source has been proposed that can suppress fluctuations in the reference current even if the reference voltage generated by a reference voltage circuit fluctuates. Specifically, a feedback constant voltage circuit to which a reference voltage is input, another feedback constant voltage circuit to which a divided reference voltage is input, a reference resistor connected between the outputs of these circuits, and a reference current source that outputs a reference current based on the current flowing through the reference resistor have been proposed (see Patent Document 1). In this reference current source, a voltage divider circuit that divides the reference voltage is connected in parallel with the reference resistor, and the combined resistance value of the voltage divider circuit is made higher than the reference resistor to reduce the current flowing through the reference resistor, thereby suppressing fluctuations in the reference current due to fluctuations in the reference voltage.

[0005] Furthermore, many reference voltage circuits capable of suppressing fluctuations in the reference voltage due to changes in the ambient temperature have also been proposed. For example, there is a reference voltage circuit that can reduce manufacturing variations by standardizing the structure of elements that are affected by changes in ambient temperature. Specifically, a reference voltage circuit has been proposed that has a pair of transistors equipped with gates with different Fermi levels and channels having the same conductivity type and the same impurity concentration, thereby offsetting the effects of changes in the conductivity coefficient in the channel (see Patent Document 2). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2007-219901 A [Patent Document 2] JP 2001-284464 A Summary of the Invention [Problem to be solved by the invention]

[0007] An object of one aspect of the present invention is to provide a reference current source capable of supplying a stable reference current despite changes in ambient temperature. [Means for solving the problem]

[0008] In one embodiment of the present invention, the reference current source is a reference voltage circuit that generates a reference voltage; a voltage dividing circuit that divides the reference voltage and outputs a divided voltage; an output MOS transistor which supplies a reference current when the divided voltage is applied to a gate terminal of the output MOS transistor; having The reference voltage circuit includes: a depletion-type MOS transistor; an enhancement-type MOS transistor having a channel of the same conductivity type and impurity concentration as the depression-type MOS transistor and having a gate electrode of a different Fermi level from that of the depression-type MOS transistor; Equipped with The voltage divider circuit includes: The divided voltage, which is in a voltage range of 0 V or more and lower than a cross point at which the gate voltage-drain current characteristic of the output MOS transistor is independent of temperature, is output to the gate terminal of the output MOS transistor. Effect of the Invention

[0009] An object of one aspect of the present invention is to provide a reference current source capable of supplying a stable reference current despite changes in ambient temperature. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a circuit diagram showing a reference current source in this embodiment. [Figure 2A] FIG. 2A is a schematic cross-sectional view showing a depletion-type MOS transistor of the reference voltage circuit shown in FIG. [Figure 2B] FIG. 2B is a schematic cross-sectional view showing an enhancement-type MOS transistor of the reference voltage circuit shown in FIG. [Diagram 3] FIG. 3 is a band diagram showing the dependence of the Fermi level in silicon on temperature and impurity concentration. [Figure 4] FIG. 4 is a graph showing the gate voltage-drain current characteristics of a depletion-type MOS transistor and an enhancement-type MOS transistor in this embodiment. [Diagram 5] FIG. 5 is a graph showing the temperature characteristics of the reference voltage of the reference voltage circuit in this embodiment. [Figure 6] FIG. 6 is a graph showing the gate voltage-drain current characteristics of the output MOS transistor in this embodiment. [Figure 7] FIG. 7 is an explanatory diagram showing the temperature characteristics of the reference current supplied by the output MOS transistor in this embodiment. [Figure 8] FIG. 8 is a graph showing an example of the temperature characteristics of the reference voltage of the reference voltage circuit. [Figure 9] FIG. 9 is a graph showing an example of the gate voltage-drain current characteristics of an output MOS transistor. [Figure 10] FIG. 10 is an explanatory diagram showing an example of the temperature characteristic of the reference current supplied by the output MOS transistor. [Figure 11] FIG. 11 is a circuit diagram showing another example of the voltage divider circuit shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] The reference current source in one embodiment of the present invention is based on the following findings. Although the reference voltage circuit of Patent Document 2 can suppress manufacturing variations by making the channel conductivity type and impurity concentration of the pair transistors the same, it is affected by temperature fluctuations due to differences in the Fermi levels of each gate. As a result, it is difficult for this reference voltage circuit to generate a highly accurate and stable reference voltage against changes in the ambient temperature. Therefore, it is difficult for a reference current source using such a reference voltage circuit to supply a stable reference current against changes in the ambient temperature.

[0012] Therefore, in the reference current source of one embodiment of the present invention, the temperature fluctuation of the reference voltage in the reference voltage circuit is offset by the temperature fluctuation of the output MOS transistor that supplies a reference current based on that reference voltage.

[0013] Specifically, the reference current source of this embodiment includes a reference voltage circuit that generates a reference voltage, a voltage divider circuit that divides the reference voltage and outputs a divided voltage, and an output MOS transistor that supplies a reference current when the divided voltage is applied to its gate terminal (see FIG. 1). This reference voltage circuit comprises a depletion-type MOS transistor and an enhancement-type MOS transistor whose channel has the same conductivity type and impurity concentration and whose gate electrode has a different Fermi level (see Figs. 2A and 2B). As a result, the pair of transistors in this reference voltage circuit have the same channel composition, which reduces the variation in the reference voltage, but because the gate electrodes have different Fermi levels, they have temperature characteristics in which the reference voltage decreases as the ambient temperature increases (see Fig. 5).

[0014] As shown in Figure 6, when the ambient temperature rises, the threshold voltage of the output MOS transistor decreases and the slope of the gate voltage-drain current characteristic becomes smaller. The threshold voltage decreases because the Fermi level approaches the intrinsic Fermi level due to an increase in carriers excited in the conduction band, and the depletion layer width shrinks. The slope of the gate voltage-drain current characteristic becomes smaller because the mobility decreases due to an increase in phonon scattering with an increase in temperature. Therefore, in the gate voltage-drain current characteristic of the output MOS transistor, there is a "cross point" where the gate voltage-drain current does not change with changes in ambient temperature. In this output MOS transistor, the positive and negative of the temperature characteristic are reversed depending on whether the gate voltage is higher or lower than this cross point. In other words, if the gate voltage of the output MOS transistor is lower than the cross point, the drain current increases with an increase in ambient temperature, and if the gate voltage of the output MOS transistor is higher than the cross point, the drain current decreases with an increase in ambient temperature.

[0015] Therefore, in the reference current source of this embodiment, the reference voltage, which decreases as the ambient temperature rises, is divided and applied to the gate of the output MOS transistor, making the gate voltage of the output MOS transistor lower than the cross point so that the drain current increases as the ambient temperature rises. In other words, the voltage divider circuit, which divides the reference voltage to obtain the gate voltage of the output MOS transistor, outputs a divided voltage in a voltage range of 0V or higher and lower than the cross point (see FIG. 7). As a result, even if the ambient temperature rises and the reference voltage of the reference voltage circuit drops, the drain current of the output MOS transistor increases, so that this reference current source can supply a stable reference current regardless of changes in ambient temperature.

[0016] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. In the drawings, the same components are denoted by the same reference numerals, and duplicate explanations may be omitted. In addition, the X-axis, Y-axis, and Z-axis shown in the drawings are mutually perpendicular. The X-axis direction may be referred to as the "width direction", the Y-axis direction as the "depth direction", and the Z-axis direction as the "height direction" or "thickness direction". The surface of each film on the +Z direction side may be referred to as the "front surface" or "upper surface", and the surface on the -Z direction side as the "rear surface" or "lower surface". Furthermore, the drawings are schematic, and the ratios of width, depth, and thickness are not as shown. The number, position, shape, structure, size, etc. of a plurality of films or layers, or a semiconductor element obtained by structurally combining them, are not limited to the embodiments shown below, and may be any number, position, shape, structure, size, etc. that is preferable for implementing the present invention.

[0017] FIG. 1 is a circuit diagram showing a reference current source in this embodiment. As shown in FIG. 1, the reference current source 100 includes a reference voltage circuit 110, a buffer amplifier 120, a voltage dividing circuit 130, an output MOS transistor 140, and a current mirror circuit 150.

[0018] The reference voltage circuit 110 outputs a reference voltage Vref to the non-inverting input terminal of the buffer amplifier 120. The reference voltage circuit 110 is a so-called “ED type reference voltage circuit” and includes an N-channel depletion type MOS transistor 111 and an N-channel enhancement type MOS transistor 112.

[0019] The depletion-type MOS transistor 111 has a drain terminal 111D connected to a power supply terminal and a gate terminal 111G connected to a source terminal 111S. When a power supply voltage is applied to the drain terminal 111D, the depletion-type MOS transistor 111 functions as a constant current source that supplies a constant current that is independent of the power supply voltage from the source terminal 111S to the enhancement-type MOS transistor 112. The back gate of the depletion type MOS transistor 111 is connected to a source terminal 111S.

[0020] The enhancement type MOS transistor 112 has a gate terminal 112G connected to a drain terminal 112D, and the drain terminal 112D is connected to a source terminal 111S of the depletion type MOS transistor 111. The enhancement type MOS transistor 112 outputs a voltage based on a constant current supplied from the depletion type MOS transistor 111 as a reference voltage Vref from the drain terminal 112D to the buffer amplifier 120. The back gate of the enhancement type MOS transistor 112 is connected to a source terminal 112S.

[0021] In this manner, the reference voltage circuit 110 outputs the reference voltage Vref, which is independent of the power supply voltage, to the buffer amplifier 120 by the pair of transistors, the depletion type MOS transistor 111 and the enhancement type MOS transistor 112 . The structures of the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112 and the operation of the reference voltage circuit 110 will be described later.

[0022] The buffer amplifier 120 receives the reference voltage Vref output from the reference voltage circuit 110 at its non-inverting input terminal and has its inverting input terminal connected to its output terminal, and outputs a voltage substantially equal to the reference voltage Vref.

[0023] The voltage divider circuit 130 is a combination of resistors 131 and 132 connected in series, and a predetermined voltage division ratio is set according to the ratio of the resistance values ​​of the resistors. The voltage divider circuit 130 divides the reference voltage Vref output from the buffer amplifier 120, and outputs the divided voltage Vdiv to the gate terminal 140G of the output MOS transistor 140.

[0024] The range of the divided voltage Vdiv based on a predetermined voltage division ratio is set to 0 V or more, and is set to be lower than the cross point at which the gate voltage-drain current characteristics of the output MOS transistor 140 are independent of temperature. The lower limit of the divided voltage Vdiv need only be 0 V or more, since the threshold voltage of the output MOS transistor 140 is a negative value. As a result, even if the ambient temperature rises and the reference voltage Vref of the reference voltage circuit 110 drops, the drain current of the output MOS transistor 140 increases, making it possible to supply a stable reference current regardless of changes in the ambient temperature.

[0025] Moreover, the divided voltage Vdiv is preferably a voltage that cancels temperature variations due to the reference voltage Vref so that the drain current of the output MOS transistor 140 does not vary with temperature.

[0026] The output MOS transistor 140 is a depletion type MOS transistor, and has a gate terminal 140G connected to the output of the voltage divider circuit 130, a drain terminal 140D connected to the current mirror circuit 150, and a source terminal 140S grounded. The output MOS transistor 140 receives the divided voltage Vdiv output from the voltage divider circuit 130 at its gate terminal 140G, and supplies a reference current Iref to the current mirror circuit 150 from the drain terminal 140D based on the divided voltage Vdiv. In other words, the output MOS transistor 140 supplies the reference current Iref when the divided voltage Vdiv is applied to the gate terminal 140G. Furthermore, the output MOS transistor 140 does not supply a current that reaches the reference current Iref unless the divided voltage Vdiv is applied to the gate terminal 140G.

[0027] The current mirror circuit 150 includes MOS transistors 151 and 152 . The MOS transistor 151 has a gate terminal connected to a source terminal, and a drain terminal connected to a power supply terminal. The MOS transistor 152 has a gate terminal connected to the gate terminal of the MOS transistor 151, a drain terminal connected to a power supply terminal, and supplies a reference current Iref from its source terminal.

[0028] <Temperature characteristics of reference current> Next, the temperature characteristics of the reference current in this embodiment will be described. In one embodiment of the present invention, the temperature characteristics of the reference voltage circuit 110 are offset by the temperature characteristics of the output MOS transistor 140 in order to supply a stable reference current Iref against changes in the ambient temperature. First, the temperature characteristics of the reference voltage generated by the reference voltage circuit 110 will be described.

[0029] -Temperature characteristics of reference voltage- The temperature characteristics of the reference voltage generated by the reference voltage circuit 110 depend on the temperature characteristics of the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112. Therefore, the structures and temperature characteristics of the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112 will be explained, along with an explanation of the operating principle of the reference voltage circuit 110.

[0030] FIG. 2A is a schematic cross-sectional view showing a depletion-type MOS transistor of the reference voltage circuit shown in FIG. As shown in FIG. 2A, a depletion-type MOS transistor 111 has a gate electrode 111g, a drain region 111d, and a source region 111s connected to the gate terminal 111G, the drain terminal 111D, and the source terminal 111S shown in FIG. 1, respectively.

[0031] The gate electrode 111g is of N+ type with a high concentration of phosphorus implanted therein, and has a Fermi level close to the conduction band in the band diagram of Fig. 3. The channel 111c located below the gate electrode 111g is of N- type conductivity with a low concentration of phosphorus implanted into the surface of the P-type silicon substrate 111b. As a result, even if the potential difference between the gate and source is 0 V, a current path is formed in this N- type channel 111c between the N+ type drain region 111d and the N+ type source region 111s, which have the same conductivity type as the N- type channel 111c.

[0032] FIG. 2B is a schematic cross-sectional view showing an enhancement-type MOS transistor of the reference voltage circuit shown in FIG. As shown in FIG. 2B, the enhancement type MOS transistor 112 has a gate electrode 112g, a drain region 112d, and a source region 112s connected to the gate terminal 112G, the drain terminal 112D, and the source terminal 112S shown in FIG. 1, respectively.

[0033] The gate electrode 112g is of P+ type with a high concentration of boron implanted therein, and has a Fermi level close to the valence band in the band diagram of FIG. 3. The channel 112c located below the gate electrode 112g is of N- type conductivity with a low concentration of phosphorus implanted into the surface of the P-type silicon substrate 112b in the same process as the channel 111c of the depression-type MOS transistor 111. Therefore, the channel 112c has the same conductivity coefficient and temperature coefficient of the conductivity coefficient as the channel 111c. In addition, since the Fermi level of the gate electrode 112g is close to the valence band, the Fermi level of the channel 112c is pulled up toward the valence band and depleted. As a result, when the potential difference between the gate and source is 0V, no current path is formed in this N- type channel 112c, even between the N+ type drain region 112d and the N+ type source region 112s, which have the same conductivity type.

[0034] In this respect, the enhancement type MOS transistor 112 differs from a typical enhancement type MOS transistor in which no impurities are implanted into the channel. In addition, since the channel 112c has the same conductivity coefficient and temperature coefficient of the conductivity coefficient as the channel 111c, it is possible to reduce manufacturing variations in the channels of the depletion type MOS transistor 111 and the enhancement type MOS transistor 112. On the other hand, since the Fermi levels of the gate electrodes of the depletion type MOS transistor 111 and the enhancement type MOS transistor 112 are different, the reference voltage Vref decreases when the ambient temperature increases according to the operating principle of the "ED type reference voltage circuit."

[0035] Next, the temperature characteristics of the reference voltage Vref in this embodiment will be described. 4 is a graph showing the gate voltage-drain current characteristics of a depletion-type MOS transistor and an enhancement-type MOS transistor in this embodiment. In this Fig. 4, the horizontal axis is the gate voltage and the vertical axis is the drain current. Fig. 4 also shows the gate voltage-drain current characteristics of a depletion-type MOS transistor 111 and an enhancement-type MOS transistor 112.

[0036] 4, the depression-type MOS transistor 111 has an N-type channel 111c formed therein (see FIG. 2A), and therefore has a threshold voltage Vtnd lower than 0 V. In addition, the depression-type MOS transistor 111 has a gate terminal 111G and a drain terminal 111D connected thereto (see FIG. 1), and therefore the potential difference between the gate and source (gate voltage) is 0 V. Therefore, the depression-type MOS transistor 111 supplies the drain current Idn, which is a constant current that does not depend on the power supply voltage and utilizes saturation current characteristics, to the enhancement-type MOS transistor 112.

[0037] The enhancement-type MOS transistor 112 generates a reference voltage Vref according to the drain current Idn supplied from the depletion-type MOS transistor 111. This reference voltage Vref is expressed by the following equation: Vref=|Vtnd|+Vtne.

[0038] In the reference voltage circuit 110, the channels of the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112 have the same conductivity type and impurity concentration, and therefore have the same conductivity coefficient and temperature coefficient. As a result, the reference voltage Vref has temperature characteristics in which the causes of variation based on the conductivity type and impurity concentration of each channel are suppressed. On the other hand, the gates of the depletion-type MOS transistor 111 and the enhancement-type MOS transistor 112 have different conductivity types and different impurity concentrations, and therefore do not have the same Fermi level as shown in FIG.

[0039] Therefore, in the depletion type MOS transistor 111 and the enhancement type MOS transistor 112, factors due to the channels can be suppressed, but factors due to the differences in the conductivity type and impurity concentration of the gates remain, and temperature characteristics due to differences in the gates exist.

[0040] FIG. 5 is a graph showing the temperature characteristics of the reference voltage of the reference voltage circuit in this embodiment. As shown in Fig. 5, the reference voltage Vref has a temperature characteristic that decreases as the ambient temperature rises. This is because, as shown in the band diagram of Fig. 3, in the depletion type MOS transistor 111, as the ambient temperature rises, the N+ type impurity concentration of the gate electrode 111g decreases, so that the threshold voltage Vtnd increases (in the positive direction) and the absolute value of the threshold voltage |Vtnd| decreases. In addition, in the enhancement type MOS transistor 112, as the ambient temperature rises, the P+ type impurity concentration of the gate electrode 112g decreases, so that the threshold voltage Vtne decreases (in the negative direction). Then, the reference voltage Vref has a temperature characteristic that decreases as the ambient temperature rises, according to the following equation, Vref=|Vtnd|+Vtne.

[0041] Therefore, the reference voltage Vref of the reference voltage circuit 110 has a temperature characteristic that decreases as the ambient temperature increases, and is divided by the voltage divider circuit 130 via the buffer amplifier 120 and applied as a gate voltage to the gate terminal 140G of the output MOS transistor 140 (see FIG. 1).

[0042] - Temperature characteristics of output MOS transistors - FIG. 6 is a graph showing the gate voltage-drain current characteristics of the output MOS transistor in this embodiment. 6, in the output MOS transistor 140, like a general MOS transistor, when the gate voltage is equal to or lower than the threshold voltage Vth, no drain current flows, and when the gate voltage exceeds the threshold voltage Vth, a drain current flows with a slope based on the conductivity coefficient. When the ambient temperature rises, the threshold voltage Vth and the conductivity coefficient decrease, and the slope of the gate voltage-drain current characteristic decreases. For this reason, there exists a cross point X where the gate voltage-drain current characteristic does not show a temperature characteristic. When a gate voltage below the cross point X is applied, the drain current increases as the ambient temperature rises, and when a gate voltage above the cross point is applied, the drain current decreases as the ambient temperature rises.

[0043] In this embodiment, when the ambient temperature rises in the reference voltage circuit 110, the reference voltage Vref decreases, but by applying a gate voltage below the cross point X in the output MOS transistor 140, the drain current, which is the reference current, is increased. This makes it possible to reduce the temperature characteristic of the reference current generated by the reference current source 100.

[0044] 7 is an explanatory diagram showing the temperature characteristic of the reference current supplied by the output MOS transistor in this embodiment. In FIG. 7, the left graph shows the temperature characteristic of the divided voltage Vdiv obtained by dividing the reference voltage Vref shown in FIG. 5 by the voltage divider circuit 130. The right graph shows the temperature characteristic of the output MOS transistor 140, which is an enlarged view of the vicinity of the cross point X by switching the vertical and horizontal axes of the gate voltage-drain current characteristic shown in FIG. 6. FIG. 7 shows the relationship between the temperature characteristic of the divided voltage Vdiv (reference voltage Vref) output from the voltage divider circuit 130 and the temperature characteristic of the drain current (reference current Iref) when this divided voltage Vdiv is applied to the gate terminal 140G of the output MOS transistor 140. Here, the temperature characteristics of the buffer amplifier 120 and the voltage dividing circuit 130 are not taken into consideration.

[0045] 7, in the reference current source 100, the voltage division ratio of the voltage divider circuit 130 is adjusted and set so that a gate voltage equal to or lower than the cross point X shown in FIG. 6 is applied to the gate of the output MOS transistor 140. Since the reference voltage Vref output by the reference voltage circuit 110 decreases as the ambient temperature increases, the gate voltage of the output MOS transistor 140 applied via the voltage divider circuit 130 also decreases as the ambient temperature increases. Then, when the ambient temperature increases, the gate voltage decreases but the drain current increases by that amount, and as a result, the temperature dependency of the reference current Iref can be reduced.

[0046] In this way, even if the ambient temperature rises and the reference voltage Vref of the reference voltage circuit 110 decreases, the drain current of the output MOS transistor 140 increases, so that the reference current source 100 can supply a stable reference current Iref regardless of changes in the ambient temperature.

[0047] Next, a specific example will be described with reference to FIG. 1 as well as FIGS. The depletion type MOS transistor 111 has a gate electrode 111g of 1.0 20 atoms / cm 3 The impurity concentration of the channel 111c of the depletion-type MOS transistor 111 was adjusted so that the threshold voltage Vtnd was -0.29V. As a result, the temperature characteristics of the gate voltage-drain current characteristics per unit channel length and unit channel width of the depletion-type MOS transistor 111 became as shown in FIG. 8. The gate voltage at the cross point X was 0.22V. The enhancement type MOS transistor 112 is the same as the depletion type MOS transistor 111 except that the gate electrode 112g is P+ type.

[0048] When a reference voltage circuit 110 was formed using these depletion-type MOS transistor 111 and enhancement-type MOS transistor 112, the reference voltage Vref was 1.13 V at room temperature (25° C.) and had a temperature characteristic of −0.35 mV / ° C., as shown in FIG.

[0049] The voltage divider circuit 130 divides this reference voltage Vref at a voltage division ratio of 0.82:0.18, and outputs a divided voltage Vdiv of 0.20 V at room temperature (25° C.) to the output MOS transistor 140. The temperature characteristics of the divided voltage Vdiv are as shown in the left graph of FIG.

[0050] The output MOS transistor 140 is formed in the same process as the depletion-type MOS transistor 111, and therefore has the same gate voltage-drain current characteristics as the depletion-type MOS transistor 111 (see FIG. 8). That is, at room temperature (25° C.), the output MOS transistor 140 receives a divided voltage Vdiv of 0.20 V, which is lower than the gate voltage of 0.22 V at the cross point X, at its gate terminal 140G. Then, as shown in FIG. 10, the reference current source 100 was able to supply a drain current whose temperature fluctuations were sufficiently suppressed, that is, the reference current Iref.

[0051] The divided voltage Vdiv to be applied to the gate terminal in order to suppress temperature fluctuations changes with fluctuations in the threshold voltage of the output MOS transistor 140. In this specific example, the threshold voltage of the output MOS transistor 140 is −0.29 V, the voltage at the cross point X is 0.22 V, and the difference between them is 0.51 V. By setting a predetermined voltage division ratio such that the divided voltage is obtained by adding a difference (0.49 V) smaller than the difference (0.51 V) between an arbitrary threshold voltage and the voltage at the cross point X, the reference current source 100 can supply a reference current Iref that is stable against changes in the ambient temperature.

[0052] (Modification) The voltage divider circuit 130 may include a trimming circuit capable of adjusting the divided voltage Vdiv so that the divided voltage Vdiv is 0 V or higher and is lower than the cross point X of the gate voltage-drain current characteristic of the output MOS transistor 140 .

[0053] 11, the voltage dividing circuit 230 includes a first resistor section 230A, a second resistor section 230B, a third resistor section 230C, and a fourth resistor section 230D. The first resistor section 230A, the second resistor section 230B, and the third resistor section 230C are connected in series. The fourth resistor section 230D is connected in parallel to the third resistor section 230C.

[0054] The first resistor section 230A includes a plurality of resistor elements connected in series and a fuse connected to each node of the plurality of resistor elements. The first resistor section 230A performs coarse adjustment of the divided voltage Vdiv by selectively blowing the fuse. The fourth resistor section 230D includes a plurality of resistor elements connected in series and a fuse connected to each node of the plurality of resistor elements. The fourth resistor section 230D divides the potential difference in the fourth resistor section 230D into small steps by the plurality of resistor elements, and selectively blows the fuse to finely adjust the divided voltage Vdiv and output it from the OUT terminal. Although fuses are used in this modified example, the present invention is not limited to this and switching elements may also be used.

[0055] In this way, the voltage divider circuit 230 is provided with a trimming circuit, which allows fine adjustment of the divided voltage Vdiv, and therefore can supply a stable reference current Iref with high accuracy against changes in the ambient temperature.

[0056] As described above, the reference current source in one embodiment of the present invention includes a reference voltage circuit that generates a reference voltage, a voltage divider circuit that divides the reference voltage and outputs the divided voltage, and an output MOS transistor that supplies a reference current when the divided voltage is applied to its gate terminal. This reference voltage circuit includes a depletion-type MOS transistor and an enhancement-type MOS transistor having the same channel conductivity type and impurity concentration as the depletion-type MOS transistor and a different Fermi level from the gate electrode of the depletion-type MOS transistor. This provides the reference voltage with temperature characteristics that decrease as the ambient temperature increases. The voltage divider circuit outputs a divided voltage in a voltage range above 0 V and below the cross point to the gate terminal of the output MOS transistor. This makes it possible to offset the temperature characteristic of the reference voltage by making the gate voltage-drain current characteristic of the output MOS transistor a temperature characteristic that increases with increasing temperature. Therefore, the reference current source in one embodiment of the present invention can supply a stable reference current against changes in ambient temperature. [Explanation of symbols]

[0057] 100 Reference current source 110 Reference voltage circuit 111 Depletion type MOS transistor 112 Enhancement-type MOS transistor 120 Buffer Amplifier 130, 230 Voltage divider circuit 140 Output MOS transistor 150 Current mirror circuit Iref Reference current Vref Reference voltage Vdiv Divided voltage

Claims

1. a reference voltage circuit that generates a reference voltage; a voltage dividing circuit that divides the reference voltage and outputs a divided voltage; an output MOS transistor which supplies a reference current when the divided voltage is applied to a gate terminal of the output MOS transistor; having The reference voltage circuit includes: a depletion type MOS transistor; an enhancement type MOS transistor having a channel of the same conductivity type and impurity concentration as the depression type MOS transistor and having a gate electrode of a Fermi level different from that of the depression type MOS transistor; Equipped with The voltage divider circuit includes: A reference current source which outputs to a gate terminal of the output MOS transistor the divided voltage in a voltage range of 0 V or more and lower than a cross point at which the gate voltage-drain current characteristic of the output MOS transistor is independent of temperature.

2. 2. The reference current source according to claim 1, wherein the divided voltage is a voltage that cancels the temperature characteristic of the reference voltage so that the drain current of the output MOS transistor does not vary with temperature.

3. 3. The reference current source according to claim 1, wherein the voltage divider circuit includes a trimming circuit capable of adjusting the divided voltage.

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