Creating ion energy distribution functions (IEDF)

Abstract

To provide systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse-bias.SOLUTION: In an embodiment, a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and modulating the amplitude of the wafer voltage to produce a predetermined number of pulses to determine an ion energy distribution function. In another embodiment a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and applying a ramp voltage to the electrode that overcompensates for ion current on the wafer or applying a ramp voltage to the electrode that undercompensates for ion current on the wafer.SELECTED DRAWING: Figure 8

Description

[Technical field]

[0001] FIELD OF THE DISCLOSURE Embodiments of the present disclosure relate generally to systems and methods for processing a substrate, and more particularly, to systems and methods for plasma processing a substrate.

[0002] A typical reactive ion etching (RIE) plasma processing chamber includes an RF bias generator that supplies a radio frequency (RF) voltage to a "power electrode" and a metal base plate embedded in an "electrostatic chuck" (ESC), more commonly referred to as the "cathode." Figure 1(a) shows a plot of a typical RF voltage supplied to the power electrode in a typical processing chamber. The power electrode is capacitively coupled to the processing system's plasma through a ceramic layer that is part of the ESC assembly. The nonlinear, diode-like nature of the plasma sheath rectifies the applied RF electric field and causes a direct current (DC) voltage drop, or "self-bias," to appear between the cathode and the plasma. This voltage drop determines the average energy of the plasma ions accelerated toward the cathode and therefore the etch anisotropy.

[0003] More specifically, ion directionality, feature profile, and mask and stop layer selectivity are controlled by the ion energy distribution function (IEDF). In a plasma with RF bias, the IEDF typically has two peaks at low and high energies with a population of ions in between. The presence of a population of ions in between the two peaks of the IEDF reflects the fact that the voltage drop between the cathode and the plasma oscillates with the bias frequency. If a lower frequency, e.g., 2 MHz RF bias generator is used to obtain a higher self-bias voltage, the energy difference between these two peaks can be significant and etching with ions at the low energy peak can be more isotropic, leading to bowing of the feature walls. Compared to high energy ions, low energy ions are less effective in reaching the bottom corners of the feature (e.g., due to charging effects) but sputter less mask material. This is important in high aspect ratio etching applications (e.g., hard mask openings, etc.).

[0004] As feature sizes continue to shrink and aspect ratios increase, feature profile control requirements become more stringent while having a well-controlled IEDF at the substrate surface during processing becomes more desirable. A single-peak IEDF can be used to construct any IEDF, including a two-peak IEDF with independently controlled peak height and peak energy, which is highly beneficial for precision plasma processing. To generate a single-peak IEDF, it is necessary to have a nearly constant voltage at the substrate surface relative to the plasma, i.e., the sheath voltage, which determines the ion energy. Assuming that the plasma potential (which in processing plasmas is typically zero or close to ground potential) is constant in time, it is necessary to maintain the voltage at the substrate relative to ground, i.e., the substrate voltage, nearly constant. This cannot be achieved by simply applying a DC voltage to the power electrode, since the ion current is constantly charging the substrate surface. As a result, the full applied DC voltage will be dropped across the substrate and the ceramic part of the ESC (i.e., the chuck capacitance), not the plasma sheath (i.e., the sheath capacitance). To overcome this, a specially shaped pulsed bias scheme was developed where the applied voltage is shared between the chuck volume and the sheath volume (we neglect the voltage drop at the substrate since the substrate volume is usually much larger than the sheath volume). This scheme compensates for the ion current, which allows the sheath and substrate voltages to remain constant for up to 90% of each bias voltage cycle. More precisely, this bias scheme allows the maintenance of a specific substrate voltage waveform, which can be described as a series of periodic short positive pulses on top of a negative DC offset (Figure 1(b)). During each pulse, the substrate potential reaches the plasma potential and the sheath collapses briefly, but for ∼90% of each cycle the sheath voltage remains constant and equal to the negative voltage jump at the end of each pulse, thus determining the average ion energy. Figure 1(a) shows a plot of the specially shaped pulsed bias voltage waveform developed to generate this specific substrate voltage waveform, thereby allowing the sheath voltage to remain nearly constant.As shown in Figure 2, the shaped pulse bias waveform has two functions: (1) a positive jump to remove the excess charge accumulated on the chuck capacitance during the compensation phase, (2) a sheath voltage (V). SH ) value to set the negative jump (V OUT ) - i.e., V OUT is shared between the chuck capacitance and the sheath capacitance connected in series, so a negative jump in the substrate voltage waveform is determined (however, V OUT (wherein the sheath voltage is generally greater than the negative jump in the substrate voltage waveform), and (3) a negative voltage ramp to compensate for the ion current and keep the sheath voltage constant during this long "ion current compensation phase." We emphasize that there may be other shaped pulsed bias waveforms that can also maintain the particular substrate voltage waveform shown in FIG. 1(b) (characterized by a nearly constant sheath voltage) and thus generate a monoenergetic IEDF. For example, if the electrostatic chuck capacitance is much larger than the sheath capacitance, the negative voltage ramp phase described in (3) above can be replaced with a constant voltage phase. These other shaped pulsed bias waveforms can also be used to implement some of the systems and methods proposed below, and we will note them when applicable.

[0005] Although a single peak IEDF is widely considered to be a highly desirable IEDF shape that results in improved selectivity and feature profile, some etch applications require an IEDF with a different shape (such as a wider shaped IEDF).

[0006] Provided herein are systems and methods for generating arbitrarily shaped ion energy distribution functions using shaped pulsed bias.

[0007] In some embodiments, the method includes applying a shaped pulse bias to an electrode of a process chamber in a predetermined manner and determining the amplitude of a negative voltage jump (V OUT ), and hence the sheath voltage (V SH) where the relative number of pulses at a particular amplitude determines the relative ion fraction at the ion energy corresponding to that amplitude. We emphasize that the present scheme can be implemented with any shaped pulsed bias waveform (not necessarily that shown in FIG. 1(a)) that can maintain the particular substrate voltage waveform shown in FIG. 1(b) (characterized by a nearly constant sheath voltage) and thus generate a monoenergetic IEDF.

[0008] In some further embodiments, the method includes applying a shaped pulsed bias with a voltage waveform as shown in Figure 1(a) and generating a voltage ramp during an ion compensation phase that has a more negative slope (dV / dt) than required to keep the substrate voltage constant, i.e., overcompensating the ion current. In some further embodiments, the method includes applying a shaped pulsed bias with a voltage waveform as shown in Figure 1(a) and generating a voltage ramp during an ion compensation phase that has a less negative slope (dV / dt) than required to keep the substrate voltage constant, i.e., undercompensating the ion current.

[0009] Other and further embodiments of the present disclosure are described below. [Brief description of the drawings]

[0010] Embodiments of the present disclosure, briefly summarized above and described in more detail below, can be understood by reference to exemplary embodiments of the present disclosure illustrated in the accompanying drawings, which, however, depict only typical embodiments of the present disclosure and are therefore not to be construed as limiting the scope, which may include other equally effective embodiments.

[0011] [Figure 1(a)] 1 shows a plot of a specially shaped pulse developed to allow the sheath voltage to remain constant. [Figure 1(b)]FIG. 1(b) shows a plot of a particular substrate voltage waveform resulting from the biasing scheme of FIG. 1(a), which allows the sheath and substrate voltages to be held constant for up to 90% of each bias voltage cycle. [Figure 1(c)] 1(b) shows a plot of the single-peak IEDF resulting from the biasing scheme of FIG. 1(a). [Diagram 2] 1 illustrates a substrate processing system in which embodiments according to the present principles may be applied. [Diagram 3] 1 shows a plot of a voltage pulse for setting the value of a substrate voltage, in accordance with an embodiment of the present principles. [Figure 4] 4 shows a diagram of the resulting IEDF for selected voltage pulses of FIG. 3, in accordance with an embodiment of the present principles. [Diagram 5] 2 shows a plot of the specially shaped pulse of FIG. 1 modified to overcompensate and undercompensate the ion current, in accordance with an embodiment of the present principles. [Figure 6] 6 shows a plot of the induced voltage pulse on the wafer resulting from the specially shaped pulse of FIG. 5. [Figure 7] FIG. 7 shows a resulting IEDF plot for the voltage pulse of FIG. 6, in accordance with an embodiment of the present principles. [Figure 8] 1 shows a flow diagram of a method for generating an arbitrarily shaped ion energy distribution function, in accordance with an embodiment of the present principles; [Figure 9] 1 shows a flow diagram of a method for generating an arbitrarily shaped ion energy distribution function, in accordance with another embodiment of the present principles; [Figure 10] 1 shows a flow diagram of a method for generating an arbitrarily shaped ion energy distribution function, in accordance with another embodiment of the present principles;

[0012] To facilitate understanding, the same reference numbers have been used whenever possible to designate identical elements common to the drawings. The drawings may not be drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be beneficially incorporated in other embodiments without further description. DETAILED DESCRIPTION

[0013] Provided herein are systems and methods for generating an arbitrarily shaped ion energy distribution function using a shaped pulse bias. The systems and methods of the present invention advantageously facilitate the generation of an arbitrarily shaped ion energy distribution function (IEDF) by amplitude modulation of a shaped pulse bias waveform. Embodiments of the methods of the present invention can advantageously shape the voltage waveform to provide an arbitrary IEDF shape, for example an IEDF having a broader profile. In the description herein, the terms wafer and substrate are used interchangeably.

[0014] FIG 2 illustrates a high level schematic diagram of a substrate processing system 200 to which embodiments in accordance with the present principles may be applied. The substrate processing system 200 of FIG 2 illustratively includes a substrate support assembly 205, and a bias power supply 230. In the embodiment of FIG 2, the substrate support assembly 205 includes a substrate support pedestal 210, a power electrode 213, and a ceramic layer 214 that separates the power electrode 213 from a surface 207 of the substrate support assembly 205. In various embodiments, the system 200 of FIG 2 may include components of a plasma processing chamber (e.g., SYM3®, DPS®, ENABLER®, ADVANTEDGE™, and AVATAR™ processing chambers available from Applied Materials, Inc., Santa Clara, Calif., or other processing chambers).

[0015] In some embodiments, the bias power supply 230 includes a memory for storing a control program and a processor for executing the control program, which controls the voltage supplied by the bias power supply 230 to the power electrode 213 to at least modulate the amplitude of the wafer voltage to generate a predetermined number of pulses, alternatively or additionally to apply a negative jump voltage to the electrode to set a wafer voltage for the wafer, or to apply a ramp voltage to the electrode that overcompensates or undercompensates the ion current on the wafer according to embodiments of the present principles described herein. In an alternative embodiment, the substrate processing system 200 of FIG. 2 includes an optional controller 220 including a memory for storing a control program and a processor for executing the control program in communication with the bias power supply 230, which controls the voltage supplied by the bias power supply 230 to the power electrode 213 to at least modulate the amplitude of the wafer voltage to generate a predetermined number of pulses, alternatively or additionally to apply a negative jump voltage to the electrode to set a wafer voltage for the wafer, or to apply a ramp voltage to the electrode that overcompensates or undercompensates the ion current on the wafer according to embodiments of the present principles described herein.

[0016] During operation, the substrate to be processed is placed on the surface of the substrate support pedestal 210. In the system 200 of FIG. 2, a voltage (shaped pulsed bias) from the bias power supply 230 is supplied to the power electrode 213. Due to the nonlinear and diode-like nature of the plasma sheath, the applied RF electric field is rectified and a direct current (DC) voltage drop, i.e., "self-bias", appears between the cathode and the plasma. This voltage drop determines the average energy of the plasma ions accelerated towards the cathode. The ion directivity and feature profile are controlled by the ion energy distribution function (IEDF). According to the embodiment of the present principles described herein, the bias power supply 230 can supply a specially shaped pulsed bias to the power electrode 213. This bias scheme can maintain a specific substrate voltage waveform that can be described as a periodic series of short positive pulses on top of a negative DC offset (FIG. 1(b)). During each pulse, the substrate potential reaches the plasma potential and the sheath collapses briefly, but for ~90% of each cycle the sheath voltage remains constant and equal to the negative voltage jump at the end of each pulse, thus determining the average ion energy.

[0017] 1(a), the amplitude of the shaped pulsed bias signal, and therefore the wafer voltage, is represented as Vout. The inventors have determined that in at least some embodiments according to the present principles, the shape of the IEDF can be controlled by modulating the amplitude and frequency of the shaped pulsed bias signal. This method involves applying a shaped pulsed bias to an electrode of the process chamber in a predetermined manner, and modulating the amplitude and frequency of the negative voltage jump (V OUT ), and hence the sheath voltage (V SH), where the relative number of pulses at a particular amplitude determines the relative ion fraction at the ion energy corresponding to this amplitude. The number of pulses at each amplitude must be sufficient to constitute a transition from one sheath voltage to the next, during which the respective ESC charge is established. Then, a burst (FIG. 3) containing a train of pulses with a given amplitude is repeated many times over the duration of the processing step. The active bursts (on phases) can be alternated with silent periods (off phases). The duration of each on phase relative to the total duration of the burst (combination of on and off phases) is determined by the duty cycle, where the total duration (period) of the burst is equal to the inverse of the burst frequency. Alternatively, each burst may be composed of a train of pulses with a given (and identical) amplitude, and then the IEDF is defined using a train of bursts with different amplitudes. The relative number of bursts (in a train) with a given amplitude determines the relative amount of ions at a particular energy, and the negative jump amplitude (V) of the pulses in these bursts determines the relative amount of ions at a particular energy. OUT) determines the ion energy. The predefined burst train is then repeated many times during the recipe step. For example, to generate a two-peak IEDF with 25% of the ions in the low-energy peak and 75% in the high-energy peak, the burst train should consist of three bursts of pulses with a negative jump amplitude corresponding to the high ion energy and one burst of a pulse with an amplitude corresponding to the low ion energy. Such a train can be represented as "HHHL". Then, to generate an IEDF with three energy peaks of the same height (high (H), medium (M) and low (L)), a train of three bursts of different amplitudes corresponding to ion energies H, M and L is needed, which can be represented as "HML". A single-peak IEDF is generated by a train consisting of a single burst (including both on and off phases) of pulses with a predefined negative jump amplitude. We emphasize that the present scheme can be implemented with any shaped pulsed bias waveform (not necessarily the one shown in FIG. 1(a)) that can maintain the particular substrate voltage waveform shown in FIG. 1(b) (characterized by a nearly constant sheath voltage) and thus generate a monoenergetic IEDF.

[0018] For example, Figure 3 shows a plot of voltage pulses that a power supply should supply to an electrode of a process chamber to set a value of the substrate voltage in accordance with one embodiment of the present principles. In the embodiment of Figure 3, the full jump in the wafer voltage determines the ion energy, and the number of pulses (e.g., total duration) that corresponds to the voltage jump determines the relative ion fraction at this energy (i.e., IEDF).

[0019] Figure 4 shows the resulting IEDF profile for selected voltage pulses of Figure 3, in accordance with one embodiment of the present principles. As shown in Figure 4, the multiple voltage pulses of Figure 3 result in a broader IEDF, which may be useful in applications such as high aspect ratio etching of hard mask openings that require a broader ion energy distribution.

[0020] In accordance with the present principles, by controlling the amplitude and frequency of the voltage pulses that the power supply delivers to the electrodes in the process chamber, one can obtain a well-controlled and well-defined IEDF shape required for a particular etch process and application.

[0021] In another embodiment according to the present principles, a method includes applying a shaped pulse bias of the voltage waveform shown in FIG. 1(a) and generating a voltage ramp during the ion compensation phase that has a larger negative slope (dV / dt) than required to keep the substrate voltage constant, i.e., overcompensating the ion current. This results in the substrate voltage waveform shown in FIG. 6, where the magnitude of the substrate voltage (and therefore the sheath voltage and instantaneous ion energy) increases during the ion current compensation phase. This generates the ion energy spread and non-monoenergetic IEDF shown in FIG. 7, with the IEDF width controlled by the negative slope of the applied shaped pulse bias waveform. For example, FIG. 5 shows a plot of the special shaped pulse of FIG. 1(a) modified to overcompensate the ion current charging the wafer, according to an embodiment of the present principles. As shown in FIG. 5, the voltage ramp of FIG. 1(a), intended to compensate the ion current charging the wafer, is modified to overcompensate the ion current charging the wafer in the special shaped pulse of FIG. 5 of the present principles. As shown in FIG. 5, the positive jump of FIG. 1 intended to neutralize the wafer surface no longer neutralizes the wafer surface in the specially shaped pulse of FIG. 5 of the present principle.

[0022] Figure 6 shows a plot of the induced voltage pulse on the wafer resulting from the specially shaped pulse of Figure 5. As shown in Figure 6, the voltage jump determines the ion energy and the energy spread is determined by the minimum and maximum wafer voltage jump during the cycle.

[0023] Figure 7 shows the resulting IEDF plot for the voltage pulse of Figure 6 in accordance with one embodiment of the present principles. As shown in Figure 7, the IEDF resulting from application of the overcompensated specially shaped pulse of Figure 5 contains a broader double-peaked profile, but Vmin and Vmax, which determine the IEDF width, do not necessarily coincide with the energy peaks in the profile. Overcompensation according to the present principles allows for more precise control than can be achieved by mixing two RF frequencies (e.g., 2 MHz and 13.56 MHz).

[0024] In another embodiment according to the present principles, a method includes applying a shaped pulse bias of the voltage waveform shown in FIG. 1(a) and generating a voltage ramp during an ion compensation phase that has a smaller negative slope (dV / dt) than required to keep the substrate voltage constant, i.e., undercompensating the ion current. This results in the substrate voltage waveform shown in FIG. 6, which reduces the magnitude of the substrate voltage (and therefore the sheath voltage and instantaneous ion energy) during the ion current compensation phase. This produces the ion energy spread and non-monoenergetic IEDF shown in FIG. 7, with the IEDF width controlled by the negative slope of the applied shaped pulse bias waveform. For example, referring back to FIG. 5, FIG. 5 shows a plot of the special shaped pulse of FIG. 1 modified to undercompensate the ion current charging the wafer, according to one embodiment of the present principles. As shown in FIG. 5, the voltage ramp of FIG. 1, intended to compensate the ion current charging the wafer, is modified in the special shaped pulse of FIG. 5 of the present principles to undercompensate the ion current charging the wafer. As shown in FIG. 5, the positive jump of FIG. 1 intended to neutralize the wafer surface no longer neutralizes the wafer surface in the specially shaped pulse of FIG. 5 of the present principles.

[0025] Referring back to Figure 7, a resulting IEDF plot is shown for the under-compensation of one embodiment of the present principles. As shown in Figure 7, the IEDF resulting from application of the under-compensation specially shaped pulse of Figure 5 contains a broader single-peak profile.

[0026] 8 shows a flow diagram of a method for generating an arbitrarily shaped ion energy distribution function, in accordance with an embodiment of the present principles. The method 800 may begin at 802, during which a negative jump voltage is applied to an electrode to set the wafer voltage. The method 800 may then proceed to 804.

[0027] At 804, the amplitude of the wafer voltage is modulated to produce a predetermined number of pulses and an ion energy distribution function is determined.

[0028] The method 800 may then end.

[0029] 9 shows a flow diagram of a method for generating an arbitrarily shaped ion energy distribution function in accordance with another embodiment of the present principles. The method 900 may begin at 902, during which a positive jump voltage is applied to an electrode of a processing chamber to neutralize the wafer surface. The method 900 may then proceed to 904.

[0030] A negative jump voltage is applied to the electrode to set the wafer voltage at 904. The method 900 can then proceed to 906.

[0031] A ramp voltage is applied to the electrodes to overcompensate the ion current on the wafer at 906. The method 900 may then end.

[0032] 10 shows a flow diagram of a method for generating an arbitrarily shaped ion energy distribution function in accordance with another embodiment of the present principles. The method 1000 may begin at 1002, during which a positive jump voltage is applied to an electrode of a processing chamber to neutralize the wafer surface. The method 1000 may then proceed to 1004.

[0033] At 1004, a negative jump voltage is applied to the electrode to set the wafer voltage. The method 1000 can then proceed to 1006.

[0034] At 1006, a ramp voltage is applied to the electrodes to undercompensate the ion current on the wafer. The method 1000 may then end.

[0035] While the forgoing is directed to embodiments of the present disclosure, other and further embodiments of the present disclosure may be made without departing from the basic scope thereof.

Claims

1. Applying a negative jump voltage to the electrodes of the processing chamber to set a wafer voltage for the wafer; Modulating the wafer voltage with different amplitudes; Generating a predetermined number of pulses at each of the different amplitudes; Determining a relative ion fraction in the ion energy corresponding to at least one of the different amplitudes based on the number of pulses having the same amplitude generated at at least one of the different amplitudes. A method comprising.

2. The method according to claim 1, comprising applying a positive jump voltage to the electrodes of the processing chamber to neutralize the surface of the wafer.

3. The method according to claim 2, wherein the positive jump voltage is applied before the negative jump voltage is applied.

4. The method according to claim 1, wherein the modulation of the amplitude of the wafer voltage controls a characteristic profile of the resulting ion energy distribution function.

5. The method according to claim 1, wherein the amplitude of the wafer voltage is modulated to generate a desired ion energy distribution function.

6. The method according to claim 5, wherein generating a desired ion energy distribution function induces a specific bias voltage waveform on the wafer.

7. The method according to claim 1, comprising modulating the wafer voltage at different times to generate an ion energy distribution function having a plurality of energy peaks.

8. The method according to claim 7, wherein the ion fraction for each of the energy peaks is determined by the number of pulses generated during each modulation of the wafer voltage at different times.

9. Before applying the negative jump voltage to the electrodes of the processing chamber, applying a positive jump voltage to the electrodes of the processing chamber to neutralize the surface of the wafer; The method according to claim 1, comprising applying a ramp voltage that overcompensates the ion current on the wafer to the electrodes.

10. The step of applying a ramp voltage that overcompensates the ion current on the wafer to the electrodes includes applying a ramp voltage having a larger negative gradient than required to keep the voltage on the wafer constant to the electrodes. The method according to claim 9.

11. The method according to claim 9, wherein the minimum and maximum voltages induced on the wafer determine the width of the resulting ion energy distribution function.

12. The method according to claim 9, comprising the step of adjusting the slope of the lamp voltage to generate a desired ion energy distribution function.

13. The method according to claim 12, generating a desired ion energy distribution function and inducing a specific bias voltage waveform on the wafer.

14. Before applying a negative jump voltage to the electrodes of the processing chamber, applying a positive jump voltage to the electrodes of the processing chamber to neutralize the surface of the wafer, and applying a lamp voltage to the electrodes to compensate for the insufficient ion current on the wafer, the method according to claim 1.

15. The step of applying a lamp voltage to the electrodes to compensate for the insufficient ion current on the wafer includes applying a lamp voltage having a negative slope smaller than that required to maintain a constant voltage on the wafer, the method according to claim 14.

16. The method according to claim 14, wherein the minimum voltage and the maximum voltage induced on the wafer determine the width of the resulting ion energy distribution function.

17. The method according to claim 14, comprising the step of adjusting the slope of the lamp voltage to generate a desired ion energy distribution function.

18. The method according to claim 17, generating a desired ion energy distribution function and inducing a specific bias voltage waveform on the wafer.

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