Imaging element and imaging apparatus

Abstract

To provide an imaging element for blocking a noise caused by stray light and an imaging apparatus.SOLUTION: An imaging element 400 includes a first semiconductor layer 100 which is provided with a plurality of image forming areas 187, a second semiconductor layer 200 which is laminated on the first semiconductor layer and provided with an image processing part for processing a signal outputted by the image forming areas, a signal line 150 which connects the image forming areas and the image processing part, and a wiring-cum-light shielding part 160 which has an opening 162 through which the signal line passes and shields light from a processing part. The wiring-cum-light shielding part may be formed by extending a part of a wiring between the first semiconductor layer and the second semiconductor layer in a direction along the main surface of a layer. The imaging apparatus includes the imaging element.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present invention relates to an imaging element and an imaging apparatus. [Background technology]

[0002] Patent document 1 states that "a light-shielding member is arranged between the pixel region and the peripheral circuit section to block light emitted from the active element of the peripheral circuit section when the active element is in operation from entering the photodiode PD of the pixel." [Prior art document] [Patent documents] [Patent Document 1] JP2015-128187 Summary of the Invention

[0003] In a first aspect of the present invention, an imaging element includes a first semiconductor layer having a plurality of pixels, a second semiconductor layer stacked on the first semiconductor layer and having a processing unit that processes signals output by the pixels, signal lines connecting the pixels and the processing unit, and a light-shielding unit having an opening through which the signal line passes and that blocks light from the processing unit.

[0004] In a second aspect of the present invention, an imaging device includes the above-mentioned imaging element.

[0005] The above summary of the invention does not list all of the features of the present invention. Also, subcombinations of these features may also be inventions. [Brief description of the drawings]

[0006] [Figure 1] FIG. 4 is a diagram showing an overview of an image sensor 400 according to the present embodiment. [Diagram 2] An example of a specific configuration of the pixel unit 110 is shown. [Diagram 3] 2 shows an example of a circuit configuration of the pixel 112. [Figure 4] An example of a more specific configuration of the processing circuit unit 210 is shown. [Diagram 5]A cross section of an imaging element 400 is shown diagrammatically. [Figure 6] 1 is a schematic diagram illustrating a wiring and light shielding portion 160. FIG. [Figure 7] 13 is a schematic diagram illustrating another light blocking portion 154. FIG. [Figure 8] 13 is a schematic diagram illustrating further other light blocking portions 152 and 154. FIG. [Figure 9] 13 is a schematic diagram for explaining other wiring and light shielding portions 160 and 164. FIG. [Figure 10] 13 is a schematic diagram illustrating another wiring and light shielding portion 168. FIG. [Figure 11] 13 is a schematic diagram illustrating yet another wiring and light shielding portion 169. FIG. [Figure 12] FIG. 2 is a block diagram showing an example of the configuration of an imaging device 500 according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0008] In this specification, the X-axis and the Y-axis are mutually orthogonal, and the Z-axis is orthogonal to the XY plane. The XYZ-axes form a right-handed system. The direction parallel to the Z-axis may be referred to as the stacking direction of the image sensor 400. In this specification, the terms "up" and "down" are not limited to the up and down directions in the direction of gravity. These terms merely refer to relative directions in the Z-axis direction. Note that in this specification, the arrangement in the X-axis direction is described as a "row" and the arrangement in the Y-axis direction is described as a "column", but the matrix direction is not limited to this. In addition, the Z-axis direction is the optical axis direction in which light from the subject enters.

[0009] Fig. 1 is a diagram showing an overview of an image sensor 400 according to this embodiment. The image sensor 400 captures an image of a subject. The image sensor 400 generates image data of the captured subject. The image sensor 400 includes a first substrate 100 and a second substrate 200. As shown in Fig. 1, the first substrate 100 is laminated on the second substrate 200.

[0010] The first substrate 100 has a pixel section 110. The pixel section 110 outputs a pixel signal based on incident light. The first substrate 100 may be called a pixel chip.

[0011] The second substrate 200 has a processing circuit section 210 and a peripheral circuit section 230. The second substrate 200 may be called a signal processing chip.

[0012] The processing circuit unit 210 receives the pixel signals output from the first substrate 100. The processing circuit unit 210 processes the input pixel signals. For example, the processing circuit unit 210 performs a process of converting an analog signal into a digital signal. Specifically, the processing circuit unit 210 performs a process of converting the input pixel signals into a digital signal. The processing circuit unit 210 may perform other signal processing. Examples of other signal processing include noise removal processing such as analog or digital CDS (Correlated Double Sampling).

[0013] The processing circuit unit 210 of this example is disposed at a position facing the pixel unit 110 on the second substrate 200. That is, the processing circuit unit 210 is disposed so as to at least partially overlap the pixel unit 110 in the optical axis direction. The processing circuit unit 210 may output a control signal to the pixel unit 110 for controlling the driving of the pixel unit 110.

[0014] The peripheral circuit section 230 controls the driving of the processing circuit section 210. The peripheral circuit section 230 is disposed around the processing circuit section 210 on the second substrate 200. The peripheral circuit section 230 may be electrically connected to the first substrate 100 and control the driving of the pixel section 110.

[0015] The imaging element 400 may have a third substrate stacked on the second substrate 200 in addition to the first substrate 100 and the second substrate 200. For example, the third substrate is a memory chip, and performs image processing according to a signal output by the second substrate 200. The structure of the imaging element 400 may be a back-illuminated type or a front-illuminated type. An example of a back-illuminated type will be described below.

[0016] 2 shows an example of a specific configuration of the pixel section 110. In this example, an enlarged view of the pixel section 110 and a pixel block 120 provided in the pixel section 110 is shown.

[0017] The pixel section 110 has a plurality of pixel blocks 120 arranged side by side along the row and column directions. In this example, the pixel section 110 has M×N (M and N are natural numbers) pixel blocks 120. In this example, the case where M is equal to N is illustrated, but M and N may be different.

[0018] The pixel block 120 has at least one pixel 112. The pixel block 120 in this example has m×n pixels 112 (m and n are natural numbers). For example, the pixel block 120 has 16×16 pixels 112. The number of pixels 112 corresponding to the pixel block 120 is not limited to this. In this example, a case where m is equal to n is illustrated, but m may be different from n. The number of pixels 112 corresponding to the pixel block 120 may be one. The pixel block 120 has a plurality of pixels 112 connected to a common control line in the row direction. For example, each pixel 112 of the pixel block 120 is connected to a common control line so as to be set to the same exposure time. In one example, n pixels 112 arranged in the row direction are connected by a common control line.

[0019] On the other hand, different exposure times may be set among the multiple pixel blocks 120. That is, the pixels 112 in each pixel block 120 have the same exposure time, but may be set to different exposure times among the other pixel blocks 120. For example, when the pixels 112 in a pixel block 120 are connected in the row direction by a common control line, the pixels 112 in the other pixel blocks 120 are commonly connected by a different control line.

[0020] The pixel blocks 120 are arranged corresponding to the processing blocks 220 described below. In this embodiment, one pixel block 120 is arranged for one processing block 220.

[0021] The pixels 112 have a photoelectric conversion function of converting light into an electric charge. The pixels 112 accumulate the electric charges generated by the photoelectric conversion. The m pixels 112 are arranged in a line in the column direction and connected to a common signal line 122. The m pixels 112 are arranged in a line in n columns in the row direction in the pixel block 120.

[0022] In other words, the pixel block 120 is a group of multiple pixels 112 connected by a common control line. Also, the pixel block 120 can be said to be the smallest unit of a circuit for multiple pixels 112 to which the same exposure time is set.

[0023] 3 shows an example of a circuit configuration of the pixel 112. The pixel 112 includes a photoelectric conversion unit 104, a transfer unit 123, a reset unit 126, and a pixel output unit 127. The pixel output unit 127 has an amplifier unit 128 and a selection unit 129. In this example, the transfer unit 123, the reset unit 126, the amplifier unit 128, and the selection unit 129 are described as N-channel type FETs, but the type of transistor is not limited to this.

[0024] The photoelectric conversion unit 104 has a photoelectric conversion function of converting light into electric charges. The photoelectric conversion unit 104 accumulates the electric charges resulting from photoelectric conversion. The photoelectric conversion unit 104 is, for example, a photodiode.

[0025] The transfer unit 123 transfers the charge accumulated in the photoelectric conversion unit 104 to the storage unit 125. The transfer unit 123 is an example of a transfer gate that transfers the charge of the photoelectric conversion unit 104. In other words, the transfer unit 123 serves as a gate, the photoelectric conversion unit 104 serves as a source, and the storage unit 125 serves as a drain, forming a so-called transfer transistor. The gate terminal of the transfer unit 123 is connected to a local transfer control line 141 for each pixel block 120 for inputting a control signal φTX1.

[0026] The charge from the photoelectric conversion unit 104 is transferred to the accumulation unit 125 by the transfer unit 123. The accumulation unit 125 is an example of a floating diffusion (FD).

[0027] The reset unit 126 discharges the charge in the storage unit 125 to a power supply wiring to which a predetermined power supply voltage VDD is supplied. A gate terminal of the reset unit 126 is connected to a global reset control line 143 across multiple pixel blocks 120 for inputting a reset control signal φRST.

[0028] The pixel output unit 127 outputs a signal based on the potential of the accumulation unit 125 to the signal line 122. The pixel output unit 127 has an amplifier unit 128 and a selection unit 129. The amplifier unit 128 has a gate terminal connected to the accumulation unit 125, a drain terminal connected to a power supply wiring to which a power supply voltage VDD is supplied, and a source terminal connected to the drain terminal of the selection unit 129.

[0029] The selection unit 129 controls the electrical connection between the pixel 112 and the signal line 122. When the selection unit 129 electrically connects the pixel 112 and the signal line 122, a pixel signal is output from the pixel 112 to the signal line 122. A gate terminal of the selection unit 129 is connected to a global selection control line 144 across the multiple pixel blocks 120 for inputting a selection control signal φSEL. A source terminal of the selection unit 129 is connected to the load current source 121.

[0030] The load current source 121 supplies a current to the signal line 122. The load current source 121 may be provided on the first substrate 100 or may be provided on the second substrate 200.

[0031] Hereinafter, any one of the charges accumulated in the photoelectric conversion unit 104, the charges transferred to the accumulation unit 125, and the signal based on the potential of the accumulation unit 125, or all of these may be referred to as a pixel signal.

[0032] In other words, the pixel 112 includes at least one photoelectric conversion unit 104 and a pixel output unit 127 as a readout unit that reads out an image signal from the at least one photoelectric conversion unit 104 to a signal line 122. The pixel 112 can be said to be the smallest unit of a circuit that outputs a pixel signal that constitutes an image to the signal line 122.

[0033] 4 shows an example of a more specific configuration of the processing circuit section 210. In this example, an enlarged view of the processing circuit section 210 and a processing block 220 provided in the processing circuit section 210 is shown.

[0034] The processing circuit section 210 has processing blocks 220 arranged side by side in the row and column directions. The processing circuit section 210 of this example has M×N processing blocks 220.

[0035] The processing blocks 220 are disposed at positions corresponding to the pixel blocks 120. For example, the processing blocks 220 and the pixel blocks 120 are disposed at positions overlapping each other when viewed from the optical axis direction. In this case, the areas of the processing blocks 220 and the pixel blocks 120 may be substantially the same, including the margin between the adjacent blocks.

[0036] The processing block 220 controls the driving of the corresponding pixel block 120. For example, the processing block 220 controls the exposure time of the pixel block 120. The processing block 220 also has a processing circuit such as an AD converter, and processes a signal output from the pixel block 120. In one example, the processing block 220 converts an analog pixel signal output from the corresponding pixel block 120 into a digital signal. The processing block 220 in this example includes an exposure control unit 10, a pixel driving unit 20, a joining unit 30, a signal conversion unit 40, and a signal output unit 50.

[0037] The exposure control unit 10 controls exposure of the multiple pixels 112. The exposure control unit 10 generates a signal for controlling the exposure time of the pixels 112. In one example, the exposure control unit 10 controls the exposure time for each pixel block 120 by adjusting at least one of the start timing or end timing of the exposure.

[0038] The pixel driving unit 20 is electrically connected to the multiple pixels 112. The pixel driving unit 20 selects and drives an arbitrary pixel 112 from the multiple pixels 112 based on a signal from the exposure control unit 10. The pixel driving unit 20 is disposed at a position corresponding to the m pixels 112 arranged in the column direction. The image sensor 400 can set the exposure time for each pixel block 120 according to the intensity of incident light, thereby expanding the dynamic range.

[0039] The bonding unit 30 electrically bonds the first substrate 100 and the second substrate 200. The bonding unit 30 inputs the pixel signals input from the first substrate 100 to the signal conversion unit 40. The bonding units 30 are provided corresponding to the n pixels 112 arranged in the row direction, and input the pixel signals to the signal conversion unit 40 for each column.

[0040] The signal conversion unit 40 converts the analog signal output by the pixel unit 110 into a digital signal. In this example, the signal conversion unit 40 converts the analog pixel signal into a digital signal. The signal conversion unit 40 sequentially converts analog signals from m pixels 112 arranged in a column direction into digital signals. The signal conversion unit 40 converts analog signals from the pixels 112 arranged in n columns in a row direction into digital signals in parallel. This can also be said to be a so-called column ADC method for one pixel block 120.

[0041] The signal output section 50 receives the digital signal from the signal conversion section 40. In one example, the signal output section 50 temporarily stores the digital signal. The signal output section 50 may include a latch circuit for storing the digital signal.

[0042] Note that, instead of providing one processing block 220 for one pixel block 120, one processing block 220 may be provided for N pixel blocks 120 (N is a natural number equal to or greater than 2). The N pixel blocks 120 corresponding to one processing block may be referred to as a pixel block group. For example, two pixel blocks 120 arranged side by side in the column direction may be treated as one pixel block group, and one processing block 220 may be provided for each pixel block 120. In this case, the processing block 220 may control the exposure time for each pixel block 120.

[0043] In other words, the processing block 220 is electrically connected to at least one pixel block 120 and can be said to be the smallest unit of a circuit that processes pixel signals of the at least one pixel block 120. The processing circuit unit 210 can also be said to be composed of a group of processing blocks 220.

[0044] Fig. 5 is a schematic cross-sectional view of the image sensor 400. In particular, Fig. 5 shows a cross-section passing through the photoelectric conversion unit 104 and the transfer unit 123 in the pixel 112. However, Fig. 5 is simplified for the purpose of explanation, and unless otherwise specified, the position, size, number, and the like of each component are merely schematic examples.

[0045] The first substrate 100 has, along the optical axis direction, a microlens 180, a planarization layer 181, a color filter 182, a planarization layer 183, a pixel formation region 187, a gate oxide film 188, and a wiring layer 190. A light-shielding layer 184 is disposed on the planarization layer 183. In the pixel formation region 187, an element isolation section 186 is disposed together with the configuration of the pixel 112, such as the photoelectric conversion section 104 and the storage section 125. The element isolation section 186 is disposed around the photoelectric conversion section 104, and in the wiring layer 190 which separates the photoelectric conversion section 104 from other elements, wiring 192, signal lines 150, and wiring / light-shielding section 160 are disposed.

[0046] The second substrate 200 has a wiring layer 252, a gate oxide film 256, a circuit region 258, and a substrate 259 along the optical axis direction. The wiring layer 252 has wiring 254. The circuit region 258 has each element of the processing block 220, such as a transistor included in the signal conversion unit 40. The element may be arranged across other regions. For convenience of explanation, FIG. 5 shows a transistor 260 included in the signal conversion unit 40 as the element. The first substrate 100 and the second substrate 200 are electrically connected by bumps 193 and 251 facing each other on the bonding surface 250. In this configuration, the first substrate 100 is an example of a first semiconductor layer, and the second substrate 200 is an example of a second semiconductor layer. Alternatively, the configuration of the first substrate 100 and the configuration of the second semiconductor layer (second substrate 200) may be formed in layers as the first semiconductor layer on one substrate.

[0047] The microlens 180 focuses the incident light onto the photoelectric conversion unit 104. The color filter 182 transmits a predetermined wavelength range, i.e., color, of the light incident on the microlens 180. The light-shielding layer 184 is a film that does not transmit visible light, such as black or metal, and prevents crosstalk between adjacent pixels 112 in the row and column direction. The element isolation unit 186 is a separation band that prevents electrical interference with adjacent pixels in the row and column direction.

[0048] In the above configuration, an active element included in the processing block 220, for example, the transistor 260 included in the signal conversion unit 40, may unintentionally function as a light-emitting diode and emit light when driven. In this case, when the light emitted from the transistor 260 enters the photoelectric conversion unit 104, it is photoelectrically converted and becomes noise in the pixel signal of the light of the subject entering from the microlens 180. For example, the transistor 260 may emit infrared light with a wavelength of about 1000 nm, which is within the sensitivity range of the photoelectric conversion unit 104.

[0049] Therefore, in this embodiment, in at least one of the wiring layer 190 and the wiring layer 252, a part of the wiring is expanded in the planar direction (i.e., the XY direction) to have the function of a light shielding section, and is used as the wiring / light shielding section 160. In other words, a part of the wiring serving as a signal line is thicker than the other part, and this thicker part functions as the wiring / light shielding section 160. In the example of FIG. 5, the wiring / light shielding section 160 of the wiring layer 190 expands in the planar direction below the photoelectric conversion section 104 (i.e., in the optical axis direction). The wiring / light shielding section 160 is, for example, a ground line or a power supply line.

[0050] 6 is a schematic diagram for explaining the wiring / light shielding portion 160. As shown in FIG. 6, the wiring / light shielding portion 160 spreads in the XY plane. However, in this embodiment, the pixels 112 provided on the first substrate 100 are electrically connected to the pixel driving portion 20 and the joint portion 30 of the processing block 220 provided on the second substrate 200 by signal lines 150, respectively. In addition, the pixels 112 and the peripheral circuit portion 230 are electrically connected by other signal lines 150. The wiring / light shielding portion 160 is provided with openings 162 through which these signal lines 150 pass.

[0051] 6, the signal line 150 has a light-shielding portion 152. When the above-mentioned unintended light emission leaks from the opening 162, the light-shielding portion 152 blocks the light and prevents it from reaching the photoelectric conversion unit 104. In other words, the light-shielding portion 152 functions as a lid for the opening 162.

[0052] The light shielding portion 152 spreads from the signal line 150 in the XY direction, that is, in the direction along the main surface of the first substrate 100. In other words, a part of the signal line 150 is thicker than the other parts, and this thicker part functions as the light shielding portion 152. The light shielding portion 152 is preferably large enough to cover the opening 162 when viewed from the optical axis direction. When the wiring layer 190 has a multi-layer structure, the light shielding portion 152 is provided in a layer different from the wiring / light shielding portion 160. In the example of FIG. 6, the light shielding portion 152 is provided in a layer above the wiring / light shielding portion 160, that is, in a layer on the photoelectric conversion portion 104 side. The light shielding portion 152 may be made of the same material as the signal line 150 or a different material. For example, when the signal line 150 is made of aluminum, the light shielding portion 152 may be made of aluminum or copper.

[0053] According to this embodiment, the wiring / light shielding portion 160 and the light shielding portion 152 block light from the processing block 220 such as the transistor 260. This makes it possible to reduce noise in pixel signals caused by the light. The wiring / light shielding portion 160 and the light shielding portion 152 also have the effect of blocking stray light that is incident on the subject from the microlens 180, passes through the photoelectric conversion portion 104, is reflected inside the wiring layer 190, and enters an adjacent photoelectric conversion portion 104.

[0054] Fig. 7 is a schematic diagram illustrating another light-shielding portion 154. For ease of explanation, one signal line 150 and one opening 162 are shown in Fig. 7, but there may be a plurality of signal lines 150 and openings 162.

[0055] 7, the light shielding portion 154 is provided in a layer below the wiring / light shielding portion 160 in the signal line 150. In this case, the light shielding portion 154 may be provided in a layer below the wiring / light shielding portion 160 in the wiring layer 190 of the first substrate 100, or may be provided in the wiring layer 252 of the second substrate 200. The shape and material of the light shielding portion 154 may be the same as those of the light shielding portion 152. Also in the example of FIG. 7, the light shielding portion 154 can block unintended light emission leaking from the opening 162.

[0056] Fig. 8 is a schematic diagram illustrating further other light blocking portions 152, 154. Although one signal line 150 and one opening 162 are shown in Fig. 8 as well, a plurality of signal lines 150 and openings 162 may be provided.

[0057] 8 shows a signal line 150 provided with both the light shielding portion 152 of FIG. 6 and the light shielding portion 154 of FIG. 7. This can also be said to mean that the light shielding portions 152, 154 are provided on both sides of the opening 162 in a direction intersecting the main surface of the first substrate 100. This makes it possible to more reliably block unintended light emission leaking from the opening 162.

[0058] Fig. 9 is a schematic diagram illustrating other wiring and light shielding portions 160, 164. Although one signal line 150 and one opening 162 are shown in Fig. 9 as well, a plurality of signal lines 150 and openings 162 may be provided.

[0059] 9, two wiring / light shielding portions 160 and 164 are provided on different layers. In this case, the two wiring / light shielding portions 160 and 164 may have the same electrical role, such as a ground line and a power line, or may have different electrical roles, such as one being a ground line and the other being a power line.

[0060] Furthermore, opening 162 of wiring and light shielding portion 160 and opening 166 of wiring and light shielding portion 164 are arranged to be offset from each other. When viewed from the optical axis direction, opening 162 of wiring and light shielding portion 160 is covered with wiring and light shielding portion 164, while opening 166 of wiring and light shielding portion 164 is covered with wiring and light shielding portion 160.

[0061] The signal line 150 passes through both of the openings 162, 166 and is connected to the wiring / light shielding portions 160, 164 by an in-plane wiring 156. This allows the signal line 150 to have a so-called crank shape.

[0062] 9, it is possible to more reliably block unintended light emission leaking from the openings 162 and 166. The configuration of FIG. 9 may further include the configurations of FIG. 6 to FIG.

[0063] Fig. 10 is a schematic diagram illustrating another wiring / light shielding portion 168. In the wiring / light shielding portion 168 of Fig. 10, the openings 162a to 162g are arranged in a dispersed manner.

[0064] 6, the openings 162 are provided at positions corresponding to the pixel driving section 20 and the joint section 30 in accordance with the layout of the processing block 220. That is, the openings 162 are concentrated in the -X direction and +Y direction in the block. Therefore, if unintended light is transmitted through the openings 162 and the light shielding section 152, noise is likely to be present in the pixels in the -X direction and +Y direction in the block, while noise is unlikely to be present in the pixels in other areas. Therefore, in this case, noise unevenness occurs within the plane, and the unevenness is likely to be noticeable in the image.

[0065] However, the openings 162a to 162g of the wiring / light shielding portion 168 in Fig. 10 are distributed within the block. Therefore, the noise is widely distributed within the plane, and the unevenness in the image is less noticeable. The signal line 150 passes through each opening 162a, etc., and is electrically connected to the corresponding pixel driving portion 20 and the joint portion 30 by in-plane wiring in a layer below the wiring / light shielding portion 168.

[0066] Fig. 11 is a schematic diagram illustrating yet another wiring / light shielding portion 169. Note that, in Fig. 11, for the sake of simplicity, an opening provided in the wiring / light shielding portion 169 is omitted.

[0067] A plurality of wiring / light shielding sections 169 may be provided in one block and electrically insulated from each other. In this case, the wiring / light shielding sections 169 are arranged at intervals, and the intervals at least partially overlap the boundaries between pixels when viewed from the optical axis direction.

[0068] 11, when the pixels 112 are arranged in the X direction at a pitch a, the wiring / light shielding portions 169 are arranged in the X direction at a pitch 2a. Furthermore, the spaces between adjacent wiring / light shielding portions 169 are made to overlap the boundaries of the pixels 112. This allows unintended light emission to mainly enter the periphery of the pixels 112, making it difficult for noise to be generated, even if the light unintended leaks from the gaps between the adjacent wiring / light shielding portions 169.

[0069] Note that instead of doubling the pitch as in Fig. 11, it may be an integer multiple such as three or four times. Furthermore, the wiring / light shielding portions 169 do not have to be arranged periodically, that is, they do not have to have equal widths. Even in this case, it is preferable that the space between adjacent wiring / light shielding portions 169 overlaps the boundary of the pixels 112. Furthermore, the wiring / light shielding portion 169 in Fig. 11 may be combined with any of the configurations in Figs. 6 to 10.

[0070] In any of the above embodiments, a discharge unit may be provided in the pixel 112. The discharge unit discharges the charge accumulated in the photoelectric conversion unit 104 to a power supply wiring to which a power supply voltage VDD is supplied. As another example, the transfer unit 123 may be omitted. In that case, the accumulation unit 125 does not function as a floating diffusion. The accumulation unit 125 and the pixel output unit 127 may be shared with other pixels. The pixel 112 may be composed of a plurality of photoelectric conversion units 104 and transfer units 123.

[0071] Furthermore, in any of the above embodiments, the processing block 220 may not be provided with the exposure control unit 10 and the pixel driving unit 20, and reading may be performed mainly for each processing block 220, and conversion may be performed by the signal conversion unit 40. In this case, the exposure time of the pixels 112 is controlled not for each pixel block 120, but for the entire pixel unit 110.

[0072] 12 is a block diagram showing an example of the configuration of an image capturing apparatus 500 according to an embodiment. The image capturing apparatus 500 includes an image sensor 400, a system control unit 501, a driving unit 502, a photometry unit 503, a work memory 504, a recording unit 505, a display unit 506, a driving unit 514, and a photographing lens 520.

[0073] The photographing lens 520 guides the subject light beam incident along the optical axis OA to the image sensor 400. The photographing lens 520 is composed of a group of multiple optical lenses, and forms an image of the subject light beam from a scene near its focal plane. The photographing lens 520 may be an interchangeable lens that can be attached to and detached from the imaging device 500. Note that in FIG. 12, the photographing lens 520 is represented by a virtual single lens arranged near the pupil.

[0074] The driving unit 514 drives the photographing lens 520. In one example, the driving unit 514 changes the focus position by moving the optical lens group of the photographing lens 520. The driving unit 514 may also drive an iris diaphragm in the photographing lens 520 to control the amount of subject light entering the image sensor 400.

[0075] The drive unit 502 has a control circuit that executes charge accumulation control such as timing control and area control of the image sensor 400 in accordance with instructions from the system control unit 501. Furthermore, the operation unit 508 receives instructions from the photographer via a release button or the like.

[0076] The image sensor 400 transfers the pixel signal to an image processor 511 in the system controller 501. The image processor 511 generates image data by performing various image processes using the work memory 504 as a workspace. For example, when generating image data in a JPEG file format, a color video signal is generated from a signal obtained in the Bayer array, and then compression processing is performed. The generated image data is recorded in a recording unit 505, and is also converted into a display signal and displayed on a display unit 506 for a preset time.

[0077] The photometry unit 503 detects the luminance distribution of a scene prior to a series of shooting sequences for generating image data. The photometry unit 503 includes an AE sensor with, for example, about one million pixels. The calculation unit 512 of the system control unit 501 receives the output of the photometry unit 503 and calculates the luminance of each area of ​​the scene.

[0078] The calculation unit 512 determines the shutter speed, the aperture value, and the ISO sensitivity according to the calculated luminance distribution. The image sensor 400 may also serve as the photometry unit 503. The calculation unit 512 also executes various calculations for operating the image capture device 500. A part or the whole of the drive unit 502 may be mounted on the image sensor 400. A part of the system control unit 501 may be mounted on the image sensor 400.

[0079] Although the present invention has been described above using the embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It is clear to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the description of the claims that such modifications and improvements can also be included in the technical scope of the present invention.

[0080] It should be noted that the order of execution of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and may be realized in any order unless the output of a previous process is used in a later process. Even if the operational flow in the claims, specifications, and drawings is explained using "first," "next," etc. for convenience, it does not mean that it is essential to perform the process in this order. [Explanation of symbols]

[0081] 10 exposure control section, 20 pixel driving section, 30 joining section, 40 signal conversion section, 50 signal output section, 100 first substrate, 104 photoelectric conversion section, 110 pixel section, 112 pixel, 120 pixel block, 121 load current source, 122 signal line, 123 transfer section, 125 storage section, 126 reset section, 127 pixel output section, 128 amplifier section, 129 selection section, 141 transfer control line, 143 reset control line, 144 selection control line, 150 signal line, 152, 154 light shielding section, 156 in-plane wiring, 160, 164, 168, 169 wiring and light shielding section, 162, 166 opening, 180 microlens, 181, 183 planarization layer, 182 color filter, 184 Light shielding layer, 186 element isolation section, 187 pixel formation area, 188 gate oxide film, 190 wiring layer, 192 wiring, 193, 251 bump, 200 second substrate, 210 processing circuit section, 220 processing block, 250 bonding surface, 252 wiring layer, 254 wiring, 256 gate oxide film, 258 circuit area, 259 substrate, 260 transistor, 400 imaging element, 500 imaging device, 501 system control section, 502 driving section, 503 photometry section, 504 work memory, 505 recording section, 506 display section, 508 operation section, 511 image processing section, 512 calculation section, 514 driving section, 520 photographing lens

Claims

1. A first semiconductor layer having a photoelectric conversion portion that converts light into electric charges; a second semiconductor layer that is a semiconductor layer stacked together with the first semiconductor layer and has a signal processing unit that performs signal processing on a signal based on the charge converted by the photoelectric conversion unit; a signal line that is a wiring through which a signal based on the charge converted by the photoelectric conversion unit is output, the signal line being disposed between the first semiconductor layer and the second semiconductor layer in a first direction in which the first semiconductor layer and the second semiconductor layer are stacked; Equipped with The signal line has an extension portion that extends in a second direction that intersects with the first direction.

2. In the imaging element according to claim 1, The extension portion is disposed between the signal processing unit and the first semiconductor layer in the first direction.

3. The imaging element according to claim 2, The extension portion is an imaging element disposed between the signal processing unit and the photoelectric conversion unit in the first direction.

4. In the imaging element according to claim 1, an imaging element having an opening through which the signal line passes and including a light-shielding portion that blocks light from the signal processing portion;

5. The imaging element according to claim 4 , wherein the light-shielding portion is formed to extend in the second direction.

6. The imaging element according to claim 5, The extension portion is disposed at a position facing the opening of the light-shielding portion in the first direction.

7. The imaging element according to claim 5 , wherein the light-shielding portions are provided on both sides of the opening in a direction intersecting the principal plane of the layer.

8. 5. The imaging element according to claim 4, wherein the signal line has a first layer and a second layer, and the light-shielding portion is formed by offsetting the opening in the first layer from the opening in the second layer.

9. 2. The imaging element according to claim 1, wherein the signal lines are arranged at intervals from each other, and the intervals at least partially overlap with the boundaries of the photoelectric conversion units when viewed from the direction in which the first semiconductor layer and the second semiconductor layer are stacked.

10. a first pixel block and a second pixel block each having pixels; the signal processing unit includes a first processing block that processes a signal output from the first pixel block and a second processing block that processes a signal output from the second pixel block; the first processing block is provided at a position corresponding to the first pixel block in the stacking direction, The image sensor according to claim 1 , wherein the second processing block is provided at a position corresponding to the second pixel block in the stacking direction.

11. An imaging device comprising the imaging element according to claim 1 .

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