Electronic assemblies and methods for making same

Abstract

The present disclosure relates to an electronic assembly. Specifically, according to an embodiment of the present disclosure, an electronic assembly is provided, the electronic assembly includes a circuit board including a plurality of conductive connectors, a plurality of spaced apart semiconductor integrated circuits coupled to a first major surface of the circuit board, a cover layer disposed on the semiconductor integrated circuits and substantially surrounding and covering the semiconductor integrated circuits, a plurality of solder bumps disposed on a second major surface opposite the first major surface of the circuit board to provide electrical connection to the electronic assembly, a first metal foil layer having cuts for exposing the solder bumps and bonded to the second major surface of the circuit board, and a metal coating layer conformally coated on a top surface of the electronic assembly on the first major surface of the circuit board to physically and electrically contact the first metal foil layer and to coat a side surface of the electronic assembly, the metal coating layer extending beyond an edge of the electronic assembly toward the second major surface of the circuit board.

Description

[Technical field]

[0001] The present disclosure relates to electronic assemblies and methods for making same. [Background technology]

[0002] Electronic products typically generate electromagnetic waves, which are waves that are a combination of electric and magnetic fields. Such electromagnetic waves are generated from electronic products and propagate toward the space outside the electronic products, so that the human body or devices are easily exposed to the electromagnetic waves. In particular, exposure of users to electromagnetic waves is harmful to the human body, and exposure of industrial devices and home appliances to electromagnetic waves can cause the devices to malfunction.

[0003] Therefore, in order to prevent the electromagnetic waves generated by electronic products from propagating outside the electronic products, research into techniques for blocking the electromagnetic waves is being actively conducted.

[0004] In addition, societal efforts are being made in various fields to protect the human body from electromagnetic waves and prevent device malfunctions by defining and implementing Electro Magnetic Interference (EMI) certification and Electro Magnetic Susceptibility (EMS) certification. Summary of the Invention [Problem to be solved by the invention]

[0005] The electric fields that make up electromagnetic waves can be easily blocked using conductors, for example by grounding the roof, walls or floors of a building, or by using grounded shielding materials.

[0006] On the other hand, unlike electric fields, magnetic fields that form electromagnetic waves cannot be easily blocked even by using geographical features, and special materials with high magnetic permeability must be used or special methods must be used, but special materials and special methods may require excessive costs and long processing times.

[0007] Therefore, embodiments of the present disclosure have been invented based on the above background, and provide an electronic assembly that can maximize electromagnetic wave blocking performance while minimizing the cost required for fabrication. [Means for solving the problem]

[0008] According to one aspect of the disclosure, an electronic assembly is provided, the electronic assembly including: a circuit board including a plurality of conductive connectors; a plurality of spaced apart semiconductor integrated circuits coupled to a first major surface of the circuit board; a cover layer disposed on the semiconductor integrated circuits and substantially surrounding and covering the semiconductor integrated circuits; a plurality of solder bumps disposed on a second major surface opposite the first major surface of the circuit board to provide electrical connection to the electronic assembly; a first metal foil layer including cuts for exposing the solder bumps, the first metal foil layer being bonded to the second major surface of the circuit board; and a metal coating layer conformally coated on a top surface of the electronic assembly on the first major surface of the circuit board to physically and electrically contact the first metal foil layer and to coat a side surface of the electronic assembly, the metal coating layer extending beyond an edge of the electronic assembly toward the second major surface of the circuit board to coat a side surface of the electronic assembly, the semiconductor integrated circuits being electrically connected to the conductive connectors and the solder bumps, the first metal foil layer and the cover layer having a length and width substantially coextensive with the circuit board.

[0009] Additionally, an electronic assembly is provided, the electronic assembly including a circuit board including a plurality of conductive connectors and at least one conductive ground connector extending toward a side of the electronic assembly, first and second semiconductor integrated circuits respectively coupled to first and second major sides of the circuit board facing each other, first and second cover layers respectively substantially enclosing and planarizing the first and second semiconductor integrated circuits and respectively disposed on the first and second semiconductor integrated circuits, a plurality of solder bumps disposed on the second major side of the circuit board to provide electrical connection to the electronic assembly, a first metal foil layer bonded to the second cover layer, and a metal a metal coating layer conformally coated on the top surface of the electronic assembly on the first major surface of the circuit board to physically and electrically contact the foil layer and the ground connector and to coat a side surface of the electronic assembly and extend beyond the edges of the electronic assembly toward the second major surface of the circuit board, wherein the semiconductor integrated circuit is electrically connected to the conductive connectors and the solder bumps, the first metal foil layer and the cover layer include substantially aligned cuts to expose the solder bumps, and the first metal foil layer, the first cover layer and the second cover layer have a length and width that are substantially coextensive with the circuit board. Effect of the Invention

[0010] One embodiment of the present disclosure has the advantage of minimizing the costs involved in producing electronic assemblies.

[0011] Additionally, one embodiment of the present disclosure has the effect of maximizing the electromagnetic wave blocking performance. [Brief description of the drawings]

[0012] [Figure 1] FIG. 1 is a longitudinal cross-sectional view of an electronic assembly according to a first embodiment of the present disclosure. [Diagram 2] FIG. 2 is a top view of FIG. [Diagram 3] FIG. 2 is a longitudinal cross-sectional view of an electronic assembly according to a second embodiment of the present disclosure. [Figure 4]FIG. 13 is a longitudinal cross-sectional view of an electronic assembly according to a third embodiment of the present disclosure. [Diagram 5] FIG. 11 is a longitudinal cross-sectional view of an electronic assembly according to a fourth embodiment of the present disclosure. [Figure 6] 2A-2C show a circuit board in the step of providing a circuit board of the present disclosure. [Figure 7] 1A shows a cover layer disposed on a circuit board in the step of disposing the cover layer of the present disclosure. FIG. [Figure 8] FIG. 2 is a diagram showing a first metal foil layer bonded onto a circuit board in the step of bonding the first metal foil layer of the present disclosure. [Figure 9] FIG. 9 is a top view of FIG. [Figure 10] FIG. 2 illustrates a plurality of articles divided in the step of dividing an article of the present disclosure. [Figure 11] FIG. 1 illustrates an electronic assembly produced by the method of producing an electronic assembly of the present disclosure. [Figure 12] 1 is a sequence diagram illustrating a method for fabricating an electronic assembly according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In the following, specific embodiments for implementing the technical concepts of the present disclosure are described in detail with reference to the drawings.

[0014] Furthermore, in describing the present disclosure, detailed descriptions of well-known related configurations or functions that may obscure the gist of the present disclosure will be omitted.

[0015] Additionally, when an element is referred to as being "connected," "coupled," or "in contact with" another element, it should be understood that an element may be directly connected, coupled, or in contact with another element, but there may be intervening elements between them.

[0016] The terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to limit the scope of the disclosure. Unless otherwise stated, the singular forms include the plural forms.

[0017] In addition, it should be noted that throughout the specification, expressions such as "upper", "lower", "side", etc. are described with reference to examples in the drawings, and these expressions may be different when the orientation of the corresponding object is changed. For the same reason, some elements may be exaggerated, omitted, or shown diagrammatically in the drawings, and the size of each element may not completely reflect the actual size.

[0018] In addition, terms including ordinal numbers, such as "first," "second," etc., may be used to describe various elements, but these elements should not be limited by such terms. These terms are used only to distinguish one element from another.

[0019] As used herein, the term "comprising" identifies certain features, regions, integers, steps, operations, elements, and / or components and does not exclude the presence or addition of other specific features, regions, integers, steps, operations, elements, components, and / or groups.

[0020] In addition, it should be noted that throughout the specification, directional expressions such as "upper" are described with reference to examples in the drawings, and these expressions may be expressed differently when the orientation of the corresponding object is changed. Meanwhile, in the "Description of the Preferred Embodiments," the longitudinal direction may refer to the x-axis direction in Figs. 1 to 5, and the width direction may refer to the y-axis direction in Figs. 1 to 5. In addition, the thickness direction may refer to the z-axis direction in Figs. 1 to 5.

[0021] A detailed configuration of the electronic assembly 1 according to the first embodiment of the present disclosure will be described below with reference to the drawings.

[0022] 1, the electronic assembly 1 according to the first embodiment can protect electronic components such as semiconductor elements from the outside and can be electrically connected to an external configuration. In addition, the electronic assembly 1 may be at least partially shielded to prevent electromagnetic waves from being emitted to the outside. The electronic assembly 1 may include a top surface 11, an edge 12, and a side surface 13.

[0023] The upper surface 11 refers to one upper surface of the electronic assembly 1. The upper surface 11 may extend in the longitudinal and transverse directions.

[0024] The edge 12 refers to an edge portion between the top surface 11 and the side surface 13 of the electronic assembly 1. There may be multiple edge portions 12, and multiple edge portions 12 may be provided on both sides of the electronic assembly 1 in the longitudinal direction.

[0025] The side surfaces 13 refer to both side surfaces in the longitudinal direction of the electronic assembly 1. The side surfaces 13 may extend in the thickness direction. In addition, the side surfaces 13 may be multiple.

[0026] 1 and 2, the electronic assembly 1 may have a given length L, width W, and thickness T.

[0027] On the other hand, the electronic assembly 1 may include a circuit board 100 , a semiconductor integrated circuit 200 , a cover layer 300 , solder bumps 400 , a metal foil layer 500 , an adhesive layer 600 , a metal coating layer 700 , and a conductive ground connector 800 .

[0028] The circuit board 100 may be provided to have various types of electronic components mounted thereon. For example, the circuit board 100 may be a printed circuit board (PCB). Additionally, the circuit board 100 may have a first major surface 101 and a second major surface 102.

[0029] The first main surface 101 refers to the top surface of the circuit board 100 , and the second main surface 102 refers to the bottom surface of the circuit board 100 .

[0030] On the other hand, the circuit board 100 may include a conductive connector 110 .

[0031] Conductive connector 110 may include a material having an electrical conductivity that allows electrical current to flow therethrough. Additionally, conductive connector 110 may be connected to one or more of first major surface 101 and second major surface 102 and may be inserted into circuit board 100. For example, electronic components disposed on or within circuit board 100 may exchange electrical signals with conductive connector 110.

[0032] The conductive connector 110 may be multiple, and some of the multiple conductive connectors 110 may not be connected to each other. In addition, some of the multiple conductive connectors 110 may be electrically connected to each other. At least two of the multiple conductive connectors 110 may be electrically connected to the same semiconductor integrated circuit 200.

[0033] The semiconductor integrated circuit 200 can perform various functions as an electronic element. The semiconductor integrated circuit 200 may be bonded to the first main surface 101 on the first main surface 101 of the circuit board 100. In addition, the semiconductor integrated circuit 200 may be multiple, and the multiple semiconductor integrated circuits 200 may be spaced apart from each other along the longitudinal direction. The multiple semiconductor integrated circuits 200 may be electrically connected to different conductive connectors 110, respectively. In addition, the semiconductor integrated circuits 200 may be electrically connected to the solder bumps 400 via the conductive connectors 110.

[0034] At least a portion of the semiconductor integrated circuit 200 may be surrounded by the cover layer 300. For example, one of the other surfaces of the semiconductor integrated circuit 200, excluding the bottom surface in contact with the first main surface 101, may be surrounded by the cover layer 300. The semiconductor integrated circuit 200 may be referred to as a semiconductor IC.

[0035] The cover layer 300 may cover the multiple semiconductor integrated circuits 200. In addition, the cover layer 300 may substantially planarize the multiple semiconductor integrated circuits 200 by surrounding each of the multiple semiconductor integrated circuits 200. In this specification, planarizing the semiconductor integrated circuits 200 may mean that the multiple semiconductor integrated circuits 200 having different sizes are surrounded by the cover layer 300 having a flat upper surface. Other configurations may be disposed on the flat upper surface of the cover layer 300 accordingly.

[0036] In addition, the cover layer 300 can substantially encapsulate each of the multiple semiconductor integrated circuits 200. In this specification, encapsulating the semiconductor integrated circuits 200 may mean that the cover layer 300 covers and substantially surrounds the other surfaces of the semiconductor integrated circuits 200 except for the bottom surface. The above-mentioned cover layer 300 may be in contact with the circuit board 100 or may be disposed on the circuit board 100. For example, the cover layer 300 may include an epoxy molding compound (EMC). In addition, the cover layer 300 may have a length L and a width W that are substantially coextensive with the circuit board 100.

[0037] The solder bumps 400 can provide electrical connection to the electronic assembly 1. The solder bumps 400 may be disposed on the second main surface 102 of the circuit board 100. In addition, the solder bumps 400 may be disposed within a cut portion 511 described below, or may be exposed to the outside through the cut portion 511. In addition, there may be a plurality of solder bumps 400, and the plurality of solder bumps 400 may be electrically connected to the conductive connector 110.

[0038] The metal foil layer 500 can block electromagnetic waves emitted from the semiconductor integrated circuit 200. For example, the metal foil layer 500 may include one or more of copper (Cu) and stainless steel (SUS). The metal foil layer 500 may include a first metal foil layer 510 and a second metal foil layer 520.

[0039] The first metal foil layer 510 may be bonded to the second main surface 102 of the circuit board 100. In this specification, the term "bonding the first metal foil layer 510 to the second main surface 102" may refer not only to bonding in direct contact with the second main surface 102, but also to bonding to the second main surface 102 via the first adhesive layer 610. The first metal foil layer 510 may be exposed to the outside.

[0040] The first metal foil layer 510 may include a cut portion 511 for exposing the solder bump 400. The cut portion 511 may be formed by penetrating the first metal foil layer 510 in the thickness direction.

[0041] The second metal foil layer 520 may be bonded to the cover layer 300. In this specification, the term "bonding the second metal foil layer 520 to the cover layer 300" may include not only bonding in direct contact with the cover layer 300 but also bonding to the cover layer 300 via the second adhesive layer 620. In addition, the second metal foil layer 520 may be in contact with the metal coating layer 700, or may be disposed between the metal coating layer 700 and the cover layer 300.

[0042] The first metal foil layer 510 and the second metal foil layer 520 may have a length L and a width W that are substantially coextensive with the circuit board 100 .

[0043] The adhesive layer 600 may function as an adhesive. For example, the adhesive layer 600 may include an epoxy resin. The adhesive layer 600 may include a first adhesive layer 610 and a second adhesive layer 620.

[0044] The first adhesive layer 610 may be disposed between the first metal foil layer 510 and the circuit board 100 and may be bonded to the first metal foil layer 510 and the second major surface 102 of the circuit board 100 .

[0045] The second adhesive layer 620 may be disposed between the second metal foil layer 520 and the cover layer 300 and may be bonded to the second metal foil layer 520 and the cover layer 300 .

[0046] The metal coating layer 700 can block an electric field emitted from the semiconductor integrated circuit 200 or an electric field directed from the outside toward the semiconductor integrated circuit 200. The metal coating layer 700 may be conformally coated on the second metal foil layer 520. In other words, the metal coating layer 700 may be coated on the upper surface of the second metal foil layer 520. The metal coating layer 700 may extend beyond the edge 12 toward the second main surface 102 and cover both side surfaces 13 of the electronic assembly 1. That is, the metal coating layer 700 may extend in the width direction and cover the side surfaces of the circuit board 100, the cover layer 300, the metal foil layer 500, and the adhesive layer 600 in the longitudinal direction. In addition, the metal coating layer 700 may extend in the width direction and be in physical and electrical contact with the first metal foil layer 510.

[0047] The metal coating layer 700 may have a length L and a width W that are substantially coextensive with the circuit board 100. In addition, the metal coating layer 700 may have a predetermined thickness. In this specification, the thickness of the metal coating layer 700 may vary depending on the area of ​​the metal coating layer 700, and the thickness of the metal coating layer 700 may refer to the thickness at a predetermined location rather than the average thickness. For example, the metal coating layer 700 may have a thickness on the top surface 11 and a thickness on the side surface 13 that are different from each other. In addition, the thickness of the metal coating layer 700 may be less than about 30 micrometers and greater than about 0.5 micrometers. More preferably, the thickness of the metal coating layer 700 may be less than about 20 micrometers and greater than about 1 micrometer. The metal coating layer 700 may have a top average thickness t1 on the top surface 11 and a side average thickness t2 on the side surface 13 that are different from each other. For example, the average thickness ratio t1 / t2 of the top average thickness t1 and the side average thickness t2 of the metal coating layer 700 may be greater than 0.2 and may be less than or equal to 0.5.

[0048] The conductive ground connector 800 may be embedded in the circuit board 100. The conductive ground connector 800 may extend from the inside of the circuit board 100 toward the metal coating layer 700 and may be in physical and electrical contact with the metal coating layer 700. In other words, the conductive ground connector 800 may extend in the longitudinal direction and one end of the conductive ground connector 800 may be in contact with the metal coating layer 700. There may be a plurality of conductive ground connectors 800, and the plurality of conductive ground connectors 800 may not be connected to each other.

[0049] According to the second embodiment of the present disclosure, in addition to the above-mentioned configuration, the second metal foil layer 520 and the second adhesive layer 620 may be omitted. Hereinafter, the second embodiment of the present disclosure will be described with further reference to Fig. 3. In describing the second embodiment, differences from the above-mentioned embodiment will be mainly described, and the same descriptions and symbols as those of the above-mentioned embodiment will be referred to.

[0050] The metal coating layer 700 may be disposed on the cover layer 300 or may be directly bonded to the cover layer 300. The metal coating layer 700 may be conformally coated onto the cover layer 300. In addition, the metal coating layer 700 may extend from the top surface of the cover layer 300 past the edge 12 toward the first metal foil layer 510.

[0051] According to a third embodiment of the present disclosure, in addition to the above-mentioned configuration, the metal coating layer 700 may include a central portion 710, a side portion 720, and a tapered portion 730. Hereinafter, the third embodiment of the present disclosure will be described with further reference to FIG.

[0052] The central portion 710 may be a portion of the metal coating layer 700 that corresponds to at least a portion of the top surface 11 of the electronic assembly 1. For example, the central portion 710 may be surrounded by the tapered portion 730 and may refer to a portion of the metal coating layer 700 that is adjacent to the center of the second metal foil layer 520. The central portion 710 described above may extend in the length direction and the width direction. In addition, the central portion 710 may be a substantially flat surface.

[0053] The side portions 720 may be portions of the metal coating layer 700 corresponding to both side surfaces of the electronic assembly 1. The side portions 720 may extend in the thickness direction.

[0054] The tapered portion 730 may be a portion of the metal coating layer 700 between the central portion 710 and the side portion 720. One end of the tapered portion 730 may be connected to the metal coating layer 700, and the other end may be connected to the side portion 720. For example, the tapered portion 730 may have a predetermined inclination so as to have a tapered shape. In addition, the tapered portion 730 may taper from the central portion toward the edge portion 12 of the electronic assembly 1, thereby decreasing its thickness. In other words, the thickness of one side of the tapered portion 730 connected to the central portion 710 may be greater than the thickness of one side connected to the side portion 720.

[0055] According to a fourth embodiment of the present disclosure, in addition to the above-described configuration, the semiconductor integrated circuit 200 may include a first semiconductor integrated circuit 210 and a second semiconductor integrated circuit 220. Hereinafter, the fourth embodiment of the present disclosure will be described with further reference to FIG.

[0056] The first semiconductor integrated circuit 210 may be coupled to the circuit board 100 on the first main surface 101 of the circuit board 100. There may be a plurality of first semiconductor integrated circuits 210, and the plurality of first semiconductor integrated circuits 210 may be spaced apart from one another along the longitudinal direction.

[0057] The second semiconductor integrated circuit 220 may be coupled to the circuit board 100 on the second main surface 102 of the circuit board 100. There may be a plurality of second semiconductor integrated circuits 220, and the plurality of second semiconductor integrated circuits 220 may be spaced apart from one another along the longitudinal direction.

[0058] The cover layer 300 may include a first cover layer 310 and a second cover layer 320 having a length L and a width W that are substantially coextensive with the circuit board 100 .

[0059] The first cover layer 310 may be disposed on the upper side of the circuit board 100 and may cover the multiple first semiconductor integrated circuits 210. In addition, the first cover layer 310 may surround each of the multiple first semiconductor integrated circuits 210, thereby planarizing the multiple first semiconductor integrated circuits 210.

[0060] The second cover layer 320 may be disposed under the circuit board 100 and may cover the multiple second semiconductor integrated circuits 220. In addition, the second cover layer 320 may surround each of the multiple second semiconductor integrated circuits 220, thereby planarizing the multiple second semiconductor integrated circuits 220.

[0061] In contrast, the second cover layer 320 may include a cover cut 321 and the first foil layer 510 may include a foil cut 512. Additionally, the first adhesive layer 610 may include an adhesive cut 611.

[0062] The cover cutting portion 321 may be formed through the second cover layer 320, and the foil cutting portion 512 may be formed through the first metal foil layer 510. In addition, the adhesive cutting portion 611 may be formed through the first adhesive layer 610. For example, the cover cutting portion 321, the foil cutting portion 512 and the adhesive cutting portion 611 may have the same size and shape.

[0063] The second cover layer 320, the first metal foil layer 510, and the first adhesive layer 610 may be aligned such that the cover cutting portion 321, the foil cutting portion 512, and the adhesive cutting portion 611 are located at positions corresponding to each other. The cover cutting portion 321, the foil cutting portion 512, and the adhesive cutting portion 611 may be referred to as cutting portions, and the cutting portion may be a concept including the cover cutting portion 321, the foil cutting portion 512, and the adhesive cutting portion 611.

[0064] The solder bumps 400 may be multiple and may be disposed inside the cut portion, and accordingly, multiple solder bumps 400 may be exposed to the outside through the cut portion.

[0065] The first adhesive layer 610 may be disposed between the first metal foil layer 510 and the second cover layer 320 and may be bonded to the first metal foil layer 510 and the second cover layer 320 .

[0066] In the following, an electronic assembly fabrication method S10 for fabricating an electronic assembly 1 according to an embodiment of the present disclosure will be described with reference to Figures 6 to 12. In addition, the same names and symbols are used for the above-mentioned components.

[0067] The electronic assembly manufacturing method S10 can manufacture a plurality of electronic assemblies 1. The electronic assembly manufacturing method S10 can include a step S100 of forming an article, a step S200 of dividing the article, and a step S300 of forming a conductive layer.

[0068] In a step S100 of forming an article, an article 2 may be formed. The article 2 may be divided into a plurality of divided articles 20 by a step S200 of dividing the article. The step S100 of forming an article may include a step S110 of providing a circuit board, a step S120 of disposing a cover layer, and a step S130 of bonding a first metal foil layer.

[0069] 6, in step S110 of providing a circuit board, a circuit board 100 including a plurality of segments 120 may be provided. The circuit board 100 may have a first main surface 101 and a second main surface 102 facing each other. In this specification, the first main surface 101 may refer to an upper surface of the circuit board 100, and the second main surface 102 may refer to a lower surface of the circuit board 100.

[0070] Segment 120 may include a first side 121 and a second side 122. As used herein, first side 121 of segment 120 may refer to a portion of first major surface 101 of circuit board 100, and second side 122 may refer to a portion of second major surface 102 of circuit board 100.

[0071] Additionally, each of the multiple segments 120 may include a semiconductor integrated circuit 200 , a solder bump 400 , and a conductive ground connector 800 .

[0072] The semiconductor integrated circuit 200 may be coupled to the first side 121 of the segment 120. There may be a plurality of semiconductor integrated circuits 200, and the plurality of semiconductor integrated circuits 200 may be spaced apart from one another.

[0073] The solder bump 400 may be disposed on the second side 122 of the segment 120. The solder bumps 400 may be multiple.

[0074] The conductive ground connectors 800 may be embedded within the segments 120. Additionally, the conductive ground connectors 800 of at least one divided article 20 may be in physical and electrical contact with a conductive layer 900 coated over side surfaces 13 of the divided article 20, as described below. The conductive ground connectors 800 of at least one divided article 20 may extend toward one or more of the side surfaces 13 of the divided article 20.

[0075] Referring to FIG. 7, in a step S120 of disposing a cover layer, a cover layer 300 may be disposed on the circuit board 100 to cover the semiconductor integrated circuits 200 in each segment 120.

[0076] 8 and 9, in step S130 of bonding the first metal foil layer, a first metal foil layer 510 including a plurality of through holes 513 may be bonded to the circuit board 100. In step S130 of bonding the first metal foil layer, the first metal foil layer 510 may be bonded to or cover the second side 122 of each segment 120. In addition, in step S130 of bonding the first metal foil layer, a plurality of solder bumps 400 may be exposed to the outside through the plurality of through holes 513.

[0077] 10, in a step S200 of dividing the article, the article 2 may be divided into a plurality of divided articles 20. The divided article 20 may include at least one segment 120. The step S200 of dividing the article may include one or more processes of saw cutting, laser cutting, water jet cutting, die cutting, scoring, and breaking.

[0078] Saw cutting can cut an article using a rotating disk, and laser cutting can cut an article by irradiating it with a high energy laser. Additionally, water jet cutting can cut an article by spraying high pressure water through a nozzle, and die cutting can use a die having a predetermined shape to cut an article to the shape of the die. Additionally, scoring can cut an article by using a scoring blade, and breaking can cut an article by breaking it.

[0079] 11, in the step S300 of forming a conductive layer, a conductive layer 900 including a metal can be formed on the upper surface of the divided article 20. In the step S300 of forming a conductive layer, the conductive layer 900 can be in physical and electrical contact with the first metal foil layer 510. In addition, the conductive layer 900 may extend electrically continuously on at least the side surface 13 of the divided article 20 and the upper edge portion 12 of the divided article 20. The conductive layer 900 may be disposed on the upper surface 11 of at least one divided article 20. In this specification, the upper surface 11 of the divided article 20 may be the surface opposite to the first metal foil layer 510.

[0080] In step S300 of forming the conductive layer, divided article 20 having conductive layer 900 disposed on its upper surface may be referred to as electronic assembly 1.

[0081] As described above, the electronic assembly 1 according to the embodiment of the present disclosure includes the metal foil layer 500 and the metal coating layer 700, which has the effect of blocking electromagnetic waves.

[0082] In addition, masking to expose the solder bumps 400 to the outside can be performed using step S130 of bonding the first metal foil layer, without using a sputtering process that requires the use of tape, thereby significantly reducing manufacturing steps and costs.

Claims

1. 1. An electronic assembly comprising: a circuit board having a plurality of conductive connectors; a plurality of spaced apart semiconductor integrated circuits coupled to a first major surface of the circuit board; a cover layer disposed on the semiconductor integrated circuit and substantially surrounding and covering the semiconductor integrated circuit; a plurality of solder bumps disposed on a second major surface of the circuit board opposite the first major surface for providing electrical connection to the electronic assembly; a first metal foil layer having a cut portion for exposing the solder bump, the first metal foil layer being bonded to the second main surface of the circuit board; a metal coating layer in physical and electrical contact with the first metal foil layer and conformally coated on a top surface of the electronic assembly on the first major surface of the circuit board to coat a side surface of the electronic assembly and extend beyond an edge of the electronic assembly toward the second major surface of the circuit board; the semiconductor integrated circuit is electrically connected to the conductive connector and the solder bumps; the first metal foil layer and the cover layer have a length and a width that are substantially coextensive with the circuit board; Electronic assembly.

2. Further comprising a first adhesive layer; the first metal foil layer is bonded to the second main surface of the circuit board via the first adhesive layer; 10. The electronic assembly of claim 1.

3. the thickness of the metal coating layer is less than about 30 micrometers and greater than about 0.5 micrometers; 10. The electronic assembly of claim 1.

4. the average thickness of the metal coating layer coated on the top surface of the electronic assembly is t1; the average thickness of the metal coating layer coated on the side of the electronic assembly is t2; t1 / t2 is greater than 0.2 and less than or equal to 5; 10. The electronic assembly of claim 1.

5. the metal coating layer is disposed directly on the cover layer and is directly bonded to the cover layer; 10. The electronic assembly of claim 1.

6. a second metal foil layer bonded to the metal coating layer and the cover layer and disposed between the metal coating layer and the cover layer; the second metal foil layer having a length and width substantially coextensive with the circuit board; 10. The electronic assembly of claim 1.

7. one or more conductive ground connectors embedded in the electronic assembly, extending toward one or more sides of the electronic assembly and in physical and electrical contact with the metal coating layer coated on the sides of the electronic assembly; 10. The electronic assembly of claim 1.

8. The cover layer is A tapered portion; a substantially planar central portion surrounded by the tapered portion; the tapered portion tapers from the center toward the edge of the electronic assembly, the tapered portion having a decreasing thickness.

10. The electronic assembly of claim 1.

9. 1. An electronic assembly comprising: a circuit board having a plurality of conductive connectors and at least one conductive ground connector extending toward a side of the electronic assembly; a first semiconductor integrated circuit and a second semiconductor integrated circuit coupled to a first main surface and a second main surface of the circuit board, the first and second semiconductor integrated circuits being opposed to each other; a first cover layer and a second cover layer disposed on the first and second semiconductor integrated circuits, respectively, substantially surrounding and planarizing the first and second semiconductor integrated circuits, respectively; a plurality of solder bumps disposed on the second major surface of the circuit board to provide electrical connections to the electronic assembly; a first metal foil layer bonded to the second cover layer; a metal coating layer conformally coated on a top surface of the electronic assembly on the first major surface of the circuit board to physically and electrically contact the metal foil layer and the ground connector and to coat the side of the electronic assembly, the metal coating layer extending beyond an edge of the electronic assembly toward the second major surface of the circuit board; the semiconductor integrated circuit is electrically connected to the conductive connector and the solder bumps; the first metal foil layer and the cover layer are provided with substantially aligned cuts to expose the solder bumps; the first metal foil layer, the first cover layer, and the second cover layer have a length and a width that are substantially coextensive with the circuit board. Electronic assembly.

10. 1. A method of making an electronic assembly, comprising the steps of: forming an article; dividing the article into a plurality of divided articles respectively; forming a conductive layer on the at least one divided article; The step of forming the article comprises: providing a circuit board comprising a plurality of segments, each of the segments comprising a first side on a first major surface of the circuit board, a second side on a second major surface of the circuit board opposite the second major surface, a conductive ground connector embedded within the segment, a plurality of spaced apart semiconductor integrated circuits coupled to the first side of the segment, and a plurality of solder bumps on the second side of the segment; disposing a cover layer on the circuit substrate to cover the semiconductor integrated circuits in each of the segments; bonding a first metal foil layer bonded to and covering the second side of each of the segments, the first metal foil layer including a plurality of through holes on the second side of each of the segments, one of the plurality of through holes enabling the plurality of solder bumps to be exposed on the second side of the segment; each of the divided articles comprises at least one segment of the circuit board; In the step of forming the conductive layer, the conductive layer is formed on a top surface of the at least one divided article opposite the first metal foil layer, is in physical and electrical contact with the first metal foil layer, and extends electrically continuous over the side and top edge of the at least one divided article; method.

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