Current Sensing with Capacitive Compensation
Patent Information
- Application Number
- JP2023557339
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2021-10-28
- Filing Date
- 2022-03-21
- Publication Date
- 2025-03-28
AI Technical Summary
Current sensing in switch-mode power supplies, particularly in DC-DC converters, is inaccurate due to errors caused by blanking periods, especially in high-frequency and high-duty-cycle applications, leading to sensing errors exceeding 10% in some cases.
Incorporating a compensation capacitor and low pass filter in the current sensing circuit to store and provide a compensation current during the blanking period, thereby reducing sensing errors by boosting the sense voltage during the averaging period.
The proposed solution achieves current sensing accuracy of less than 1% by compensating for blanking period errors, enhancing the precision of load current measurement.
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Abstract
Description
[Background technology]
[0001] A switch-mode power supply is an electronic circuit that converts an input direct current (DC) supply voltage into one or more DC output voltages that are greater or less in magnitude than the input DC supply voltage. A switch-mode power supply that produces an output voltage lower than the input voltage is called a buck converter or step-down converter. A switch-mode power supply that produces an output voltage higher than the input voltage is called a boost converter or step-up converter. Current sensing circuitry may be coupled to a switch-mode power supply to measure the current flowing from the power supply to a load circuit. Summary of the Invention
[0002] In one example, a current sense circuit includes a sense amplifier, a current mirror circuit, a buffer amplifier, a switch, and a compensation capacitor. The sense amplifier includes an input and an output. The input is adapted to be coupled to a switching transistor of a DC-DC converter. The current mirror circuit is coupled to the output of the sense amplifier. The buffer amplifier includes an input and an output. The input of the buffer amplifier is coupled to the current mirror circuit. The switch includes a first terminal and a second terminal. The first terminal is coupled to the output of the buffer amplifier. The second terminal is coupled to the input of the buffer amplifier. The compensation capacitor is coupled to the second terminal of the switch.
[0003] In another example, a current sense circuit includes a sense amplifier, a current mirror circuit, a resistor, a low pass filter, and a capacitor. The sense amplifier is adapted to be coupled to a switching transistor of a DC-DC converter. The current mirror circuit is coupled to the sense amplifier and configured to generate a sense current proportional to a current flowing through the switching transistor. The resistor is coupled to the current mirror circuit and configured to generate a sense voltage based on the sense current. The low pass filter is coupled to the resistor and configured to average the sense voltage over an averaging period. The capacitor is coupled to the resistor and configured to store the sense voltage during a blanking period preceding the averaging period and provide a compensation current during the averaging period.
[0004] In a further example, a DC-DC converter includes a switching transistor and a current sense circuit. The current sense circuit is coupled to the switching transistor and configured to sense a current flow in the switching transistor. The current sense circuit includes a sense amplifier, a current mirror circuit, a resistor, a low pass filter, a capacitor, and a buffer amplifier. The sense amplifier is coupled to the switching transistor. The current mirror circuit is coupled to the sense amplifier and configured to generate a sense current proportional to a current flowing through the switching transistor. The resistor is coupled to the current mirror circuit and configured to generate a sense voltage based on the sense current. The low pass filter is coupled to the resistor and configured to average the sense voltage over an averaging period. The capacitor is coupled to the resistor and configured to store the sense voltage during a blanking period preceding the averaging period and provide a compensation current during the averaging period. The buffer amplifier is coupled to the resistor and the capacitor and configured to charge the capacitor during the blanking period. [Brief description of the drawings]
[0005] [Figure 1]13 shows a graph of current sensing with error caused by a blanking period.
[0006] [Diagram 2] 1 shows a block diagram of an example DC-DC converter including current sensing with compensation for blanking.
[0007] [Diagram 3] 1 shows a schematic level diagram for an example current sensing circuit including compensation for blanking.
[0008] [Figure 4] 13 shows a graph of current sensing with compensation for blanking.
[0009] [Diagram 5] 1 shows a schematic level diagram for an example current sensing circuit including compensation for blanking.
[0010] [Figure 6] 1 shows a schematic level diagram for an example current sensing circuit including compensation for blanking.
[0011] [Figure 7] 13 shows a graph of current sensing and switch control signals with compensation for blanking. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0012] The current sense circuit may measure the load current by sensing the current through a switching transistor (e.g., a low-side switching transistor) of the DC-DC converter (i.e., sensing the current through an inductor of the DC-DC converter). The sensed current, which is proportional to the current through the switching transistor, is converted to a sensed voltage and time-averaged. The average sensed voltage may be expressed as: JPEG2024512003000002.jpg23141In formula, Iavg is the average inductor current (load current), Iripple is the ripple current, G is the sensing gain, Toff is the off-time (on-time of the low-side switching transistor), Tblank is the duration of the blanking period.
[0013] When the low-side switching transistor is turned on, the averaging of the sense voltage stops for a period (blanking period) to allow the sensed current to settle. Due to the blanking period, the sensed load current is lower than the actual load current. The sensing error is: JPEG2024512003000003.jpg12141
[0014] FIG. 1 shows a graph of current sensing in a DC-DC converter with an error caused by a blanking period. In the current graph, the inductor current (IL) increases when the high-side switching transistor is turned on and the low-side switching transistor is turned off. When the low-side switching transistor is turned on and the high-side switching transistor is turned off, IL decreases. In the voltage graph, the inductor current with gain (IL×G) tracks IL. When the low-side switching transistor is turned on, a blanking period 102 begins, and after the blanking period 102 (at an averaging period 104), the sensed voltage CSA_OUT_TEL is switched to an averaging filter for generating a voltage corresponding to the average load current. The blanking period 102 reduces the value of the average sensed current, causing a sensing error. The sensing error can have a large impact, especially for high frequency and high duty cycle applications where Toff (the on-time of the low-side switching transistor) is short. For example, the sensing error due to blanking can exceed 10% in some situations.
[0015] Examples of current sensing circuits described herein include circuitry that compensates for blanking periods to improve current sensing accuracy. For example, current sensing error may be less than 1 percent in a DC-DC converter that includes a current sensing circuit with blanking period compensation.
[0016] 2 shows a block diagram of an example DC-DC converter 200 including current sensing with compensation for blanking. The DC-DC converter 200 is shown as a buck converter, but may be a boost converter, a buck-boost converter, or other types of DC-DC converters. The DC-DC converter 200 includes a high-side switching transistor 202, a low-side switching transistor 204, an inductor 206, a voltage divider 208, an output capacitor 210, and a controller 212. The DC-DC converter 200 powers a load 211 and, in some implementations, communicates with a power management system 216.
[0017] The controller 212 controls the high-side switching transistor 202 and the low-side switching transistor 204 (via the control signals HSGATE and LSGATE) to charge and discharge the inductor 206. When the high-side switching transistor 202 is turned on and the low-side switching transistor 204 is turned off, current flows from Vin through the high-side switching transistor 202 to charge the inductor 206. When the low-side switching transistor 204 is turned on and the high-side switching transistor 202 is turned off, current flows through the low-side switching transistor 204 as the inductor 206 is discharged. The current flowing from the inductor 206 charges the output capacitor 210 and powers the load 211.
[0018] The voltage divider 208 is coupled to the output 200A of the DC-DC converter 200. The voltage divider 208 divides the output voltage (Vout) of the DC-DC converter 200 to generate a feedback voltage (VFB) that is proportional to Vout. The controller 212 compares VFB to a reference voltage to generate an error signal that is used to control the high side switching transistor 202 and the low side switching transistor 204.
[0019] The controller 212 also includes a current sense circuit 214. The current sense circuit 214 is coupled to the low-side switching transistor 204 for measuring the current flowing through the inductor 206 (and to the output capacitor 210 and the load 211) as the inductor 206 is discharged. The current sense circuit 214 includes circuit elements to compensate for a blanking period applied when the low-side switching transistor 204 turns on and to improve the accuracy of the load current sensing.
[0020] The controller 212 may communicate with the power management system 216 via a serial bus (e.g., a power management bus). For example, various parameters applied to the DC-DC conversion in the DC-DC converter 200 may be received from the power management system 216, and status including the measured load current derived from the current sense circuit 214 may be transmitted to the power management system 216.
[0021] Implementations of DC-DC converter 200 can be used in a wide variety of applications that benefit from accurate current sensing, for example, DC-DC converter 200 can be used in servers or other types of computers, network attached storage devices, or other electronic systems.
[0022] 3 shows a schematic level diagram of an example current sense circuit 300 including compensation for blanking. The current sense circuit 300 includes a sense resistor 302, a sense resistor 304, a sense amplifier 306, a current mirror circuit 308, a resistor 316, a compensation capacitor 318, and a low pass filter 322. The sense resistor 304 is coupled to the source of the low side switching transistor 204, and the sense resistor 302 is coupled to the drain of the low side switching transistor 204. The input of the sense amplifier 306 is coupled to the sense resistor 302 and the sense resistor 304. The output of the sense amplifier 306 is coupled to a pass transistor 307.
[0023] When the low-side switching transistor 204 is turned on, the sense amplifier 306 senses the voltage across the low-side switching transistor 204, the sense resistor 302, and the sense resistor 304, and activates the pass transistor 307 to pass a current (Ia) proportional to the current flowing through the low-side switching transistor 204. A current source 326 injects an offset current (e.g., 95.5 microamps) to enable sensing of positive and negative current flow through the low-side switching transistor 204. PGND_SNSFET_PRC represents the current path to the sense resistor 304, and PGND_SNSFET_SNS represents the sense path from the sense resistor 304 to the sense amplifier 306. Similarly, SW_SNSFET_FRC represents the current path to the sense resistor 302, and SW_SNSFET_SNS represents the sense path from the sense resistor 302 to the sense amplifier 306. When the low-side switching transistor 204 is turned off, the sense resistor 302 is coupled to ground (PGND).
[0024] The current mirror circuit 308 includes a transistor 310, a transistor 312, and a switch 314. The switch 314 may be implemented using a field effect transistor (FET) in some examples of the current mirror circuit 308. When the low-side switching transistor 204 is turned on, the switch 314 is closed and a current Ib flows through the transistor 312. Ib mirrors Ia and is proportional to the current flowing through the low-side switching transistor 204. A resistor 316 is coupled to the transistor 312 and to an output 330A (common-mode voltage terminal) of the common-mode voltage buffer amplifier 330. The current Ib flows through the resistor 316 to generate a sense voltage (CSA_OUT_TEL).
[0025] A current source 328 is coupled to resistor 316. Current source 328 sinks a current that corresponds to the current injected by current source 326 at the input of sense amplifier 306.
[0026] A compensation capacitor 318 is coupled to the resistor 316, and the sense voltage charges the compensation capacitor 318. A switch 320 is coupled to the compensation capacitor 318 and the resistor 316, and a low pass filter 322 is coupled to the switch 320. The switch 320 may be implemented with a FET in some examples of the current sense circuit 300. The switch 320 is open during a blanking period provided when the low side switching transistor 204 turns on to nullify current sense errors due to ringing caused by parasitic inductance between the low side switching transistor 204 and ground. The switch 320 is also open when the low side switching transistor 204 is turned off. When the blanking period ends, the switch 320 is closed and the low pass filter 322 filters the sense voltage to generate an average sense voltage (CSA_OUT_FLT_TEL) that is output by the buffer amplifier 324.
[0027] When switch 320 is closed, a current (Ic) flows from compensation capacitor 318 through resistor 316, thereby boosting the sense voltage and compensating for the error caused by the blanking period. Without compensation capacitor 318, the average sense voltage is as follows: The addition of compensation capacitor 318 adds a compensation voltage as follows: JPEG2024512003000004.jpg12141In formula, Cc is the capacitance of the compensation capacitor 318, R1 is the resistance of resistor 316.
[0028] The compensation voltage (Vcompensate) is selected to compensate for the error in equation (2). By setting Vcompensate equal to the error voltage, Cc can be calculated as follows: JPEG2024512003000005.jpg11141
[0029] The compensation capacitor 318 provides a compensation voltage that tracks errors caused by blanking periods with different values of Iripple and Toff (different input voltages, output voltages, and switching frequencies), allowing the current sensing circuit 300 to provide good accuracy in a variety of applications.
[0030] Figure 4 shows a graph of current sensing in current sense circuit 300. In Figure 4, the inductor current and sensed voltage (IL x G) are the same as those shown in Figure 1. However, in Figure 4, the compensation current (Ic) provided by compensation capacitor 318 reduces the error in the sensed current by boosting the sensed voltage during the averaging period (when switch 320 is closed).
[0031] 5 shows a schematic level diagram of an example current sense circuit 500 including compensation for blanking. The current sense circuit 500 is similar to the current sense circuit 300 and includes a buffer amplifier 502, a switch 504, and a switch 506 to facilitate charging of the compensation capacitor 318. An input of the buffer amplifier 502 is coupled to the current mirror circuit 308 and the resistor 316. An output of the buffer amplifier 502 is coupled to a first terminal of the switch 506. A second terminal of the switch 506 is coupled to the compensation capacitor 318 and a first terminal of the switch 504. A second terminal of the switch 504 is coupled to an input of the buffer amplifier 502. The switches 504 and 506 may be implemented using FETs in some examples of the current sense circuit 500.
[0032] During the blanking interval, switch 506 is closed and compensation capacitor 318 is fast charged from the output of buffer amplifier 502. When the blanking interval ends, switch 504 is closed and a compensation current (Ic) flows from compensation capacitor 318 through switch 504 and resistor 316 to boost the sense voltage.
[0033] The current sensing circuit 500 includes a control circuit 508 that generates a control signal BL and a control signal CS for controlling the switch 504 and the switch 506. The control signal BL defines a blanking period (as shown in FIG. 4) and the control signal CS defines an active time of the low-side switching transistor 204 after the blanking period (the averaging period shown in FIG. 4).
[0034] 6 shows a schematic level diagram for an example current sense circuit 600 including compensation for blanking. The current sense circuit 600 is similar to the current sense circuit 300 and the current sense circuit 500. Like the current sense circuit 500, the current sense circuit 600 includes a buffer amplifier 602, a switch 604, and a switch 606 to facilitate charging of the compensation capacitor 318. An input of the buffer amplifier 602 is coupled to the current mirror circuit 308 and the resistor 316. An output of the buffer amplifier 602 is coupled to a first terminal of the switch 606. A second terminal of the switch 606 is coupled to the compensation capacitor 318 and a first terminal of the switch 604. A second terminal of the switch 604 is coupled to an input of the buffer amplifier 602 and a terminal of the switch 320. The switches 604 and 606 may be implemented using FETs in some examples of the current sense circuit 600.
[0035] During the blanking interval, switch 606 is closed and compensation capacitor 318 is fast charged from the output of buffer amplifier 602. When the blanking interval ends, switch 604 is closed and a compensation current (Ic) flows from compensation capacitor 318 through switch 604 and resistor 316 to boost the sense voltage.
[0036] 7 shows a graph of current sensing with compensation for blanking and the switch control signals BL and CS generated by the control circuit 508. The switch control signals BL and CS control the switches 504 and 506 in the current sensing circuit 500 and the switches 604 and 606 in the current sensing circuit 600.
[0037] In this description, the term "coupled" may encompass a connection, communication, or signal path that enables a functional relationship consistent with this description. For example, (a) in a first example, device A is coupled to device B if device A generates a signal to control device B to perform an action, or (b) in a second example, device A is coupled to device B via an intervening component C, and device B is controlled by device A via a control signal generated by device A, if intervening component C does not substantially change the functional relationship between device A and device B. Also, in this description, the phrase "based on" means "based at least in part on." Thus, if X is based on Y, X can be a function of Y and any number of other factors.
[0038] Modifications in the described embodiments are possible, and other embodiments are possible, within the scope of the claims.
Claims
1. 1. A current sensing circuit comprising: a current sensing circuit having an input adapted to be coupled to the transistor and an output; a current mirror circuit coupled to an output of the sense amplifier; a first buffer amplifier having an input coupled to the current mirror circuit and an output; a first switch having a first terminal coupled to an output of the first buffer amplifier and a second terminal; a compensation capacitor coupled to the second terminal of the first switch; a second switch having a first terminal coupled to the second terminal of the first switch and a second terminal coupled to the input of the first buffer amplifier; a third switch having a first terminal coupled to the compensation capacitor and a second terminal; a low pass filter coupled to the second terminal of the third switch; a current sensing circuit comprising:
2. 2. The current sensing circuit of claim 1, The current sensing circuit further includes a second buffer amplifier coupled to the low pass filter.
3. 2. The current sensing circuit of claim 1, The current sensing circuit further includes a current source coupled to the input of the first buffer amplifier.
4. 2. The current sensing circuit of claim 1, The current sensing circuit further includes a resistor coupled between the input of the buffer amplifier and a common mode voltage terminal.
5. 1. A current sensing circuit comprising: a sense amplifier adapted to be coupled to a switching transistor of a DC-DC converter; a current mirror circuit coupled to the sense amplifier, the current mirror circuit configured to generate a sense current proportional to a current flowing through the switching transistor; a resistor coupled to the current mirror circuit, the resistor configured to generate a sense voltage based on the sense current; a low pass filter coupled to the resistor, the low pass filter configured to average the sensed voltage over an averaging period; and a capacitor coupled to the resistor, storing the sensed voltage during a blanking period preceding the averaging period; providing a compensation current during said averaging period; The capacitor configured as above; a current sensing circuit comprising:
6. 6. A current sensing circuit as claimed in claim 5, comprising: The current sensing circuit further comprising a buffer amplifier coupled to the resistor and the capacitor, the buffer amplifier configured to charge the capacitor during the blanking period.
7. 7. A current sensing circuit as claimed in claim 6, comprising: The current sensing circuit further includes a first switch configured to couple the output of the buffer amplifier to the capacitor.
8. 8. A current sensing circuit as claimed in claim 7, comprising: The current sensing circuit further includes a second switch configured to couple the input of the buffer amplifier to the capacitor.
9. 9. A current sensing circuit as claimed in claim 8, comprising: a third switch configured to couple the capacitor to the low pass filter; The second switch is further configured to couple the capacitor to the third switch.
10. 10. A current sensing circuit as claimed in claim 9, comprising: A control circuit comprising: closing the first switch and opening the second switch during the blanking period; opening the first switch and closing the second switch during the averaging period; The current sensing circuit further comprises a control circuit configured to:
11. 11. A current sensing circuit as claimed in claim 10, comprising: The current sensing circuit, wherein the control circuit is further configured to close the third switch during the averaging period.
12. 1. A DC-DC converter comprising: A switching transistor; a current sensing circuit coupled to the switching transistor and configured to sense a current flow in the switching transistor, a sense amplifier coupled to the switching transistor; a current mirror circuit coupled to the sense amplifier, the current mirror circuit configured to generate a sense current proportional to a current flowing through the switching transistor; a resistor coupled to the current mirror circuit, the resistor configured to generate a sense voltage based on the sense current; a low pass filter coupled to the resistor, the low pass filter configured to average the sensed voltage over an averaging period; and a capacitor coupled to the resistor, storing the sensed voltage during a blanking period preceding the averaging period; providing a compensation current during said averaging period; The capacitor configured as above; a buffer amplifier coupled to the resistor and the capacitor, the buffer amplifier configured to charge the capacitor during the blanking period; the current sensing circuit comprising: A DC-DC converter comprising:
13. 13. The DC-DC converter according to claim 12, The current sense circuit further includes a first switch configured to couple an output signal from the buffer amplifier to the capacitor.
14. 14. The DC-DC converter according to claim 13, The current sense circuit further includes a second switch configured to couple the input of the buffer amplifier to the capacitor.
15. 15. The DC-DC converter according to claim 14, the current sense circuit further includes a third switch configured to couple the capacitor to the low pass filter; The second switch is further configured to couple the capacitor to the third switch.
16. 16. The DC-DC converter according to claim 15, The DC-DC converter further comprises a control circuit configured such that the current sense circuit closes the first switch and opens the second switch during the blanking period.
17. 17. The DC-DC converter according to claim 16, The DC-DC converter, wherein the control circuit is further configured to open the first switch and close the second switch during the averaging period.
18. 18. The DC-DC converter of claim 17, The DC-DC converter, wherein the control circuit is further configured to close the third switch during the averaging period.